radeon_output.c revision 40732134
1209ff23fSmrg/*
2209ff23fSmrg * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3209ff23fSmrg *                VA Linux Systems Inc., Fremont, California.
4209ff23fSmrg *
5209ff23fSmrg * All Rights Reserved.
6209ff23fSmrg *
7209ff23fSmrg * Permission is hereby granted, free of charge, to any person obtaining
8209ff23fSmrg * a copy of this software and associated documentation files (the
9209ff23fSmrg * "Software"), to deal in the Software without restriction, including
10209ff23fSmrg * without limitation on the rights to use, copy, modify, merge,
11209ff23fSmrg * publish, distribute, sublicense, and/or sell copies of the Software,
12209ff23fSmrg * and to permit persons to whom the Software is furnished to do so,
13209ff23fSmrg * subject to the following conditions:
14209ff23fSmrg *
15209ff23fSmrg * The above copyright notice and this permission notice (including the
16209ff23fSmrg * next paragraph) shall be included in all copies or substantial
17209ff23fSmrg * portions of the Software.
18209ff23fSmrg *
19209ff23fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20209ff23fSmrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21209ff23fSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
22209ff23fSmrg * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
23209ff23fSmrg * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
24209ff23fSmrg * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25209ff23fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26209ff23fSmrg * DEALINGS IN THE SOFTWARE.
27209ff23fSmrg */
28209ff23fSmrg
29209ff23fSmrg#ifdef HAVE_CONFIG_H
30209ff23fSmrg#include "config.h"
31209ff23fSmrg#endif
32209ff23fSmrg
33209ff23fSmrg#include <string.h>
34209ff23fSmrg#include <stdio.h>
35ad43ddacSmrg#include <fcntl.h>
36209ff23fSmrg
37209ff23fSmrg/* X and server generic header files */
38209ff23fSmrg#include "xf86.h"
39209ff23fSmrg#include "xf86_OSproc.h"
40209ff23fSmrg#include "vgaHW.h"
41209ff23fSmrg#include "xf86Modes.h"
42209ff23fSmrg
43209ff23fSmrg/* Driver data structures */
44209ff23fSmrg#include "radeon.h"
45209ff23fSmrg#include "radeon_reg.h"
46209ff23fSmrg#include "radeon_macros.h"
47209ff23fSmrg#include "radeon_probe.h"
48209ff23fSmrg#include "radeon_version.h"
49209ff23fSmrg#include "radeon_tv.h"
50209ff23fSmrg#include "radeon_atombios.h"
51209ff23fSmrg
52b7e1c893Smrgconst char *encoder_name[34] = {
53b7e1c893Smrg    "NONE",
54b7e1c893Smrg    "INTERNAL_LVDS",
55b7e1c893Smrg    "INTERNAL_TMDS1",
56b7e1c893Smrg    "INTERNAL_TMDS2",
57b7e1c893Smrg    "INTERNAL_DAC1",
58b7e1c893Smrg    "INTERNAL_DAC2",
59b7e1c893Smrg    "INTERNAL_SDVOA",
60b7e1c893Smrg    "INTERNAL_SDVOB",
61b7e1c893Smrg    "SI170B",
62b7e1c893Smrg    "CH7303",
63b7e1c893Smrg    "CH7301",
64b7e1c893Smrg    "INTERNAL_DVO1",
65b7e1c893Smrg    "EXTERNAL_SDVOA",
66b7e1c893Smrg    "EXTERNAL_SDVOB",
67b7e1c893Smrg    "TITFP513",
68b7e1c893Smrg    "INTERNAL_LVTM1",
69b7e1c893Smrg    "VT1623",
70b7e1c893Smrg    "HDMI_SI1930",
71b7e1c893Smrg    "HDMI_INTERNAL",
72b7e1c893Smrg    "INTERNAL_KLDSCP_TMDS1",
73b7e1c893Smrg    "INTERNAL_KLDSCP_DVO1",
74b7e1c893Smrg    "INTERNAL_KLDSCP_DAC1",
75b7e1c893Smrg    "INTERNAL_KLDSCP_DAC2",
76b7e1c893Smrg    "SI178",
77b7e1c893Smrg    "MVPU_FPGA",
78b7e1c893Smrg    "INTERNAL_DDI",
79b7e1c893Smrg    "VT1625",
80b7e1c893Smrg    "HDMI_SI1932",
81b7e1c893Smrg    "DP_AN9801",
82b7e1c893Smrg    "DP_DP501",
83b7e1c893Smrg    "INTERNAL_UNIPHY",
84b7e1c893Smrg    "INTERNAL_KLDSCP_LVTMA",
85b7e1c893Smrg    "INTERNAL_UNIPHY1",
86b7e1c893Smrg    "INTERNAL_UNIPHY2",
87209ff23fSmrg};
88209ff23fSmrg
89ad43ddacSmrgconst char *ConnectorTypeName[18] = {
90209ff23fSmrg  "None",
91209ff23fSmrg  "VGA",
92209ff23fSmrg  "DVI-I",
93209ff23fSmrg  "DVI-D",
94209ff23fSmrg  "DVI-A",
95b7e1c893Smrg  "S-video",
96b7e1c893Smrg  "Composite",
97209ff23fSmrg  "LVDS",
98209ff23fSmrg  "Digital",
99209ff23fSmrg  "SCART",
100209ff23fSmrg  "HDMI-A",
101209ff23fSmrg  "HDMI-B",
102209ff23fSmrg  "Unsupported",
103209ff23fSmrg  "Unsupported",
104209ff23fSmrg  "DIN",
105209ff23fSmrg  "DisplayPort",
106ad43ddacSmrg  "eDP",
107209ff23fSmrg  "Unsupported"
108209ff23fSmrg};
109209ff23fSmrg
110209ff23fSmrgextern void atombios_output_mode_set(xf86OutputPtr output,
111209ff23fSmrg				     DisplayModePtr mode,
112209ff23fSmrg				     DisplayModePtr adjusted_mode);
113209ff23fSmrgextern void atombios_output_dpms(xf86OutputPtr output, int mode);
114b7e1c893Smrgextern RADEONMonitorType atombios_dac_detect(xf86OutputPtr output);
115b7e1c893Smrgextern AtomBiosResult
116b7e1c893Smrgatombios_lock_crtc(atomBiosHandlePtr atomBIOS, int crtc, int lock);
117209ff23fSmrgstatic void
118209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode);
119209ff23fSmrgstatic void
120209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output);
121209ff23fSmrgstatic void
122209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock);
123b13dfe66Smrgextern void
124b13dfe66Smrgatombios_pick_dig_encoder(xf86OutputPtr output);
125209ff23fSmrg
126209ff23fSmrgvoid RADEONPrintPortMap(ScrnInfoPtr pScrn)
127209ff23fSmrg{
128b7e1c893Smrg    RADEONInfoPtr info = RADEONPTR(pScrn);
129209ff23fSmrg    xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
130209ff23fSmrg    RADEONOutputPrivatePtr radeon_output;
131209ff23fSmrg    xf86OutputPtr output;
132209ff23fSmrg    int o;
133209ff23fSmrg
134209ff23fSmrg    for (o = 0; o < xf86_config->num_output; o++) {
135209ff23fSmrg	output = xf86_config->output[o];
136209ff23fSmrg	radeon_output = output->driver_private;
137209ff23fSmrg
138b7e1c893Smrg	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Port%d:\n", o);
139b7e1c893Smrg	ErrorF("  XRANDR name: %s\n", output->name);
140b7e1c893Smrg	ErrorF("  Connector: %s\n", ConnectorTypeName[radeon_output->ConnectorType]);
141b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
142b7e1c893Smrg	    ErrorF("  CRT1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT1_INDEX]->encoder_id]);
143b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
144b7e1c893Smrg	    ErrorF("  CRT2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT2_INDEX]->encoder_id]);
145b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT)
146b7e1c893Smrg	    ErrorF("  LCD1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_LCD1_INDEX]->encoder_id]);
147b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT)
148b7e1c893Smrg	    ErrorF("  DFP1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP1_INDEX]->encoder_id]);
149b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT)
150b7e1c893Smrg	    ErrorF("  DFP2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP2_INDEX]->encoder_id]);
151b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
152b7e1c893Smrg	    ErrorF("  DFP3: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP3_INDEX]->encoder_id]);
153b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT)
154b7e1c893Smrg	    ErrorF("  DFP4: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP4_INDEX]->encoder_id]);
155b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT)
156b7e1c893Smrg	    ErrorF("  DFP5: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP5_INDEX]->encoder_id]);
157b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
158b7e1c893Smrg	    ErrorF("  TV1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_TV1_INDEX]->encoder_id]);
159b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
160ad43ddacSmrg	    ErrorF("  CV: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CV_INDEX]->encoder_id]);
161b7e1c893Smrg	ErrorF("  DDC reg: 0x%x\n",(unsigned int)radeon_output->ddc_i2c.mask_clk_reg);
162209ff23fSmrg    }
163209ff23fSmrg
164209ff23fSmrg}
165209ff23fSmrg
166b7e1c893Smrgstatic void
167b7e1c893Smrgradeon_set_active_device(xf86OutputPtr output)
168209ff23fSmrg{
169209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
170209ff23fSmrg
171b7e1c893Smrg    radeon_output->active_device = 0;
172b7e1c893Smrg
173b7e1c893Smrg    switch (radeon_output->MonType) {
174b7e1c893Smrg    case MT_DP:
175b7e1c893Smrg    case MT_DFP:
176b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT)
177b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_DFP1_SUPPORT;
178b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT)
179b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_DFP2_SUPPORT;
180b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT)
181b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_DFP3_SUPPORT;
182b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT)
183b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_DFP4_SUPPORT;
184b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT)
185b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_DFP5_SUPPORT;
186ad43ddacSmrg	else if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT)
187ad43ddacSmrg	    radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT;
188ad43ddacSmrg	else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT)
189ad43ddacSmrg	    radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT;
190b7e1c893Smrg	break;
191b7e1c893Smrg    case MT_CRT:
192b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT)
193b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_CRT1_SUPPORT;
194b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT)
195b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_CRT2_SUPPORT;
196b7e1c893Smrg	break;
197b7e1c893Smrg    case MT_LCD:
198b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT)
199b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT;
200b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT)
201b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT;
202b7e1c893Smrg	break;
203b7e1c893Smrg    case MT_STV:
204b7e1c893Smrg    case MT_CTV:
205b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT)
206b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_TV1_SUPPORT;
207b7e1c893Smrg	else if (radeon_output->devices & ATOM_DEVICE_TV2_SUPPORT)
208b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_TV2_SUPPORT;
209b7e1c893Smrg	break;
210b7e1c893Smrg    case MT_CV:
211b7e1c893Smrg	if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT)
212b7e1c893Smrg	    radeon_output->active_device = ATOM_DEVICE_CV_SUPPORT;
213b7e1c893Smrg	break;
214b7e1c893Smrg    default:
215b7e1c893Smrg	ErrorF("Unhandled monitor type %d\n", radeon_output->MonType);
216b7e1c893Smrg	radeon_output->active_device = 0;
217209ff23fSmrg    }
218209ff23fSmrg}
219209ff23fSmrg
220ad43ddacSmrgstatic Bool
221ad43ddacSmrgmonitor_is_digital(xf86MonPtr MonInfo)
222ad43ddacSmrg{
223ad43ddacSmrg    return (MonInfo->rawData[0x14] & 0x80) != 0;
224ad43ddacSmrg}
225ad43ddacSmrg
226ad43ddacSmrgstatic void
227ad43ddacSmrgRADEONGetHardCodedEDIDFromFile(xf86OutputPtr output)
228ad43ddacSmrg{
229ad43ddacSmrg    ScrnInfoPtr pScrn = output->scrn;
230ad43ddacSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
231ad43ddacSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
232ad43ddacSmrg    char *EDIDlist = (char *)xf86GetOptValString(info->Options, OPTION_CUSTOM_EDID);
233ad43ddacSmrg
234ad43ddacSmrg    radeon_output->custom_edid = FALSE;
235ad43ddacSmrg    radeon_output->custom_mon = NULL;
236ad43ddacSmrg
237ad43ddacSmrg    if (EDIDlist != NULL) {
238ad43ddacSmrg	unsigned char* edid = xnfcalloc(128, 1);
239ad43ddacSmrg	char *name = output->name;
240ad43ddacSmrg	char *outputEDID = strstr(EDIDlist, name);
241ad43ddacSmrg
242ad43ddacSmrg	if (outputEDID != NULL) {
243ad43ddacSmrg	    char *end;
244ad43ddacSmrg	    char *colon;
245ad43ddacSmrg	    char *command = NULL;
246ad43ddacSmrg	    int fd;
247ad43ddacSmrg
248ad43ddacSmrg	    outputEDID += strlen(name) + 1;
249ad43ddacSmrg	    end = strstr(outputEDID, ";");
250ad43ddacSmrg	    if (end != NULL)
251ad43ddacSmrg		*end = 0;
252ad43ddacSmrg
253ad43ddacSmrg	    colon = strstr(outputEDID, ":");
254ad43ddacSmrg	    if (colon != NULL) {
255ad43ddacSmrg		*colon = 0;
256ad43ddacSmrg		command = colon + 1;
257ad43ddacSmrg	    }
258ad43ddacSmrg
259ad43ddacSmrg	    fd = open (outputEDID, O_RDONLY);
260ad43ddacSmrg	    if (fd >= 0) {
261ad43ddacSmrg		read(fd, edid, 128);
262ad43ddacSmrg		close(fd);
263ad43ddacSmrg		if (edid[1] == 0xff) {
264ad43ddacSmrg		    radeon_output->custom_mon = xf86InterpretEDID(output->scrn->scrnIndex, edid);
265ad43ddacSmrg		    radeon_output->custom_edid = TRUE;
266ad43ddacSmrg		    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
267ad43ddacSmrg			       "Successfully read Custom EDID data for output %s from %s.\n",
268ad43ddacSmrg			       name, outputEDID);
269ad43ddacSmrg		    if (command != NULL) {
270ad43ddacSmrg			if (!strcmp(command, "digital")) {
271ad43ddacSmrg			    radeon_output->custom_mon->rawData[0x14] |= 0x80;
272ad43ddacSmrg			    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
273ad43ddacSmrg				       "Forcing digital output for output %s.\n", name);
274ad43ddacSmrg			} else if (!strcmp(command, "analog")) {
275ad43ddacSmrg			    radeon_output->custom_mon->rawData[0x14] &= ~0x80;
276ad43ddacSmrg			    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
277ad43ddacSmrg				       "Forcing analog output for output %s.\n", name);
278ad43ddacSmrg			} else {
279ad43ddacSmrg			    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
280ad43ddacSmrg				       "Unknown custom EDID command: '%s'.\n",
281ad43ddacSmrg				       command);
282ad43ddacSmrg			}
283ad43ddacSmrg		    }
284ad43ddacSmrg		} else {
285ad43ddacSmrg		    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
286ad43ddacSmrg			       "Custom EDID data for %s read from %s was invalid.\n",
287ad43ddacSmrg			       name, outputEDID);
288ad43ddacSmrg		}
289ad43ddacSmrg	    } else {
290ad43ddacSmrg		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
291ad43ddacSmrg			   "Could not read custom EDID for output %s from file %s.\n",
292ad43ddacSmrg			   name, outputEDID);
293ad43ddacSmrg	    }
294ad43ddacSmrg	} else {
295ad43ddacSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
296ad43ddacSmrg		       "Could not find EDID file name for output %s; using auto detection.\n",
297ad43ddacSmrg		       name);
298ad43ddacSmrg	}
299ad43ddacSmrg    }
300ad43ddacSmrg}
301ad43ddacSmrg
302ad43ddacSmrg
303209ff23fSmrgstatic RADEONMonitorType
304209ff23fSmrgradeon_ddc_connected(xf86OutputPtr output)
305209ff23fSmrg{
306209ff23fSmrg    ScrnInfoPtr pScrn        = output->scrn;
307209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
308209ff23fSmrg    RADEONMonitorType MonType = MT_NONE;
309209ff23fSmrg    xf86MonPtr MonInfo = NULL;
310209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
311ad43ddacSmrg    int ret;
312ad43ddacSmrg
313ad43ddacSmrg    if (radeon_output->custom_edid) {
314ad43ddacSmrg	MonInfo = xnfcalloc(sizeof(xf86Monitor), 1);
315ad43ddacSmrg	*MonInfo = *radeon_output->custom_mon;
316ad43ddacSmrg    } else if ((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) ||
317ad43ddacSmrg	       (radeon_output->ConnectorType == CONNECTOR_EDP)) {
318ad43ddacSmrg	ret = RADEON_DP_GetSinkType(output);
319ad43ddacSmrg	if (ret == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
320ad43ddacSmrg	    ret == CONNECTOR_OBJECT_ID_eDP) {
321ad43ddacSmrg		MonInfo = xf86OutputGetEDID(output, radeon_output->dp_pI2CBus);
322ad43ddacSmrg	}
323ad43ddacSmrg	if (MonInfo == NULL) {
324ad43ddacSmrg	    if (radeon_output->pI2CBus) {
325ad43ddacSmrg		RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE);
326ad43ddacSmrg		MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
327ad43ddacSmrg		RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE);
328ad43ddacSmrg	    }
329ad43ddacSmrg	}
330ad43ddacSmrg    } else if (radeon_output->pI2CBus) {
331c503f109Smrg	if (info->get_hardcoded_edid_from_bios)
332b7e1c893Smrg	    MonInfo = RADEONGetHardCodedEDIDFromBIOS(output);
333c503f109Smrg	if (MonInfo == NULL) {
334c503f109Smrg	    RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE);
335b7e1c893Smrg	    MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus);
336c503f109Smrg	    RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE);
337b7e1c893Smrg	}
338b7e1c893Smrg    }
339209ff23fSmrg    if (MonInfo) {
340b7e1c893Smrg	switch (radeon_output->ConnectorType) {
341b7e1c893Smrg	case CONNECTOR_LVDS:
342209ff23fSmrg	    MonType = MT_LCD;
343b7e1c893Smrg	    break;
344b7e1c893Smrg	case CONNECTOR_DVI_D:
345b7e1c893Smrg	case CONNECTOR_HDMI_TYPE_A:
346b7e1c893Smrg	    if (radeon_output->shared_ddc) {
347ad43ddacSmrg		xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
348ad43ddacSmrg		int i;
349ad43ddacSmrg
350ad43ddacSmrg		if (monitor_is_digital(MonInfo))
351b7e1c893Smrg		    MonType = MT_DFP;
352b7e1c893Smrg		else
353b7e1c893Smrg		    MonType = MT_NONE;
354ad43ddacSmrg
355ad43ddacSmrg		for (i = 0; i < config->num_output; i++) {
356ad43ddacSmrg		    if (output != config->output[i]) {
357ad43ddacSmrg			RADEONOutputPrivatePtr other_radeon_output =
358ad43ddacSmrg			    config->output[i]->driver_private;
359ad43ddacSmrg			if (radeon_output->devices & other_radeon_output->devices) {
360ad43ddacSmrg#ifndef EDID_COMPLETE_RAWDATA
361ad43ddacSmrg			    if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) {
362ad43ddacSmrg				MonType = MT_NONE;
363ad43ddacSmrg				break;
364ad43ddacSmrg			    }
365ad43ddacSmrg#else
366ad43ddacSmrg			    if (xf86MonitorIsHDMI(MonInfo)) {
367ad43ddacSmrg				if (radeon_output->ConnectorType == CONNECTOR_DVI_D) {
368ad43ddacSmrg				    MonType = MT_NONE;
369ad43ddacSmrg				    break;
370ad43ddacSmrg				}
371ad43ddacSmrg			    } else {
372ad43ddacSmrg				if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) {
373ad43ddacSmrg				    MonType = MT_NONE;
374ad43ddacSmrg				    break;
375ad43ddacSmrg				}
376ad43ddacSmrg			    }
377ad43ddacSmrg#endif
378ad43ddacSmrg			}
379ad43ddacSmrg		    }
380ad43ddacSmrg		}
381b7e1c893Smrg	    } else
382b7e1c893Smrg		MonType = MT_DFP;
383b7e1c893Smrg	    break;
384b7e1c893Smrg	case CONNECTOR_DISPLAY_PORT:
385ad43ddacSmrg	case CONNECTOR_EDP:
386b7e1c893Smrg	    /*
387b7e1c893Smrg	     * XXX wrong. need to infer based on whether we got DDC from I2C
388b7e1c893Smrg	     * or AUXCH.
389b7e1c893Smrg	     */
390ad43ddacSmrg	    ret = RADEON_DP_GetSinkType(output);
391ad43ddacSmrg
392ad43ddacSmrg	    if ((ret == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
393ad43ddacSmrg		(ret == CONNECTOR_OBJECT_ID_eDP)) {
394ad43ddacSmrg		MonType = MT_DP;
395ad43ddacSmrg		RADEON_DP_GetDPCD(output);
396ad43ddacSmrg	    } else
397ad43ddacSmrg		MonType = MT_DFP;
398ad43ddacSmrg	    break;
399ad43ddacSmrg	case CONNECTOR_HDMI_TYPE_B:
400b7e1c893Smrg	case CONNECTOR_DVI_I:
401ad43ddacSmrg	    if (monitor_is_digital(MonInfo))
402b7e1c893Smrg		MonType = MT_DFP;
403b7e1c893Smrg	    else
404b7e1c893Smrg		MonType = MT_CRT;
405b7e1c893Smrg	    break;
406b7e1c893Smrg	case CONNECTOR_VGA:
407b7e1c893Smrg	case CONNECTOR_DVI_A:
408b7e1c893Smrg	default:
409b7e1c893Smrg	    if (radeon_output->shared_ddc) {
410ad43ddacSmrg		if (monitor_is_digital(MonInfo))
411b7e1c893Smrg		    MonType = MT_NONE;
412b7e1c893Smrg		else
413b7e1c893Smrg		    MonType = MT_CRT;
414b7e1c893Smrg	    } else
415b7e1c893Smrg		MonType = MT_CRT;
416b7e1c893Smrg	    break;
417b7e1c893Smrg	}
418b7e1c893Smrg
419ad43ddacSmrg	if (MonType != MT_NONE) {
420b7e1c893Smrg	    if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE))
421b7e1c893Smrg		xf86OutputSetEDID(output, MonInfo);
422ad43ddacSmrg	} else
4232f39173dSmrg	    free(MonInfo);
424209ff23fSmrg    } else
425209ff23fSmrg	MonType = MT_NONE;
426b7e1c893Smrg
427209ff23fSmrg    return MonType;
428209ff23fSmrg}
429209ff23fSmrg
430209ff23fSmrg#ifndef __powerpc__
431209ff23fSmrg
432209ff23fSmrgstatic RADEONMonitorType
433209ff23fSmrgRADEONDetectLidStatus(ScrnInfoPtr pScrn)
434209ff23fSmrg{
435209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
436209ff23fSmrg    RADEONMonitorType MonType = MT_NONE;
437209ff23fSmrg#ifdef __linux__
438209ff23fSmrg    char lidline[50];  /* 50 should be sufficient for our purposes */
439209ff23fSmrg    FILE *f = fopen ("/proc/acpi/button/lid/LID/state", "r");
440209ff23fSmrg
441209ff23fSmrg    if (f != NULL) {
442209ff23fSmrg	while (fgets(lidline, sizeof lidline, f)) {
443209ff23fSmrg	    if (!strncmp(lidline, "state:", strlen ("state:"))) {
444209ff23fSmrg		if (strstr(lidline, "open")) {
445209ff23fSmrg		    fclose(f);
446209ff23fSmrg		    ErrorF("proc lid open\n");
447209ff23fSmrg		    return MT_LCD;
448209ff23fSmrg		}
449209ff23fSmrg		else if (strstr(lidline, "closed")) {
450209ff23fSmrg		    fclose(f);
451209ff23fSmrg		    ErrorF("proc lid closed\n");
452209ff23fSmrg		    return MT_NONE;
453209ff23fSmrg		}
454209ff23fSmrg	    }
455209ff23fSmrg	}
456209ff23fSmrg	fclose(f);
457209ff23fSmrg    }
458209ff23fSmrg#endif
459209ff23fSmrg
460209ff23fSmrg    if (!info->IsAtomBios) {
461209ff23fSmrg	unsigned char *RADEONMMIO = info->MMIO;
462209ff23fSmrg
463209ff23fSmrg	/* see if the lid is closed -- only works at boot */
464209ff23fSmrg	if (INREG(RADEON_BIOS_6_SCRATCH) & 0x10)
465209ff23fSmrg	    MonType = MT_NONE;
466209ff23fSmrg	else
467209ff23fSmrg	    MonType = MT_LCD;
468209ff23fSmrg    } else
469209ff23fSmrg	MonType = MT_LCD;
470209ff23fSmrg
471209ff23fSmrg    return MonType;
472209ff23fSmrg}
473209ff23fSmrg
474209ff23fSmrg#endif /* __powerpc__ */
475209ff23fSmrg
476209ff23fSmrgstatic void
477209ff23fSmrgradeon_dpms(xf86OutputPtr output, int mode)
478209ff23fSmrg{
479209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
480209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
481209ff23fSmrg
482209ff23fSmrg    if ((mode == DPMSModeOn) && radeon_output->enabled)
483209ff23fSmrg	return;
484209ff23fSmrg
485ad43ddacSmrg    if ((mode != DPMSModeOn) && radeon_output->shared_ddc) {
486ad43ddacSmrg	xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn);
487ad43ddacSmrg	int i;
488ad43ddacSmrg
489ad43ddacSmrg	for (i = 0; i < config->num_output; i++) {
490ad43ddacSmrg	    if (output != config->output[i]) {
491ad43ddacSmrg		RADEONOutputPrivatePtr other_radeon_output =
492ad43ddacSmrg		    config->output[i]->driver_private;
493ad43ddacSmrg		if (radeon_output->devices & other_radeon_output->devices) {
494ad43ddacSmrg		    if (output->status == XF86OutputStatusDisconnected)
495ad43ddacSmrg			return;
496ad43ddacSmrg		}
497ad43ddacSmrg	    }
498ad43ddacSmrg	}
499ad43ddacSmrg    }
500ad43ddacSmrg
501b7e1c893Smrg    if (IS_AVIVO_VARIANT || info->r4xx_atom) {
502209ff23fSmrg	atombios_output_dpms(output, mode);
503209ff23fSmrg    } else {
504209ff23fSmrg	legacy_output_dpms(output, mode);
505209ff23fSmrg    }
506209ff23fSmrg    radeon_bios_output_dpms(output, mode);
507209ff23fSmrg
508209ff23fSmrg    if (mode == DPMSModeOn)
509209ff23fSmrg	radeon_output->enabled = TRUE;
510209ff23fSmrg    else
511209ff23fSmrg	radeon_output->enabled = FALSE;
512209ff23fSmrg
513209ff23fSmrg}
514209ff23fSmrg
515209ff23fSmrgstatic void
516209ff23fSmrgradeon_save(xf86OutputPtr output)
517209ff23fSmrg{
518209ff23fSmrg
519209ff23fSmrg}
520209ff23fSmrg
521209ff23fSmrgstatic void
522209ff23fSmrgradeon_restore(xf86OutputPtr restore)
523209ff23fSmrg{
524209ff23fSmrg
525209ff23fSmrg}
526209ff23fSmrg
527209ff23fSmrgstatic int
528209ff23fSmrgradeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
529209ff23fSmrg{
530209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
531b7e1c893Smrg    radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
532209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
533209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
534209ff23fSmrg    RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
535209ff23fSmrg
536209ff23fSmrg    /*
537209ff23fSmrg     * RN50 has effective maximum mode bandwidth of about 300MiB/s.
538209ff23fSmrg     * XXX should really do this for all chips by properly computing
539209ff23fSmrg     * memory bandwidth and an overhead factor.
540209ff23fSmrg     */
541209ff23fSmrg    if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) {
542209ff23fSmrg	if (xf86ModeBandwidth(pMode, pScrn->bitsPerPixel) > 300)
543209ff23fSmrg	    return MODE_BANDWIDTH;
544209ff23fSmrg    }
545209ff23fSmrg
546b7e1c893Smrg    if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
547b7e1c893Smrg	if (IS_AVIVO_VARIANT)
548b7e1c893Smrg	    return MODE_OK;
549b7e1c893Smrg	else {
550b7e1c893Smrg	    /* FIXME: Update when more modes are added */
551209ff23fSmrg	    if (pMode->HDisplay == 800 && pMode->VDisplay == 600)
552209ff23fSmrg		return MODE_OK;
553209ff23fSmrg	    else
554209ff23fSmrg		return MODE_CLOCK_RANGE;
555209ff23fSmrg	}
556209ff23fSmrg    }
557209ff23fSmrg
558ad43ddacSmrg    /* clocks over 135 MHz have heat issues with DVI on RV100 */
559ad43ddacSmrg    if ((radeon_output->MonType == MT_DFP) &&
560ad43ddacSmrg	(info->ChipFamily == CHIP_FAMILY_RV100) &&
561ad43ddacSmrg	(pMode->Clock > 135000))
562ad43ddacSmrg	    return MODE_CLOCK_HIGH;
563ad43ddacSmrg
564b7e1c893Smrg    /* single link DVI check */
565b7e1c893Smrg    if (pMode->Clock > 165000 && radeon_output->MonType == MT_DFP) {
566b7e1c893Smrg	/* DP->DVI converter */
567b7e1c893Smrg	if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT)
568b7e1c893Smrg	    return MODE_CLOCK_HIGH;
569b7e1c893Smrg
570ad43ddacSmrg	if (radeon_output->ConnectorType == CONNECTOR_EDP)
571ad43ddacSmrg	    return MODE_CLOCK_HIGH;
572ad43ddacSmrg
573b7e1c893Smrg	/* XXX some HDMI can do better than 165MHz on a link */
574b7e1c893Smrg	if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A)
575b7e1c893Smrg	    return MODE_CLOCK_HIGH;
576b7e1c893Smrg
577b7e1c893Smrg	/* XXX some R300 and R400 can actually do this */
578b7e1c893Smrg	if (!IS_AVIVO_VARIANT)
579b7e1c893Smrg	    return MODE_CLOCK_HIGH;
580b7e1c893Smrg
581b7e1c893Smrg	/* XXX and some AVIVO can't */
582b7e1c893Smrg    }
583b7e1c893Smrg
584b7e1c893Smrg    if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
585209ff23fSmrg	if (radeon_output->rmx_type == RMX_OFF) {
586b7e1c893Smrg	    if (pMode->HDisplay != native_mode->PanelXRes ||
587b7e1c893Smrg		pMode->VDisplay != native_mode->PanelYRes)
588209ff23fSmrg		return MODE_PANEL;
589209ff23fSmrg	}
590b7e1c893Smrg	if (pMode->HDisplay > native_mode->PanelXRes ||
591b7e1c893Smrg	    pMode->VDisplay > native_mode->PanelYRes)
592209ff23fSmrg	    return MODE_PANEL;
593209ff23fSmrg    }
594209ff23fSmrg
595209ff23fSmrg    return MODE_OK;
596209ff23fSmrg}
597209ff23fSmrg
598209ff23fSmrgstatic Bool
599209ff23fSmrgradeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
600209ff23fSmrg		    DisplayModePtr adjusted_mode)
601209ff23fSmrg{
602209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
603209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
604b7e1c893Smrg    radeon_native_mode_ptr native_mode = &radeon_output->native_mode;
605ad43ddacSmrg    xf86CrtcPtr crtc = output->crtc;
606ad43ddacSmrg    RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
607209ff23fSmrg
608209ff23fSmrg    radeon_output->Flags &= ~RADEON_USE_RMX;
609ad43ddacSmrg    radeon_crtc->scaler_enabled = FALSE;
610209ff23fSmrg
611b7e1c893Smrg    /*
612b7e1c893Smrg     *  Refresh the Crtc values without INTERLACE_HALVE_V
613b7e1c893Smrg     *  Should we use output->scrn->adjustFlags like xf86RandRModeConvert() does?
614b7e1c893Smrg     */
615b7e1c893Smrg    xf86SetModeCrtc(adjusted_mode, 0);
616b7e1c893Smrg
617209ff23fSmrg    /* decide if we are using RMX */
618b7e1c893Smrg    if ((radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT))
619209ff23fSmrg	&& radeon_output->rmx_type != RMX_OFF) {
620209ff23fSmrg
621209ff23fSmrg	if (IS_AVIVO_VARIANT || radeon_crtc->crtc_id == 0) {
622b7e1c893Smrg	    if (mode->HDisplay < native_mode->PanelXRes ||
623b7e1c893Smrg		mode->VDisplay < native_mode->PanelYRes) {
624209ff23fSmrg		radeon_output->Flags |= RADEON_USE_RMX;
625ad43ddacSmrg		radeon_crtc->scaler_enabled = TRUE;
626209ff23fSmrg		if (IS_AVIVO_VARIANT) {
627ad43ddacSmrg		    radeon_crtc->hsc = (float)mode->HDisplay / (float)native_mode->PanelXRes;
628ad43ddacSmrg		    radeon_crtc->vsc = (float)mode->VDisplay / (float)native_mode->PanelYRes;
629209ff23fSmrg		    /* set to the panel's native mode */
630b7e1c893Smrg		    adjusted_mode->HDisplay = native_mode->PanelXRes;
631b7e1c893Smrg		    adjusted_mode->VDisplay = native_mode->PanelYRes;
632b7e1c893Smrg		    adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank;
633b7e1c893Smrg		    adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus;
634b7e1c893Smrg		    adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth;
635b7e1c893Smrg		    adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank;
636b7e1c893Smrg		    adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus;
637b7e1c893Smrg		    adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth;
638209ff23fSmrg		    /* update crtc values */
639209ff23fSmrg		    xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V);
640209ff23fSmrg		    /* adjust crtc values */
641b7e1c893Smrg		    adjusted_mode->CrtcHDisplay = native_mode->PanelXRes;
642b7e1c893Smrg		    adjusted_mode->CrtcVDisplay = native_mode->PanelYRes;
643b7e1c893Smrg		    adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank;
644b7e1c893Smrg		    adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus;
645b7e1c893Smrg		    adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth;
646b7e1c893Smrg		    adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank;
647b7e1c893Smrg		    adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus;
648b7e1c893Smrg		    adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth;
649209ff23fSmrg		} else {
650209ff23fSmrg		    /* set to the panel's native mode */
651b7e1c893Smrg		    adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank;
652b7e1c893Smrg		    adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus;
653b7e1c893Smrg		    adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth;
654b7e1c893Smrg		    adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank;
655b7e1c893Smrg		    adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus;
656b7e1c893Smrg		    adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth;
657b7e1c893Smrg		    adjusted_mode->Clock = native_mode->DotClock;
658209ff23fSmrg		    /* update crtc values */
659209ff23fSmrg		    xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V);
660209ff23fSmrg		    /* adjust crtc values */
661b7e1c893Smrg		    adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank;
662b7e1c893Smrg		    adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus;
663b7e1c893Smrg		    adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth;
664b7e1c893Smrg		    adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank;
665b7e1c893Smrg		    adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus;
666b7e1c893Smrg		    adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth;
667209ff23fSmrg		}
668b7e1c893Smrg		adjusted_mode->Clock = native_mode->DotClock;
669b7e1c893Smrg		adjusted_mode->Flags = native_mode->Flags;
670209ff23fSmrg	    }
671209ff23fSmrg	}
672209ff23fSmrg    }
673209ff23fSmrg
674ad43ddacSmrg    /* FIXME: vsc/hsc */
675ad43ddacSmrg    if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) {
676ad43ddacSmrg	radeon_crtc->scaler_enabled = TRUE;
677ad43ddacSmrg	radeon_crtc->hsc = (float)mode->HDisplay / (float)640;
678ad43ddacSmrg	radeon_crtc->vsc = (float)mode->VDisplay / (float)480;
679ad43ddacSmrg    }
680ad43ddacSmrg
681b7e1c893Smrg    if (IS_AVIVO_VARIANT) {
682b7e1c893Smrg	/* hw bug */
683b7e1c893Smrg	if ((mode->Flags & V_INTERLACE)
684b7e1c893Smrg	    && (adjusted_mode->CrtcVSyncStart < (adjusted_mode->CrtcVDisplay + 2)))
685b7e1c893Smrg	    adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + 2;
686b7e1c893Smrg    }
687b7e1c893Smrg
688ad43ddacSmrg    if (IS_AVIVO_VARIANT || info->r4xx_atom) {
689ad43ddacSmrg	if (radeon_output->MonType == MT_STV || radeon_output->MonType == MT_CTV) {
690ad43ddacSmrg	    radeon_tvout_ptr tvout = &radeon_output->tvout;
691ad43ddacSmrg	    ScrnInfoPtr pScrn = output->scrn;
692ad43ddacSmrg
693ad43ddacSmrg	    if (tvout->tvStd == TV_STD_NTSC ||
694ad43ddacSmrg		tvout->tvStd == TV_STD_NTSC_J ||
695ad43ddacSmrg		tvout->tvStd == TV_STD_PAL_M)
696ad43ddacSmrg		RADEONATOMGetTVTimings(pScrn, 0, adjusted_mode);
697ad43ddacSmrg	    else
698ad43ddacSmrg		RADEONATOMGetTVTimings(pScrn, 1, adjusted_mode);
699ad43ddacSmrg	}
700ad43ddacSmrg    }
701ad43ddacSmrg
702ad43ddacSmrg    if (((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) ||
703ad43ddacSmrg	 (radeon_output->ConnectorType == CONNECTOR_EDP)) &&
704ad43ddacSmrg	(radeon_output->MonType == MT_DP)) {
705ad43ddacSmrg      radeon_dp_mode_fixup(output, mode, adjusted_mode);
706ad43ddacSmrg    }
707209ff23fSmrg    return TRUE;
708209ff23fSmrg}
709209ff23fSmrg
710209ff23fSmrgstatic void
711209ff23fSmrgradeon_mode_prepare(xf86OutputPtr output)
712209ff23fSmrg{
713c503f109Smrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
714c503f109Smrg    xf86CrtcConfigPtr	config = XF86_CRTC_CONFIG_PTR (output->scrn);
715c503f109Smrg    int o;
716c503f109Smrg
717c503f109Smrg    for (o = 0; o < config->num_output; o++) {
718c503f109Smrg	xf86OutputPtr loop_output = config->output[o];
719c503f109Smrg	if (loop_output == output)
720c503f109Smrg	    continue;
721c503f109Smrg	else if (loop_output->crtc) {
722c503f109Smrg	    xf86CrtcPtr other_crtc = loop_output->crtc;
723c503f109Smrg	    RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
724c503f109Smrg	    if (other_crtc->enabled) {
725c503f109Smrg		if (other_radeon_crtc->initialized) {
726c503f109Smrg		    radeon_crtc_dpms(other_crtc, DPMSModeOff);
727c503f109Smrg		    if (IS_AVIVO_VARIANT || info->r4xx_atom)
728c503f109Smrg			atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1);
729c503f109Smrg		    radeon_dpms(loop_output, DPMSModeOff);
730c503f109Smrg		}
731c503f109Smrg	    }
732c503f109Smrg	}
733c503f109Smrg    }
734c503f109Smrg
735209ff23fSmrg    radeon_bios_output_lock(output, TRUE);
736b13dfe66Smrg    if (IS_AVIVO_VARIANT)
737b13dfe66Smrg	atombios_pick_dig_encoder(output);
738209ff23fSmrg    radeon_dpms(output, DPMSModeOff);
739c503f109Smrg    radeon_crtc_dpms(output->crtc, DPMSModeOff);
740c503f109Smrg
7410974d292Smrg    if (IS_AVIVO_VARIANT || info->r4xx_atom)
7420974d292Smrg        atombios_set_output_crtc_source(output);
7430974d292Smrg
744209ff23fSmrg}
745209ff23fSmrg
746209ff23fSmrgstatic void
747209ff23fSmrgradeon_mode_set(xf86OutputPtr output, DisplayModePtr mode,
748209ff23fSmrg		DisplayModePtr adjusted_mode)
749209ff23fSmrg{
750209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
751209ff23fSmrg
752b7e1c893Smrg    if (IS_AVIVO_VARIANT || info->r4xx_atom)
753209ff23fSmrg	atombios_output_mode_set(output, mode, adjusted_mode);
754209ff23fSmrg    else
755209ff23fSmrg	legacy_output_mode_set(output, mode, adjusted_mode);
756209ff23fSmrg    radeon_bios_output_crtc(output);
757209ff23fSmrg
758209ff23fSmrg}
759209ff23fSmrg
760209ff23fSmrgstatic void
761209ff23fSmrgradeon_mode_commit(xf86OutputPtr output)
762209ff23fSmrg{
763c503f109Smrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
764c503f109Smrg    xf86CrtcConfigPtr	config = XF86_CRTC_CONFIG_PTR (output->scrn);
765c503f109Smrg    int o;
766c503f109Smrg
767c503f109Smrg    for (o = 0; o < config->num_output; o++) {
768c503f109Smrg	xf86OutputPtr loop_output = config->output[o];
769c503f109Smrg	if (loop_output == output)
770c503f109Smrg	    continue;
771c503f109Smrg	else if (loop_output->crtc) {
772c503f109Smrg	    xf86CrtcPtr other_crtc = loop_output->crtc;
773c503f109Smrg	    RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private;
774c503f109Smrg	    if (other_crtc->enabled) {
775c503f109Smrg		if (other_radeon_crtc->initialized) {
776c503f109Smrg		    radeon_crtc_dpms(other_crtc, DPMSModeOn);
777c503f109Smrg		    if (IS_AVIVO_VARIANT || info->r4xx_atom)
778c503f109Smrg			atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0);
779c503f109Smrg		    radeon_dpms(loop_output, DPMSModeOn);
780c503f109Smrg		}
781c503f109Smrg	    }
782c503f109Smrg	}
783c503f109Smrg    }
784c503f109Smrg
785209ff23fSmrg    radeon_dpms(output, DPMSModeOn);
786c503f109Smrg    radeon_crtc_dpms(output->crtc, DPMSModeOn);
787209ff23fSmrg    radeon_bios_output_lock(output, FALSE);
788209ff23fSmrg}
789209ff23fSmrg
790209ff23fSmrgstatic void
791209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock)
792209ff23fSmrg{
793209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
794209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
795209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
796209ff23fSmrg    RADEONSavePtr save = info->ModeReg;
797209ff23fSmrg
798209ff23fSmrg    if (info->IsAtomBios) {
799209ff23fSmrg	if (lock) {
800209ff23fSmrg	    save->bios_6_scratch |= ATOM_S6_CRITICAL_STATE;
801209ff23fSmrg	} else {
802209ff23fSmrg	    save->bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE;
803209ff23fSmrg	}
804209ff23fSmrg    } else {
805209ff23fSmrg	if (lock) {
806209ff23fSmrg	    save->bios_6_scratch |= RADEON_DRIVER_CRITICAL;
807209ff23fSmrg	} else {
808209ff23fSmrg	    save->bios_6_scratch &= ~RADEON_DRIVER_CRITICAL;
809209ff23fSmrg	}
810209ff23fSmrg    }
811209ff23fSmrg    if (info->ChipFamily >= CHIP_FAMILY_R600)
812209ff23fSmrg	OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch);
813209ff23fSmrg    else
814209ff23fSmrg	OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
815209ff23fSmrg}
816209ff23fSmrg
817209ff23fSmrgstatic void
818209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode)
819209ff23fSmrg{
820209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
821209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
822209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
823209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
824209ff23fSmrg    RADEONSavePtr save = info->ModeReg;
825209ff23fSmrg
826209ff23fSmrg    if (info->IsAtomBios) {
827b7e1c893Smrg	if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) {
828b7e1c893Smrg	    if (mode == DPMSModeOn)
829b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE;
830b7e1c893Smrg	    else
831b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE;
832b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) {
833b7e1c893Smrg	    if (mode == DPMSModeOn)
834b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE;
835b7e1c893Smrg	    else
836b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_CV_DPMS_STATE;
837b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) {
838b7e1c893Smrg	    if (mode == DPMSModeOn)
839b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE;
840b7e1c893Smrg	    else
841b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE;
842b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) {
843b7e1c893Smrg	    if (mode == DPMSModeOn)
844b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE;
845b7e1c893Smrg	    else
846b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE;
847b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) {
848b7e1c893Smrg	    if (mode == DPMSModeOn)
849b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE;
850b7e1c893Smrg	    else
851b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE;
852b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) {
853b7e1c893Smrg	    if (mode == DPMSModeOn)
854b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE;
855b7e1c893Smrg	    else
856b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE;
857b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) {
858b7e1c893Smrg	    if (mode == DPMSModeOn)
859b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE;
860b7e1c893Smrg	    else
861b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE;
862b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) {
863b7e1c893Smrg	    if (mode == DPMSModeOn)
864b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE;
865b7e1c893Smrg	    else
866b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE;
867b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP4_SUPPORT) {
868b7e1c893Smrg	    if (mode == DPMSModeOn)
869b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE;
870b7e1c893Smrg	    else
871b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE;
872b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP5_SUPPORT) {
873b7e1c893Smrg	    if (mode == DPMSModeOn)
874b7e1c893Smrg		save->bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE;
875b7e1c893Smrg	    else
876b7e1c893Smrg		save->bios_2_scratch |= ATOM_S2_DFP5_DPMS_STATE;
877209ff23fSmrg	}
878b7e1c893Smrg	if (info->ChipFamily >= CHIP_FAMILY_R600)
879209ff23fSmrg	    OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch);
880b7e1c893Smrg	else
881209ff23fSmrg	    OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch);
882209ff23fSmrg    } else {
883209ff23fSmrg	if (mode == DPMSModeOn) {
884209ff23fSmrg	    save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING);
885209ff23fSmrg	    save->bios_6_scratch |= RADEON_DPMS_ON;
886209ff23fSmrg	} else {
887209ff23fSmrg	    save->bios_6_scratch &= ~RADEON_DPMS_MASK;
888209ff23fSmrg	    save->bios_6_scratch |= (RADEON_DPMS_OFF | RADEON_SCREEN_BLANKING);
889b7e1c893Smrg	}
890b7e1c893Smrg	if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) {
891b7e1c893Smrg	    if (mode == DPMSModeOn)
892b7e1c893Smrg		save->bios_6_scratch |= RADEON_TV_DPMS_ON;
893b7e1c893Smrg	    else
894209ff23fSmrg		save->bios_6_scratch &= ~RADEON_TV_DPMS_ON;
895b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) {
896b7e1c893Smrg	    if (mode == DPMSModeOn)
897b7e1c893Smrg		save->bios_6_scratch |= RADEON_CRT_DPMS_ON;
898b7e1c893Smrg	    else
899209ff23fSmrg		save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON;
900b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) {
901b7e1c893Smrg	    if (mode == DPMSModeOn)
902b7e1c893Smrg		save->bios_6_scratch |= RADEON_CRT_DPMS_ON;
903b7e1c893Smrg	    else
904b7e1c893Smrg		save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON;
905b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) {
906b7e1c893Smrg	    if (mode == DPMSModeOn)
907b7e1c893Smrg		save->bios_6_scratch |= RADEON_LCD_DPMS_ON;
908b7e1c893Smrg	    else
909209ff23fSmrg		save->bios_6_scratch &= ~RADEON_LCD_DPMS_ON;
910b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) {
911b7e1c893Smrg	    if (mode == DPMSModeOn)
912b7e1c893Smrg		save->bios_6_scratch |= RADEON_DFP_DPMS_ON;
913b7e1c893Smrg	    else
914b7e1c893Smrg		save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON;
915b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) {
916b7e1c893Smrg	    if (mode == DPMSModeOn)
917b7e1c893Smrg		save->bios_6_scratch |= RADEON_DFP_DPMS_ON;
918b7e1c893Smrg	    else
919209ff23fSmrg		save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON;
920209ff23fSmrg	}
921209ff23fSmrg	OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch);
922209ff23fSmrg    }
923209ff23fSmrg}
924209ff23fSmrg
925209ff23fSmrgstatic void
926209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output)
927209ff23fSmrg{
928209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
929209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
930209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
931209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
932209ff23fSmrg    RADEONSavePtr save = info->ModeReg;
933209ff23fSmrg    xf86CrtcPtr crtc = output->crtc;
934209ff23fSmrg    RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private;
935209ff23fSmrg
936ad43ddacSmrg    /* no need to update crtc routing scratch regs on DCE4 */
937ad43ddacSmrg    if (IS_DCE4_VARIANT)
938ad43ddacSmrg	return;
939ad43ddacSmrg
940209ff23fSmrg    if (info->IsAtomBios) {
941b7e1c893Smrg	if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) {
942b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE;
943b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 18);
944b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) {
945b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE;
946b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 24);
947b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) {
948b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE;
949b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 16);
950b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) {
951b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE;
952b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 20);
953b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) {
954b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE;
955b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 17);
956b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) {
957b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE;
958b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 19);
959b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) {
960b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE;
961b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 23);
962b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) {
963b7e1c893Smrg	    save->bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE;
964b7e1c893Smrg	    save->bios_3_scratch |= (radeon_crtc->crtc_id << 25);
965209ff23fSmrg	}
966209ff23fSmrg	if (info->ChipFamily >= CHIP_FAMILY_R600)
967209ff23fSmrg	    OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch);
968209ff23fSmrg	else
969209ff23fSmrg	    OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
970209ff23fSmrg    } else {
971b7e1c893Smrg	if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) {
972209ff23fSmrg	    save->bios_5_scratch &= ~RADEON_TV1_CRTC_MASK;
973209ff23fSmrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_TV1_CRTC_SHIFT);
974b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) {
975b7e1c893Smrg	    save->bios_5_scratch &= ~RADEON_CRT1_CRTC_MASK;
976b7e1c893Smrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT1_CRTC_SHIFT);
977b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) {
978b7e1c893Smrg	    save->bios_5_scratch &= ~RADEON_CRT2_CRTC_MASK;
979b7e1c893Smrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT2_CRTC_SHIFT);
980b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) {
981209ff23fSmrg	    save->bios_5_scratch &= ~RADEON_LCD1_CRTC_MASK;
982209ff23fSmrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_LCD1_CRTC_SHIFT);
983b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) {
984b7e1c893Smrg	    save->bios_5_scratch &= ~RADEON_DFP1_CRTC_MASK;
985b7e1c893Smrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP1_CRTC_SHIFT);
986b7e1c893Smrg	} else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) {
987b7e1c893Smrg	    save->bios_5_scratch &= ~RADEON_DFP2_CRTC_MASK;
988b7e1c893Smrg	    save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP2_CRTC_SHIFT);
989209ff23fSmrg	}
990209ff23fSmrg	OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch);
991209ff23fSmrg    }
992209ff23fSmrg}
993209ff23fSmrg
994209ff23fSmrgstatic void
995209ff23fSmrgradeon_bios_output_connected(xf86OutputPtr output, Bool connected)
996209ff23fSmrg{
997209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
998209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
999209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
1000209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
1001209ff23fSmrg    RADEONSavePtr save = info->ModeReg;
1002209ff23fSmrg
1003209ff23fSmrg    if (info->IsAtomBios) {
1004b7e1c893Smrg	switch (radeon_output->active_device) {
1005b7e1c893Smrg	case ATOM_DEVICE_TV1_SUPPORT:
1006b7e1c893Smrg	    if (connected)
1007b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE;
1008b7e1c893Smrg	    else {
1009b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_TV1_MASK;
1010b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE;
1011209ff23fSmrg	    }
1012b7e1c893Smrg	    break;
1013b7e1c893Smrg	case ATOM_DEVICE_CV_SUPPORT:
1014b7e1c893Smrg	    if (connected)
1015b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_CV_ACTIVE;
1016b7e1c893Smrg	    else {
1017b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_CV_MASK;
1018b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE;
1019b7e1c893Smrg	    }
1020b7e1c893Smrg	    break;
1021b7e1c893Smrg	case ATOM_DEVICE_LCD1_SUPPORT:
1022b7e1c893Smrg	    if (connected) {
1023b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_LCD1;
1024b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE;
1025b7e1c893Smrg	    } else {
1026b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_LCD1;
1027b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE;
1028b7e1c893Smrg	    }
1029b7e1c893Smrg	    break;
1030b7e1c893Smrg	case ATOM_DEVICE_CRT1_SUPPORT:
1031b7e1c893Smrg	    if (connected) {
1032b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_CRT1_COLOR;
1033b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE;
1034b7e1c893Smrg	    } else {
1035b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_CRT1_MASK;
1036b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE;
1037b7e1c893Smrg	    }
1038b7e1c893Smrg	    break;
1039b7e1c893Smrg	case ATOM_DEVICE_CRT2_SUPPORT:
1040b7e1c893Smrg	    if (connected) {
1041b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_CRT2_COLOR;
1042b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE;
1043b7e1c893Smrg	    } else {
1044b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_CRT2_MASK;
1045b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE;
1046b7e1c893Smrg	    }
1047b7e1c893Smrg	    break;
1048b7e1c893Smrg	case ATOM_DEVICE_DFP1_SUPPORT:
1049b7e1c893Smrg	    if (connected) {
1050b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_DFP1;
1051b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE;
1052b7e1c893Smrg	    } else {
1053b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_DFP1;
1054b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE;
1055209ff23fSmrg	    }
1056b7e1c893Smrg	    break;
1057b7e1c893Smrg	case ATOM_DEVICE_DFP2_SUPPORT:
1058b7e1c893Smrg	    if (connected) {
1059b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_DFP2;
1060b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE;
1061b7e1c893Smrg	    } else {
1062b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_DFP2;
1063b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE;
1064209ff23fSmrg	    }
1065b7e1c893Smrg	    break;
1066b7e1c893Smrg	case ATOM_DEVICE_DFP3_SUPPORT:
1067b7e1c893Smrg	    if (connected) {
1068b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_DFP3;
1069b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE;
1070b7e1c893Smrg	    } else {
1071b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_DFP3;
1072b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE;
1073209ff23fSmrg	    }
1074b7e1c893Smrg	    break;
1075b7e1c893Smrg	case ATOM_DEVICE_DFP4_SUPPORT:
1076b7e1c893Smrg	    if (connected) {
1077b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_DFP4;
1078b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_DFP4_ACTIVE;
1079b7e1c893Smrg	    } else {
1080b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_DFP4;
1081b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE;
1082209ff23fSmrg	    }
1083b7e1c893Smrg	    break;
1084b7e1c893Smrg	case ATOM_DEVICE_DFP5_SUPPORT:
1085b7e1c893Smrg	    if (connected) {
1086b7e1c893Smrg		save->bios_0_scratch |= ATOM_S0_DFP5;
1087b7e1c893Smrg		save->bios_3_scratch |= ATOM_S3_DFP5_ACTIVE;
1088b7e1c893Smrg	    } else {
1089b7e1c893Smrg		save->bios_0_scratch &= ~ATOM_S0_DFP5;
1090b7e1c893Smrg		save->bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE;
1091209ff23fSmrg	    }
1092b7e1c893Smrg	    break;
1093209ff23fSmrg	}
1094b7e1c893Smrg	if (info->ChipFamily >= CHIP_FAMILY_R600) {
1095209ff23fSmrg	    OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch);
1096b7e1c893Smrg	    OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch);
1097b7e1c893Smrg	} else {
1098209ff23fSmrg	    OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch);
1099b7e1c893Smrg	    OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch);
1100b7e1c893Smrg	}
1101209ff23fSmrg    } else {
1102b7e1c893Smrg	switch (radeon_output->active_device) {
1103b7e1c893Smrg	case ATOM_DEVICE_TV1_SUPPORT:
1104b7e1c893Smrg	    if (connected) {
1105b7e1c893Smrg		if (radeon_output->MonType == MT_STV)
1106b7e1c893Smrg		    save->bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO;
1107b7e1c893Smrg		else if (radeon_output->MonType == MT_CTV)
1108b7e1c893Smrg		    save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP;
1109b7e1c893Smrg		save->bios_5_scratch |= RADEON_TV1_ON;
1110b7e1c893Smrg	    } else {
1111b7e1c893Smrg		save->bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK;
1112b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_TV1_ON;
1113b7e1c893Smrg	    }
1114b7e1c893Smrg	    break;
1115b7e1c893Smrg	case ATOM_DEVICE_LCD1_SUPPORT:
1116b7e1c893Smrg	    if (connected) {
1117209ff23fSmrg		save->bios_4_scratch |= RADEON_LCD1_ATTACHED;
1118b7e1c893Smrg		save->bios_5_scratch |= RADEON_LCD1_ON;
1119b7e1c893Smrg	    } else {
1120b7e1c893Smrg		save->bios_4_scratch &= ~RADEON_LCD1_ATTACHED;
1121b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_LCD1_ON;
1122209ff23fSmrg	    }
1123b7e1c893Smrg	    break;
1124b7e1c893Smrg	case ATOM_DEVICE_CRT1_SUPPORT:
1125b7e1c893Smrg	    if (connected) {
1126b7e1c893Smrg		save->bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR;
1127b7e1c893Smrg		save->bios_5_scratch |= RADEON_CRT1_ON;
1128b7e1c893Smrg	    } else {
1129209ff23fSmrg		save->bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK;
1130b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_CRT1_ON;
1131b7e1c893Smrg	    }
1132b7e1c893Smrg	    break;
1133b7e1c893Smrg	case ATOM_DEVICE_CRT2_SUPPORT:
1134b7e1c893Smrg	    if (connected) {
1135b7e1c893Smrg		save->bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR;
1136b7e1c893Smrg		save->bios_5_scratch |= RADEON_CRT2_ON;
1137b7e1c893Smrg	    } else {
1138b7e1c893Smrg		save->bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK;
1139b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_CRT2_ON;
1140b7e1c893Smrg	    }
1141b7e1c893Smrg	    break;
1142b7e1c893Smrg	case ATOM_DEVICE_DFP1_SUPPORT:
1143b7e1c893Smrg	    if (connected) {
1144b7e1c893Smrg		save->bios_4_scratch |= RADEON_DFP1_ATTACHED;
1145b7e1c893Smrg		save->bios_5_scratch |= RADEON_DFP1_ON;
1146b7e1c893Smrg	    } else {
1147209ff23fSmrg		save->bios_4_scratch &= ~RADEON_DFP1_ATTACHED;
1148b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_DFP1_ON;
1149b7e1c893Smrg	    }
1150b7e1c893Smrg	    break;
1151b7e1c893Smrg	case ATOM_DEVICE_DFP2_SUPPORT:
1152b7e1c893Smrg	    if (connected) {
1153b7e1c893Smrg		save->bios_4_scratch |= RADEON_DFP2_ATTACHED;
1154b7e1c893Smrg		save->bios_5_scratch |= RADEON_DFP2_ON;
1155b7e1c893Smrg	    } else {
1156209ff23fSmrg		save->bios_4_scratch &= ~RADEON_DFP2_ATTACHED;
1157b7e1c893Smrg		save->bios_5_scratch &= ~RADEON_DFP2_ON;
1158b7e1c893Smrg	    }
1159b7e1c893Smrg	    break;
1160209ff23fSmrg	}
1161209ff23fSmrg	OUTREG(RADEON_BIOS_4_SCRATCH, save->bios_4_scratch);
1162b7e1c893Smrg	OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch);
1163209ff23fSmrg    }
1164209ff23fSmrg
1165209ff23fSmrg}
1166209ff23fSmrg
1167209ff23fSmrgstatic xf86OutputStatus
1168209ff23fSmrgradeon_detect(xf86OutputPtr output)
1169209ff23fSmrg{
1170209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
1171209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
1172209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
1173209ff23fSmrg    Bool connected = TRUE;
1174209ff23fSmrg
1175209ff23fSmrg    radeon_output->MonType = MT_UNKNOWN;
1176209ff23fSmrg    radeon_bios_output_connected(output, FALSE);
1177b7e1c893Smrg    radeon_output->MonType = radeon_ddc_connected(output);
1178b7e1c893Smrg    if (!radeon_output->MonType) {
1179b7e1c893Smrg	if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
1180b7e1c893Smrg	    if (xf86ReturnOptValBool(info->Options, OPTION_IGNORE_LID_STATUS, TRUE))
1181b7e1c893Smrg		radeon_output->MonType = MT_LCD;
1182b7e1c893Smrg	    else
1183b7e1c893Smrg#if defined(__powerpc__)
1184b7e1c893Smrg		radeon_output->MonType = MT_LCD;
1185b7e1c893Smrg#else
1186b7e1c893Smrg	        radeon_output->MonType = RADEONDetectLidStatus(pScrn);
1187b7e1c893Smrg#endif
1188b7e1c893Smrg	} else {
1189b7e1c893Smrg	    if (info->IsAtomBios)
1190b7e1c893Smrg		radeon_output->MonType = atombios_dac_detect(output);
1191b7e1c893Smrg	    else
1192b7e1c893Smrg		radeon_output->MonType = legacy_dac_detect(output);
1193b7e1c893Smrg	}
1194b7e1c893Smrg    }
1195b7e1c893Smrg
1196b7e1c893Smrg    // if size is zero panel probably broken or not connected
1197b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
1198b7e1c893Smrg	radeon_encoder_ptr radeon_encoder = info->encoders[ATOM_DEVICE_LCD1_INDEX];
1199b7e1c893Smrg	if (radeon_encoder) {
1200b7e1c893Smrg	    radeon_lvds_ptr lvds = (radeon_lvds_ptr)radeon_encoder->dev_priv;
1201b7e1c893Smrg	    if (lvds) {
1202b7e1c893Smrg		if ((lvds->native_mode.PanelXRes == 0) || (lvds->native_mode.PanelYRes == 0))
1203b7e1c893Smrg		    radeon_output->MonType = MT_NONE;
1204b7e1c893Smrg	    }
1205b7e1c893Smrg	}
1206b7e1c893Smrg    }
1207b7e1c893Smrg
1208b7e1c893Smrg
1209c503f109Smrg    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
1210c503f109Smrg	       "Output: %s, Detected Monitor Type: %d\n", output->name, radeon_output->MonType);
1211b7e1c893Smrg    if (output->MonInfo) {
1212b7e1c893Smrg	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EDID data from the display on output: %s ----------------------\n",
1213b7e1c893Smrg		   output->name);
1214b7e1c893Smrg	xf86PrintEDID( output->MonInfo );
1215b7e1c893Smrg    }
1216209ff23fSmrg
1217209ff23fSmrg    /* nothing connected, light up some defaults so the server comes up */
1218209ff23fSmrg    if (radeon_output->MonType == MT_NONE &&
1219209ff23fSmrg	info->first_load_no_devices) {
1220209ff23fSmrg	if (info->IsMobility) {
1221b7e1c893Smrg	    if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
1222209ff23fSmrg		radeon_output->MonType = MT_LCD;
1223209ff23fSmrg		info->first_load_no_devices = FALSE;
1224b7e1c893Smrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using LCD default\n");
1225209ff23fSmrg	    }
1226209ff23fSmrg	} else {
1227b7e1c893Smrg	    if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) {
1228209ff23fSmrg		radeon_output->MonType = MT_CRT;
1229209ff23fSmrg		info->first_load_no_devices = FALSE;
1230b7e1c893Smrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using CRT default\n");
1231b7e1c893Smrg	    } else if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT)) {
1232209ff23fSmrg		radeon_output->MonType = MT_DFP;
1233209ff23fSmrg		info->first_load_no_devices = FALSE;
1234b7e1c893Smrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using DFP default\n");
1235209ff23fSmrg	    }
1236209ff23fSmrg	}
1237209ff23fSmrg    }
1238209ff23fSmrg
1239209ff23fSmrg    radeon_bios_output_connected(output, TRUE);
1240209ff23fSmrg
1241209ff23fSmrg    /* set montype so users can force outputs on even if detection fails */
1242209ff23fSmrg    if (radeon_output->MonType == MT_NONE) {
1243209ff23fSmrg	connected = FALSE;
1244b7e1c893Smrg	switch (radeon_output->ConnectorType) {
1245b7e1c893Smrg	case CONNECTOR_LVDS:
1246209ff23fSmrg	    radeon_output->MonType = MT_LCD;
1247b7e1c893Smrg	    break;
1248b7e1c893Smrg	case CONNECTOR_DVI_D:
1249b7e1c893Smrg	case CONNECTOR_HDMI_TYPE_A:
1250b7e1c893Smrg	case CONNECTOR_HDMI_TYPE_B:
1251209ff23fSmrg	    radeon_output->MonType = MT_DFP;
1252b7e1c893Smrg	    break;
1253b7e1c893Smrg	case CONNECTOR_VGA:
1254b7e1c893Smrg	case CONNECTOR_DVI_A:
1255b7e1c893Smrg	default:
1256209ff23fSmrg	    radeon_output->MonType = MT_CRT;
1257b7e1c893Smrg	    break;
1258b7e1c893Smrg	case CONNECTOR_DVI_I:
1259209ff23fSmrg	    if (radeon_output->DVIType == DVI_ANALOG)
1260209ff23fSmrg		radeon_output->MonType = MT_CRT;
1261209ff23fSmrg	    else if (radeon_output->DVIType == DVI_DIGITAL)
1262209ff23fSmrg		radeon_output->MonType = MT_DFP;
1263b7e1c893Smrg	    break;
1264b7e1c893Smrg	case CONNECTOR_STV:
1265b7e1c893Smrg            radeon_output->MonType = MT_STV;
1266b7e1c893Smrg	    break;
1267b7e1c893Smrg	case CONNECTOR_CTV:
1268b7e1c893Smrg            radeon_output->MonType = MT_CTV;
1269b7e1c893Smrg	    break;
1270b7e1c893Smrg	case CONNECTOR_DIN:
1271b7e1c893Smrg            radeon_output->MonType = MT_CV;
1272b7e1c893Smrg	    break;
1273b7e1c893Smrg	case CONNECTOR_DISPLAY_PORT:
1274ad43ddacSmrg	case CONNECTOR_EDP:
1275b7e1c893Smrg	    radeon_output->MonType = MT_DP;
1276b7e1c893Smrg	    break;
1277209ff23fSmrg	}
1278209ff23fSmrg    }
1279209ff23fSmrg
1280b7e1c893Smrg    radeon_set_active_device(output);
1281209ff23fSmrg
1282b7e1c893Smrg    if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT))
1283b7e1c893Smrg	output->subpixel_order = SubPixelHorizontalRGB;
1284b7e1c893Smrg    else
1285b7e1c893Smrg	output->subpixel_order = SubPixelNone;
1286209ff23fSmrg
1287b7e1c893Smrg    if (connected)
1288b7e1c893Smrg	return XF86OutputStatusConnected;
1289b7e1c893Smrg    else
1290b7e1c893Smrg	return XF86OutputStatusDisconnected;
1291209ff23fSmrg}
1292209ff23fSmrg
1293209ff23fSmrgstatic DisplayModePtr
1294209ff23fSmrgradeon_get_modes(xf86OutputPtr output)
1295209ff23fSmrg{
1296209ff23fSmrg  DisplayModePtr modes;
1297209ff23fSmrg  modes = RADEONProbeOutputModes(output);
1298209ff23fSmrg  return modes;
1299209ff23fSmrg}
1300209ff23fSmrg
1301209ff23fSmrgstatic void
1302209ff23fSmrgradeon_destroy (xf86OutputPtr output)
1303209ff23fSmrg{
1304209ff23fSmrg    if (output->driver_private)
13052f39173dSmrg        free(output->driver_private);
1306209ff23fSmrg}
1307209ff23fSmrg
1308209ff23fSmrgstatic void
1309209ff23fSmrgradeon_set_backlight_level(xf86OutputPtr output, int level)
1310209ff23fSmrg{
1311209ff23fSmrg#if 0
1312209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
1313209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
1314209ff23fSmrg    unsigned char * RADEONMMIO = info->MMIO;
1315209ff23fSmrg    uint32_t lvds_gen_cntl;
1316209ff23fSmrg
1317209ff23fSmrg    lvds_gen_cntl = INREG(RADEON_LVDS_GEN_CNTL);
1318209ff23fSmrg    lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
1319209ff23fSmrg    lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_LEVEL_MASK;
1320209ff23fSmrg    lvds_gen_cntl |= (level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & RADEON_LVDS_BL_MOD_LEVEL_MASK;
1321209ff23fSmrg    //usleep (radeon_output->PanelPwrDly * 1000);
1322209ff23fSmrg    OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
1323209ff23fSmrg    lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
1324209ff23fSmrg    //usleep (radeon_output->PanelPwrDly * 1000);
1325209ff23fSmrg    OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
1326209ff23fSmrg#endif
1327209ff23fSmrg}
1328209ff23fSmrg
1329209ff23fSmrgstatic Atom backlight_atom;
1330209ff23fSmrgstatic Atom tmds_pll_atom;
1331209ff23fSmrgstatic Atom rmx_atom;
1332209ff23fSmrgstatic Atom monitor_type_atom;
1333209ff23fSmrgstatic Atom load_detection_atom;
1334209ff23fSmrgstatic Atom coherent_mode_atom;
1335209ff23fSmrgstatic Atom tv_hsize_atom;
1336209ff23fSmrgstatic Atom tv_hpos_atom;
1337209ff23fSmrgstatic Atom tv_vpos_atom;
1338209ff23fSmrgstatic Atom tv_std_atom;
1339209ff23fSmrg#define RADEON_MAX_BACKLIGHT_LEVEL 255
1340209ff23fSmrg
1341209ff23fSmrgstatic void
1342209ff23fSmrgradeon_create_resources(xf86OutputPtr output)
1343209ff23fSmrg{
1344209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
1345209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
1346209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
1347209ff23fSmrg    INT32 range[2];
1348209ff23fSmrg    int data, err;
1349209ff23fSmrg    const char *s;
1350209ff23fSmrg
1351b7e1c893Smrg#if 0
1352209ff23fSmrg    /* backlight control */
1353209ff23fSmrg    if (radeon_output->type == OUTPUT_LVDS) {
1354209ff23fSmrg	backlight_atom = MAKE_ATOM("backlight");
1355209ff23fSmrg
1356209ff23fSmrg	range[0] = 0;
1357209ff23fSmrg	range[1] = RADEON_MAX_BACKLIGHT_LEVEL;
1358209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, backlight_atom,
1359209ff23fSmrg					FALSE, TRUE, FALSE, 2, range);
1360209ff23fSmrg	if (err != 0) {
1361209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1362209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1363209ff23fSmrg	}
1364209ff23fSmrg	/* Set the current value of the backlight property */
1365209ff23fSmrg	//data = (info->SavedReg->lvds_gen_cntl & RADEON_LVDS_BL_MOD_LEVEL_MASK) >> RADEON_LVDS_BL_MOD_LEVEL_SHIFT;
1366209ff23fSmrg	data = RADEON_MAX_BACKLIGHT_LEVEL;
1367209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, backlight_atom,
1368209ff23fSmrg				     XA_INTEGER, 32, PropModeReplace, 1, &data,
1369209ff23fSmrg				     FALSE, TRUE);
1370209ff23fSmrg	if (err != 0) {
1371209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1372209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1373209ff23fSmrg	}
1374209ff23fSmrg    }
1375b7e1c893Smrg#endif
1376209ff23fSmrg
1377b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT | ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) {
1378209ff23fSmrg	load_detection_atom = MAKE_ATOM("load_detection");
1379209ff23fSmrg
1380209ff23fSmrg	range[0] = 0; /* off */
1381209ff23fSmrg	range[1] = 1; /* on */
1382209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, load_detection_atom,
1383209ff23fSmrg					FALSE, TRUE, FALSE, 2, range);
1384209ff23fSmrg	if (err != 0) {
1385209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1386209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1387209ff23fSmrg	}
1388209ff23fSmrg
1389209ff23fSmrg	if (radeon_output->load_detection)
1390b7e1c893Smrg	    data = 1;
1391209ff23fSmrg	else
1392b7e1c893Smrg	    data = 0;
1393209ff23fSmrg
1394209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, load_detection_atom,
1395209ff23fSmrg				     XA_INTEGER, 32, PropModeReplace, 1, &data,
1396209ff23fSmrg				     FALSE, TRUE);
1397209ff23fSmrg	if (err != 0) {
1398209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1399209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1400209ff23fSmrg	}
1401209ff23fSmrg    }
1402209ff23fSmrg
1403b7e1c893Smrg    if (IS_AVIVO_VARIANT && (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))) {
1404209ff23fSmrg	coherent_mode_atom = MAKE_ATOM("coherent_mode");
1405209ff23fSmrg
1406209ff23fSmrg	range[0] = 0; /* off */
1407209ff23fSmrg	range[1] = 1; /* on */
1408209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, coherent_mode_atom,
1409209ff23fSmrg					FALSE, TRUE, FALSE, 2, range);
1410209ff23fSmrg	if (err != 0) {
1411209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1412209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1413209ff23fSmrg	}
1414209ff23fSmrg
1415b7e1c893Smrg	data = 1; /* coherent mode on by default */
1416209ff23fSmrg
1417209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, coherent_mode_atom,
1418209ff23fSmrg				     XA_INTEGER, 32, PropModeReplace, 1, &data,
1419209ff23fSmrg				     FALSE, TRUE);
1420209ff23fSmrg	if (err != 0) {
1421209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1422209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1423209ff23fSmrg	}
1424209ff23fSmrg    }
1425209ff23fSmrg
1426c503f109Smrg    if ((!IS_AVIVO_VARIANT) && (radeon_output->devices & (ATOM_DEVICE_DFP1_SUPPORT))) {
1427209ff23fSmrg	tmds_pll_atom = MAKE_ATOM("tmds_pll");
1428209ff23fSmrg
1429209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, tmds_pll_atom,
1430209ff23fSmrg					FALSE, FALSE, FALSE, 0, NULL);
1431209ff23fSmrg	if (err != 0) {
1432209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1433209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1434209ff23fSmrg	}
1435209ff23fSmrg	/* Set the current value of the property */
1436209ff23fSmrg#if defined(__powerpc__)
1437209ff23fSmrg	s = "driver";
1438209ff23fSmrg#else
1439209ff23fSmrg	s = "bios";
1440209ff23fSmrg#endif
1441209ff23fSmrg	if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_TMDS_PLL, FALSE)) {
1442209ff23fSmrg	    s = "driver";
1443209ff23fSmrg	}
1444209ff23fSmrg
1445209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, tmds_pll_atom,
1446209ff23fSmrg				     XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s,
1447209ff23fSmrg				     FALSE, FALSE);
1448209ff23fSmrg	if (err != 0) {
1449209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1450209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1451209ff23fSmrg	}
1452209ff23fSmrg
1453209ff23fSmrg    }
1454209ff23fSmrg
1455209ff23fSmrg    /* RMX control - fullscreen, centered, keep ratio, off */
1456209ff23fSmrg    /* actually more of a crtc property as only crtc1 has rmx */
1457b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1458209ff23fSmrg	rmx_atom = MAKE_ATOM("scaler");
1459209ff23fSmrg
1460209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, rmx_atom,
1461209ff23fSmrg					FALSE, FALSE, FALSE, 0, NULL);
1462209ff23fSmrg	if (err != 0) {
1463209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1464209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1465209ff23fSmrg	}
1466209ff23fSmrg	/* Set the current value of the property */
1467b7e1c893Smrg	switch (radeon_output->rmx_type) {
1468b7e1c893Smrg	case RMX_OFF:
1469b7e1c893Smrg	default:
1470209ff23fSmrg	    s = "off";
1471b7e1c893Smrg	    break;
1472b7e1c893Smrg	case RMX_FULL:
1473b7e1c893Smrg	    s = "full";
1474b7e1c893Smrg	    break;
1475b7e1c893Smrg	case RMX_CENTER:
1476b7e1c893Smrg	    s = "center";
1477b7e1c893Smrg	    break;
1478b7e1c893Smrg	case RMX_ASPECT:
1479b7e1c893Smrg	    s = "aspect";
1480b7e1c893Smrg	    break;
1481b7e1c893Smrg	}
1482209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, rmx_atom,
1483209ff23fSmrg				     XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s,
1484209ff23fSmrg				     FALSE, FALSE);
1485209ff23fSmrg	if (err != 0) {
1486209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1487209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1488209ff23fSmrg	}
1489209ff23fSmrg    }
1490209ff23fSmrg
1491209ff23fSmrg    /* force auto/analog/digital for DVI-I ports */
1492b7e1c893Smrg    if ((radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) &&
1493b7e1c893Smrg	(radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))){
1494209ff23fSmrg	monitor_type_atom = MAKE_ATOM("dvi_monitor_type");
1495209ff23fSmrg
1496209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, monitor_type_atom,
1497209ff23fSmrg					FALSE, FALSE, FALSE, 0, NULL);
1498209ff23fSmrg	if (err != 0) {
1499209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1500209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1501209ff23fSmrg	}
1502209ff23fSmrg	/* Set the current value of the backlight property */
1503209ff23fSmrg	s = "auto";
1504209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, monitor_type_atom,
1505209ff23fSmrg				     XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s,
1506209ff23fSmrg				     FALSE, FALSE);
1507209ff23fSmrg	if (err != 0) {
1508209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1509209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1510209ff23fSmrg	}
1511209ff23fSmrg    }
1512209ff23fSmrg
1513b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) {
1514b7e1c893Smrg	radeon_tvout_ptr tvout = &radeon_output->tvout;
1515209ff23fSmrg	if (!IS_AVIVO_VARIANT) {
1516209ff23fSmrg	    tv_hsize_atom = MAKE_ATOM("tv_horizontal_size");
1517209ff23fSmrg
1518209ff23fSmrg	    range[0] = -MAX_H_SIZE;
1519209ff23fSmrg	    range[1] = MAX_H_SIZE;
1520209ff23fSmrg	    err = RRConfigureOutputProperty(output->randr_output, tv_hsize_atom,
1521209ff23fSmrg					    FALSE, TRUE, FALSE, 2, range);
1522209ff23fSmrg	    if (err != 0) {
1523209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1524209ff23fSmrg			   "RRConfigureOutputProperty error, %d\n", err);
1525209ff23fSmrg	    }
1526209ff23fSmrg	    data = 0;
1527209ff23fSmrg	    err = RRChangeOutputProperty(output->randr_output, tv_hsize_atom,
1528209ff23fSmrg					 XA_INTEGER, 32, PropModeReplace, 1, &data,
1529209ff23fSmrg					 FALSE, TRUE);
1530209ff23fSmrg	    if (err != 0) {
1531209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1532209ff23fSmrg			   "RRChangeOutputProperty error, %d\n", err);
1533209ff23fSmrg	    }
1534209ff23fSmrg
1535209ff23fSmrg	    tv_hpos_atom = MAKE_ATOM("tv_horizontal_position");
1536209ff23fSmrg
1537209ff23fSmrg	    range[0] = -MAX_H_POSITION;
1538209ff23fSmrg	    range[1] = MAX_H_POSITION;
1539209ff23fSmrg	    err = RRConfigureOutputProperty(output->randr_output, tv_hpos_atom,
1540209ff23fSmrg					    FALSE, TRUE, FALSE, 2, range);
1541209ff23fSmrg	    if (err != 0) {
1542209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1543209ff23fSmrg			   "RRConfigureOutputProperty error, %d\n", err);
1544209ff23fSmrg	    }
1545209ff23fSmrg	    data = 0;
1546209ff23fSmrg	    err = RRChangeOutputProperty(output->randr_output, tv_hpos_atom,
1547209ff23fSmrg					 XA_INTEGER, 32, PropModeReplace, 1, &data,
1548209ff23fSmrg					 FALSE, TRUE);
1549209ff23fSmrg	    if (err != 0) {
1550209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1551209ff23fSmrg			   "RRChangeOutputProperty error, %d\n", err);
1552209ff23fSmrg	    }
1553209ff23fSmrg
1554209ff23fSmrg	    tv_vpos_atom = MAKE_ATOM("tv_vertical_position");
1555209ff23fSmrg
1556209ff23fSmrg	    range[0] = -MAX_V_POSITION;
1557209ff23fSmrg	    range[1] = MAX_V_POSITION;
1558209ff23fSmrg	    err = RRConfigureOutputProperty(output->randr_output, tv_vpos_atom,
1559209ff23fSmrg					    FALSE, TRUE, FALSE, 2, range);
1560209ff23fSmrg	    if (err != 0) {
1561209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1562209ff23fSmrg			   "RRConfigureOutputProperty error, %d\n", err);
1563209ff23fSmrg	    }
1564209ff23fSmrg	    data = 0;
1565209ff23fSmrg	    err = RRChangeOutputProperty(output->randr_output, tv_vpos_atom,
1566209ff23fSmrg					 XA_INTEGER, 32, PropModeReplace, 1, &data,
1567209ff23fSmrg					 FALSE, TRUE);
1568209ff23fSmrg	    if (err != 0) {
1569209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1570209ff23fSmrg			   "RRChangeOutputProperty error, %d\n", err);
1571209ff23fSmrg	    }
1572209ff23fSmrg	}
1573209ff23fSmrg
1574209ff23fSmrg	tv_std_atom = MAKE_ATOM("tv_standard");
1575209ff23fSmrg
1576209ff23fSmrg	err = RRConfigureOutputProperty(output->randr_output, tv_std_atom,
1577209ff23fSmrg					FALSE, FALSE, FALSE, 0, NULL);
1578209ff23fSmrg	if (err != 0) {
1579209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1580209ff23fSmrg		       "RRConfigureOutputProperty error, %d\n", err);
1581209ff23fSmrg	}
1582209ff23fSmrg
1583209ff23fSmrg	/* Set the current value of the property */
1584b7e1c893Smrg	switch (tvout->tvStd) {
1585209ff23fSmrg	case TV_STD_PAL:
1586209ff23fSmrg	    s = "pal";
1587209ff23fSmrg	    break;
1588209ff23fSmrg	case TV_STD_PAL_M:
1589209ff23fSmrg	    s = "pal-m";
1590209ff23fSmrg	    break;
1591209ff23fSmrg	case TV_STD_PAL_60:
1592209ff23fSmrg	    s = "pal-60";
1593209ff23fSmrg	    break;
1594209ff23fSmrg	case TV_STD_NTSC_J:
1595209ff23fSmrg	    s = "ntsc-j";
1596209ff23fSmrg	    break;
1597209ff23fSmrg	case TV_STD_SCART_PAL:
1598209ff23fSmrg	    s = "scart-pal";
1599209ff23fSmrg	    break;
1600209ff23fSmrg	case TV_STD_NTSC:
1601209ff23fSmrg	default:
1602209ff23fSmrg	    s = "ntsc";
1603209ff23fSmrg	    break;
1604209ff23fSmrg	}
1605209ff23fSmrg
1606209ff23fSmrg	err = RRChangeOutputProperty(output->randr_output, tv_std_atom,
1607209ff23fSmrg				     XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s,
1608209ff23fSmrg				     FALSE, FALSE);
1609209ff23fSmrg	if (err != 0) {
1610209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1611209ff23fSmrg		       "RRChangeOutputProperty error, %d\n", err);
1612209ff23fSmrg	}
1613209ff23fSmrg    }
1614209ff23fSmrg}
1615209ff23fSmrg
1616209ff23fSmrgstatic Bool
1617209ff23fSmrgradeon_set_mode_for_property(xf86OutputPtr output)
1618209ff23fSmrg{
1619209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
1620209ff23fSmrg
1621209ff23fSmrg    if (output->crtc) {
1622209ff23fSmrg	xf86CrtcPtr crtc = output->crtc;
1623209ff23fSmrg
1624209ff23fSmrg	if (crtc->enabled) {
1625b13dfe66Smrg#ifdef RANDR_14_INTERFACE
1626921a55d8Smrg	    xf86CrtcSetRec crtc_set_rec;
1627921a55d8Smrg
1628921a55d8Smrg	    crtc_set_rec.flags = (XF86CrtcSetMode |
1629921a55d8Smrg				  XF86CrtcSetOutput |
1630921a55d8Smrg				  XF86CrtcSetOrigin |
1631921a55d8Smrg				  XF86CrtcSetRotation);
1632921a55d8Smrg	    crtc_set_rec.mode = &crtc->desiredMode;
1633921a55d8Smrg	    crtc_set_rec.rotation = crtc->desiredRotation;
1634921a55d8Smrg	    crtc_set_rec.transform = NULL;
1635921a55d8Smrg	    crtc_set_rec.x = crtc->desiredX;
1636921a55d8Smrg	    crtc_set_rec.y = crtc->desiredY;
1637921a55d8Smrg	    if (!xf86CrtcSet(crtc, &crtc_set_rec)) {
1638921a55d8Smrg#else
1639209ff23fSmrg	    if (!xf86CrtcSetMode(crtc, &crtc->desiredMode, crtc->desiredRotation,
1640209ff23fSmrg				 crtc->desiredX, crtc->desiredY)) {
1641921a55d8Smrg#endif
1642209ff23fSmrg		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
1643b13dfe66Smrg			   "Failed to set mode after property change!\n");
1644209ff23fSmrg		return FALSE;
1645209ff23fSmrg	    }
1646209ff23fSmrg	}
1647209ff23fSmrg    }
1648209ff23fSmrg    return TRUE;
1649209ff23fSmrg}
1650209ff23fSmrg
1651209ff23fSmrgstatic Bool
1652209ff23fSmrgradeon_set_property(xf86OutputPtr output, Atom property,
1653209ff23fSmrg		       RRPropertyValuePtr value)
1654209ff23fSmrg{
1655209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(output->scrn);
1656209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
1657209ff23fSmrg    INT32 val;
1658209ff23fSmrg
1659209ff23fSmrg
1660209ff23fSmrg    if (property == backlight_atom) {
1661209ff23fSmrg	if (value->type != XA_INTEGER ||
1662209ff23fSmrg	    value->format != 32 ||
1663209ff23fSmrg	    value->size != 1) {
1664209ff23fSmrg	    return FALSE;
1665209ff23fSmrg	}
1666209ff23fSmrg
1667209ff23fSmrg	val = *(INT32 *)value->data;
1668209ff23fSmrg	if (val < 0 || val > RADEON_MAX_BACKLIGHT_LEVEL)
1669209ff23fSmrg	    return FALSE;
1670209ff23fSmrg
1671209ff23fSmrg#if defined(__powerpc__)
1672209ff23fSmrg	val = RADEON_MAX_BACKLIGHT_LEVEL - val;
1673209ff23fSmrg#endif
1674209ff23fSmrg
1675209ff23fSmrg	radeon_set_backlight_level(output, val);
1676209ff23fSmrg
1677209ff23fSmrg    } else if (property == load_detection_atom) {
1678209ff23fSmrg	if (value->type != XA_INTEGER ||
1679209ff23fSmrg	    value->format != 32 ||
1680209ff23fSmrg	    value->size != 1) {
1681209ff23fSmrg	    return FALSE;
1682209ff23fSmrg	}
1683209ff23fSmrg
1684209ff23fSmrg	val = *(INT32 *)value->data;
1685209ff23fSmrg	if (val < 0 || val > 1)
1686209ff23fSmrg	    return FALSE;
1687209ff23fSmrg
1688209ff23fSmrg	radeon_output->load_detection = val;
1689209ff23fSmrg
1690209ff23fSmrg    } else if (property == coherent_mode_atom) {
1691209ff23fSmrg	Bool coherent_mode = radeon_output->coherent_mode;
1692209ff23fSmrg
1693209ff23fSmrg	if (value->type != XA_INTEGER ||
1694209ff23fSmrg	    value->format != 32 ||
1695209ff23fSmrg	    value->size != 1) {
1696209ff23fSmrg	    return FALSE;
1697209ff23fSmrg	}
1698209ff23fSmrg
1699209ff23fSmrg	val = *(INT32 *)value->data;
1700209ff23fSmrg	if (val < 0 || val > 1)
1701209ff23fSmrg	    return FALSE;
1702209ff23fSmrg
1703209ff23fSmrg	radeon_output->coherent_mode = val;
1704209ff23fSmrg	if (!radeon_set_mode_for_property(output)) {
1705209ff23fSmrg	    radeon_output->coherent_mode = coherent_mode;
1706209ff23fSmrg	    (void)radeon_set_mode_for_property(output);
1707209ff23fSmrg	    return FALSE;
1708209ff23fSmrg	}
1709209ff23fSmrg
1710209ff23fSmrg    } else if (property == rmx_atom) {
1711209ff23fSmrg	const char *s;
1712209ff23fSmrg	RADEONRMXType rmx = radeon_output->rmx_type;
1713209ff23fSmrg
1714209ff23fSmrg	if (value->type != XA_STRING || value->format != 8)
1715209ff23fSmrg	    return FALSE;
1716209ff23fSmrg	s = (char*)value->data;
1717209ff23fSmrg	if (value->size == strlen("full") && !strncmp("full", s, strlen("full"))) {
1718209ff23fSmrg	    radeon_output->rmx_type = RMX_FULL;
1719209ff23fSmrg	} else if (value->size == strlen("center") && !strncmp("center", s, strlen("center"))) {
1720209ff23fSmrg	    radeon_output->rmx_type = RMX_CENTER;
1721b7e1c893Smrg	} else if (value->size == strlen("aspect") && !strncmp("aspect", s, strlen("aspect"))) {
1722b7e1c893Smrg	    if (IS_AVIVO_VARIANT)
1723b7e1c893Smrg		radeon_output->rmx_type = RMX_ASPECT;
1724b7e1c893Smrg	    else
1725b7e1c893Smrg		return FALSE;
1726209ff23fSmrg	} else if (value->size == strlen("off") && !strncmp("off", s, strlen("off"))) {
1727209ff23fSmrg	    radeon_output->rmx_type = RMX_OFF;
1728209ff23fSmrg	} else
1729209ff23fSmrg	    return FALSE;
1730209ff23fSmrg
1731209ff23fSmrg	if (!radeon_set_mode_for_property(output)) {
1732209ff23fSmrg	    radeon_output->rmx_type = rmx;
1733209ff23fSmrg	    (void)radeon_set_mode_for_property(output);
1734209ff23fSmrg	    return FALSE;
1735209ff23fSmrg	}
1736209ff23fSmrg    } else if (property == tmds_pll_atom) {
1737b7e1c893Smrg	radeon_tmds_ptr tmds = NULL;
1738209ff23fSmrg	const char *s;
1739b7e1c893Smrg
1740b7e1c893Smrg	if (info->encoders[ATOM_DEVICE_DFP1_INDEX] && info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv)
1741b7e1c893Smrg	    tmds = (radeon_tmds_ptr)info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv;
1742b7e1c893Smrg	else
1743b7e1c893Smrg	    return FALSE;
1744b7e1c893Smrg
1745209ff23fSmrg	if (value->type != XA_STRING || value->format != 8)
1746209ff23fSmrg	    return FALSE;
1747209ff23fSmrg	s = (char*)value->data;
1748209ff23fSmrg	if (value->size == strlen("bios") && !strncmp("bios", s, strlen("bios"))) {
1749b7e1c893Smrg	    if (!RADEONGetTMDSInfoFromBIOS(output->scrn, tmds))
1750b7e1c893Smrg		RADEONGetTMDSInfoFromTable(output->scrn, tmds);
1751b7e1c893Smrg	} else if (value->size == strlen("driver") && !strncmp("driver", s, strlen("driver")))
1752b7e1c893Smrg	    RADEONGetTMDSInfoFromTable(output->scrn, tmds);
1753b7e1c893Smrg	else
1754209ff23fSmrg	    return FALSE;
1755209ff23fSmrg
1756209ff23fSmrg	return radeon_set_mode_for_property(output);
1757209ff23fSmrg    } else if (property == monitor_type_atom) {
1758209ff23fSmrg	const char *s;
1759209ff23fSmrg	if (value->type != XA_STRING || value->format != 8)
1760209ff23fSmrg	    return FALSE;
1761209ff23fSmrg	s = (char*)value->data;
1762209ff23fSmrg	if (value->size == strlen("auto") && !strncmp("auto", s, strlen("auto"))) {
1763209ff23fSmrg	    radeon_output->DVIType = DVI_AUTO;
1764209ff23fSmrg	    return TRUE;
1765209ff23fSmrg	} else if (value->size == strlen("analog") && !strncmp("analog", s, strlen("analog"))) {
1766209ff23fSmrg	    radeon_output->DVIType = DVI_ANALOG;
1767209ff23fSmrg	    return TRUE;
1768209ff23fSmrg	} else if (value->size == strlen("digital") && !strncmp("digital", s, strlen("digital"))) {
1769209ff23fSmrg	    radeon_output->DVIType = DVI_DIGITAL;
1770209ff23fSmrg	    return TRUE;
1771209ff23fSmrg	} else
1772209ff23fSmrg	    return FALSE;
1773209ff23fSmrg    } else if (property == tv_hsize_atom) {
1774b7e1c893Smrg	radeon_tvout_ptr tvout = &radeon_output->tvout;
1775209ff23fSmrg	if (value->type != XA_INTEGER ||
1776209ff23fSmrg	    value->format != 32 ||
1777209ff23fSmrg	    value->size != 1) {
1778209ff23fSmrg	    return FALSE;
1779209ff23fSmrg	}
1780209ff23fSmrg
1781209ff23fSmrg	val = *(INT32 *)value->data;
1782209ff23fSmrg	if (val < -MAX_H_SIZE || val > MAX_H_SIZE)
1783209ff23fSmrg	    return FALSE;
1784209ff23fSmrg
1785b7e1c893Smrg	tvout->hSize = val;
1786b7e1c893Smrg	if (tvout->tv_on && !IS_AVIVO_VARIANT)
1787209ff23fSmrg	    RADEONUpdateHVPosition(output, &output->crtc->mode);
1788209ff23fSmrg
1789209ff23fSmrg    } else if (property == tv_hpos_atom) {
1790b7e1c893Smrg	radeon_tvout_ptr tvout = &radeon_output->tvout;
1791209ff23fSmrg	if (value->type != XA_INTEGER ||
1792209ff23fSmrg	    value->format != 32 ||
1793209ff23fSmrg	    value->size != 1) {
1794209ff23fSmrg	    return FALSE;
1795209ff23fSmrg	}
1796209ff23fSmrg
1797209ff23fSmrg	val = *(INT32 *)value->data;
1798209ff23fSmrg	if (val < -MAX_H_POSITION || val > MAX_H_POSITION)
1799209ff23fSmrg	    return FALSE;
1800209ff23fSmrg
1801b7e1c893Smrg	tvout->hPos = val;
1802b7e1c893Smrg	if (tvout->tv_on && !IS_AVIVO_VARIANT)
1803209ff23fSmrg	    RADEONUpdateHVPosition(output, &output->crtc->mode);
1804209ff23fSmrg
1805209ff23fSmrg    } else if (property == tv_vpos_atom) {
1806b7e1c893Smrg	radeon_tvout_ptr tvout = &radeon_output->tvout;
1807209ff23fSmrg	if (value->type != XA_INTEGER ||
1808209ff23fSmrg	    value->format != 32 ||
1809209ff23fSmrg	    value->size != 1) {
1810209ff23fSmrg	    return FALSE;
1811209ff23fSmrg	}
1812209ff23fSmrg
1813209ff23fSmrg	val = *(INT32 *)value->data;
1814209ff23fSmrg	if (val < -MAX_H_POSITION || val > MAX_H_POSITION)
1815209ff23fSmrg	    return FALSE;
1816209ff23fSmrg
1817b7e1c893Smrg	tvout->vPos = val;
1818b7e1c893Smrg	if (tvout->tv_on && !IS_AVIVO_VARIANT)
1819209ff23fSmrg	    RADEONUpdateHVPosition(output, &output->crtc->mode);
1820209ff23fSmrg
1821209ff23fSmrg    } else if (property == tv_std_atom) {
1822209ff23fSmrg	const char *s;
1823b7e1c893Smrg	radeon_tvout_ptr tvout = &radeon_output->tvout;
1824b7e1c893Smrg	TVStd std = tvout->tvStd;
1825209ff23fSmrg
1826209ff23fSmrg	if (value->type != XA_STRING || value->format != 8)
1827209ff23fSmrg	    return FALSE;
1828209ff23fSmrg	s = (char*)value->data;
1829209ff23fSmrg	if (value->size == strlen("ntsc") && !strncmp("ntsc", s, strlen("ntsc"))) {
1830b7e1c893Smrg	    tvout->tvStd = TV_STD_NTSC;
1831209ff23fSmrg	} else if (value->size == strlen("pal") && !strncmp("pal", s, strlen("pal"))) {
1832b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL;
1833209ff23fSmrg	} else if (value->size == strlen("pal-m") && !strncmp("pal-m", s, strlen("pal-m"))) {
1834b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL_M;
1835209ff23fSmrg	} else if (value->size == strlen("pal-60") && !strncmp("pal-60", s, strlen("pal-60"))) {
1836b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL_60;
1837209ff23fSmrg	} else if (value->size == strlen("ntsc-j") && !strncmp("ntsc-j", s, strlen("ntsc-j"))) {
1838b7e1c893Smrg	    tvout->tvStd = TV_STD_NTSC_J;
1839209ff23fSmrg	} else if (value->size == strlen("scart-pal") && !strncmp("scart-pal", s, strlen("scart-pal"))) {
1840b7e1c893Smrg	    tvout->tvStd = TV_STD_SCART_PAL;
1841209ff23fSmrg	} else if (value->size == strlen("pal-cn") && !strncmp("pal-cn", s, strlen("pal-cn"))) {
1842b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL_CN;
1843209ff23fSmrg	} else if (value->size == strlen("secam") && !strncmp("secam", s, strlen("secam"))) {
1844b7e1c893Smrg	    tvout->tvStd = TV_STD_SECAM;
1845209ff23fSmrg	} else
1846209ff23fSmrg	    return FALSE;
1847209ff23fSmrg
1848209ff23fSmrg	if (!radeon_set_mode_for_property(output)) {
1849b7e1c893Smrg	    tvout->tvStd = std;
1850209ff23fSmrg	    (void)radeon_set_mode_for_property(output);
1851209ff23fSmrg	    return FALSE;
1852209ff23fSmrg	}
1853209ff23fSmrg    }
1854209ff23fSmrg
1855209ff23fSmrg    return TRUE;
1856209ff23fSmrg}
1857209ff23fSmrg
1858209ff23fSmrgstatic const xf86OutputFuncsRec radeon_output_funcs = {
1859209ff23fSmrg    .create_resources = radeon_create_resources,
1860209ff23fSmrg    .dpms = radeon_dpms,
1861209ff23fSmrg    .save = radeon_save,
1862209ff23fSmrg    .restore = radeon_restore,
1863209ff23fSmrg    .mode_valid = radeon_mode_valid,
1864209ff23fSmrg    .mode_fixup = radeon_mode_fixup,
1865209ff23fSmrg    .prepare = radeon_mode_prepare,
1866209ff23fSmrg    .mode_set = radeon_mode_set,
1867209ff23fSmrg    .commit = radeon_mode_commit,
1868209ff23fSmrg    .detect = radeon_detect,
1869209ff23fSmrg    .get_modes = radeon_get_modes,
1870209ff23fSmrg    .set_property = radeon_set_property,
1871209ff23fSmrg    .destroy = radeon_destroy
1872209ff23fSmrg};
1873209ff23fSmrg
1874b7e1c893SmrgBool
1875c503f109SmrgRADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state)
1876209ff23fSmrg{
1877209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
1878209ff23fSmrg    RADEONInfoPtr  info       = RADEONPTR(pScrn);
1879c503f109Smrg    RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr;
1880209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
1881209ff23fSmrg    uint32_t temp;
1882209ff23fSmrg
1883b7e1c893Smrg    if (lock_state) {
1884c503f109Smrg	/* RV410 appears to have a bug where the hw i2c in reset
1885c503f109Smrg	 * holds the i2c port in a bad state - switch hw i2c away before
1886c503f109Smrg	 * doing DDC - do this for all r200s/r300s for safety sakes */
1887c503f109Smrg	if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT)) {
1888c503f109Smrg	    if (pRADEONI2CBus->mask_clk_reg == RADEON_GPIO_MONID)
1889c503f109Smrg                OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
1890c503f109Smrg					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1)));
1891c503f109Smrg	    else
1892c503f109Smrg                OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
1893c503f109Smrg					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
1894c503f109Smrg	}
1895c503f109Smrg
18960974d292Smrg	/* set the pad in ddc mode */
1897921a55d8Smrg	if (IS_DCE3_VARIANT &&
1898921a55d8Smrg	    pRADEONI2CBus->hw_capable) {
18990974d292Smrg	    temp = INREG(pRADEONI2CBus->mask_clk_reg);
19000974d292Smrg	    temp &= ~(1 << 16);
19010974d292Smrg	    OUTREG(pRADEONI2CBus->mask_clk_reg, temp);
19020974d292Smrg	}
19030974d292Smrg
1904b7e1c893Smrg	temp = INREG(pRADEONI2CBus->a_clk_reg);
1905b7e1c893Smrg	temp &= ~(pRADEONI2CBus->a_clk_mask);
1906b7e1c893Smrg	OUTREG(pRADEONI2CBus->a_clk_reg, temp);
1907b7e1c893Smrg
1908b7e1c893Smrg	temp = INREG(pRADEONI2CBus->a_data_reg);
1909b7e1c893Smrg	temp &= ~(pRADEONI2CBus->a_data_mask);
1910b7e1c893Smrg	OUTREG(pRADEONI2CBus->a_data_reg, temp);
1911b7e1c893Smrg    }
1912b7e1c893Smrg
1913209ff23fSmrg    temp = INREG(pRADEONI2CBus->mask_clk_reg);
1914b7e1c893Smrg    if (lock_state)
1915b7e1c893Smrg	temp |= (pRADEONI2CBus->mask_clk_mask);
1916209ff23fSmrg    else
1917b7e1c893Smrg	temp &= ~(pRADEONI2CBus->mask_clk_mask);
1918209ff23fSmrg    OUTREG(pRADEONI2CBus->mask_clk_reg, temp);
1919209ff23fSmrg    temp = INREG(pRADEONI2CBus->mask_clk_reg);
1920209ff23fSmrg
1921209ff23fSmrg    temp = INREG(pRADEONI2CBus->mask_data_reg);
1922b7e1c893Smrg    if (lock_state)
1923b7e1c893Smrg	temp |= (pRADEONI2CBus->mask_data_mask);
1924209ff23fSmrg    else
1925b7e1c893Smrg	temp &= ~(pRADEONI2CBus->mask_data_mask);
1926209ff23fSmrg    OUTREG(pRADEONI2CBus->mask_data_reg, temp);
1927209ff23fSmrg    temp = INREG(pRADEONI2CBus->mask_data_reg);
1928209ff23fSmrg
1929209ff23fSmrg    return TRUE;
1930209ff23fSmrg}
1931209ff23fSmrg
1932209ff23fSmrgstatic void RADEONI2CGetBits(I2CBusPtr b, int *Clock, int *data)
1933209ff23fSmrg{
1934209ff23fSmrg    ScrnInfoPtr    pScrn      = xf86Screens[b->scrnIndex];
1935209ff23fSmrg    RADEONInfoPtr  info       = RADEONPTR(pScrn);
1936209ff23fSmrg    unsigned long  val;
1937209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
1938209ff23fSmrg    RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr;
1939209ff23fSmrg
1940209ff23fSmrg    /* Get the result */
1941209ff23fSmrg    val = INREG(pRADEONI2CBus->get_clk_reg);
1942209ff23fSmrg    *Clock = (val & pRADEONI2CBus->get_clk_mask) != 0;
1943209ff23fSmrg    val = INREG(pRADEONI2CBus->get_data_reg);
1944209ff23fSmrg    *data  = (val & pRADEONI2CBus->get_data_mask) != 0;
1945209ff23fSmrg
1946209ff23fSmrg}
1947209ff23fSmrg
1948209ff23fSmrgstatic void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data)
1949209ff23fSmrg{
1950209ff23fSmrg    ScrnInfoPtr    pScrn      = xf86Screens[b->scrnIndex];
1951209ff23fSmrg    RADEONInfoPtr  info       = RADEONPTR(pScrn);
1952209ff23fSmrg    unsigned long  val;
1953209ff23fSmrg    unsigned char *RADEONMMIO = info->MMIO;
1954209ff23fSmrg    RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr;
1955209ff23fSmrg
1956209ff23fSmrg    val = INREG(pRADEONI2CBus->put_clk_reg) & (uint32_t)~(pRADEONI2CBus->put_clk_mask);
1957209ff23fSmrg    val |= (Clock ? 0:pRADEONI2CBus->put_clk_mask);
1958209ff23fSmrg    OUTREG(pRADEONI2CBus->put_clk_reg, val);
1959209ff23fSmrg    /* read back to improve reliability on some cards. */
1960209ff23fSmrg    val = INREG(pRADEONI2CBus->put_clk_reg);
1961209ff23fSmrg
1962209ff23fSmrg    val = INREG(pRADEONI2CBus->put_data_reg) & (uint32_t)~(pRADEONI2CBus->put_data_mask);
1963209ff23fSmrg    val |= (data ? 0:pRADEONI2CBus->put_data_mask);
1964209ff23fSmrg    OUTREG(pRADEONI2CBus->put_data_reg, val);
1965209ff23fSmrg    /* read back to improve reliability on some cards. */
1966209ff23fSmrg    val = INREG(pRADEONI2CBus->put_data_reg);
1967209ff23fSmrg
1968209ff23fSmrg}
1969209ff23fSmrg
1970b7e1c893SmrgBool
1971b7e1c893SmrgRADEONI2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, char *name, RADEONI2CBusPtr pRADEONI2CBus)
1972209ff23fSmrg{
1973209ff23fSmrg    I2CBusPtr pI2CBus;
1974209ff23fSmrg
1975209ff23fSmrg    pI2CBus = xf86CreateI2CBusRec();
1976209ff23fSmrg    if (!pI2CBus) return FALSE;
1977209ff23fSmrg
1978209ff23fSmrg    pI2CBus->BusName    = name;
1979209ff23fSmrg    pI2CBus->scrnIndex  = pScrn->scrnIndex;
1980209ff23fSmrg    pI2CBus->I2CPutBits = RADEONI2CPutBits;
1981209ff23fSmrg    pI2CBus->I2CGetBits = RADEONI2CGetBits;
1982b7e1c893Smrg    pI2CBus->AcknTimeout = 5;
1983209ff23fSmrg
1984b7e1c893Smrg    pI2CBus->DriverPrivate.ptr = (pointer)pRADEONI2CBus;
1985209ff23fSmrg
1986b7e1c893Smrg    if (!xf86I2CBusInit(pI2CBus))
1987b7e1c893Smrg	return FALSE;
1988209ff23fSmrg
1989b7e1c893Smrg    *bus_ptr = pI2CBus;
1990209ff23fSmrg    return TRUE;
1991209ff23fSmrg}
1992209ff23fSmrg
1993b7e1c893SmrgRADEONI2CBusRec
1994b7e1c893Smrglegacy_setup_i2c_bus(int ddc_line)
1995209ff23fSmrg{
1996b7e1c893Smrg    RADEONI2CBusRec i2c;
1997209ff23fSmrg
1998b7e1c893Smrg    i2c.hw_line = 0;
1999b7e1c893Smrg    i2c.hw_capable = FALSE;
2000b7e1c893Smrg    i2c.mask_clk_mask = RADEON_GPIO_EN_1;
2001b7e1c893Smrg    i2c.mask_data_mask = RADEON_GPIO_EN_0;
2002b7e1c893Smrg    i2c.a_clk_mask = RADEON_GPIO_A_1;
2003b7e1c893Smrg    i2c.a_data_mask = RADEON_GPIO_A_0;
2004b7e1c893Smrg    i2c.put_clk_mask = RADEON_GPIO_EN_1;
2005b7e1c893Smrg    i2c.put_data_mask = RADEON_GPIO_EN_0;
2006b7e1c893Smrg    i2c.get_clk_mask = RADEON_GPIO_Y_1;
2007b7e1c893Smrg    i2c.get_data_mask = RADEON_GPIO_Y_0;
2008b7e1c893Smrg    if ((ddc_line == RADEON_LCD_GPIO_MASK) ||
2009b7e1c893Smrg	(ddc_line == RADEON_MDGPIO_EN_REG)) {
2010b7e1c893Smrg	i2c.mask_clk_reg = ddc_line;
2011b7e1c893Smrg	i2c.mask_data_reg = ddc_line;
2012b7e1c893Smrg	i2c.a_clk_reg = ddc_line;
2013b7e1c893Smrg	i2c.a_data_reg = ddc_line;
2014b7e1c893Smrg	i2c.put_clk_reg = ddc_line;
2015b7e1c893Smrg	i2c.put_data_reg = ddc_line;
2016b7e1c893Smrg	i2c.get_clk_reg = ddc_line + 4;
2017b7e1c893Smrg	i2c.get_data_reg = ddc_line + 4;
2018b7e1c893Smrg    } else {
2019b7e1c893Smrg	i2c.mask_clk_reg = ddc_line;
2020b7e1c893Smrg	i2c.mask_data_reg = ddc_line;
2021b7e1c893Smrg	i2c.a_clk_reg = ddc_line;
2022b7e1c893Smrg	i2c.a_data_reg = ddc_line;
2023b7e1c893Smrg	i2c.put_clk_reg = ddc_line;
2024b7e1c893Smrg	i2c.put_data_reg = ddc_line;
2025b7e1c893Smrg	i2c.get_clk_reg = ddc_line;
2026b7e1c893Smrg	i2c.get_data_reg = ddc_line;
2027209ff23fSmrg    }
2028b7e1c893Smrg
2029b7e1c893Smrg    if (ddc_line)
2030b7e1c893Smrg	i2c.valid = TRUE;
2031b7e1c893Smrg    else
2032b7e1c893Smrg	i2c.valid = FALSE;
2033b7e1c893Smrg
2034b7e1c893Smrg    return i2c;
2035209ff23fSmrg}
2036209ff23fSmrg
2037b7e1c893SmrgRADEONI2CBusRec
2038b7e1c893Smrgatom_setup_i2c_bus(int ddc_line)
2039209ff23fSmrg{
2040b7e1c893Smrg    RADEONI2CBusRec i2c;
2041209ff23fSmrg
2042b7e1c893Smrg    i2c.hw_line = 0;
2043b7e1c893Smrg    i2c.hw_capable = FALSE;
2044b7e1c893Smrg    if (ddc_line == AVIVO_GPIO_0) {
2045b7e1c893Smrg	i2c.put_clk_mask = (1 << 19);
2046b7e1c893Smrg	i2c.put_data_mask = (1 << 18);
2047b7e1c893Smrg	i2c.get_clk_mask = (1 << 19);
2048b7e1c893Smrg	i2c.get_data_mask = (1 << 18);
2049b7e1c893Smrg	i2c.mask_clk_mask = (1 << 19);
2050b7e1c893Smrg	i2c.mask_data_mask = (1 << 18);
2051b7e1c893Smrg	i2c.a_clk_mask = (1 << 19);
2052b7e1c893Smrg	i2c.a_data_mask = (1 << 18);
2053b7e1c893Smrg    } else {
2054b7e1c893Smrg	i2c.put_clk_mask = (1 << 0);
2055b7e1c893Smrg	i2c.put_data_mask = (1 << 8);
2056b7e1c893Smrg	i2c.get_clk_mask = (1 << 0);
2057b7e1c893Smrg	i2c.get_data_mask = (1 << 8);
2058b7e1c893Smrg	i2c.mask_clk_mask = (1 << 0);
2059b7e1c893Smrg	i2c.mask_data_mask = (1 << 8);
2060b7e1c893Smrg	i2c.a_clk_mask = (1 << 0);
2061b7e1c893Smrg	i2c.a_data_mask = (1 << 8);
2062209ff23fSmrg    }
2063b7e1c893Smrg    i2c.mask_clk_reg = ddc_line;
2064b7e1c893Smrg    i2c.mask_data_reg = ddc_line;
2065b7e1c893Smrg    i2c.a_clk_reg = ddc_line + 0x4;
2066b7e1c893Smrg    i2c.a_data_reg = ddc_line + 0x4;
2067b7e1c893Smrg    i2c.put_clk_reg = ddc_line + 0x8;
2068b7e1c893Smrg    i2c.put_data_reg = ddc_line + 0x8;
2069b7e1c893Smrg    i2c.get_clk_reg = ddc_line + 0xc;
2070b7e1c893Smrg    i2c.get_data_reg = ddc_line + 0xc;
2071b7e1c893Smrg    if (ddc_line)
2072b7e1c893Smrg	i2c.valid = TRUE;
2073b7e1c893Smrg    else
2074b7e1c893Smrg	i2c.valid = FALSE;
2075209ff23fSmrg
2076b7e1c893Smrg    return i2c;
2077209ff23fSmrg}
2078209ff23fSmrg
2079209ff23fSmrgstatic void
2080209ff23fSmrgRADEONGetTVInfo(xf86OutputPtr output)
2081209ff23fSmrg{
2082209ff23fSmrg    ScrnInfoPtr pScrn = output->scrn;
2083209ff23fSmrg    RADEONInfoPtr  info       = RADEONPTR(pScrn);
2084209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
2085b7e1c893Smrg    radeon_tvout_ptr tvout = &radeon_output->tvout;
2086209ff23fSmrg    char *optstr;
2087209ff23fSmrg
2088b7e1c893Smrg    tvout->hPos = 0;
2089b7e1c893Smrg    tvout->vPos = 0;
2090b7e1c893Smrg    tvout->hSize = 0;
2091b7e1c893Smrg    tvout->tv_on = FALSE;
2092209ff23fSmrg
2093209ff23fSmrg    if (!RADEONGetTVInfoFromBIOS(output)) {
2094209ff23fSmrg	/* set some reasonable defaults */
2095b7e1c893Smrg	tvout->default_tvStd = TV_STD_NTSC;
2096b7e1c893Smrg	tvout->tvStd = TV_STD_NTSC;
2097b7e1c893Smrg	tvout->TVRefClk = 27.000000000;
2098b7e1c893Smrg	tvout->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL;
2099209ff23fSmrg    }
2100209ff23fSmrg
2101209ff23fSmrg    optstr = (char *)xf86GetOptValString(info->Options, OPTION_TVSTD);
2102209ff23fSmrg    if (optstr) {
2103209ff23fSmrg	if (!strncmp("ntsc", optstr, strlen("ntsc")))
2104b7e1c893Smrg	    tvout->tvStd = TV_STD_NTSC;
2105209ff23fSmrg	else if (!strncmp("pal", optstr, strlen("pal")))
2106b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL;
2107209ff23fSmrg	else if (!strncmp("pal-m", optstr, strlen("pal-m")))
2108b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL_M;
2109209ff23fSmrg	else if (!strncmp("pal-60", optstr, strlen("pal-60")))
2110b7e1c893Smrg	    tvout->tvStd = TV_STD_PAL_60;
2111209ff23fSmrg	else if (!strncmp("ntsc-j", optstr, strlen("ntsc-j")))
2112b7e1c893Smrg	    tvout->tvStd = TV_STD_NTSC_J;
2113209ff23fSmrg	else if (!strncmp("scart-pal", optstr, strlen("scart-pal")))
2114b7e1c893Smrg	    tvout->tvStd = TV_STD_SCART_PAL;
2115209ff23fSmrg	else {
2116209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid TV Standard: %s\n", optstr);
2117209ff23fSmrg	}
2118209ff23fSmrg    }
2119209ff23fSmrg
2120209ff23fSmrg}
2121209ff23fSmrg
2122209ff23fSmrgvoid RADEONInitConnector(xf86OutputPtr output)
2123209ff23fSmrg{
2124209ff23fSmrg    ScrnInfoPtr	    pScrn = output->scrn;
2125209ff23fSmrg    RADEONInfoPtr  info       = RADEONPTR(pScrn);
2126209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
2127209ff23fSmrg
2128b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))
2129b7e1c893Smrg	radeon_output->rmx_type = RMX_FULL;
2130209ff23fSmrg    else
2131b7e1c893Smrg	radeon_output->rmx_type = RMX_OFF;
2132209ff23fSmrg
2133b7e1c893Smrg    if (!IS_AVIVO_VARIANT) {
2134b7e1c893Smrg	if (radeon_output->devices & (ATOM_DEVICE_CRT2_SUPPORT)) {
2135b7e1c893Smrg	    if (xf86ReturnOptValBool(info->Options, OPTION_TVDAC_LOAD_DETECT, FALSE))
2136b7e1c893Smrg		radeon_output->load_detection = 1;
2137b7e1c893Smrg	}
2138209ff23fSmrg    }
2139209ff23fSmrg
2140b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT))
2141209ff23fSmrg	RADEONGetTVInfo(output);
2142209ff23fSmrg
2143b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))
2144209ff23fSmrg	radeon_output->coherent_mode = TRUE;
2145209ff23fSmrg
2146ad43ddacSmrg    if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) {
2147ad43ddacSmrg	strcpy(radeon_output->dp_bus_name, output->name);
2148ad43ddacSmrg	strcat(radeon_output->dp_bus_name, "-DP");
2149ad43ddacSmrg	RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output);
2150ad43ddacSmrg	RADEON_DP_GetSinkType(output);
2151ad43ddacSmrg    }
2152ad43ddacSmrg
2153ad43ddacSmrg    if (radeon_output->ConnectorType == CONNECTOR_EDP) {
2154ad43ddacSmrg	strcpy(radeon_output->dp_bus_name, output->name);
2155ad43ddacSmrg	strcat(radeon_output->dp_bus_name, "-eDP");
2156ad43ddacSmrg	RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output);
2157ad43ddacSmrg	RADEON_DP_GetSinkType(output);
2158ad43ddacSmrg    }
2159ad43ddacSmrg
2160209ff23fSmrg    if (radeon_output->ddc_i2c.valid)
2161b7e1c893Smrg	RADEONI2CInit(pScrn, &radeon_output->pI2CBus, output->name, &radeon_output->ddc_i2c);
2162209ff23fSmrg
2163209ff23fSmrg}
2164209ff23fSmrg
2165209ff23fSmrg#if defined(__powerpc__)
2166209ff23fSmrgstatic Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn)
2167209ff23fSmrg{
2168209ff23fSmrg    RADEONInfoPtr info       = RADEONPTR(pScrn);
2169209ff23fSmrg
2170209ff23fSmrg
2171209ff23fSmrg    switch (info->MacModel) {
2172209ff23fSmrg    case RADEON_MAC_IBOOK:
2173209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2174209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2175209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2176b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2177b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2178b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2179b7e1c893Smrg									    ATOM_DEVICE_LCD1_SUPPORT,
2180b7e1c893Smrg									    0),
2181b7e1c893Smrg				ATOM_DEVICE_LCD1_SUPPORT))
2182b7e1c893Smrg	    return FALSE;
2183209ff23fSmrg
2184209ff23fSmrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2185b7e1c893Smrg	info->BiosConnector[1].load_detection = FALSE;
2186209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2187209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2188b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT;
2189b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2190b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2191b7e1c893Smrg									    ATOM_DEVICE_CRT2_SUPPORT,
2192b7e1c893Smrg									    2),
2193b7e1c893Smrg				ATOM_DEVICE_CRT2_SUPPORT))
2194b7e1c893Smrg	    return FALSE;
2195209ff23fSmrg
2196209ff23fSmrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2197b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2198209ff23fSmrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2199209ff23fSmrg	info->BiosConnector[2].valid = TRUE;
2200b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2201b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2202b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2203b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2204b7e1c893Smrg									    2),
2205b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2206b7e1c893Smrg	    return FALSE;
2207209ff23fSmrg	return TRUE;
2208209ff23fSmrg    case RADEON_MAC_POWERBOOK_EXTERNAL:
2209209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2210209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2211209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2212b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2213b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2214b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2215b7e1c893Smrg									    ATOM_DEVICE_LCD1_SUPPORT,
2216b7e1c893Smrg									    0),
2217b7e1c893Smrg				ATOM_DEVICE_LCD1_SUPPORT))
2218b7e1c893Smrg	    return FALSE;
2219209ff23fSmrg
2220209ff23fSmrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2221209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
2222209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2223b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT;
2224b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2225b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2226b7e1c893Smrg									    ATOM_DEVICE_CRT1_SUPPORT,
2227b7e1c893Smrg									    1),
2228b7e1c893Smrg				ATOM_DEVICE_CRT1_SUPPORT))
2229b7e1c893Smrg	    return FALSE;
2230b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2231b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2232b7e1c893Smrg									    ATOM_DEVICE_DFP2_SUPPORT,
2233b7e1c893Smrg									    0),
2234b7e1c893Smrg				ATOM_DEVICE_DFP2_SUPPORT))
2235b7e1c893Smrg	    return FALSE;
2236209ff23fSmrg
2237209ff23fSmrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2238b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2239209ff23fSmrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2240209ff23fSmrg	info->BiosConnector[2].valid = TRUE;
2241b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2242b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2243b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2244b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2245b7e1c893Smrg									    2),
2246b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2247b7e1c893Smrg	    return FALSE;
2248209ff23fSmrg	return TRUE;
2249209ff23fSmrg    case RADEON_MAC_POWERBOOK_INTERNAL:
2250209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2251209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2252209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2253b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2254b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2255b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2256b7e1c893Smrg									    ATOM_DEVICE_LCD1_SUPPORT,
2257b7e1c893Smrg									    0),
2258b7e1c893Smrg				ATOM_DEVICE_LCD1_SUPPORT))
2259b7e1c893Smrg	    return FALSE;
2260209ff23fSmrg
2261209ff23fSmrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2262209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
2263209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2264b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT;
2265b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2266b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2267b7e1c893Smrg									    ATOM_DEVICE_CRT1_SUPPORT,
2268b7e1c893Smrg									    1),
2269b7e1c893Smrg				ATOM_DEVICE_CRT1_SUPPORT))
2270b7e1c893Smrg	    return FALSE;
2271b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2272b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2273b7e1c893Smrg									    ATOM_DEVICE_DFP1_SUPPORT,
2274b7e1c893Smrg									    0),
2275b7e1c893Smrg				ATOM_DEVICE_DFP1_SUPPORT))
2276b7e1c893Smrg	    return FALSE;
2277209ff23fSmrg
2278209ff23fSmrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2279b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2280209ff23fSmrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2281209ff23fSmrg	info->BiosConnector[2].valid = TRUE;
2282b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2283b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2284b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2285b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2286b7e1c893Smrg									    2),
2287b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2288b7e1c893Smrg	    return FALSE;
2289209ff23fSmrg	return TRUE;
2290209ff23fSmrg    case RADEON_MAC_POWERBOOK_VGA:
2291209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2292b7e1c893Smrg	info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2293209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2294b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2295b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2296b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2297b7e1c893Smrg									    ATOM_DEVICE_LCD1_SUPPORT,
2298b7e1c893Smrg									    0),
2299b7e1c893Smrg				ATOM_DEVICE_LCD1_SUPPORT))
2300b7e1c893Smrg	    return FALSE;
2301209ff23fSmrg
2302209ff23fSmrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2303b7e1c893Smrg	info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2304209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2305b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT;
2306b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2307b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2308b7e1c893Smrg									    ATOM_DEVICE_CRT1_SUPPORT,
2309b7e1c893Smrg									    1),
2310b7e1c893Smrg				ATOM_DEVICE_CRT1_SUPPORT))
2311b7e1c893Smrg	    return FALSE;
2312209ff23fSmrg
2313209ff23fSmrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2314b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2315209ff23fSmrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2316209ff23fSmrg	info->BiosConnector[2].valid = TRUE;
2317b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2318b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2319b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2320b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2321b7e1c893Smrg									    2),
2322b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2323b7e1c893Smrg	    return FALSE;
2324209ff23fSmrg	return TRUE;
2325209ff23fSmrg    case RADEON_MAC_MINI_EXTERNAL:
2326209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
2327b7e1c893Smrg	info->BiosConnector[0].load_detection = FALSE;
2328209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
2329209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2330b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT;
2331b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2332b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2333b7e1c893Smrg									    ATOM_DEVICE_CRT2_SUPPORT,
2334b7e1c893Smrg									    2),
2335b7e1c893Smrg				ATOM_DEVICE_CRT2_SUPPORT))
2336b7e1c893Smrg	    return FALSE;
2337b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2338b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2339b7e1c893Smrg									    ATOM_DEVICE_DFP2_SUPPORT,
2340b7e1c893Smrg									    0),
2341b7e1c893Smrg				ATOM_DEVICE_DFP2_SUPPORT))
2342b7e1c893Smrg	    return FALSE;
2343209ff23fSmrg
2344209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_STV;
2345b7e1c893Smrg	info->BiosConnector[1].load_detection = FALSE;
2346209ff23fSmrg	info->BiosConnector[1].ddc_i2c.valid = FALSE;
2347209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2348b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT;
2349b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2350b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2351b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2352b7e1c893Smrg									    2),
2353b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2354b7e1c893Smrg	    return FALSE;
2355209ff23fSmrg	return TRUE;
2356209ff23fSmrg    case RADEON_MAC_MINI_INTERNAL:
2357209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
2358b7e1c893Smrg	info->BiosConnector[0].load_detection = FALSE;
2359209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
2360209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2361b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT;
2362b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2363b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2364b7e1c893Smrg									    ATOM_DEVICE_CRT2_SUPPORT,
2365b7e1c893Smrg									    2),
2366b7e1c893Smrg				ATOM_DEVICE_CRT2_SUPPORT))
2367b7e1c893Smrg	    return FALSE;
2368b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2369b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2370b7e1c893Smrg									    ATOM_DEVICE_DFP1_SUPPORT,
2371b7e1c893Smrg									    0),
2372b7e1c893Smrg				ATOM_DEVICE_DFP1_SUPPORT))
2373b7e1c893Smrg	    return FALSE;
2374209ff23fSmrg
2375209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_STV;
2376b7e1c893Smrg	info->BiosConnector[1].load_detection = FALSE;
2377209ff23fSmrg	info->BiosConnector[1].ddc_i2c.valid = FALSE;
2378209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2379b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT;
2380b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2381b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2382b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2383b7e1c893Smrg									    2),
2384b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2385b7e1c893Smrg	    return FALSE;
2386209ff23fSmrg	return TRUE;
2387209ff23fSmrg    case RADEON_MAC_IMAC_G5_ISIGHT:
2388209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID);
2389209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_D;
2390209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2391b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_DFP1_SUPPORT;
2392b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2393b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2394b7e1c893Smrg									    ATOM_DEVICE_DFP1_SUPPORT,
2395b7e1c893Smrg									    0),
2396b7e1c893Smrg				ATOM_DEVICE_DFP1_SUPPORT))
2397b7e1c893Smrg	    return FALSE;
2398209ff23fSmrg
2399209ff23fSmrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2400b7e1c893Smrg	info->BiosConnector[1].load_detection = FALSE;
2401b7e1c893Smrg	info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2402b7e1c893Smrg	info->BiosConnector[1].valid = TRUE;
2403b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT;
2404b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2405b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2406b7e1c893Smrg									    ATOM_DEVICE_CRT2_SUPPORT,
2407b7e1c893Smrg									    2),
2408b7e1c893Smrg				ATOM_DEVICE_CRT2_SUPPORT))
2409b7e1c893Smrg	    return FALSE;
2410b7e1c893Smrg
2411b7e1c893Smrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2412b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2413b7e1c893Smrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2414b7e1c893Smrg	info->BiosConnector[2].valid = TRUE;
2415b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2416b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2417b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2418b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2419b7e1c893Smrg									    2),
2420b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2421b7e1c893Smrg	    return FALSE;
2422b7e1c893Smrg	return TRUE;
2423b7e1c893Smrg    case RADEON_MAC_EMAC:
2424b7e1c893Smrg	/* eMac G4 800/1.0 with radeon 7500, no EDID on internal monitor
2425b7e1c893Smrg	 * later eMac's (G4 1.25/1.42) with radeon 9200 and 9600 may have
2426b7e1c893Smrg	 * different ddc setups.  need to verify
2427b7e1c893Smrg	 */
2428b7e1c893Smrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2429b7e1c893Smrg	info->BiosConnector[0].ConnectorType = CONNECTOR_VGA;
2430b7e1c893Smrg	info->BiosConnector[0].valid = TRUE;
2431b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT;
2432b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2433b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2434b7e1c893Smrg									    ATOM_DEVICE_CRT1_SUPPORT,
2435b7e1c893Smrg									    1),
2436b7e1c893Smrg				ATOM_DEVICE_CRT1_SUPPORT))
2437b7e1c893Smrg	    return FALSE;
2438b7e1c893Smrg
2439b7e1c893Smrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
2440b7e1c893Smrg	info->BiosConnector[1].load_detection = FALSE;
2441209ff23fSmrg	info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2442209ff23fSmrg	info->BiosConnector[1].valid = TRUE;
2443b7e1c893Smrg	info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT;
2444b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2445b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2446b7e1c893Smrg									    ATOM_DEVICE_CRT2_SUPPORT,
2447b7e1c893Smrg									    2),
2448b7e1c893Smrg				ATOM_DEVICE_CRT2_SUPPORT))
2449b7e1c893Smrg	    return FALSE;
2450209ff23fSmrg
2451209ff23fSmrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2452b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2453209ff23fSmrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2454209ff23fSmrg	info->BiosConnector[2].valid = TRUE;
2455b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2456b7e1c893Smrg	if (!radeon_add_encoder(pScrn,
2457b7e1c893Smrg				radeon_get_encoder_id_from_supported_device(pScrn,
2458b7e1c893Smrg									    ATOM_DEVICE_TV1_SUPPORT,
2459b7e1c893Smrg									    2),
2460b7e1c893Smrg				ATOM_DEVICE_TV1_SUPPORT))
2461b7e1c893Smrg	    return FALSE;
2462209ff23fSmrg	return TRUE;
2463209ff23fSmrg    default:
2464209ff23fSmrg	return FALSE;
2465209ff23fSmrg    }
2466209ff23fSmrg
2467209ff23fSmrg    return FALSE;
2468209ff23fSmrg}
2469209ff23fSmrg#endif
2470209ff23fSmrg
2471209ff23fSmrgstatic void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn)
2472209ff23fSmrg{
2473209ff23fSmrg    RADEONInfoPtr info       = RADEONPTR(pScrn);
2474209ff23fSmrg    RADEONEntPtr pRADEONEnt  = RADEONEntPriv(pScrn);
2475209ff23fSmrg
2476b7e1c893Smrg    if (IS_AVIVO_VARIANT)
2477b7e1c893Smrg	return;
2478b7e1c893Smrg
2479209ff23fSmrg    if (!pRADEONEnt->HasCRTC2) {
2480209ff23fSmrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2481209ff23fSmrg	info->BiosConnector[0].ConnectorType = CONNECTOR_VGA;
2482209ff23fSmrg	info->BiosConnector[0].valid = TRUE;
2483b7e1c893Smrg	info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT;
2484b7e1c893Smrg	radeon_add_encoder(pScrn,
2485b7e1c893Smrg			   radeon_get_encoder_id_from_supported_device(pScrn,
2486b7e1c893Smrg								       ATOM_DEVICE_CRT1_SUPPORT,
2487b7e1c893Smrg								       1),
2488b7e1c893Smrg			   ATOM_DEVICE_CRT1_SUPPORT);
2489209ff23fSmrg	return;
2490209ff23fSmrg    }
2491209ff23fSmrg
2492b7e1c893Smrg    if (info->IsMobility) {
2493b7e1c893Smrg	/* Below is the most common setting, but may not be true */
2494b7e1c893Smrg	if (info->IsIGP) {
2495b7e1c893Smrg	    info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
2496209ff23fSmrg	    info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2497209ff23fSmrg	    info->BiosConnector[0].valid = TRUE;
2498b7e1c893Smrg	    info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2499b7e1c893Smrg	    radeon_add_encoder(pScrn,
2500b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2501b7e1c893Smrg									   ATOM_DEVICE_LCD1_SUPPORT,
2502b7e1c893Smrg									   0),
2503b7e1c893Smrg			       ATOM_DEVICE_LCD1_SUPPORT);
2504b7e1c893Smrg
2505b7e1c893Smrg	    /* IGP only has TVDAC */
2506b7e1c893Smrg	    if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
2507b7e1c893Smrg		(info->ChipFamily == CHIP_FAMILY_RS480))
2508b7e1c893Smrg		info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
2509b7e1c893Smrg	    else
2510b7e1c893Smrg		info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2511b7e1c893Smrg	    info->BiosConnector[1].load_detection = FALSE;
2512209ff23fSmrg	    info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2513209ff23fSmrg	    info->BiosConnector[1].valid = TRUE;
2514b7e1c893Smrg	    info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT;
2515b7e1c893Smrg	    radeon_add_encoder(pScrn,
2516b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2517b7e1c893Smrg									   ATOM_DEVICE_CRT1_SUPPORT,
2518b7e1c893Smrg									   2),
2519b7e1c893Smrg			       ATOM_DEVICE_CRT1_SUPPORT);
2520209ff23fSmrg	} else {
2521b7e1c893Smrg#if defined(__powerpc__)
2522b7e1c893Smrg	    info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2523b7e1c893Smrg#else
2524b7e1c893Smrg	    info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
2525b7e1c893Smrg#endif
2526b7e1c893Smrg	    info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS;
2527209ff23fSmrg	    info->BiosConnector[0].valid = TRUE;
2528b7e1c893Smrg	    info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT;
2529b7e1c893Smrg	    radeon_add_encoder(pScrn,
2530b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2531b7e1c893Smrg									   ATOM_DEVICE_LCD1_SUPPORT,
2532b7e1c893Smrg									   0),
2533b7e1c893Smrg			       ATOM_DEVICE_LCD1_SUPPORT);
2534209ff23fSmrg
2535b7e1c893Smrg	    info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2536209ff23fSmrg	    info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2537209ff23fSmrg	    info->BiosConnector[1].valid = TRUE;
2538b7e1c893Smrg	    info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT;
2539b7e1c893Smrg	    radeon_add_encoder(pScrn,
2540b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2541b7e1c893Smrg									   ATOM_DEVICE_CRT1_SUPPORT,
2542b7e1c893Smrg									   1),
2543b7e1c893Smrg			       ATOM_DEVICE_CRT1_SUPPORT);
2544209ff23fSmrg	}
2545209ff23fSmrg    } else {
2546b7e1c893Smrg	/* Below is the most common setting, but may not be true */
2547b7e1c893Smrg	if (info->IsIGP) {
2548b7e1c893Smrg	    if ((info->ChipFamily == CHIP_FAMILY_RS400) ||
2549b7e1c893Smrg		(info->ChipFamily == CHIP_FAMILY_RS480))
2550b7e1c893Smrg		info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
2551b7e1c893Smrg	    else
2552b7e1c893Smrg		info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2553b7e1c893Smrg	    info->BiosConnector[0].load_detection = FALSE;
2554b7e1c893Smrg	    info->BiosConnector[0].ConnectorType = CONNECTOR_VGA;
2555b7e1c893Smrg	    info->BiosConnector[0].valid = TRUE;
2556b7e1c893Smrg	    info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT;
2557b7e1c893Smrg	    radeon_add_encoder(pScrn,
2558b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2559b7e1c893Smrg									   ATOM_DEVICE_CRT1_SUPPORT,
2560b7e1c893Smrg									   1),
2561b7e1c893Smrg			       ATOM_DEVICE_CRT1_SUPPORT);
2562b7e1c893Smrg
2563b7e1c893Smrg	    /* not sure what a good default DDCType for DVI on
2564b7e1c893Smrg	     * IGP desktop chips is
2565b7e1c893Smrg	     */
2566b7e1c893Smrg	    info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID); /* DDC_DVI? */
2567b7e1c893Smrg	    info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_D;
2568b7e1c893Smrg	    info->BiosConnector[1].valid = TRUE;
2569b7e1c893Smrg	    info->BiosConnector[1].devices = ATOM_DEVICE_DFP1_SUPPORT;
2570b7e1c893Smrg	    radeon_add_encoder(pScrn,
2571b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2572b7e1c893Smrg									   ATOM_DEVICE_DFP1_SUPPORT,
2573b7e1c893Smrg									   0),
2574b7e1c893Smrg			       ATOM_DEVICE_DFP1_SUPPORT);
2575209ff23fSmrg	} else {
2576b7e1c893Smrg	    info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2577b7e1c893Smrg	    info->BiosConnector[0].load_detection = FALSE;
2578b7e1c893Smrg	    info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I;
2579b7e1c893Smrg	    info->BiosConnector[0].valid = TRUE;
2580b7e1c893Smrg	    info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT;
2581b7e1c893Smrg	    radeon_add_encoder(pScrn,
2582b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2583b7e1c893Smrg									   ATOM_DEVICE_CRT2_SUPPORT,
2584b7e1c893Smrg									   2),
2585b7e1c893Smrg			       ATOM_DEVICE_CRT2_SUPPORT);
2586b7e1c893Smrg	    radeon_add_encoder(pScrn,
2587b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2588b7e1c893Smrg									   ATOM_DEVICE_DFP1_SUPPORT,
2589b7e1c893Smrg									   0),
2590b7e1c893Smrg			       ATOM_DEVICE_DFP1_SUPPORT);
2591209ff23fSmrg
2592209ff23fSmrg#if defined(__powerpc__)
2593b7e1c893Smrg	    info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2594b7e1c893Smrg	    info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I;
2595b7e1c893Smrg	    info->BiosConnector[1].valid = TRUE;
2596b7e1c893Smrg	    info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT;
2597b7e1c893Smrg	    radeon_add_encoder(pScrn,
2598b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2599b7e1c893Smrg									   ATOM_DEVICE_CRT1_SUPPORT,
2600b7e1c893Smrg									   1),
2601b7e1c893Smrg			       ATOM_DEVICE_CRT1_SUPPORT);
2602b7e1c893Smrg	    radeon_add_encoder(pScrn,
2603b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2604b7e1c893Smrg									   ATOM_DEVICE_DFP2_SUPPORT,
2605b7e1c893Smrg									   0),
2606b7e1c893Smrg			       ATOM_DEVICE_DFP2_SUPPORT);
2607209ff23fSmrg#else
2608b7e1c893Smrg	    info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2609b7e1c893Smrg	    info->BiosConnector[1].ConnectorType = CONNECTOR_VGA;
2610b7e1c893Smrg	    info->BiosConnector[1].valid = TRUE;
2611b7e1c893Smrg	    info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT;
2612b7e1c893Smrg	    radeon_add_encoder(pScrn,
2613b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2614b7e1c893Smrg									   ATOM_DEVICE_CRT1_SUPPORT,
2615b7e1c893Smrg									   1),
2616b7e1c893Smrg			       ATOM_DEVICE_CRT1_SUPPORT);
2617209ff23fSmrg#endif
2618209ff23fSmrg	}
2619b7e1c893Smrg    }
2620209ff23fSmrg
2621b7e1c893Smrg    if (info->InternalTVOut) {
2622b7e1c893Smrg	info->BiosConnector[2].ConnectorType = CONNECTOR_STV;
2623b7e1c893Smrg	info->BiosConnector[2].load_detection = FALSE;
2624b7e1c893Smrg	info->BiosConnector[2].ddc_i2c.valid = FALSE;
2625b7e1c893Smrg	info->BiosConnector[2].valid = TRUE;
2626b7e1c893Smrg	info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT;
2627b7e1c893Smrg	radeon_add_encoder(pScrn,
2628b7e1c893Smrg			       radeon_get_encoder_id_from_supported_device(pScrn,
2629b7e1c893Smrg									   ATOM_DEVICE_TV1_SUPPORT,
2630b7e1c893Smrg									   2),
2631b7e1c893Smrg			       ATOM_DEVICE_TV1_SUPPORT);
2632b7e1c893Smrg    }
2633209ff23fSmrg
2634b7e1c893Smrg    /* Some cards have the DDC lines swapped and we have no way to
2635b7e1c893Smrg     * detect it yet (Mac cards)
2636b7e1c893Smrg     */
2637b7e1c893Smrg    if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DDC, FALSE)) {
2638b7e1c893Smrg	info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
2639b7e1c893Smrg	info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
2640209ff23fSmrg    }
2641209ff23fSmrg}
2642209ff23fSmrg
2643209ff23fSmrg#if defined(__powerpc__)
2644209ff23fSmrg
2645ad43ddacSmrg#ifdef __OpenBSD__
2646ad43ddacSmrg#include <sys/param.h>
2647ad43ddacSmrg#include <sys/sysctl.h>
2648ad43ddacSmrg#endif
2649ad43ddacSmrg
2650209ff23fSmrg/*
2651209ff23fSmrg * Returns RADEONMacModel or 0 based on lines 'detected as' and 'machine'
2652209ff23fSmrg * in /proc/cpuinfo (on Linux) */
2653209ff23fSmrgstatic RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn)
2654209ff23fSmrg{
2655209ff23fSmrg    RADEONInfoPtr info = RADEONPTR(pScrn);
2656209ff23fSmrg    RADEONMacModel ret = 0;
2657209ff23fSmrg#ifdef __linux__
2658209ff23fSmrg    char cpuline[50];  /* 50 should be sufficient for our purposes */
2659209ff23fSmrg    FILE *f = fopen ("/proc/cpuinfo", "r");
2660209ff23fSmrg
2661209ff23fSmrg    /* Some macs (minis and powerbooks) use internal tmds, others use external tmds
2662209ff23fSmrg     * and not just for dual-link TMDS, it shows up with single-link as well.
2663209ff23fSmrg     * Unforunately, there doesn't seem to be any good way to figure it out.
2664209ff23fSmrg     */
2665209ff23fSmrg
2666b7e1c893Smrg    /*
2667209ff23fSmrg     * PowerBook5,[1-5]: external tmds, single-link
2668209ff23fSmrg     * PowerBook5,[789]: external tmds, dual-link
2669209ff23fSmrg     * PowerBook5,6:     external tmds, single-link or dual-link
2670209ff23fSmrg     * need to add another option to specify the external tmds chip
2671209ff23fSmrg     * or find out what's used and add it.
2672209ff23fSmrg     */
2673209ff23fSmrg
2674209ff23fSmrg
2675209ff23fSmrg    if (f != NULL) {
2676209ff23fSmrg	while (fgets(cpuline, sizeof cpuline, f)) {
2677209ff23fSmrg	    if (!strncmp(cpuline, "machine", strlen ("machine"))) {
2678209ff23fSmrg		if (strstr(cpuline, "PowerBook5,1") ||
2679209ff23fSmrg		    strstr(cpuline, "PowerBook5,2") ||
2680209ff23fSmrg		    strstr(cpuline, "PowerBook5,3") ||
2681209ff23fSmrg		    strstr(cpuline, "PowerBook5,4") ||
2682209ff23fSmrg		    strstr(cpuline, "PowerBook5,5")) {
2683209ff23fSmrg		    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */
2684209ff23fSmrg		    info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */
2685209ff23fSmrg		    break;
2686209ff23fSmrg		}
2687209ff23fSmrg
2688209ff23fSmrg		if (strstr(cpuline, "PowerBook5,6")) {
2689209ff23fSmrg		    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */
2690209ff23fSmrg		    break;
2691209ff23fSmrg		}
2692209ff23fSmrg
2693209ff23fSmrg		if (strstr(cpuline, "PowerBook5,7") ||
2694209ff23fSmrg		    strstr(cpuline, "PowerBook5,8") ||
2695209ff23fSmrg		    strstr(cpuline, "PowerBook5,9")) {
2696209ff23fSmrg		    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */
2697209ff23fSmrg		    info->ext_tmds_chip = RADEON_SIL_1178; /* guess */
2698209ff23fSmrg		    break;
2699209ff23fSmrg		}
2700209ff23fSmrg
2701209ff23fSmrg		if (strstr(cpuline, "PowerBook3,3")) {
2702209ff23fSmrg		    ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */
2703209ff23fSmrg		    break;
2704209ff23fSmrg		}
2705209ff23fSmrg
2706209ff23fSmrg		if (strstr(cpuline, "PowerMac10,1")) {
2707209ff23fSmrg		    ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */
2708209ff23fSmrg		    break;
2709209ff23fSmrg		}
2710209ff23fSmrg		if (strstr(cpuline, "PowerMac10,2")) {
2711209ff23fSmrg		    ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */
2712209ff23fSmrg		    break;
2713209ff23fSmrg		}
2714209ff23fSmrg	    } else if (!strncmp(cpuline, "detected as", strlen("detected as"))) {
2715209ff23fSmrg		if (strstr(cpuline, "iBook")) {
2716209ff23fSmrg		    ret = RADEON_MAC_IBOOK;
2717209ff23fSmrg		    break;
2718209ff23fSmrg		} else if (strstr(cpuline, "PowerBook")) {
2719209ff23fSmrg		    ret = RADEON_MAC_POWERBOOK_INTERNAL; /* internal tmds */
2720209ff23fSmrg		    break;
2721209ff23fSmrg		} else if (strstr(cpuline, "iMac G5 (iSight)")) {
2722209ff23fSmrg		    ret = RADEON_MAC_IMAC_G5_ISIGHT;
2723209ff23fSmrg		    break;
2724b7e1c893Smrg		} else if (strstr(cpuline, "eMac")) {
2725b7e1c893Smrg		    ret = RADEON_MAC_EMAC;
2726b7e1c893Smrg		    break;
2727209ff23fSmrg		}
2728209ff23fSmrg
2729209ff23fSmrg		/* No known PowerMac model detected */
2730209ff23fSmrg		break;
2731209ff23fSmrg	    }
2732209ff23fSmrg	}
2733209ff23fSmrg
2734209ff23fSmrg	fclose (f);
2735209ff23fSmrg    } else
2736209ff23fSmrg	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
2737209ff23fSmrg		   "Cannot detect PowerMac model because /proc/cpuinfo not "
2738209ff23fSmrg		   "readable.\n");
2739209ff23fSmrg
2740209ff23fSmrg#endif /* __linux */
2741209ff23fSmrg
2742ad43ddacSmrg#ifdef __OpenBSD__
2743ad43ddacSmrg    char model[32];
2744ad43ddacSmrg    int mib[2];
2745ad43ddacSmrg    size_t len;
2746ad43ddacSmrg
2747ad43ddacSmrg    mib[0] = CTL_HW;
2748ad43ddacSmrg    mib[1] = HW_PRODUCT;
2749ad43ddacSmrg    len = sizeof(model);
2750ad43ddacSmrg    if (sysctl(mib, 2, model, &len, NULL, 0) >= 0) {
2751ad43ddacSmrg	if (strcmp(model, "PowerBook5,1") == 0 ||
2752ad43ddacSmrg	    strcmp(model, "PowerBook5,2") == 0 ||
2753ad43ddacSmrg	    strcmp(model, "PowerBook5,3") == 0 ||
2754ad43ddacSmrg	    strcmp(model, "PowerBook5,4") == 0 ||
2755ad43ddacSmrg	    strcmp(model, "PowerBook5,5") == 0) {
2756ad43ddacSmrg	    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */
2757ad43ddacSmrg	    info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */
2758ad43ddacSmrg	}
2759ad43ddacSmrg
2760ad43ddacSmrg	if (strcmp(model, "PowerBook5,6") == 0) {
2761ad43ddacSmrg	    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */
2762ad43ddacSmrg	}
2763ad43ddacSmrg
2764ad43ddacSmrg	if (strcmp(model, "PowerBook5,7") ||
2765ad43ddacSmrg	    strcmp(model, "PowerBook5,8") == 0 ||
2766ad43ddacSmrg	    strcmp(model, "PowerBook5,9") == 0) {
2767ad43ddacSmrg	    ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */
2768ad43ddacSmrg	    info->ext_tmds_chip = RADEON_SIL_1178; /* guess */
2769ad43ddacSmrg	}
2770ad43ddacSmrg
2771ad43ddacSmrg	if (strcmp(model, "PowerBook3,3") == 0) {
2772ad43ddacSmrg	    ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */
2773ad43ddacSmrg	}
2774ad43ddacSmrg
2775ad43ddacSmrg	if (strcmp(model, "PowerMac10,1") == 0) {
2776ad43ddacSmrg	    ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */
2777ad43ddacSmrg	}
2778ad43ddacSmrg
2779ad43ddacSmrg	if (strcmp(model, "PowerMac10,2") == 0) {
2780ad43ddacSmrg	    ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */
2781ad43ddacSmrg	}
2782ad43ddacSmrg
2783ad43ddacSmrg	if (strcmp(model, "PowerBook2,1") == 0 ||
2784ad43ddacSmrg	    strcmp(model, "PowerBook2,2") == 0 ||
2785ad43ddacSmrg	    strcmp(model, "PowerBook4,1") == 0 ||
2786ad43ddacSmrg	    strcmp(model, "PowerBook4,2") == 0 ||
2787ad43ddacSmrg	    strcmp(model, "PowerBook4,3") == 0 ||
2788ad43ddacSmrg	    strcmp(model, "PowerBook6,3") == 0 ||
2789ad43ddacSmrg	    strcmp(model, "PowerBook6,5") == 0 ||
2790ad43ddacSmrg	    strcmp(model, "PowerBook6,7") == 0) {
2791ad43ddacSmrg	    ret = RADEON_MAC_IBOOK;
2792ad43ddacSmrg	}
2793ad43ddacSmrg
2794ad43ddacSmrg	if (strcmp(model, "PowerBook1,1") == 0 ||
2795ad43ddacSmrg	    strcmp(model, "PowerBook3,1") == 0 ||
2796ad43ddacSmrg	    strcmp(model, "PowerBook3,2") == 0 ||
2797ad43ddacSmrg	    strcmp(model, "PowerBook3,4") == 0 ||
2798ad43ddacSmrg	    strcmp(model, "PowerBook3,5") == 0) {
2799ad43ddacSmrg	    ret = RADEON_MAC_POWERBOOK_INTERNAL;
2800ad43ddacSmrg	}
2801ad43ddacSmrg
2802ad43ddacSmrg	if (strcmp(model, "PowerMac12,1") == 0) {
2803ad43ddacSmrg	    ret = RADEON_MAC_IMAC_G5_ISIGHT;
2804ad43ddacSmrg	}
2805ad43ddacSmrg    }
2806ad43ddacSmrg#endif /* __OpenBSD__ */
2807ad43ddacSmrg
2808209ff23fSmrg    if (ret) {
2809209ff23fSmrg	xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Detected %s.\n",
2810209ff23fSmrg		   ret == RADEON_MAC_POWERBOOK_EXTERNAL ? "PowerBook with external DVI" :
2811209ff23fSmrg		   ret == RADEON_MAC_POWERBOOK_INTERNAL ? "PowerBook with integrated DVI" :
2812209ff23fSmrg		   ret == RADEON_MAC_POWERBOOK_VGA ? "PowerBook with VGA" :
2813209ff23fSmrg		   ret == RADEON_MAC_IBOOK ? "iBook" :
2814209ff23fSmrg		   ret == RADEON_MAC_MINI_EXTERNAL ? "Mac Mini with external DVI" :
2815209ff23fSmrg		   ret == RADEON_MAC_MINI_INTERNAL ? "Mac Mini with integrated DVI" :
2816209ff23fSmrg		   "iMac G5 iSight");
2817209ff23fSmrg	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
2818209ff23fSmrg		   "If this is not correct, try Option \"MacModel\" and "
2819209ff23fSmrg		   "consider reporting to the\n");
2820209ff23fSmrg	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
2821209ff23fSmrg		   "xorg-driver-ati@lists.x.org mailing list"
2822209ff23fSmrg#ifdef __linux__
2823209ff23fSmrg		   " with the contents of /proc/cpuinfo"
2824209ff23fSmrg#endif
2825209ff23fSmrg		   ".\n");
2826209ff23fSmrg    }
2827209ff23fSmrg
2828209ff23fSmrg    return ret;
2829209ff23fSmrg}
2830209ff23fSmrg
2831209ff23fSmrg#endif /* __powerpc__ */
2832209ff23fSmrg
2833209ff23fSmrgstatic int
2834209ff23fSmrgradeon_output_clones (ScrnInfoPtr pScrn, xf86OutputPtr output)
2835209ff23fSmrg{
2836b7e1c893Smrg    RADEONInfoPtr info = RADEONPTR(pScrn);
2837209ff23fSmrg    RADEONOutputPrivatePtr radeon_output = output->driver_private;
2838209ff23fSmrg    xf86CrtcConfigPtr	config = XF86_CRTC_CONFIG_PTR (pScrn);
2839209ff23fSmrg    int			o;
2840209ff23fSmrg    int			index_mask = 0;
2841209ff23fSmrg
2842ad43ddacSmrg    /* no cloning with zaphod */
2843ad43ddacSmrg    if (info->IsPrimary || info->IsSecondary)
2844ad43ddacSmrg	return index_mask;
2845ad43ddacSmrg
2846b7e1c893Smrg    /* DIG routing gets problematic */
2847ad43ddacSmrg    if (info->ChipFamily >= CHIP_FAMILY_R600)
2848209ff23fSmrg	return index_mask;
2849209ff23fSmrg
2850209ff23fSmrg    /* LVDS is too wacky */
2851b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))
2852b7e1c893Smrg	return index_mask;
2853b7e1c893Smrg
2854ad43ddacSmrg    /* TV requires very specific timing */
2855b7e1c893Smrg    if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT))
2856209ff23fSmrg	return index_mask;
2857209ff23fSmrg
2858ad43ddacSmrg    /* DVO requires 2x ppll clocks depending on the tmds chip */
2859ad43ddacSmrg    if (radeon_output->devices & (ATOM_DEVICE_DFP2_SUPPORT))
2860ad43ddacSmrg	return index_mask;
2861ad43ddacSmrg
2862209ff23fSmrg    for (o = 0; o < config->num_output; o++) {
2863209ff23fSmrg	xf86OutputPtr clone = config->output[o];
2864209ff23fSmrg	RADEONOutputPrivatePtr radeon_clone = clone->driver_private;
2865b7e1c893Smrg
2866209ff23fSmrg	if (output == clone) /* don't clone yourself */
2867209ff23fSmrg	    continue;
2868b7e1c893Smrg	else if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) /* LVDS */
2869209ff23fSmrg	    continue;
2870b7e1c893Smrg	else if (radeon_clone->devices & (ATOM_DEVICE_TV_SUPPORT)) /* TV */
2871209ff23fSmrg	    continue;
2872209ff23fSmrg	else
2873209ff23fSmrg	    index_mask |= (1 << o);
2874209ff23fSmrg    }
2875209ff23fSmrg
2876209ff23fSmrg    return index_mask;
2877209ff23fSmrg}
2878209ff23fSmrg
2879b7e1c893Smrgstatic xf86OutputPtr
2880b7e1c893SmrgRADEONOutputCreate(ScrnInfoPtr pScrn, const char *name, int i)
2881b7e1c893Smrg{
2882b7e1c893Smrg    char buf[32];
2883b7e1c893Smrg    sprintf(buf, name, i);
2884b7e1c893Smrg    return xf86OutputCreate(pScrn, &radeon_output_funcs, buf);
2885b7e1c893Smrg}
2886b7e1c893Smrg
2887209ff23fSmrg/*
2888209ff23fSmrg * initialise the static data sos we don't have to re-do at randr change */
2889209ff23fSmrgBool RADEONSetupConnectors(ScrnInfoPtr pScrn)
2890209ff23fSmrg{
2891209ff23fSmrg    xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
2892209ff23fSmrg    RADEONInfoPtr info       = RADEONPTR(pScrn);
2893209ff23fSmrg    xf86OutputPtr output;
2894209ff23fSmrg    char *optstr;
2895b7e1c893Smrg    int i;
2896209ff23fSmrg    int num_vga = 0;
2897209ff23fSmrg    int num_dvi = 0;
2898209ff23fSmrg    int num_hdmi = 0;
2899b7e1c893Smrg    int num_dp = 0;
2900ad43ddacSmrg    int num_edp = 0;
2901209ff23fSmrg
2902209ff23fSmrg    /* We first get the information about all connectors from BIOS.
2903209ff23fSmrg     * This is how the card is phyiscally wired up.
2904209ff23fSmrg     * The information should be correct even on a OEM card.
2905209ff23fSmrg     */
2906209ff23fSmrg    for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
2907b7e1c893Smrg	info->encoders[i] = NULL;
2908209ff23fSmrg	info->BiosConnector[i].valid = FALSE;
2909b7e1c893Smrg	info->BiosConnector[i].load_detection = TRUE;
2910b7e1c893Smrg	info->BiosConnector[i].shared_ddc = FALSE;
2911209ff23fSmrg	info->BiosConnector[i].ddc_i2c.valid = FALSE;
2912209ff23fSmrg	info->BiosConnector[i].ConnectorType = CONNECTOR_NONE;
2913b7e1c893Smrg	info->BiosConnector[i].devices = 0;
2914209ff23fSmrg    }
2915209ff23fSmrg
2916209ff23fSmrg#if defined(__powerpc__)
2917209ff23fSmrg    info->MacModel = 0;
2918209ff23fSmrg    optstr = (char *)xf86GetOptValString(info->Options, OPTION_MAC_MODEL);
2919209ff23fSmrg    if (optstr) {
2920209ff23fSmrg	if (!strncmp("ibook", optstr, strlen("ibook")))
2921209ff23fSmrg	    info->MacModel = RADEON_MAC_IBOOK;
2922209ff23fSmrg	else if (!strncmp("powerbook-duallink", optstr, strlen("powerbook-duallink"))) /* alias */
2923209ff23fSmrg	    info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL;
2924209ff23fSmrg	else if (!strncmp("powerbook-external", optstr, strlen("powerbook-external")))
2925209ff23fSmrg	    info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL;
2926209ff23fSmrg	else if (!strncmp("powerbook-internal", optstr, strlen("powerbook-internal")))
2927209ff23fSmrg	    info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL;
2928209ff23fSmrg	else if (!strncmp("powerbook-vga", optstr, strlen("powerbook-vga")))
2929209ff23fSmrg	    info->MacModel = RADEON_MAC_POWERBOOK_VGA;
2930209ff23fSmrg	else if (!strncmp("powerbook", optstr, strlen("powerbook"))) /* alias */
2931209ff23fSmrg	    info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL;
2932209ff23fSmrg	else if (!strncmp("mini-internal", optstr, strlen("mini-internal")))
2933209ff23fSmrg	    info->MacModel = RADEON_MAC_MINI_INTERNAL;
2934209ff23fSmrg	else if (!strncmp("mini-external", optstr, strlen("mini-external")))
2935209ff23fSmrg	    info->MacModel = RADEON_MAC_MINI_EXTERNAL;
2936209ff23fSmrg	else if (!strncmp("mini", optstr, strlen("mini"))) /* alias */
2937209ff23fSmrg	    info->MacModel = RADEON_MAC_MINI_EXTERNAL;
2938209ff23fSmrg	else if (!strncmp("imac-g5-isight", optstr, strlen("imac-g5-isight")))
2939209ff23fSmrg	    info->MacModel = RADEON_MAC_IMAC_G5_ISIGHT;
2940b7e1c893Smrg	else if (!strncmp("emac", optstr, strlen("emac")))
2941b7e1c893Smrg	    info->MacModel = RADEON_MAC_EMAC;
2942209ff23fSmrg	else {
2943209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid Mac Model: %s\n", optstr);
2944209ff23fSmrg	}
2945209ff23fSmrg    }
2946209ff23fSmrg
2947209ff23fSmrg    if (!info->MacModel) {
2948209ff23fSmrg	info->MacModel = RADEONDetectMacModel(pScrn);
2949209ff23fSmrg    }
2950209ff23fSmrg
2951209ff23fSmrg    if (info->MacModel){
2952209ff23fSmrg	if (!RADEONSetupAppleConnectors(pScrn))
2953209ff23fSmrg	    RADEONSetupGenericConnectors(pScrn);
2954209ff23fSmrg    } else
2955209ff23fSmrg#endif
2956209ff23fSmrg    if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_CONNECTOR_TABLE, FALSE)) {
2957209ff23fSmrg	RADEONSetupGenericConnectors(pScrn);
2958209ff23fSmrg    } else {
2959209ff23fSmrg	if (!RADEONGetConnectorInfoFromBIOS(pScrn))
2960209ff23fSmrg	    RADEONSetupGenericConnectors(pScrn);
2961209ff23fSmrg    }
2962209ff23fSmrg
2963209ff23fSmrg    /* parse connector table option */
2964209ff23fSmrg    optstr = (char *)xf86GetOptValString(info->Options, OPTION_CONNECTORTABLE);
2965209ff23fSmrg
2966209ff23fSmrg    if (optstr) {
2967209ff23fSmrg	unsigned int ddc_line[2];
2968b7e1c893Smrg	int DACType[2], TMDSType[2];
2969209ff23fSmrg
2970209ff23fSmrg	for (i = 2; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
2971209ff23fSmrg	    info->BiosConnector[i].valid = FALSE;
2972209ff23fSmrg	}
2973b7e1c893Smrg
2974209ff23fSmrg	if (sscanf(optstr, "%u,%u,%u,%u,%u,%u,%u,%u",
2975209ff23fSmrg		   &ddc_line[0],
2976b7e1c893Smrg		   &DACType[0],
2977b7e1c893Smrg		   &TMDSType[0],
2978209ff23fSmrg		   &info->BiosConnector[0].ConnectorType,
2979209ff23fSmrg		   &ddc_line[1],
2980b7e1c893Smrg		   &DACType[1],
2981b7e1c893Smrg		   &TMDSType[1],
2982209ff23fSmrg		   &info->BiosConnector[1].ConnectorType) != 8) {
2983209ff23fSmrg	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid ConnectorTable option: %s\n", optstr);
2984209ff23fSmrg	    return FALSE;
2985209ff23fSmrg	}
2986209ff23fSmrg
2987b7e1c893Smrg	for (i = 0; i < 2; i++) {
2988b7e1c893Smrg	    info->BiosConnector[i].valid = TRUE;
2989b7e1c893Smrg	    info->BiosConnector[i].ddc_i2c = legacy_setup_i2c_bus(ddc_line[i]);
2990b7e1c893Smrg	    switch (DACType[i]) {
2991b7e1c893Smrg	    case 1:
2992b7e1c893Smrg		info->BiosConnector[i].devices |= ATOM_DEVICE_CRT1_SUPPORT;
2993b7e1c893Smrg		if (!radeon_add_encoder(pScrn,
2994b7e1c893Smrg					radeon_get_encoder_id_from_supported_device(pScrn,
2995b7e1c893Smrg										    ATOM_DEVICE_CRT1_SUPPORT,
2996b7e1c893Smrg										    1),
2997b7e1c893Smrg					ATOM_DEVICE_CRT1_SUPPORT))
2998b7e1c893Smrg		    return FALSE;
2999b7e1c893Smrg		info->BiosConnector[i].load_detection = TRUE;
3000b7e1c893Smrg		break;
3001b7e1c893Smrg	    case 2:
3002b7e1c893Smrg		info->BiosConnector[i].devices |= ATOM_DEVICE_CRT2_SUPPORT;
3003b7e1c893Smrg		if (!radeon_add_encoder(pScrn,
3004b7e1c893Smrg					radeon_get_encoder_id_from_supported_device(pScrn,
300540732134Srjs										    ATOM_DEVICE_CRT2_SUPPORT,
3006b7e1c893Smrg										    2),
300740732134Srjs					ATOM_DEVICE_CRT2_SUPPORT))
3008b7e1c893Smrg		    return FALSE;
3009b7e1c893Smrg		info->BiosConnector[i].load_detection = FALSE;
3010b7e1c893Smrg		break;
3011b7e1c893Smrg	    }
3012b7e1c893Smrg	    switch (TMDSType[i]) {
3013b7e1c893Smrg	    case 1:
3014b7e1c893Smrg		info->BiosConnector[i].devices |= ATOM_DEVICE_DFP1_SUPPORT;
3015b7e1c893Smrg		if (!radeon_add_encoder(pScrn,
3016b7e1c893Smrg					radeon_get_encoder_id_from_supported_device(pScrn,
3017b7e1c893Smrg										    ATOM_DEVICE_DFP1_SUPPORT,
3018b7e1c893Smrg										    0),
3019b7e1c893Smrg					ATOM_DEVICE_DFP1_SUPPORT))
3020b7e1c893Smrg		    return FALSE;
3021b7e1c893Smrg		break;
3022b7e1c893Smrg	    case 2:
3023b7e1c893Smrg		info->BiosConnector[i].devices |= ATOM_DEVICE_DFP2_SUPPORT;
3024b7e1c893Smrg		if (!radeon_add_encoder(pScrn,
3025b7e1c893Smrg					radeon_get_encoder_id_from_supported_device(pScrn,
3026b7e1c893Smrg										    ATOM_DEVICE_DFP2_SUPPORT,
3027b7e1c893Smrg										    0),
3028b7e1c893Smrg					ATOM_DEVICE_DFP2_SUPPORT))
3029b7e1c893Smrg		    return FALSE;
3030b7e1c893Smrg		break;
3031b7e1c893Smrg	    }
3032b7e1c893Smrg	}
3033209ff23fSmrg    }
3034209ff23fSmrg
3035209ff23fSmrg    for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
3036209ff23fSmrg	if (info->BiosConnector[i].valid) {
3037b7e1c893Smrg	    RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType;
3038b7e1c893Smrg	    if ((conntype == CONNECTOR_DVI_D) ||
3039b7e1c893Smrg		(conntype == CONNECTOR_DVI_I) ||
3040ad43ddacSmrg		(conntype == CONNECTOR_DVI_A) ||
3041ad43ddacSmrg		(conntype == CONNECTOR_HDMI_TYPE_B)) {
3042209ff23fSmrg		num_dvi++;
3043b7e1c893Smrg	    } else if (conntype == CONNECTOR_VGA) {
3044209ff23fSmrg		num_vga++;
3045ad43ddacSmrg	    } else if (conntype == CONNECTOR_HDMI_TYPE_A) {
3046209ff23fSmrg		num_hdmi++;
3047b7e1c893Smrg	    } else if (conntype == CONNECTOR_DISPLAY_PORT) {
3048b7e1c893Smrg		num_dp++;
3049ad43ddacSmrg	    } else if (conntype == CONNECTOR_EDP) {
3050ad43ddacSmrg		num_edp++;
3051209ff23fSmrg	    }
3052209ff23fSmrg	}
3053209ff23fSmrg    }
3054209ff23fSmrg
3055209ff23fSmrg    for (i = 0 ; i < RADEON_MAX_BIOS_CONNECTOR; i++) {
3056209ff23fSmrg	if (info->BiosConnector[i].valid) {
3057209ff23fSmrg	    RADEONOutputPrivatePtr radeon_output;
3058b7e1c893Smrg	    RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType;
3059209ff23fSmrg
3060b7e1c893Smrg	    if (conntype == CONNECTOR_NONE)
3061209ff23fSmrg		continue;
3062209ff23fSmrg
3063209ff23fSmrg	    radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1);
3064209ff23fSmrg	    if (!radeon_output) {
3065209ff23fSmrg		return FALSE;
3066209ff23fSmrg	    }
3067209ff23fSmrg	    radeon_output->MonType = MT_UNKNOWN;
3068b7e1c893Smrg	    radeon_output->ConnectorType = conntype;
3069209ff23fSmrg	    radeon_output->devices = info->BiosConnector[i].devices;
3070209ff23fSmrg	    radeon_output->ddc_i2c = info->BiosConnector[i].ddc_i2c;
3071209ff23fSmrg	    radeon_output->igp_lane_info = info->BiosConnector[i].igp_lane_info;
3072b7e1c893Smrg	    radeon_output->shared_ddc = info->BiosConnector[i].shared_ddc;
3073b7e1c893Smrg	    radeon_output->load_detection = info->BiosConnector[i].load_detection;
3074b7e1c893Smrg	    radeon_output->linkb = info->BiosConnector[i].linkb;
3075ad43ddacSmrg	    radeon_output->dig_encoder = -1;
3076b7e1c893Smrg	    radeon_output->connector_id = info->BiosConnector[i].connector_object;
3077ad43ddacSmrg	    radeon_output->connector_object_id = info->BiosConnector[i].connector_object_id;
3078ad43ddacSmrg	    radeon_output->ucI2cId = info->BiosConnector[i].ucI2cId;
3079ad43ddacSmrg	    radeon_output->hpd_id = info->BiosConnector[i].hpd_id;
3080b7e1c893Smrg
3081ad43ddacSmrg	    /* Technically HDMI-B is a glorfied DL DVI so the bios is correct,
3082ad43ddacSmrg	     * but this can be confusing to users when it comes to output names,
3083ad43ddacSmrg	     * so call it DVI
3084ad43ddacSmrg	     */
3085b7e1c893Smrg	    if ((conntype == CONNECTOR_DVI_D) ||
3086b7e1c893Smrg		(conntype == CONNECTOR_DVI_I) ||
3087ad43ddacSmrg		(conntype == CONNECTOR_DVI_A) ||
3088ad43ddacSmrg		(conntype == CONNECTOR_HDMI_TYPE_B)) {
3089b7e1c893Smrg		output = RADEONOutputCreate(pScrn, "DVI-%d", --num_dvi);
3090b7e1c893Smrg	    } else if (conntype == CONNECTOR_VGA) {
3091b7e1c893Smrg		output = RADEONOutputCreate(pScrn, "VGA-%d", --num_vga);
3092ad43ddacSmrg	    } else if (conntype == CONNECTOR_HDMI_TYPE_A) {
3093b7e1c893Smrg		output = RADEONOutputCreate(pScrn, "HDMI-%d", --num_hdmi);
3094b7e1c893Smrg	    } else if (conntype == CONNECTOR_DISPLAY_PORT) {
3095b7e1c893Smrg		output = RADEONOutputCreate(pScrn, "DisplayPort-%d", --num_dp);
3096ad43ddacSmrg	    } else if (conntype == CONNECTOR_EDP) {
3097ad43ddacSmrg		output = RADEONOutputCreate(pScrn, "eDP-%d", --num_edp);
3098b7e1c893Smrg	    } else {
3099b7e1c893Smrg		output = RADEONOutputCreate(pScrn,
3100b7e1c893Smrg					    ConnectorTypeName[conntype], 0);
3101b7e1c893Smrg	    }
3102209ff23fSmrg
3103209ff23fSmrg	    if (!output) {
3104209ff23fSmrg		return FALSE;
3105209ff23fSmrg	    }
31060974d292Smrg	    output->interlaceAllowed = TRUE;
31070974d292Smrg	    output->doubleScanAllowed = TRUE;
3108209ff23fSmrg	    output->driver_private = radeon_output;
3109ad43ddacSmrg	    if (IS_DCE4_VARIANT) {
3110ad43ddacSmrg		output->possible_crtcs = 0x3f;
3111ad43ddacSmrg	    } else {
3112ad43ddacSmrg		output->possible_crtcs = 1;
3113ad43ddacSmrg		/* crtc2 can drive LVDS, it just doesn't have RMX */
3114ad43ddacSmrg		if (!(radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)))
3115ad43ddacSmrg		    output->possible_crtcs |= 2;
3116ad43ddacSmrg	    }
3117209ff23fSmrg
3118b7e1c893Smrg	    /* we can clone the DACs, and probably TV-out,
3119209ff23fSmrg	       but I'm not sure it's worth the trouble */
3120209ff23fSmrg	    output->possible_clones = 0;
3121209ff23fSmrg
3122209ff23fSmrg	    RADEONInitConnector(output);
3123209ff23fSmrg	}
3124209ff23fSmrg    }
3125209ff23fSmrg
3126209ff23fSmrg    for (i = 0; i < xf86_config->num_output; i++) {
3127209ff23fSmrg	xf86OutputPtr output = xf86_config->output[i];
3128209ff23fSmrg
3129209ff23fSmrg	output->possible_clones = radeon_output_clones(pScrn, output);
3130ad43ddacSmrg	RADEONGetHardCodedEDIDFromFile(output);
3131209ff23fSmrg    }
3132209ff23fSmrg
3133209ff23fSmrg    return TRUE;
3134209ff23fSmrg}
3135209ff23fSmrg
3136