radeon_output.c revision ad43ddac
1209ff23fSmrg/* 2209ff23fSmrg * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and 3209ff23fSmrg * VA Linux Systems Inc., Fremont, California. 4209ff23fSmrg * 5209ff23fSmrg * All Rights Reserved. 6209ff23fSmrg * 7209ff23fSmrg * Permission is hereby granted, free of charge, to any person obtaining 8209ff23fSmrg * a copy of this software and associated documentation files (the 9209ff23fSmrg * "Software"), to deal in the Software without restriction, including 10209ff23fSmrg * without limitation on the rights to use, copy, modify, merge, 11209ff23fSmrg * publish, distribute, sublicense, and/or sell copies of the Software, 12209ff23fSmrg * and to permit persons to whom the Software is furnished to do so, 13209ff23fSmrg * subject to the following conditions: 14209ff23fSmrg * 15209ff23fSmrg * The above copyright notice and this permission notice (including the 16209ff23fSmrg * next paragraph) shall be included in all copies or substantial 17209ff23fSmrg * portions of the Software. 18209ff23fSmrg * 19209ff23fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20209ff23fSmrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21209ff23fSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 22209ff23fSmrg * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR 23209ff23fSmrg * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 24209ff23fSmrg * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 25209ff23fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 26209ff23fSmrg * DEALINGS IN THE SOFTWARE. 27209ff23fSmrg */ 28209ff23fSmrg 29209ff23fSmrg#ifdef HAVE_CONFIG_H 30209ff23fSmrg#include "config.h" 31209ff23fSmrg#endif 32209ff23fSmrg 33209ff23fSmrg#include <string.h> 34209ff23fSmrg#include <stdio.h> 35ad43ddacSmrg#include <fcntl.h> 36209ff23fSmrg 37209ff23fSmrg/* X and server generic header files */ 38209ff23fSmrg#include "xf86.h" 39209ff23fSmrg#include "xf86_OSproc.h" 40209ff23fSmrg#include "vgaHW.h" 41209ff23fSmrg#include "xf86Modes.h" 42209ff23fSmrg 43209ff23fSmrg/* Driver data structures */ 44209ff23fSmrg#include "radeon.h" 45209ff23fSmrg#include "radeon_reg.h" 46209ff23fSmrg#include "radeon_macros.h" 47209ff23fSmrg#include "radeon_probe.h" 48209ff23fSmrg#include "radeon_version.h" 49209ff23fSmrg#include "radeon_tv.h" 50209ff23fSmrg#include "radeon_atombios.h" 51209ff23fSmrg 52b7e1c893Smrgconst char *encoder_name[34] = { 53b7e1c893Smrg "NONE", 54b7e1c893Smrg "INTERNAL_LVDS", 55b7e1c893Smrg "INTERNAL_TMDS1", 56b7e1c893Smrg "INTERNAL_TMDS2", 57b7e1c893Smrg "INTERNAL_DAC1", 58b7e1c893Smrg "INTERNAL_DAC2", 59b7e1c893Smrg "INTERNAL_SDVOA", 60b7e1c893Smrg "INTERNAL_SDVOB", 61b7e1c893Smrg "SI170B", 62b7e1c893Smrg "CH7303", 63b7e1c893Smrg "CH7301", 64b7e1c893Smrg "INTERNAL_DVO1", 65b7e1c893Smrg "EXTERNAL_SDVOA", 66b7e1c893Smrg "EXTERNAL_SDVOB", 67b7e1c893Smrg "TITFP513", 68b7e1c893Smrg "INTERNAL_LVTM1", 69b7e1c893Smrg "VT1623", 70b7e1c893Smrg "HDMI_SI1930", 71b7e1c893Smrg "HDMI_INTERNAL", 72b7e1c893Smrg "INTERNAL_KLDSCP_TMDS1", 73b7e1c893Smrg "INTERNAL_KLDSCP_DVO1", 74b7e1c893Smrg "INTERNAL_KLDSCP_DAC1", 75b7e1c893Smrg "INTERNAL_KLDSCP_DAC2", 76b7e1c893Smrg "SI178", 77b7e1c893Smrg "MVPU_FPGA", 78b7e1c893Smrg "INTERNAL_DDI", 79b7e1c893Smrg "VT1625", 80b7e1c893Smrg "HDMI_SI1932", 81b7e1c893Smrg "DP_AN9801", 82b7e1c893Smrg "DP_DP501", 83b7e1c893Smrg "INTERNAL_UNIPHY", 84b7e1c893Smrg "INTERNAL_KLDSCP_LVTMA", 85b7e1c893Smrg "INTERNAL_UNIPHY1", 86b7e1c893Smrg "INTERNAL_UNIPHY2", 87209ff23fSmrg}; 88209ff23fSmrg 89ad43ddacSmrgconst char *ConnectorTypeName[18] = { 90209ff23fSmrg "None", 91209ff23fSmrg "VGA", 92209ff23fSmrg "DVI-I", 93209ff23fSmrg "DVI-D", 94209ff23fSmrg "DVI-A", 95b7e1c893Smrg "S-video", 96b7e1c893Smrg "Composite", 97209ff23fSmrg "LVDS", 98209ff23fSmrg "Digital", 99209ff23fSmrg "SCART", 100209ff23fSmrg "HDMI-A", 101209ff23fSmrg "HDMI-B", 102209ff23fSmrg "Unsupported", 103209ff23fSmrg "Unsupported", 104209ff23fSmrg "DIN", 105209ff23fSmrg "DisplayPort", 106ad43ddacSmrg "eDP", 107209ff23fSmrg "Unsupported" 108209ff23fSmrg}; 109209ff23fSmrg 110209ff23fSmrgextern void atombios_output_mode_set(xf86OutputPtr output, 111209ff23fSmrg DisplayModePtr mode, 112209ff23fSmrg DisplayModePtr adjusted_mode); 113209ff23fSmrgextern void atombios_output_dpms(xf86OutputPtr output, int mode); 114b7e1c893Smrgextern RADEONMonitorType atombios_dac_detect(xf86OutputPtr output); 115b7e1c893Smrgextern AtomBiosResult 116b7e1c893Smrgatombios_lock_crtc(atomBiosHandlePtr atomBIOS, int crtc, int lock); 117209ff23fSmrgstatic void 118209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode); 119209ff23fSmrgstatic void 120209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output); 121209ff23fSmrgstatic void 122209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock); 123209ff23fSmrg 124209ff23fSmrgvoid RADEONPrintPortMap(ScrnInfoPtr pScrn) 125209ff23fSmrg{ 126b7e1c893Smrg RADEONInfoPtr info = RADEONPTR(pScrn); 127209ff23fSmrg xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); 128209ff23fSmrg RADEONOutputPrivatePtr radeon_output; 129209ff23fSmrg xf86OutputPtr output; 130209ff23fSmrg int o; 131209ff23fSmrg 132209ff23fSmrg for (o = 0; o < xf86_config->num_output; o++) { 133209ff23fSmrg output = xf86_config->output[o]; 134209ff23fSmrg radeon_output = output->driver_private; 135209ff23fSmrg 136b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Port%d:\n", o); 137b7e1c893Smrg ErrorF(" XRANDR name: %s\n", output->name); 138b7e1c893Smrg ErrorF(" Connector: %s\n", ConnectorTypeName[radeon_output->ConnectorType]); 139b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) 140b7e1c893Smrg ErrorF(" CRT1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT1_INDEX]->encoder_id]); 141b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) 142b7e1c893Smrg ErrorF(" CRT2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CRT2_INDEX]->encoder_id]); 143b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 144b7e1c893Smrg ErrorF(" LCD1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_LCD1_INDEX]->encoder_id]); 145b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) 146b7e1c893Smrg ErrorF(" DFP1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP1_INDEX]->encoder_id]); 147b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) 148b7e1c893Smrg ErrorF(" DFP2: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP2_INDEX]->encoder_id]); 149b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) 150b7e1c893Smrg ErrorF(" DFP3: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP3_INDEX]->encoder_id]); 151b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) 152b7e1c893Smrg ErrorF(" DFP4: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP4_INDEX]->encoder_id]); 153b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) 154b7e1c893Smrg ErrorF(" DFP5: %s\n", encoder_name[info->encoders[ATOM_DEVICE_DFP5_INDEX]->encoder_id]); 155b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) 156b7e1c893Smrg ErrorF(" TV1: %s\n", encoder_name[info->encoders[ATOM_DEVICE_TV1_INDEX]->encoder_id]); 157b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) 158ad43ddacSmrg ErrorF(" CV: %s\n", encoder_name[info->encoders[ATOM_DEVICE_CV_INDEX]->encoder_id]); 159b7e1c893Smrg ErrorF(" DDC reg: 0x%x\n",(unsigned int)radeon_output->ddc_i2c.mask_clk_reg); 160209ff23fSmrg } 161209ff23fSmrg 162209ff23fSmrg} 163209ff23fSmrg 164b7e1c893Smrgstatic void 165b7e1c893Smrgradeon_set_active_device(xf86OutputPtr output) 166209ff23fSmrg{ 167209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 168209ff23fSmrg 169b7e1c893Smrg radeon_output->active_device = 0; 170b7e1c893Smrg 171b7e1c893Smrg switch (radeon_output->MonType) { 172b7e1c893Smrg case MT_DP: 173b7e1c893Smrg case MT_DFP: 174b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) 175b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP1_SUPPORT; 176b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) 177b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP2_SUPPORT; 178b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) 179b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP3_SUPPORT; 180b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP4_SUPPORT) 181b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP4_SUPPORT; 182b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_DFP5_SUPPORT) 183b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_DFP5_SUPPORT; 184ad43ddacSmrg else if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 185ad43ddacSmrg radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT; 186ad43ddacSmrg else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT) 187ad43ddacSmrg radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT; 188b7e1c893Smrg break; 189b7e1c893Smrg case MT_CRT: 190b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) 191b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CRT1_SUPPORT; 192b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) 193b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CRT2_SUPPORT; 194b7e1c893Smrg break; 195b7e1c893Smrg case MT_LCD: 196b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) 197b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_LCD1_SUPPORT; 198b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_LCD2_SUPPORT) 199b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_LCD2_SUPPORT; 200b7e1c893Smrg break; 201b7e1c893Smrg case MT_STV: 202b7e1c893Smrg case MT_CTV: 203b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) 204b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_TV1_SUPPORT; 205b7e1c893Smrg else if (radeon_output->devices & ATOM_DEVICE_TV2_SUPPORT) 206b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_TV2_SUPPORT; 207b7e1c893Smrg break; 208b7e1c893Smrg case MT_CV: 209b7e1c893Smrg if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) 210b7e1c893Smrg radeon_output->active_device = ATOM_DEVICE_CV_SUPPORT; 211b7e1c893Smrg break; 212b7e1c893Smrg default: 213b7e1c893Smrg ErrorF("Unhandled monitor type %d\n", radeon_output->MonType); 214b7e1c893Smrg radeon_output->active_device = 0; 215209ff23fSmrg } 216209ff23fSmrg} 217209ff23fSmrg 218ad43ddacSmrgstatic Bool 219ad43ddacSmrgmonitor_is_digital(xf86MonPtr MonInfo) 220ad43ddacSmrg{ 221ad43ddacSmrg return (MonInfo->rawData[0x14] & 0x80) != 0; 222ad43ddacSmrg} 223ad43ddacSmrg 224ad43ddacSmrgstatic void 225ad43ddacSmrgRADEONGetHardCodedEDIDFromFile(xf86OutputPtr output) 226ad43ddacSmrg{ 227ad43ddacSmrg ScrnInfoPtr pScrn = output->scrn; 228ad43ddacSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 229ad43ddacSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 230ad43ddacSmrg char *EDIDlist = (char *)xf86GetOptValString(info->Options, OPTION_CUSTOM_EDID); 231ad43ddacSmrg 232ad43ddacSmrg radeon_output->custom_edid = FALSE; 233ad43ddacSmrg radeon_output->custom_mon = NULL; 234ad43ddacSmrg 235ad43ddacSmrg if (EDIDlist != NULL) { 236ad43ddacSmrg unsigned char* edid = xnfcalloc(128, 1); 237ad43ddacSmrg char *name = output->name; 238ad43ddacSmrg char *outputEDID = strstr(EDIDlist, name); 239ad43ddacSmrg 240ad43ddacSmrg if (outputEDID != NULL) { 241ad43ddacSmrg char *end; 242ad43ddacSmrg char *colon; 243ad43ddacSmrg char *command = NULL; 244ad43ddacSmrg int fd; 245ad43ddacSmrg 246ad43ddacSmrg outputEDID += strlen(name) + 1; 247ad43ddacSmrg end = strstr(outputEDID, ";"); 248ad43ddacSmrg if (end != NULL) 249ad43ddacSmrg *end = 0; 250ad43ddacSmrg 251ad43ddacSmrg colon = strstr(outputEDID, ":"); 252ad43ddacSmrg if (colon != NULL) { 253ad43ddacSmrg *colon = 0; 254ad43ddacSmrg command = colon + 1; 255ad43ddacSmrg } 256ad43ddacSmrg 257ad43ddacSmrg fd = open (outputEDID, O_RDONLY); 258ad43ddacSmrg if (fd >= 0) { 259ad43ddacSmrg read(fd, edid, 128); 260ad43ddacSmrg close(fd); 261ad43ddacSmrg if (edid[1] == 0xff) { 262ad43ddacSmrg radeon_output->custom_mon = xf86InterpretEDID(output->scrn->scrnIndex, edid); 263ad43ddacSmrg radeon_output->custom_edid = TRUE; 264ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 265ad43ddacSmrg "Successfully read Custom EDID data for output %s from %s.\n", 266ad43ddacSmrg name, outputEDID); 267ad43ddacSmrg if (command != NULL) { 268ad43ddacSmrg if (!strcmp(command, "digital")) { 269ad43ddacSmrg radeon_output->custom_mon->rawData[0x14] |= 0x80; 270ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 271ad43ddacSmrg "Forcing digital output for output %s.\n", name); 272ad43ddacSmrg } else if (!strcmp(command, "analog")) { 273ad43ddacSmrg radeon_output->custom_mon->rawData[0x14] &= ~0x80; 274ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 275ad43ddacSmrg "Forcing analog output for output %s.\n", name); 276ad43ddacSmrg } else { 277ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 278ad43ddacSmrg "Unknown custom EDID command: '%s'.\n", 279ad43ddacSmrg command); 280ad43ddacSmrg } 281ad43ddacSmrg } 282ad43ddacSmrg } else { 283ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 284ad43ddacSmrg "Custom EDID data for %s read from %s was invalid.\n", 285ad43ddacSmrg name, outputEDID); 286ad43ddacSmrg } 287ad43ddacSmrg } else { 288ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 289ad43ddacSmrg "Could not read custom EDID for output %s from file %s.\n", 290ad43ddacSmrg name, outputEDID); 291ad43ddacSmrg } 292ad43ddacSmrg } else { 293ad43ddacSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 294ad43ddacSmrg "Could not find EDID file name for output %s; using auto detection.\n", 295ad43ddacSmrg name); 296ad43ddacSmrg } 297ad43ddacSmrg } 298ad43ddacSmrg} 299ad43ddacSmrg 300ad43ddacSmrg 301209ff23fSmrgstatic RADEONMonitorType 302209ff23fSmrgradeon_ddc_connected(xf86OutputPtr output) 303209ff23fSmrg{ 304209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 305209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 306209ff23fSmrg RADEONMonitorType MonType = MT_NONE; 307209ff23fSmrg xf86MonPtr MonInfo = NULL; 308209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 309ad43ddacSmrg int ret; 310ad43ddacSmrg 311ad43ddacSmrg if (radeon_output->custom_edid) { 312ad43ddacSmrg MonInfo = xnfcalloc(sizeof(xf86Monitor), 1); 313ad43ddacSmrg *MonInfo = *radeon_output->custom_mon; 314ad43ddacSmrg } else if ((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) || 315ad43ddacSmrg (radeon_output->ConnectorType == CONNECTOR_EDP)) { 316ad43ddacSmrg ret = RADEON_DP_GetSinkType(output); 317ad43ddacSmrg if (ret == CONNECTOR_OBJECT_ID_DISPLAYPORT || 318ad43ddacSmrg ret == CONNECTOR_OBJECT_ID_eDP) { 319ad43ddacSmrg MonInfo = xf86OutputGetEDID(output, radeon_output->dp_pI2CBus); 320ad43ddacSmrg } 321ad43ddacSmrg if (MonInfo == NULL) { 322ad43ddacSmrg if (radeon_output->pI2CBus) { 323ad43ddacSmrg RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE); 324ad43ddacSmrg MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus); 325ad43ddacSmrg RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE); 326ad43ddacSmrg } 327ad43ddacSmrg } 328ad43ddacSmrg } else if (radeon_output->pI2CBus) { 329c503f109Smrg if (info->get_hardcoded_edid_from_bios) 330b7e1c893Smrg MonInfo = RADEONGetHardCodedEDIDFromBIOS(output); 331c503f109Smrg if (MonInfo == NULL) { 332c503f109Smrg RADEONI2CDoLock(output, radeon_output->pI2CBus, TRUE); 333b7e1c893Smrg MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus); 334c503f109Smrg RADEONI2CDoLock(output, radeon_output->pI2CBus, FALSE); 335b7e1c893Smrg } 336b7e1c893Smrg } 337209ff23fSmrg if (MonInfo) { 338b7e1c893Smrg switch (radeon_output->ConnectorType) { 339b7e1c893Smrg case CONNECTOR_LVDS: 340209ff23fSmrg MonType = MT_LCD; 341b7e1c893Smrg break; 342b7e1c893Smrg case CONNECTOR_DVI_D: 343b7e1c893Smrg case CONNECTOR_HDMI_TYPE_A: 344b7e1c893Smrg if (radeon_output->shared_ddc) { 345ad43ddacSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 346ad43ddacSmrg int i; 347ad43ddacSmrg 348ad43ddacSmrg if (monitor_is_digital(MonInfo)) 349b7e1c893Smrg MonType = MT_DFP; 350b7e1c893Smrg else 351b7e1c893Smrg MonType = MT_NONE; 352ad43ddacSmrg 353ad43ddacSmrg for (i = 0; i < config->num_output; i++) { 354ad43ddacSmrg if (output != config->output[i]) { 355ad43ddacSmrg RADEONOutputPrivatePtr other_radeon_output = 356ad43ddacSmrg config->output[i]->driver_private; 357ad43ddacSmrg if (radeon_output->devices & other_radeon_output->devices) { 358ad43ddacSmrg#ifndef EDID_COMPLETE_RAWDATA 359ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) { 360ad43ddacSmrg MonType = MT_NONE; 361ad43ddacSmrg break; 362ad43ddacSmrg } 363ad43ddacSmrg#else 364ad43ddacSmrg if (xf86MonitorIsHDMI(MonInfo)) { 365ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_DVI_D) { 366ad43ddacSmrg MonType = MT_NONE; 367ad43ddacSmrg break; 368ad43ddacSmrg } 369ad43ddacSmrg } else { 370ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) { 371ad43ddacSmrg MonType = MT_NONE; 372ad43ddacSmrg break; 373ad43ddacSmrg } 374ad43ddacSmrg } 375ad43ddacSmrg#endif 376ad43ddacSmrg } 377ad43ddacSmrg } 378ad43ddacSmrg } 379b7e1c893Smrg } else 380b7e1c893Smrg MonType = MT_DFP; 381b7e1c893Smrg break; 382b7e1c893Smrg case CONNECTOR_DISPLAY_PORT: 383ad43ddacSmrg case CONNECTOR_EDP: 384b7e1c893Smrg /* 385b7e1c893Smrg * XXX wrong. need to infer based on whether we got DDC from I2C 386b7e1c893Smrg * or AUXCH. 387b7e1c893Smrg */ 388ad43ddacSmrg ret = RADEON_DP_GetSinkType(output); 389ad43ddacSmrg 390ad43ddacSmrg if ((ret == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 391ad43ddacSmrg (ret == CONNECTOR_OBJECT_ID_eDP)) { 392ad43ddacSmrg MonType = MT_DP; 393ad43ddacSmrg RADEON_DP_GetDPCD(output); 394ad43ddacSmrg } else 395ad43ddacSmrg MonType = MT_DFP; 396ad43ddacSmrg break; 397ad43ddacSmrg case CONNECTOR_HDMI_TYPE_B: 398b7e1c893Smrg case CONNECTOR_DVI_I: 399ad43ddacSmrg if (monitor_is_digital(MonInfo)) 400b7e1c893Smrg MonType = MT_DFP; 401b7e1c893Smrg else 402b7e1c893Smrg MonType = MT_CRT; 403b7e1c893Smrg break; 404b7e1c893Smrg case CONNECTOR_VGA: 405b7e1c893Smrg case CONNECTOR_DVI_A: 406b7e1c893Smrg default: 407b7e1c893Smrg if (radeon_output->shared_ddc) { 408ad43ddacSmrg if (monitor_is_digital(MonInfo)) 409b7e1c893Smrg MonType = MT_NONE; 410b7e1c893Smrg else 411b7e1c893Smrg MonType = MT_CRT; 412b7e1c893Smrg } else 413b7e1c893Smrg MonType = MT_CRT; 414b7e1c893Smrg break; 415b7e1c893Smrg } 416b7e1c893Smrg 417ad43ddacSmrg if (MonType != MT_NONE) { 418b7e1c893Smrg if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE)) 419b7e1c893Smrg xf86OutputSetEDID(output, MonInfo); 420ad43ddacSmrg } else 421ad43ddacSmrg xfree(MonInfo); 422209ff23fSmrg } else 423209ff23fSmrg MonType = MT_NONE; 424b7e1c893Smrg 425209ff23fSmrg return MonType; 426209ff23fSmrg} 427209ff23fSmrg 428209ff23fSmrg#ifndef __powerpc__ 429209ff23fSmrg 430209ff23fSmrgstatic RADEONMonitorType 431209ff23fSmrgRADEONDetectLidStatus(ScrnInfoPtr pScrn) 432209ff23fSmrg{ 433209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 434209ff23fSmrg RADEONMonitorType MonType = MT_NONE; 435209ff23fSmrg#ifdef __linux__ 436209ff23fSmrg char lidline[50]; /* 50 should be sufficient for our purposes */ 437209ff23fSmrg FILE *f = fopen ("/proc/acpi/button/lid/LID/state", "r"); 438209ff23fSmrg 439209ff23fSmrg if (f != NULL) { 440209ff23fSmrg while (fgets(lidline, sizeof lidline, f)) { 441209ff23fSmrg if (!strncmp(lidline, "state:", strlen ("state:"))) { 442209ff23fSmrg if (strstr(lidline, "open")) { 443209ff23fSmrg fclose(f); 444209ff23fSmrg ErrorF("proc lid open\n"); 445209ff23fSmrg return MT_LCD; 446209ff23fSmrg } 447209ff23fSmrg else if (strstr(lidline, "closed")) { 448209ff23fSmrg fclose(f); 449209ff23fSmrg ErrorF("proc lid closed\n"); 450209ff23fSmrg return MT_NONE; 451209ff23fSmrg } 452209ff23fSmrg } 453209ff23fSmrg } 454209ff23fSmrg fclose(f); 455209ff23fSmrg } 456209ff23fSmrg#endif 457209ff23fSmrg 458209ff23fSmrg if (!info->IsAtomBios) { 459209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 460209ff23fSmrg 461209ff23fSmrg /* see if the lid is closed -- only works at boot */ 462209ff23fSmrg if (INREG(RADEON_BIOS_6_SCRATCH) & 0x10) 463209ff23fSmrg MonType = MT_NONE; 464209ff23fSmrg else 465209ff23fSmrg MonType = MT_LCD; 466209ff23fSmrg } else 467209ff23fSmrg MonType = MT_LCD; 468209ff23fSmrg 469209ff23fSmrg return MonType; 470209ff23fSmrg} 471209ff23fSmrg 472209ff23fSmrg#endif /* __powerpc__ */ 473209ff23fSmrg 474209ff23fSmrgstatic void 475209ff23fSmrgradeon_dpms(xf86OutputPtr output, int mode) 476209ff23fSmrg{ 477209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 478209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 479209ff23fSmrg 480209ff23fSmrg if ((mode == DPMSModeOn) && radeon_output->enabled) 481209ff23fSmrg return; 482209ff23fSmrg 483ad43ddacSmrg if ((mode != DPMSModeOn) && radeon_output->shared_ddc) { 484ad43ddacSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 485ad43ddacSmrg int i; 486ad43ddacSmrg 487ad43ddacSmrg for (i = 0; i < config->num_output; i++) { 488ad43ddacSmrg if (output != config->output[i]) { 489ad43ddacSmrg RADEONOutputPrivatePtr other_radeon_output = 490ad43ddacSmrg config->output[i]->driver_private; 491ad43ddacSmrg if (radeon_output->devices & other_radeon_output->devices) { 492ad43ddacSmrg if (output->status == XF86OutputStatusDisconnected) 493ad43ddacSmrg return; 494ad43ddacSmrg } 495ad43ddacSmrg } 496ad43ddacSmrg } 497ad43ddacSmrg } 498ad43ddacSmrg 499b7e1c893Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) { 500209ff23fSmrg atombios_output_dpms(output, mode); 501209ff23fSmrg } else { 502209ff23fSmrg legacy_output_dpms(output, mode); 503209ff23fSmrg } 504209ff23fSmrg radeon_bios_output_dpms(output, mode); 505209ff23fSmrg 506209ff23fSmrg if (mode == DPMSModeOn) 507209ff23fSmrg radeon_output->enabled = TRUE; 508209ff23fSmrg else 509209ff23fSmrg radeon_output->enabled = FALSE; 510209ff23fSmrg 511209ff23fSmrg} 512209ff23fSmrg 513209ff23fSmrgstatic void 514209ff23fSmrgradeon_save(xf86OutputPtr output) 515209ff23fSmrg{ 516209ff23fSmrg 517209ff23fSmrg} 518209ff23fSmrg 519209ff23fSmrgstatic void 520209ff23fSmrgradeon_restore(xf86OutputPtr restore) 521209ff23fSmrg{ 522209ff23fSmrg 523209ff23fSmrg} 524209ff23fSmrg 525209ff23fSmrgstatic int 526209ff23fSmrgradeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode) 527209ff23fSmrg{ 528209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 529b7e1c893Smrg radeon_native_mode_ptr native_mode = &radeon_output->native_mode; 530209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 531209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 532209ff23fSmrg RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); 533209ff23fSmrg 534209ff23fSmrg /* 535209ff23fSmrg * RN50 has effective maximum mode bandwidth of about 300MiB/s. 536209ff23fSmrg * XXX should really do this for all chips by properly computing 537209ff23fSmrg * memory bandwidth and an overhead factor. 538209ff23fSmrg */ 539209ff23fSmrg if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) { 540209ff23fSmrg if (xf86ModeBandwidth(pMode, pScrn->bitsPerPixel) > 300) 541209ff23fSmrg return MODE_BANDWIDTH; 542209ff23fSmrg } 543209ff23fSmrg 544b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT)) { 545b7e1c893Smrg if (IS_AVIVO_VARIANT) 546b7e1c893Smrg return MODE_OK; 547b7e1c893Smrg else { 548b7e1c893Smrg /* FIXME: Update when more modes are added */ 549209ff23fSmrg if (pMode->HDisplay == 800 && pMode->VDisplay == 600) 550209ff23fSmrg return MODE_OK; 551209ff23fSmrg else 552209ff23fSmrg return MODE_CLOCK_RANGE; 553209ff23fSmrg } 554209ff23fSmrg } 555209ff23fSmrg 556ad43ddacSmrg /* clocks over 135 MHz have heat issues with DVI on RV100 */ 557ad43ddacSmrg if ((radeon_output->MonType == MT_DFP) && 558ad43ddacSmrg (info->ChipFamily == CHIP_FAMILY_RV100) && 559ad43ddacSmrg (pMode->Clock > 135000)) 560ad43ddacSmrg return MODE_CLOCK_HIGH; 561ad43ddacSmrg 562b7e1c893Smrg /* single link DVI check */ 563b7e1c893Smrg if (pMode->Clock > 165000 && radeon_output->MonType == MT_DFP) { 564b7e1c893Smrg /* DP->DVI converter */ 565b7e1c893Smrg if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) 566b7e1c893Smrg return MODE_CLOCK_HIGH; 567b7e1c893Smrg 568ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_EDP) 569ad43ddacSmrg return MODE_CLOCK_HIGH; 570ad43ddacSmrg 571b7e1c893Smrg /* XXX some HDMI can do better than 165MHz on a link */ 572b7e1c893Smrg if (radeon_output->ConnectorType == CONNECTOR_HDMI_TYPE_A) 573b7e1c893Smrg return MODE_CLOCK_HIGH; 574b7e1c893Smrg 575b7e1c893Smrg /* XXX some R300 and R400 can actually do this */ 576b7e1c893Smrg if (!IS_AVIVO_VARIANT) 577b7e1c893Smrg return MODE_CLOCK_HIGH; 578b7e1c893Smrg 579b7e1c893Smrg /* XXX and some AVIVO can't */ 580b7e1c893Smrg } 581b7e1c893Smrg 582b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT)) { 583209ff23fSmrg if (radeon_output->rmx_type == RMX_OFF) { 584b7e1c893Smrg if (pMode->HDisplay != native_mode->PanelXRes || 585b7e1c893Smrg pMode->VDisplay != native_mode->PanelYRes) 586209ff23fSmrg return MODE_PANEL; 587209ff23fSmrg } 588b7e1c893Smrg if (pMode->HDisplay > native_mode->PanelXRes || 589b7e1c893Smrg pMode->VDisplay > native_mode->PanelYRes) 590209ff23fSmrg return MODE_PANEL; 591209ff23fSmrg } 592209ff23fSmrg 593209ff23fSmrg return MODE_OK; 594209ff23fSmrg} 595209ff23fSmrg 596209ff23fSmrgstatic Bool 597209ff23fSmrgradeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, 598209ff23fSmrg DisplayModePtr adjusted_mode) 599209ff23fSmrg{ 600209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 601209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 602b7e1c893Smrg radeon_native_mode_ptr native_mode = &radeon_output->native_mode; 603ad43ddacSmrg xf86CrtcPtr crtc = output->crtc; 604ad43ddacSmrg RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; 605209ff23fSmrg 606209ff23fSmrg radeon_output->Flags &= ~RADEON_USE_RMX; 607ad43ddacSmrg radeon_crtc->scaler_enabled = FALSE; 608209ff23fSmrg 609b7e1c893Smrg /* 610b7e1c893Smrg * Refresh the Crtc values without INTERLACE_HALVE_V 611b7e1c893Smrg * Should we use output->scrn->adjustFlags like xf86RandRModeConvert() does? 612b7e1c893Smrg */ 613b7e1c893Smrg xf86SetModeCrtc(adjusted_mode, 0); 614b7e1c893Smrg 615209ff23fSmrg /* decide if we are using RMX */ 616b7e1c893Smrg if ((radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) 617209ff23fSmrg && radeon_output->rmx_type != RMX_OFF) { 618209ff23fSmrg 619209ff23fSmrg if (IS_AVIVO_VARIANT || radeon_crtc->crtc_id == 0) { 620b7e1c893Smrg if (mode->HDisplay < native_mode->PanelXRes || 621b7e1c893Smrg mode->VDisplay < native_mode->PanelYRes) { 622209ff23fSmrg radeon_output->Flags |= RADEON_USE_RMX; 623ad43ddacSmrg radeon_crtc->scaler_enabled = TRUE; 624209ff23fSmrg if (IS_AVIVO_VARIANT) { 625ad43ddacSmrg radeon_crtc->hsc = (float)mode->HDisplay / (float)native_mode->PanelXRes; 626ad43ddacSmrg radeon_crtc->vsc = (float)mode->VDisplay / (float)native_mode->PanelYRes; 627209ff23fSmrg /* set to the panel's native mode */ 628b7e1c893Smrg adjusted_mode->HDisplay = native_mode->PanelXRes; 629b7e1c893Smrg adjusted_mode->VDisplay = native_mode->PanelYRes; 630b7e1c893Smrg adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank; 631b7e1c893Smrg adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus; 632b7e1c893Smrg adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth; 633b7e1c893Smrg adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank; 634b7e1c893Smrg adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus; 635b7e1c893Smrg adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth; 636209ff23fSmrg /* update crtc values */ 637209ff23fSmrg xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V); 638209ff23fSmrg /* adjust crtc values */ 639b7e1c893Smrg adjusted_mode->CrtcHDisplay = native_mode->PanelXRes; 640b7e1c893Smrg adjusted_mode->CrtcVDisplay = native_mode->PanelYRes; 641b7e1c893Smrg adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank; 642b7e1c893Smrg adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus; 643b7e1c893Smrg adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth; 644b7e1c893Smrg adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank; 645b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus; 646b7e1c893Smrg adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth; 647209ff23fSmrg } else { 648209ff23fSmrg /* set to the panel's native mode */ 649b7e1c893Smrg adjusted_mode->HTotal = native_mode->PanelXRes + native_mode->HBlank; 650b7e1c893Smrg adjusted_mode->HSyncStart = native_mode->PanelXRes + native_mode->HOverPlus; 651b7e1c893Smrg adjusted_mode->HSyncEnd = adjusted_mode->HSyncStart + native_mode->HSyncWidth; 652b7e1c893Smrg adjusted_mode->VTotal = native_mode->PanelYRes + native_mode->VBlank; 653b7e1c893Smrg adjusted_mode->VSyncStart = native_mode->PanelYRes + native_mode->VOverPlus; 654b7e1c893Smrg adjusted_mode->VSyncEnd = adjusted_mode->VSyncStart + native_mode->VSyncWidth; 655b7e1c893Smrg adjusted_mode->Clock = native_mode->DotClock; 656209ff23fSmrg /* update crtc values */ 657209ff23fSmrg xf86SetModeCrtc(adjusted_mode, INTERLACE_HALVE_V); 658209ff23fSmrg /* adjust crtc values */ 659b7e1c893Smrg adjusted_mode->CrtcHTotal = adjusted_mode->CrtcHDisplay + native_mode->HBlank; 660b7e1c893Smrg adjusted_mode->CrtcHSyncStart = adjusted_mode->CrtcHDisplay + native_mode->HOverPlus; 661b7e1c893Smrg adjusted_mode->CrtcHSyncEnd = adjusted_mode->CrtcHSyncStart + native_mode->HSyncWidth; 662b7e1c893Smrg adjusted_mode->CrtcVTotal = adjusted_mode->CrtcVDisplay + native_mode->VBlank; 663b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + native_mode->VOverPlus; 664b7e1c893Smrg adjusted_mode->CrtcVSyncEnd = adjusted_mode->CrtcVSyncStart + native_mode->VSyncWidth; 665209ff23fSmrg } 666b7e1c893Smrg adjusted_mode->Clock = native_mode->DotClock; 667b7e1c893Smrg adjusted_mode->Flags = native_mode->Flags; 668209ff23fSmrg } 669209ff23fSmrg } 670209ff23fSmrg } 671209ff23fSmrg 672ad43ddacSmrg /* FIXME: vsc/hsc */ 673ad43ddacSmrg if (radeon_output->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { 674ad43ddacSmrg radeon_crtc->scaler_enabled = TRUE; 675ad43ddacSmrg radeon_crtc->hsc = (float)mode->HDisplay / (float)640; 676ad43ddacSmrg radeon_crtc->vsc = (float)mode->VDisplay / (float)480; 677ad43ddacSmrg } 678ad43ddacSmrg 679b7e1c893Smrg if (IS_AVIVO_VARIANT) { 680b7e1c893Smrg /* hw bug */ 681b7e1c893Smrg if ((mode->Flags & V_INTERLACE) 682b7e1c893Smrg && (adjusted_mode->CrtcVSyncStart < (adjusted_mode->CrtcVDisplay + 2))) 683b7e1c893Smrg adjusted_mode->CrtcVSyncStart = adjusted_mode->CrtcVDisplay + 2; 684b7e1c893Smrg } 685b7e1c893Smrg 686ad43ddacSmrg if (IS_AVIVO_VARIANT || info->r4xx_atom) { 687ad43ddacSmrg if (radeon_output->MonType == MT_STV || radeon_output->MonType == MT_CTV) { 688ad43ddacSmrg radeon_tvout_ptr tvout = &radeon_output->tvout; 689ad43ddacSmrg ScrnInfoPtr pScrn = output->scrn; 690ad43ddacSmrg 691ad43ddacSmrg if (tvout->tvStd == TV_STD_NTSC || 692ad43ddacSmrg tvout->tvStd == TV_STD_NTSC_J || 693ad43ddacSmrg tvout->tvStd == TV_STD_PAL_M) 694ad43ddacSmrg RADEONATOMGetTVTimings(pScrn, 0, adjusted_mode); 695ad43ddacSmrg else 696ad43ddacSmrg RADEONATOMGetTVTimings(pScrn, 1, adjusted_mode); 697ad43ddacSmrg } 698ad43ddacSmrg } 699ad43ddacSmrg 700ad43ddacSmrg if (((radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) || 701ad43ddacSmrg (radeon_output->ConnectorType == CONNECTOR_EDP)) && 702ad43ddacSmrg (radeon_output->MonType == MT_DP)) { 703ad43ddacSmrg radeon_dp_mode_fixup(output, mode, adjusted_mode); 704ad43ddacSmrg } 705209ff23fSmrg return TRUE; 706209ff23fSmrg} 707209ff23fSmrg 708209ff23fSmrgstatic void 709209ff23fSmrgradeon_mode_prepare(xf86OutputPtr output) 710209ff23fSmrg{ 711c503f109Smrg RADEONInfoPtr info = RADEONPTR(output->scrn); 712c503f109Smrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 713c503f109Smrg int o; 714c503f109Smrg 715c503f109Smrg for (o = 0; o < config->num_output; o++) { 716c503f109Smrg xf86OutputPtr loop_output = config->output[o]; 717c503f109Smrg if (loop_output == output) 718c503f109Smrg continue; 719c503f109Smrg else if (loop_output->crtc) { 720c503f109Smrg xf86CrtcPtr other_crtc = loop_output->crtc; 721c503f109Smrg RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private; 722c503f109Smrg if (other_crtc->enabled) { 723c503f109Smrg if (other_radeon_crtc->initialized) { 724c503f109Smrg radeon_crtc_dpms(other_crtc, DPMSModeOff); 725c503f109Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 726c503f109Smrg atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 1); 727c503f109Smrg radeon_dpms(loop_output, DPMSModeOff); 728c503f109Smrg } 729c503f109Smrg } 730c503f109Smrg } 731c503f109Smrg } 732c503f109Smrg 733209ff23fSmrg radeon_bios_output_lock(output, TRUE); 734209ff23fSmrg radeon_dpms(output, DPMSModeOff); 735c503f109Smrg radeon_crtc_dpms(output->crtc, DPMSModeOff); 736c503f109Smrg 737209ff23fSmrg} 738209ff23fSmrg 739209ff23fSmrgstatic void 740209ff23fSmrgradeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, 741209ff23fSmrg DisplayModePtr adjusted_mode) 742209ff23fSmrg{ 743209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 744209ff23fSmrg 745b7e1c893Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 746209ff23fSmrg atombios_output_mode_set(output, mode, adjusted_mode); 747209ff23fSmrg else 748209ff23fSmrg legacy_output_mode_set(output, mode, adjusted_mode); 749209ff23fSmrg radeon_bios_output_crtc(output); 750209ff23fSmrg 751209ff23fSmrg} 752209ff23fSmrg 753209ff23fSmrgstatic void 754209ff23fSmrgradeon_mode_commit(xf86OutputPtr output) 755209ff23fSmrg{ 756c503f109Smrg RADEONInfoPtr info = RADEONPTR(output->scrn); 757c503f109Smrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (output->scrn); 758c503f109Smrg int o; 759c503f109Smrg 760c503f109Smrg for (o = 0; o < config->num_output; o++) { 761c503f109Smrg xf86OutputPtr loop_output = config->output[o]; 762c503f109Smrg if (loop_output == output) 763c503f109Smrg continue; 764c503f109Smrg else if (loop_output->crtc) { 765c503f109Smrg xf86CrtcPtr other_crtc = loop_output->crtc; 766c503f109Smrg RADEONCrtcPrivatePtr other_radeon_crtc = other_crtc->driver_private; 767c503f109Smrg if (other_crtc->enabled) { 768c503f109Smrg if (other_radeon_crtc->initialized) { 769c503f109Smrg radeon_crtc_dpms(other_crtc, DPMSModeOn); 770c503f109Smrg if (IS_AVIVO_VARIANT || info->r4xx_atom) 771c503f109Smrg atombios_lock_crtc(info->atomBIOS, other_radeon_crtc->crtc_id, 0); 772c503f109Smrg radeon_dpms(loop_output, DPMSModeOn); 773c503f109Smrg } 774c503f109Smrg } 775c503f109Smrg } 776c503f109Smrg } 777c503f109Smrg 778209ff23fSmrg radeon_dpms(output, DPMSModeOn); 779c503f109Smrg radeon_crtc_dpms(output->crtc, DPMSModeOn); 780209ff23fSmrg radeon_bios_output_lock(output, FALSE); 781209ff23fSmrg} 782209ff23fSmrg 783209ff23fSmrgstatic void 784209ff23fSmrgradeon_bios_output_lock(xf86OutputPtr output, Bool lock) 785209ff23fSmrg{ 786209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 787209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 788209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 789209ff23fSmrg RADEONSavePtr save = info->ModeReg; 790209ff23fSmrg 791209ff23fSmrg if (info->IsAtomBios) { 792209ff23fSmrg if (lock) { 793209ff23fSmrg save->bios_6_scratch |= ATOM_S6_CRITICAL_STATE; 794209ff23fSmrg } else { 795209ff23fSmrg save->bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE; 796209ff23fSmrg } 797209ff23fSmrg } else { 798209ff23fSmrg if (lock) { 799209ff23fSmrg save->bios_6_scratch |= RADEON_DRIVER_CRITICAL; 800209ff23fSmrg } else { 801209ff23fSmrg save->bios_6_scratch &= ~RADEON_DRIVER_CRITICAL; 802209ff23fSmrg } 803209ff23fSmrg } 804209ff23fSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 805209ff23fSmrg OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch); 806209ff23fSmrg else 807209ff23fSmrg OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); 808209ff23fSmrg} 809209ff23fSmrg 810209ff23fSmrgstatic void 811209ff23fSmrgradeon_bios_output_dpms(xf86OutputPtr output, int mode) 812209ff23fSmrg{ 813209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 814209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 815209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 816209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 817209ff23fSmrg RADEONSavePtr save = info->ModeReg; 818209ff23fSmrg 819209ff23fSmrg if (info->IsAtomBios) { 820b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 821b7e1c893Smrg if (mode == DPMSModeOn) 822b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE; 823b7e1c893Smrg else 824b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE; 825b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { 826b7e1c893Smrg if (mode == DPMSModeOn) 827b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE; 828b7e1c893Smrg else 829b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CV_DPMS_STATE; 830b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 831b7e1c893Smrg if (mode == DPMSModeOn) 832b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE; 833b7e1c893Smrg else 834b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE; 835b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 836b7e1c893Smrg if (mode == DPMSModeOn) 837b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE; 838b7e1c893Smrg else 839b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE; 840b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 841b7e1c893Smrg if (mode == DPMSModeOn) 842b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE; 843b7e1c893Smrg else 844b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE; 845b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 846b7e1c893Smrg if (mode == DPMSModeOn) 847b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE; 848b7e1c893Smrg else 849b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE; 850b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 851b7e1c893Smrg if (mode == DPMSModeOn) 852b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE; 853b7e1c893Smrg else 854b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE; 855b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { 856b7e1c893Smrg if (mode == DPMSModeOn) 857b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE; 858b7e1c893Smrg else 859b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE; 860b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP4_SUPPORT) { 861b7e1c893Smrg if (mode == DPMSModeOn) 862b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP4_DPMS_STATE; 863b7e1c893Smrg else 864b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP4_DPMS_STATE; 865b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP5_SUPPORT) { 866b7e1c893Smrg if (mode == DPMSModeOn) 867b7e1c893Smrg save->bios_2_scratch &= ~ATOM_S2_DFP5_DPMS_STATE; 868b7e1c893Smrg else 869b7e1c893Smrg save->bios_2_scratch |= ATOM_S2_DFP5_DPMS_STATE; 870209ff23fSmrg } 871b7e1c893Smrg if (info->ChipFamily >= CHIP_FAMILY_R600) 872209ff23fSmrg OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch); 873b7e1c893Smrg else 874209ff23fSmrg OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch); 875209ff23fSmrg } else { 876209ff23fSmrg if (mode == DPMSModeOn) { 877209ff23fSmrg save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING); 878209ff23fSmrg save->bios_6_scratch |= RADEON_DPMS_ON; 879209ff23fSmrg } else { 880209ff23fSmrg save->bios_6_scratch &= ~RADEON_DPMS_MASK; 881209ff23fSmrg save->bios_6_scratch |= (RADEON_DPMS_OFF | RADEON_SCREEN_BLANKING); 882b7e1c893Smrg } 883b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 884b7e1c893Smrg if (mode == DPMSModeOn) 885b7e1c893Smrg save->bios_6_scratch |= RADEON_TV_DPMS_ON; 886b7e1c893Smrg else 887209ff23fSmrg save->bios_6_scratch &= ~RADEON_TV_DPMS_ON; 888b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 889b7e1c893Smrg if (mode == DPMSModeOn) 890b7e1c893Smrg save->bios_6_scratch |= RADEON_CRT_DPMS_ON; 891b7e1c893Smrg else 892209ff23fSmrg save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; 893b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 894b7e1c893Smrg if (mode == DPMSModeOn) 895b7e1c893Smrg save->bios_6_scratch |= RADEON_CRT_DPMS_ON; 896b7e1c893Smrg else 897b7e1c893Smrg save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; 898b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 899b7e1c893Smrg if (mode == DPMSModeOn) 900b7e1c893Smrg save->bios_6_scratch |= RADEON_LCD_DPMS_ON; 901b7e1c893Smrg else 902209ff23fSmrg save->bios_6_scratch &= ~RADEON_LCD_DPMS_ON; 903b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 904b7e1c893Smrg if (mode == DPMSModeOn) 905b7e1c893Smrg save->bios_6_scratch |= RADEON_DFP_DPMS_ON; 906b7e1c893Smrg else 907b7e1c893Smrg save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; 908b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 909b7e1c893Smrg if (mode == DPMSModeOn) 910b7e1c893Smrg save->bios_6_scratch |= RADEON_DFP_DPMS_ON; 911b7e1c893Smrg else 912209ff23fSmrg save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; 913209ff23fSmrg } 914209ff23fSmrg OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); 915209ff23fSmrg } 916209ff23fSmrg} 917209ff23fSmrg 918209ff23fSmrgstatic void 919209ff23fSmrgradeon_bios_output_crtc(xf86OutputPtr output) 920209ff23fSmrg{ 921209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 922209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 923209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 924209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 925209ff23fSmrg RADEONSavePtr save = info->ModeReg; 926209ff23fSmrg xf86CrtcPtr crtc = output->crtc; 927209ff23fSmrg RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; 928209ff23fSmrg 929ad43ddacSmrg /* no need to update crtc routing scratch regs on DCE4 */ 930ad43ddacSmrg if (IS_DCE4_VARIANT) 931ad43ddacSmrg return; 932ad43ddacSmrg 933209ff23fSmrg if (info->IsAtomBios) { 934b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 935b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE; 936b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 18); 937b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CV_SUPPORT) { 938b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE; 939b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 24); 940b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 941b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE; 942b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 16); 943b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 944b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE; 945b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 20); 946b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 947b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE; 948b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 17); 949b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 950b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE; 951b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 19); 952b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 953b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE; 954b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 23); 955b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP3_SUPPORT) { 956b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE; 957b7e1c893Smrg save->bios_3_scratch |= (radeon_crtc->crtc_id << 25); 958209ff23fSmrg } 959209ff23fSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 960209ff23fSmrg OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); 961209ff23fSmrg else 962209ff23fSmrg OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); 963209ff23fSmrg } else { 964b7e1c893Smrg if (radeon_output->active_device & ATOM_DEVICE_TV1_SUPPORT) { 965209ff23fSmrg save->bios_5_scratch &= ~RADEON_TV1_CRTC_MASK; 966209ff23fSmrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_TV1_CRTC_SHIFT); 967b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT1_SUPPORT) { 968b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT1_CRTC_MASK; 969b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT1_CRTC_SHIFT); 970b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_CRT2_SUPPORT) { 971b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT2_CRTC_MASK; 972b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT2_CRTC_SHIFT); 973b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_LCD1_SUPPORT) { 974209ff23fSmrg save->bios_5_scratch &= ~RADEON_LCD1_CRTC_MASK; 975209ff23fSmrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_LCD1_CRTC_SHIFT); 976b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP1_SUPPORT) { 977b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP1_CRTC_MASK; 978b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP1_CRTC_SHIFT); 979b7e1c893Smrg } else if (radeon_output->active_device & ATOM_DEVICE_DFP2_SUPPORT) { 980b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP2_CRTC_MASK; 981b7e1c893Smrg save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP2_CRTC_SHIFT); 982209ff23fSmrg } 983209ff23fSmrg OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); 984209ff23fSmrg } 985209ff23fSmrg} 986209ff23fSmrg 987209ff23fSmrgstatic void 988209ff23fSmrgradeon_bios_output_connected(xf86OutputPtr output, Bool connected) 989209ff23fSmrg{ 990209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 991209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 992209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 993209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 994209ff23fSmrg RADEONSavePtr save = info->ModeReg; 995209ff23fSmrg 996209ff23fSmrg if (info->IsAtomBios) { 997b7e1c893Smrg switch (radeon_output->active_device) { 998b7e1c893Smrg case ATOM_DEVICE_TV1_SUPPORT: 999b7e1c893Smrg if (connected) 1000b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE; 1001b7e1c893Smrg else { 1002b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_TV1_MASK; 1003b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; 1004209ff23fSmrg } 1005b7e1c893Smrg break; 1006b7e1c893Smrg case ATOM_DEVICE_CV_SUPPORT: 1007b7e1c893Smrg if (connected) 1008b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CV_ACTIVE; 1009b7e1c893Smrg else { 1010b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CV_MASK; 1011b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; 1012b7e1c893Smrg } 1013b7e1c893Smrg break; 1014b7e1c893Smrg case ATOM_DEVICE_LCD1_SUPPORT: 1015b7e1c893Smrg if (connected) { 1016b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_LCD1; 1017b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; 1018b7e1c893Smrg } else { 1019b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_LCD1; 1020b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; 1021b7e1c893Smrg } 1022b7e1c893Smrg break; 1023b7e1c893Smrg case ATOM_DEVICE_CRT1_SUPPORT: 1024b7e1c893Smrg if (connected) { 1025b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_CRT1_COLOR; 1026b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; 1027b7e1c893Smrg } else { 1028b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CRT1_MASK; 1029b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; 1030b7e1c893Smrg } 1031b7e1c893Smrg break; 1032b7e1c893Smrg case ATOM_DEVICE_CRT2_SUPPORT: 1033b7e1c893Smrg if (connected) { 1034b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_CRT2_COLOR; 1035b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; 1036b7e1c893Smrg } else { 1037b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_CRT2_MASK; 1038b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; 1039b7e1c893Smrg } 1040b7e1c893Smrg break; 1041b7e1c893Smrg case ATOM_DEVICE_DFP1_SUPPORT: 1042b7e1c893Smrg if (connected) { 1043b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP1; 1044b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; 1045b7e1c893Smrg } else { 1046b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP1; 1047b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; 1048209ff23fSmrg } 1049b7e1c893Smrg break; 1050b7e1c893Smrg case ATOM_DEVICE_DFP2_SUPPORT: 1051b7e1c893Smrg if (connected) { 1052b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP2; 1053b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; 1054b7e1c893Smrg } else { 1055b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP2; 1056b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; 1057209ff23fSmrg } 1058b7e1c893Smrg break; 1059b7e1c893Smrg case ATOM_DEVICE_DFP3_SUPPORT: 1060b7e1c893Smrg if (connected) { 1061b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP3; 1062b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; 1063b7e1c893Smrg } else { 1064b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP3; 1065b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; 1066209ff23fSmrg } 1067b7e1c893Smrg break; 1068b7e1c893Smrg case ATOM_DEVICE_DFP4_SUPPORT: 1069b7e1c893Smrg if (connected) { 1070b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP4; 1071b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; 1072b7e1c893Smrg } else { 1073b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP4; 1074b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; 1075209ff23fSmrg } 1076b7e1c893Smrg break; 1077b7e1c893Smrg case ATOM_DEVICE_DFP5_SUPPORT: 1078b7e1c893Smrg if (connected) { 1079b7e1c893Smrg save->bios_0_scratch |= ATOM_S0_DFP5; 1080b7e1c893Smrg save->bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; 1081b7e1c893Smrg } else { 1082b7e1c893Smrg save->bios_0_scratch &= ~ATOM_S0_DFP5; 1083b7e1c893Smrg save->bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; 1084209ff23fSmrg } 1085b7e1c893Smrg break; 1086209ff23fSmrg } 1087b7e1c893Smrg if (info->ChipFamily >= CHIP_FAMILY_R600) { 1088209ff23fSmrg OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch); 1089b7e1c893Smrg OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); 1090b7e1c893Smrg } else { 1091209ff23fSmrg OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch); 1092b7e1c893Smrg OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); 1093b7e1c893Smrg } 1094209ff23fSmrg } else { 1095b7e1c893Smrg switch (radeon_output->active_device) { 1096b7e1c893Smrg case ATOM_DEVICE_TV1_SUPPORT: 1097b7e1c893Smrg if (connected) { 1098b7e1c893Smrg if (radeon_output->MonType == MT_STV) 1099b7e1c893Smrg save->bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; 1100b7e1c893Smrg else if (radeon_output->MonType == MT_CTV) 1101b7e1c893Smrg save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; 1102b7e1c893Smrg save->bios_5_scratch |= RADEON_TV1_ON; 1103b7e1c893Smrg } else { 1104b7e1c893Smrg save->bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; 1105b7e1c893Smrg save->bios_5_scratch &= ~RADEON_TV1_ON; 1106b7e1c893Smrg } 1107b7e1c893Smrg break; 1108b7e1c893Smrg case ATOM_DEVICE_LCD1_SUPPORT: 1109b7e1c893Smrg if (connected) { 1110209ff23fSmrg save->bios_4_scratch |= RADEON_LCD1_ATTACHED; 1111b7e1c893Smrg save->bios_5_scratch |= RADEON_LCD1_ON; 1112b7e1c893Smrg } else { 1113b7e1c893Smrg save->bios_4_scratch &= ~RADEON_LCD1_ATTACHED; 1114b7e1c893Smrg save->bios_5_scratch &= ~RADEON_LCD1_ON; 1115209ff23fSmrg } 1116b7e1c893Smrg break; 1117b7e1c893Smrg case ATOM_DEVICE_CRT1_SUPPORT: 1118b7e1c893Smrg if (connected) { 1119b7e1c893Smrg save->bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; 1120b7e1c893Smrg save->bios_5_scratch |= RADEON_CRT1_ON; 1121b7e1c893Smrg } else { 1122209ff23fSmrg save->bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; 1123b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT1_ON; 1124b7e1c893Smrg } 1125b7e1c893Smrg break; 1126b7e1c893Smrg case ATOM_DEVICE_CRT2_SUPPORT: 1127b7e1c893Smrg if (connected) { 1128b7e1c893Smrg save->bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; 1129b7e1c893Smrg save->bios_5_scratch |= RADEON_CRT2_ON; 1130b7e1c893Smrg } else { 1131b7e1c893Smrg save->bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; 1132b7e1c893Smrg save->bios_5_scratch &= ~RADEON_CRT2_ON; 1133b7e1c893Smrg } 1134b7e1c893Smrg break; 1135b7e1c893Smrg case ATOM_DEVICE_DFP1_SUPPORT: 1136b7e1c893Smrg if (connected) { 1137b7e1c893Smrg save->bios_4_scratch |= RADEON_DFP1_ATTACHED; 1138b7e1c893Smrg save->bios_5_scratch |= RADEON_DFP1_ON; 1139b7e1c893Smrg } else { 1140209ff23fSmrg save->bios_4_scratch &= ~RADEON_DFP1_ATTACHED; 1141b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP1_ON; 1142b7e1c893Smrg } 1143b7e1c893Smrg break; 1144b7e1c893Smrg case ATOM_DEVICE_DFP2_SUPPORT: 1145b7e1c893Smrg if (connected) { 1146b7e1c893Smrg save->bios_4_scratch |= RADEON_DFP2_ATTACHED; 1147b7e1c893Smrg save->bios_5_scratch |= RADEON_DFP2_ON; 1148b7e1c893Smrg } else { 1149209ff23fSmrg save->bios_4_scratch &= ~RADEON_DFP2_ATTACHED; 1150b7e1c893Smrg save->bios_5_scratch &= ~RADEON_DFP2_ON; 1151b7e1c893Smrg } 1152b7e1c893Smrg break; 1153209ff23fSmrg } 1154209ff23fSmrg OUTREG(RADEON_BIOS_4_SCRATCH, save->bios_4_scratch); 1155b7e1c893Smrg OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); 1156209ff23fSmrg } 1157209ff23fSmrg 1158209ff23fSmrg} 1159209ff23fSmrg 1160209ff23fSmrgstatic xf86OutputStatus 1161209ff23fSmrgradeon_detect(xf86OutputPtr output) 1162209ff23fSmrg{ 1163209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1164209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1165209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1166209ff23fSmrg Bool connected = TRUE; 1167209ff23fSmrg 1168209ff23fSmrg radeon_output->MonType = MT_UNKNOWN; 1169209ff23fSmrg radeon_bios_output_connected(output, FALSE); 1170b7e1c893Smrg radeon_output->MonType = radeon_ddc_connected(output); 1171b7e1c893Smrg if (!radeon_output->MonType) { 1172b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1173b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_IGNORE_LID_STATUS, TRUE)) 1174b7e1c893Smrg radeon_output->MonType = MT_LCD; 1175b7e1c893Smrg else 1176b7e1c893Smrg#if defined(__powerpc__) 1177b7e1c893Smrg radeon_output->MonType = MT_LCD; 1178b7e1c893Smrg#else 1179b7e1c893Smrg radeon_output->MonType = RADEONDetectLidStatus(pScrn); 1180b7e1c893Smrg#endif 1181b7e1c893Smrg } else { 1182b7e1c893Smrg if (info->IsAtomBios) 1183b7e1c893Smrg radeon_output->MonType = atombios_dac_detect(output); 1184b7e1c893Smrg else 1185b7e1c893Smrg radeon_output->MonType = legacy_dac_detect(output); 1186b7e1c893Smrg } 1187b7e1c893Smrg } 1188b7e1c893Smrg 1189b7e1c893Smrg // if size is zero panel probably broken or not connected 1190b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1191b7e1c893Smrg radeon_encoder_ptr radeon_encoder = info->encoders[ATOM_DEVICE_LCD1_INDEX]; 1192b7e1c893Smrg if (radeon_encoder) { 1193b7e1c893Smrg radeon_lvds_ptr lvds = (radeon_lvds_ptr)radeon_encoder->dev_priv; 1194b7e1c893Smrg if (lvds) { 1195b7e1c893Smrg if ((lvds->native_mode.PanelXRes == 0) || (lvds->native_mode.PanelYRes == 0)) 1196b7e1c893Smrg radeon_output->MonType = MT_NONE; 1197b7e1c893Smrg } 1198b7e1c893Smrg } 1199b7e1c893Smrg } 1200b7e1c893Smrg 1201b7e1c893Smrg 1202c503f109Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 1203c503f109Smrg "Output: %s, Detected Monitor Type: %d\n", output->name, radeon_output->MonType); 1204b7e1c893Smrg if (output->MonInfo) { 1205b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EDID data from the display on output: %s ----------------------\n", 1206b7e1c893Smrg output->name); 1207b7e1c893Smrg xf86PrintEDID( output->MonInfo ); 1208b7e1c893Smrg } 1209209ff23fSmrg 1210209ff23fSmrg /* nothing connected, light up some defaults so the server comes up */ 1211209ff23fSmrg if (radeon_output->MonType == MT_NONE && 1212209ff23fSmrg info->first_load_no_devices) { 1213209ff23fSmrg if (info->IsMobility) { 1214b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 1215209ff23fSmrg radeon_output->MonType = MT_LCD; 1216209ff23fSmrg info->first_load_no_devices = FALSE; 1217b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using LCD default\n"); 1218209ff23fSmrg } 1219209ff23fSmrg } else { 1220b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) { 1221209ff23fSmrg radeon_output->MonType = MT_CRT; 1222209ff23fSmrg info->first_load_no_devices = FALSE; 1223b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using CRT default\n"); 1224b7e1c893Smrg } else if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT)) { 1225209ff23fSmrg radeon_output->MonType = MT_DFP; 1226209ff23fSmrg info->first_load_no_devices = FALSE; 1227b7e1c893Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Using DFP default\n"); 1228209ff23fSmrg } 1229209ff23fSmrg } 1230209ff23fSmrg } 1231209ff23fSmrg 1232209ff23fSmrg radeon_bios_output_connected(output, TRUE); 1233209ff23fSmrg 1234209ff23fSmrg /* set montype so users can force outputs on even if detection fails */ 1235209ff23fSmrg if (radeon_output->MonType == MT_NONE) { 1236209ff23fSmrg connected = FALSE; 1237b7e1c893Smrg switch (radeon_output->ConnectorType) { 1238b7e1c893Smrg case CONNECTOR_LVDS: 1239209ff23fSmrg radeon_output->MonType = MT_LCD; 1240b7e1c893Smrg break; 1241b7e1c893Smrg case CONNECTOR_DVI_D: 1242b7e1c893Smrg case CONNECTOR_HDMI_TYPE_A: 1243b7e1c893Smrg case CONNECTOR_HDMI_TYPE_B: 1244209ff23fSmrg radeon_output->MonType = MT_DFP; 1245b7e1c893Smrg break; 1246b7e1c893Smrg case CONNECTOR_VGA: 1247b7e1c893Smrg case CONNECTOR_DVI_A: 1248b7e1c893Smrg default: 1249209ff23fSmrg radeon_output->MonType = MT_CRT; 1250b7e1c893Smrg break; 1251b7e1c893Smrg case CONNECTOR_DVI_I: 1252209ff23fSmrg if (radeon_output->DVIType == DVI_ANALOG) 1253209ff23fSmrg radeon_output->MonType = MT_CRT; 1254209ff23fSmrg else if (radeon_output->DVIType == DVI_DIGITAL) 1255209ff23fSmrg radeon_output->MonType = MT_DFP; 1256b7e1c893Smrg break; 1257b7e1c893Smrg case CONNECTOR_STV: 1258b7e1c893Smrg radeon_output->MonType = MT_STV; 1259b7e1c893Smrg break; 1260b7e1c893Smrg case CONNECTOR_CTV: 1261b7e1c893Smrg radeon_output->MonType = MT_CTV; 1262b7e1c893Smrg break; 1263b7e1c893Smrg case CONNECTOR_DIN: 1264b7e1c893Smrg radeon_output->MonType = MT_CV; 1265b7e1c893Smrg break; 1266b7e1c893Smrg case CONNECTOR_DISPLAY_PORT: 1267ad43ddacSmrg case CONNECTOR_EDP: 1268b7e1c893Smrg radeon_output->MonType = MT_DP; 1269b7e1c893Smrg break; 1270209ff23fSmrg } 1271209ff23fSmrg } 1272209ff23fSmrg 1273b7e1c893Smrg radeon_set_active_device(output); 1274209ff23fSmrg 1275b7e1c893Smrg if (radeon_output->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) 1276b7e1c893Smrg output->subpixel_order = SubPixelHorizontalRGB; 1277b7e1c893Smrg else 1278b7e1c893Smrg output->subpixel_order = SubPixelNone; 1279209ff23fSmrg 1280b7e1c893Smrg if (connected) 1281b7e1c893Smrg return XF86OutputStatusConnected; 1282b7e1c893Smrg else 1283b7e1c893Smrg return XF86OutputStatusDisconnected; 1284209ff23fSmrg} 1285209ff23fSmrg 1286209ff23fSmrgstatic DisplayModePtr 1287209ff23fSmrgradeon_get_modes(xf86OutputPtr output) 1288209ff23fSmrg{ 1289209ff23fSmrg DisplayModePtr modes; 1290209ff23fSmrg modes = RADEONProbeOutputModes(output); 1291209ff23fSmrg return modes; 1292209ff23fSmrg} 1293209ff23fSmrg 1294209ff23fSmrgstatic void 1295209ff23fSmrgradeon_destroy (xf86OutputPtr output) 1296209ff23fSmrg{ 1297209ff23fSmrg if (output->driver_private) 1298209ff23fSmrg xfree(output->driver_private); 1299209ff23fSmrg} 1300209ff23fSmrg 1301209ff23fSmrgstatic void 1302209ff23fSmrgradeon_set_backlight_level(xf86OutputPtr output, int level) 1303209ff23fSmrg{ 1304209ff23fSmrg#if 0 1305209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1306209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1307209ff23fSmrg unsigned char * RADEONMMIO = info->MMIO; 1308209ff23fSmrg uint32_t lvds_gen_cntl; 1309209ff23fSmrg 1310209ff23fSmrg lvds_gen_cntl = INREG(RADEON_LVDS_GEN_CNTL); 1311209ff23fSmrg lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; 1312209ff23fSmrg lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_LEVEL_MASK; 1313209ff23fSmrg lvds_gen_cntl |= (level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT) & RADEON_LVDS_BL_MOD_LEVEL_MASK; 1314209ff23fSmrg //usleep (radeon_output->PanelPwrDly * 1000); 1315209ff23fSmrg OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 1316209ff23fSmrg lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN; 1317209ff23fSmrg //usleep (radeon_output->PanelPwrDly * 1000); 1318209ff23fSmrg OUTREG(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 1319209ff23fSmrg#endif 1320209ff23fSmrg} 1321209ff23fSmrg 1322209ff23fSmrgstatic Atom backlight_atom; 1323209ff23fSmrgstatic Atom tmds_pll_atom; 1324209ff23fSmrgstatic Atom rmx_atom; 1325209ff23fSmrgstatic Atom monitor_type_atom; 1326209ff23fSmrgstatic Atom load_detection_atom; 1327209ff23fSmrgstatic Atom coherent_mode_atom; 1328209ff23fSmrgstatic Atom tv_hsize_atom; 1329209ff23fSmrgstatic Atom tv_hpos_atom; 1330209ff23fSmrgstatic Atom tv_vpos_atom; 1331209ff23fSmrgstatic Atom tv_std_atom; 1332209ff23fSmrg#define RADEON_MAX_BACKLIGHT_LEVEL 255 1333209ff23fSmrg 1334209ff23fSmrgstatic void 1335209ff23fSmrgradeon_create_resources(xf86OutputPtr output) 1336209ff23fSmrg{ 1337209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1338209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1339209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1340209ff23fSmrg INT32 range[2]; 1341209ff23fSmrg int data, err; 1342209ff23fSmrg const char *s; 1343209ff23fSmrg 1344b7e1c893Smrg#if 0 1345209ff23fSmrg /* backlight control */ 1346209ff23fSmrg if (radeon_output->type == OUTPUT_LVDS) { 1347209ff23fSmrg backlight_atom = MAKE_ATOM("backlight"); 1348209ff23fSmrg 1349209ff23fSmrg range[0] = 0; 1350209ff23fSmrg range[1] = RADEON_MAX_BACKLIGHT_LEVEL; 1351209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, backlight_atom, 1352209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1353209ff23fSmrg if (err != 0) { 1354209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1355209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1356209ff23fSmrg } 1357209ff23fSmrg /* Set the current value of the backlight property */ 1358209ff23fSmrg //data = (info->SavedReg->lvds_gen_cntl & RADEON_LVDS_BL_MOD_LEVEL_MASK) >> RADEON_LVDS_BL_MOD_LEVEL_SHIFT; 1359209ff23fSmrg data = RADEON_MAX_BACKLIGHT_LEVEL; 1360209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, backlight_atom, 1361209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1362209ff23fSmrg FALSE, TRUE); 1363209ff23fSmrg if (err != 0) { 1364209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1365209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1366209ff23fSmrg } 1367209ff23fSmrg } 1368b7e1c893Smrg#endif 1369209ff23fSmrg 1370b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT | ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { 1371209ff23fSmrg load_detection_atom = MAKE_ATOM("load_detection"); 1372209ff23fSmrg 1373209ff23fSmrg range[0] = 0; /* off */ 1374209ff23fSmrg range[1] = 1; /* on */ 1375209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, load_detection_atom, 1376209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1377209ff23fSmrg if (err != 0) { 1378209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1379209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1380209ff23fSmrg } 1381209ff23fSmrg 1382209ff23fSmrg if (radeon_output->load_detection) 1383b7e1c893Smrg data = 1; 1384209ff23fSmrg else 1385b7e1c893Smrg data = 0; 1386209ff23fSmrg 1387209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, load_detection_atom, 1388209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1389209ff23fSmrg FALSE, TRUE); 1390209ff23fSmrg if (err != 0) { 1391209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1392209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1393209ff23fSmrg } 1394209ff23fSmrg } 1395209ff23fSmrg 1396b7e1c893Smrg if (IS_AVIVO_VARIANT && (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))) { 1397209ff23fSmrg coherent_mode_atom = MAKE_ATOM("coherent_mode"); 1398209ff23fSmrg 1399209ff23fSmrg range[0] = 0; /* off */ 1400209ff23fSmrg range[1] = 1; /* on */ 1401209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, coherent_mode_atom, 1402209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1403209ff23fSmrg if (err != 0) { 1404209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1405209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1406209ff23fSmrg } 1407209ff23fSmrg 1408b7e1c893Smrg data = 1; /* coherent mode on by default */ 1409209ff23fSmrg 1410209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, coherent_mode_atom, 1411209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1412209ff23fSmrg FALSE, TRUE); 1413209ff23fSmrg if (err != 0) { 1414209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1415209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1416209ff23fSmrg } 1417209ff23fSmrg } 1418209ff23fSmrg 1419c503f109Smrg if ((!IS_AVIVO_VARIANT) && (radeon_output->devices & (ATOM_DEVICE_DFP1_SUPPORT))) { 1420209ff23fSmrg tmds_pll_atom = MAKE_ATOM("tmds_pll"); 1421209ff23fSmrg 1422209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tmds_pll_atom, 1423209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1424209ff23fSmrg if (err != 0) { 1425209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1426209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1427209ff23fSmrg } 1428209ff23fSmrg /* Set the current value of the property */ 1429209ff23fSmrg#if defined(__powerpc__) 1430209ff23fSmrg s = "driver"; 1431209ff23fSmrg#else 1432209ff23fSmrg s = "bios"; 1433209ff23fSmrg#endif 1434209ff23fSmrg if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_TMDS_PLL, FALSE)) { 1435209ff23fSmrg s = "driver"; 1436209ff23fSmrg } 1437209ff23fSmrg 1438209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tmds_pll_atom, 1439209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1440209ff23fSmrg FALSE, FALSE); 1441209ff23fSmrg if (err != 0) { 1442209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1443209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1444209ff23fSmrg } 1445209ff23fSmrg 1446209ff23fSmrg } 1447209ff23fSmrg 1448209ff23fSmrg /* RMX control - fullscreen, centered, keep ratio, off */ 1449209ff23fSmrg /* actually more of a crtc property as only crtc1 has rmx */ 1450b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { 1451209ff23fSmrg rmx_atom = MAKE_ATOM("scaler"); 1452209ff23fSmrg 1453209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, rmx_atom, 1454209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1455209ff23fSmrg if (err != 0) { 1456209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1457209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1458209ff23fSmrg } 1459209ff23fSmrg /* Set the current value of the property */ 1460b7e1c893Smrg switch (radeon_output->rmx_type) { 1461b7e1c893Smrg case RMX_OFF: 1462b7e1c893Smrg default: 1463209ff23fSmrg s = "off"; 1464b7e1c893Smrg break; 1465b7e1c893Smrg case RMX_FULL: 1466b7e1c893Smrg s = "full"; 1467b7e1c893Smrg break; 1468b7e1c893Smrg case RMX_CENTER: 1469b7e1c893Smrg s = "center"; 1470b7e1c893Smrg break; 1471b7e1c893Smrg case RMX_ASPECT: 1472b7e1c893Smrg s = "aspect"; 1473b7e1c893Smrg break; 1474b7e1c893Smrg } 1475209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, rmx_atom, 1476209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1477209ff23fSmrg FALSE, FALSE); 1478209ff23fSmrg if (err != 0) { 1479209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1480209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1481209ff23fSmrg } 1482209ff23fSmrg } 1483209ff23fSmrg 1484209ff23fSmrg /* force auto/analog/digital for DVI-I ports */ 1485b7e1c893Smrg if ((radeon_output->devices & (ATOM_DEVICE_CRT_SUPPORT)) && 1486b7e1c893Smrg (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))){ 1487209ff23fSmrg monitor_type_atom = MAKE_ATOM("dvi_monitor_type"); 1488209ff23fSmrg 1489209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, monitor_type_atom, 1490209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1491209ff23fSmrg if (err != 0) { 1492209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1493209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1494209ff23fSmrg } 1495209ff23fSmrg /* Set the current value of the backlight property */ 1496209ff23fSmrg s = "auto"; 1497209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, monitor_type_atom, 1498209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1499209ff23fSmrg FALSE, FALSE); 1500209ff23fSmrg if (err != 0) { 1501209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1502209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1503209ff23fSmrg } 1504209ff23fSmrg } 1505209ff23fSmrg 1506b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) { 1507b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1508209ff23fSmrg if (!IS_AVIVO_VARIANT) { 1509209ff23fSmrg tv_hsize_atom = MAKE_ATOM("tv_horizontal_size"); 1510209ff23fSmrg 1511209ff23fSmrg range[0] = -MAX_H_SIZE; 1512209ff23fSmrg range[1] = MAX_H_SIZE; 1513209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_hsize_atom, 1514209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1515209ff23fSmrg if (err != 0) { 1516209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1517209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1518209ff23fSmrg } 1519209ff23fSmrg data = 0; 1520209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_hsize_atom, 1521209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1522209ff23fSmrg FALSE, TRUE); 1523209ff23fSmrg if (err != 0) { 1524209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1525209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1526209ff23fSmrg } 1527209ff23fSmrg 1528209ff23fSmrg tv_hpos_atom = MAKE_ATOM("tv_horizontal_position"); 1529209ff23fSmrg 1530209ff23fSmrg range[0] = -MAX_H_POSITION; 1531209ff23fSmrg range[1] = MAX_H_POSITION; 1532209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_hpos_atom, 1533209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1534209ff23fSmrg if (err != 0) { 1535209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1536209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1537209ff23fSmrg } 1538209ff23fSmrg data = 0; 1539209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_hpos_atom, 1540209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1541209ff23fSmrg FALSE, TRUE); 1542209ff23fSmrg if (err != 0) { 1543209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1544209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1545209ff23fSmrg } 1546209ff23fSmrg 1547209ff23fSmrg tv_vpos_atom = MAKE_ATOM("tv_vertical_position"); 1548209ff23fSmrg 1549209ff23fSmrg range[0] = -MAX_V_POSITION; 1550209ff23fSmrg range[1] = MAX_V_POSITION; 1551209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_vpos_atom, 1552209ff23fSmrg FALSE, TRUE, FALSE, 2, range); 1553209ff23fSmrg if (err != 0) { 1554209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1555209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1556209ff23fSmrg } 1557209ff23fSmrg data = 0; 1558209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_vpos_atom, 1559209ff23fSmrg XA_INTEGER, 32, PropModeReplace, 1, &data, 1560209ff23fSmrg FALSE, TRUE); 1561209ff23fSmrg if (err != 0) { 1562209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1563209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1564209ff23fSmrg } 1565209ff23fSmrg } 1566209ff23fSmrg 1567209ff23fSmrg tv_std_atom = MAKE_ATOM("tv_standard"); 1568209ff23fSmrg 1569209ff23fSmrg err = RRConfigureOutputProperty(output->randr_output, tv_std_atom, 1570209ff23fSmrg FALSE, FALSE, FALSE, 0, NULL); 1571209ff23fSmrg if (err != 0) { 1572209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1573209ff23fSmrg "RRConfigureOutputProperty error, %d\n", err); 1574209ff23fSmrg } 1575209ff23fSmrg 1576209ff23fSmrg /* Set the current value of the property */ 1577b7e1c893Smrg switch (tvout->tvStd) { 1578209ff23fSmrg case TV_STD_PAL: 1579209ff23fSmrg s = "pal"; 1580209ff23fSmrg break; 1581209ff23fSmrg case TV_STD_PAL_M: 1582209ff23fSmrg s = "pal-m"; 1583209ff23fSmrg break; 1584209ff23fSmrg case TV_STD_PAL_60: 1585209ff23fSmrg s = "pal-60"; 1586209ff23fSmrg break; 1587209ff23fSmrg case TV_STD_NTSC_J: 1588209ff23fSmrg s = "ntsc-j"; 1589209ff23fSmrg break; 1590209ff23fSmrg case TV_STD_SCART_PAL: 1591209ff23fSmrg s = "scart-pal"; 1592209ff23fSmrg break; 1593209ff23fSmrg case TV_STD_NTSC: 1594209ff23fSmrg default: 1595209ff23fSmrg s = "ntsc"; 1596209ff23fSmrg break; 1597209ff23fSmrg } 1598209ff23fSmrg 1599209ff23fSmrg err = RRChangeOutputProperty(output->randr_output, tv_std_atom, 1600209ff23fSmrg XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, 1601209ff23fSmrg FALSE, FALSE); 1602209ff23fSmrg if (err != 0) { 1603209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1604209ff23fSmrg "RRChangeOutputProperty error, %d\n", err); 1605209ff23fSmrg } 1606209ff23fSmrg } 1607209ff23fSmrg} 1608209ff23fSmrg 1609209ff23fSmrgstatic Bool 1610209ff23fSmrgradeon_set_mode_for_property(xf86OutputPtr output) 1611209ff23fSmrg{ 1612209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1613209ff23fSmrg 1614209ff23fSmrg if (output->crtc) { 1615209ff23fSmrg xf86CrtcPtr crtc = output->crtc; 1616209ff23fSmrg 1617209ff23fSmrg if (crtc->enabled) { 1618209ff23fSmrg if (!xf86CrtcSetMode(crtc, &crtc->desiredMode, crtc->desiredRotation, 1619209ff23fSmrg crtc->desiredX, crtc->desiredY)) { 1620209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1621209ff23fSmrg "Failed to set mode after propery change!\n"); 1622209ff23fSmrg return FALSE; 1623209ff23fSmrg } 1624209ff23fSmrg } 1625209ff23fSmrg } 1626209ff23fSmrg return TRUE; 1627209ff23fSmrg} 1628209ff23fSmrg 1629209ff23fSmrgstatic Bool 1630209ff23fSmrgradeon_set_property(xf86OutputPtr output, Atom property, 1631209ff23fSmrg RRPropertyValuePtr value) 1632209ff23fSmrg{ 1633209ff23fSmrg RADEONInfoPtr info = RADEONPTR(output->scrn); 1634209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 1635209ff23fSmrg INT32 val; 1636209ff23fSmrg 1637209ff23fSmrg 1638209ff23fSmrg if (property == backlight_atom) { 1639209ff23fSmrg if (value->type != XA_INTEGER || 1640209ff23fSmrg value->format != 32 || 1641209ff23fSmrg value->size != 1) { 1642209ff23fSmrg return FALSE; 1643209ff23fSmrg } 1644209ff23fSmrg 1645209ff23fSmrg val = *(INT32 *)value->data; 1646209ff23fSmrg if (val < 0 || val > RADEON_MAX_BACKLIGHT_LEVEL) 1647209ff23fSmrg return FALSE; 1648209ff23fSmrg 1649209ff23fSmrg#if defined(__powerpc__) 1650209ff23fSmrg val = RADEON_MAX_BACKLIGHT_LEVEL - val; 1651209ff23fSmrg#endif 1652209ff23fSmrg 1653209ff23fSmrg radeon_set_backlight_level(output, val); 1654209ff23fSmrg 1655209ff23fSmrg } else if (property == load_detection_atom) { 1656209ff23fSmrg if (value->type != XA_INTEGER || 1657209ff23fSmrg value->format != 32 || 1658209ff23fSmrg value->size != 1) { 1659209ff23fSmrg return FALSE; 1660209ff23fSmrg } 1661209ff23fSmrg 1662209ff23fSmrg val = *(INT32 *)value->data; 1663209ff23fSmrg if (val < 0 || val > 1) 1664209ff23fSmrg return FALSE; 1665209ff23fSmrg 1666209ff23fSmrg radeon_output->load_detection = val; 1667209ff23fSmrg 1668209ff23fSmrg } else if (property == coherent_mode_atom) { 1669209ff23fSmrg Bool coherent_mode = radeon_output->coherent_mode; 1670209ff23fSmrg 1671209ff23fSmrg if (value->type != XA_INTEGER || 1672209ff23fSmrg value->format != 32 || 1673209ff23fSmrg value->size != 1) { 1674209ff23fSmrg return FALSE; 1675209ff23fSmrg } 1676209ff23fSmrg 1677209ff23fSmrg val = *(INT32 *)value->data; 1678209ff23fSmrg if (val < 0 || val > 1) 1679209ff23fSmrg return FALSE; 1680209ff23fSmrg 1681209ff23fSmrg radeon_output->coherent_mode = val; 1682209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1683209ff23fSmrg radeon_output->coherent_mode = coherent_mode; 1684209ff23fSmrg (void)radeon_set_mode_for_property(output); 1685209ff23fSmrg return FALSE; 1686209ff23fSmrg } 1687209ff23fSmrg 1688209ff23fSmrg } else if (property == rmx_atom) { 1689209ff23fSmrg const char *s; 1690209ff23fSmrg RADEONRMXType rmx = radeon_output->rmx_type; 1691209ff23fSmrg 1692209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1693209ff23fSmrg return FALSE; 1694209ff23fSmrg s = (char*)value->data; 1695209ff23fSmrg if (value->size == strlen("full") && !strncmp("full", s, strlen("full"))) { 1696209ff23fSmrg radeon_output->rmx_type = RMX_FULL; 1697209ff23fSmrg } else if (value->size == strlen("center") && !strncmp("center", s, strlen("center"))) { 1698209ff23fSmrg radeon_output->rmx_type = RMX_CENTER; 1699b7e1c893Smrg } else if (value->size == strlen("aspect") && !strncmp("aspect", s, strlen("aspect"))) { 1700b7e1c893Smrg if (IS_AVIVO_VARIANT) 1701b7e1c893Smrg radeon_output->rmx_type = RMX_ASPECT; 1702b7e1c893Smrg else 1703b7e1c893Smrg return FALSE; 1704209ff23fSmrg } else if (value->size == strlen("off") && !strncmp("off", s, strlen("off"))) { 1705209ff23fSmrg radeon_output->rmx_type = RMX_OFF; 1706209ff23fSmrg } else 1707209ff23fSmrg return FALSE; 1708209ff23fSmrg 1709209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1710209ff23fSmrg radeon_output->rmx_type = rmx; 1711209ff23fSmrg (void)radeon_set_mode_for_property(output); 1712209ff23fSmrg return FALSE; 1713209ff23fSmrg } 1714209ff23fSmrg } else if (property == tmds_pll_atom) { 1715b7e1c893Smrg radeon_tmds_ptr tmds = NULL; 1716209ff23fSmrg const char *s; 1717b7e1c893Smrg 1718b7e1c893Smrg if (info->encoders[ATOM_DEVICE_DFP1_INDEX] && info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv) 1719b7e1c893Smrg tmds = (radeon_tmds_ptr)info->encoders[ATOM_DEVICE_DFP1_INDEX]->dev_priv; 1720b7e1c893Smrg else 1721b7e1c893Smrg return FALSE; 1722b7e1c893Smrg 1723209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1724209ff23fSmrg return FALSE; 1725209ff23fSmrg s = (char*)value->data; 1726209ff23fSmrg if (value->size == strlen("bios") && !strncmp("bios", s, strlen("bios"))) { 1727b7e1c893Smrg if (!RADEONGetTMDSInfoFromBIOS(output->scrn, tmds)) 1728b7e1c893Smrg RADEONGetTMDSInfoFromTable(output->scrn, tmds); 1729b7e1c893Smrg } else if (value->size == strlen("driver") && !strncmp("driver", s, strlen("driver"))) 1730b7e1c893Smrg RADEONGetTMDSInfoFromTable(output->scrn, tmds); 1731b7e1c893Smrg else 1732209ff23fSmrg return FALSE; 1733209ff23fSmrg 1734209ff23fSmrg return radeon_set_mode_for_property(output); 1735209ff23fSmrg } else if (property == monitor_type_atom) { 1736209ff23fSmrg const char *s; 1737209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1738209ff23fSmrg return FALSE; 1739209ff23fSmrg s = (char*)value->data; 1740209ff23fSmrg if (value->size == strlen("auto") && !strncmp("auto", s, strlen("auto"))) { 1741209ff23fSmrg radeon_output->DVIType = DVI_AUTO; 1742209ff23fSmrg return TRUE; 1743209ff23fSmrg } else if (value->size == strlen("analog") && !strncmp("analog", s, strlen("analog"))) { 1744209ff23fSmrg radeon_output->DVIType = DVI_ANALOG; 1745209ff23fSmrg return TRUE; 1746209ff23fSmrg } else if (value->size == strlen("digital") && !strncmp("digital", s, strlen("digital"))) { 1747209ff23fSmrg radeon_output->DVIType = DVI_DIGITAL; 1748209ff23fSmrg return TRUE; 1749209ff23fSmrg } else 1750209ff23fSmrg return FALSE; 1751209ff23fSmrg } else if (property == tv_hsize_atom) { 1752b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1753209ff23fSmrg if (value->type != XA_INTEGER || 1754209ff23fSmrg value->format != 32 || 1755209ff23fSmrg value->size != 1) { 1756209ff23fSmrg return FALSE; 1757209ff23fSmrg } 1758209ff23fSmrg 1759209ff23fSmrg val = *(INT32 *)value->data; 1760209ff23fSmrg if (val < -MAX_H_SIZE || val > MAX_H_SIZE) 1761209ff23fSmrg return FALSE; 1762209ff23fSmrg 1763b7e1c893Smrg tvout->hSize = val; 1764b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1765209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1766209ff23fSmrg 1767209ff23fSmrg } else if (property == tv_hpos_atom) { 1768b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1769209ff23fSmrg if (value->type != XA_INTEGER || 1770209ff23fSmrg value->format != 32 || 1771209ff23fSmrg value->size != 1) { 1772209ff23fSmrg return FALSE; 1773209ff23fSmrg } 1774209ff23fSmrg 1775209ff23fSmrg val = *(INT32 *)value->data; 1776209ff23fSmrg if (val < -MAX_H_POSITION || val > MAX_H_POSITION) 1777209ff23fSmrg return FALSE; 1778209ff23fSmrg 1779b7e1c893Smrg tvout->hPos = val; 1780b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1781209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1782209ff23fSmrg 1783209ff23fSmrg } else if (property == tv_vpos_atom) { 1784b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1785209ff23fSmrg if (value->type != XA_INTEGER || 1786209ff23fSmrg value->format != 32 || 1787209ff23fSmrg value->size != 1) { 1788209ff23fSmrg return FALSE; 1789209ff23fSmrg } 1790209ff23fSmrg 1791209ff23fSmrg val = *(INT32 *)value->data; 1792209ff23fSmrg if (val < -MAX_H_POSITION || val > MAX_H_POSITION) 1793209ff23fSmrg return FALSE; 1794209ff23fSmrg 1795b7e1c893Smrg tvout->vPos = val; 1796b7e1c893Smrg if (tvout->tv_on && !IS_AVIVO_VARIANT) 1797209ff23fSmrg RADEONUpdateHVPosition(output, &output->crtc->mode); 1798209ff23fSmrg 1799209ff23fSmrg } else if (property == tv_std_atom) { 1800209ff23fSmrg const char *s; 1801b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 1802b7e1c893Smrg TVStd std = tvout->tvStd; 1803209ff23fSmrg 1804209ff23fSmrg if (value->type != XA_STRING || value->format != 8) 1805209ff23fSmrg return FALSE; 1806209ff23fSmrg s = (char*)value->data; 1807209ff23fSmrg if (value->size == strlen("ntsc") && !strncmp("ntsc", s, strlen("ntsc"))) { 1808b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 1809209ff23fSmrg } else if (value->size == strlen("pal") && !strncmp("pal", s, strlen("pal"))) { 1810b7e1c893Smrg tvout->tvStd = TV_STD_PAL; 1811209ff23fSmrg } else if (value->size == strlen("pal-m") && !strncmp("pal-m", s, strlen("pal-m"))) { 1812b7e1c893Smrg tvout->tvStd = TV_STD_PAL_M; 1813209ff23fSmrg } else if (value->size == strlen("pal-60") && !strncmp("pal-60", s, strlen("pal-60"))) { 1814b7e1c893Smrg tvout->tvStd = TV_STD_PAL_60; 1815209ff23fSmrg } else if (value->size == strlen("ntsc-j") && !strncmp("ntsc-j", s, strlen("ntsc-j"))) { 1816b7e1c893Smrg tvout->tvStd = TV_STD_NTSC_J; 1817209ff23fSmrg } else if (value->size == strlen("scart-pal") && !strncmp("scart-pal", s, strlen("scart-pal"))) { 1818b7e1c893Smrg tvout->tvStd = TV_STD_SCART_PAL; 1819209ff23fSmrg } else if (value->size == strlen("pal-cn") && !strncmp("pal-cn", s, strlen("pal-cn"))) { 1820b7e1c893Smrg tvout->tvStd = TV_STD_PAL_CN; 1821209ff23fSmrg } else if (value->size == strlen("secam") && !strncmp("secam", s, strlen("secam"))) { 1822b7e1c893Smrg tvout->tvStd = TV_STD_SECAM; 1823209ff23fSmrg } else 1824209ff23fSmrg return FALSE; 1825209ff23fSmrg 1826209ff23fSmrg if (!radeon_set_mode_for_property(output)) { 1827b7e1c893Smrg tvout->tvStd = std; 1828209ff23fSmrg (void)radeon_set_mode_for_property(output); 1829209ff23fSmrg return FALSE; 1830209ff23fSmrg } 1831209ff23fSmrg } 1832209ff23fSmrg 1833209ff23fSmrg return TRUE; 1834209ff23fSmrg} 1835209ff23fSmrg 1836209ff23fSmrgstatic const xf86OutputFuncsRec radeon_output_funcs = { 1837209ff23fSmrg .create_resources = radeon_create_resources, 1838209ff23fSmrg .dpms = radeon_dpms, 1839209ff23fSmrg .save = radeon_save, 1840209ff23fSmrg .restore = radeon_restore, 1841209ff23fSmrg .mode_valid = radeon_mode_valid, 1842209ff23fSmrg .mode_fixup = radeon_mode_fixup, 1843209ff23fSmrg .prepare = radeon_mode_prepare, 1844209ff23fSmrg .mode_set = radeon_mode_set, 1845209ff23fSmrg .commit = radeon_mode_commit, 1846209ff23fSmrg .detect = radeon_detect, 1847209ff23fSmrg .get_modes = radeon_get_modes, 1848209ff23fSmrg .set_property = radeon_set_property, 1849209ff23fSmrg .destroy = radeon_destroy 1850209ff23fSmrg}; 1851209ff23fSmrg 1852b7e1c893SmrgBool 1853c503f109SmrgRADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state) 1854209ff23fSmrg{ 1855209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 1856209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1857c503f109Smrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1858209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1859209ff23fSmrg uint32_t temp; 1860209ff23fSmrg 1861b7e1c893Smrg if (lock_state) { 1862c503f109Smrg /* RV410 appears to have a bug where the hw i2c in reset 1863c503f109Smrg * holds the i2c port in a bad state - switch hw i2c away before 1864c503f109Smrg * doing DDC - do this for all r200s/r300s for safety sakes */ 1865c503f109Smrg if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT)) { 1866c503f109Smrg if (pRADEONI2CBus->mask_clk_reg == RADEON_GPIO_MONID) 1867c503f109Smrg OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST | 1868c503f109Smrg R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1))); 1869c503f109Smrg else 1870c503f109Smrg OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST | 1871c503f109Smrg R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3))); 1872c503f109Smrg } 1873c503f109Smrg 1874b7e1c893Smrg temp = INREG(pRADEONI2CBus->a_clk_reg); 1875b7e1c893Smrg temp &= ~(pRADEONI2CBus->a_clk_mask); 1876b7e1c893Smrg OUTREG(pRADEONI2CBus->a_clk_reg, temp); 1877b7e1c893Smrg 1878b7e1c893Smrg temp = INREG(pRADEONI2CBus->a_data_reg); 1879b7e1c893Smrg temp &= ~(pRADEONI2CBus->a_data_mask); 1880b7e1c893Smrg OUTREG(pRADEONI2CBus->a_data_reg, temp); 1881b7e1c893Smrg } 1882b7e1c893Smrg 1883209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_clk_reg); 1884b7e1c893Smrg if (lock_state) 1885b7e1c893Smrg temp |= (pRADEONI2CBus->mask_clk_mask); 1886209ff23fSmrg else 1887b7e1c893Smrg temp &= ~(pRADEONI2CBus->mask_clk_mask); 1888209ff23fSmrg OUTREG(pRADEONI2CBus->mask_clk_reg, temp); 1889209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_clk_reg); 1890209ff23fSmrg 1891209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_data_reg); 1892b7e1c893Smrg if (lock_state) 1893b7e1c893Smrg temp |= (pRADEONI2CBus->mask_data_mask); 1894209ff23fSmrg else 1895b7e1c893Smrg temp &= ~(pRADEONI2CBus->mask_data_mask); 1896209ff23fSmrg OUTREG(pRADEONI2CBus->mask_data_reg, temp); 1897209ff23fSmrg temp = INREG(pRADEONI2CBus->mask_data_reg); 1898209ff23fSmrg 1899209ff23fSmrg return TRUE; 1900209ff23fSmrg} 1901209ff23fSmrg 1902209ff23fSmrgstatic void RADEONI2CGetBits(I2CBusPtr b, int *Clock, int *data) 1903209ff23fSmrg{ 1904209ff23fSmrg ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; 1905209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1906209ff23fSmrg unsigned long val; 1907209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1908209ff23fSmrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1909209ff23fSmrg 1910209ff23fSmrg /* Get the result */ 1911209ff23fSmrg val = INREG(pRADEONI2CBus->get_clk_reg); 1912209ff23fSmrg *Clock = (val & pRADEONI2CBus->get_clk_mask) != 0; 1913209ff23fSmrg val = INREG(pRADEONI2CBus->get_data_reg); 1914209ff23fSmrg *data = (val & pRADEONI2CBus->get_data_mask) != 0; 1915209ff23fSmrg 1916209ff23fSmrg} 1917209ff23fSmrg 1918209ff23fSmrgstatic void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data) 1919209ff23fSmrg{ 1920209ff23fSmrg ScrnInfoPtr pScrn = xf86Screens[b->scrnIndex]; 1921209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 1922209ff23fSmrg unsigned long val; 1923209ff23fSmrg unsigned char *RADEONMMIO = info->MMIO; 1924209ff23fSmrg RADEONI2CBusPtr pRADEONI2CBus = b->DriverPrivate.ptr; 1925209ff23fSmrg 1926209ff23fSmrg val = INREG(pRADEONI2CBus->put_clk_reg) & (uint32_t)~(pRADEONI2CBus->put_clk_mask); 1927209ff23fSmrg val |= (Clock ? 0:pRADEONI2CBus->put_clk_mask); 1928209ff23fSmrg OUTREG(pRADEONI2CBus->put_clk_reg, val); 1929209ff23fSmrg /* read back to improve reliability on some cards. */ 1930209ff23fSmrg val = INREG(pRADEONI2CBus->put_clk_reg); 1931209ff23fSmrg 1932209ff23fSmrg val = INREG(pRADEONI2CBus->put_data_reg) & (uint32_t)~(pRADEONI2CBus->put_data_mask); 1933209ff23fSmrg val |= (data ? 0:pRADEONI2CBus->put_data_mask); 1934209ff23fSmrg OUTREG(pRADEONI2CBus->put_data_reg, val); 1935209ff23fSmrg /* read back to improve reliability on some cards. */ 1936209ff23fSmrg val = INREG(pRADEONI2CBus->put_data_reg); 1937209ff23fSmrg 1938209ff23fSmrg} 1939209ff23fSmrg 1940b7e1c893SmrgBool 1941b7e1c893SmrgRADEONI2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, char *name, RADEONI2CBusPtr pRADEONI2CBus) 1942209ff23fSmrg{ 1943209ff23fSmrg I2CBusPtr pI2CBus; 1944209ff23fSmrg 1945209ff23fSmrg pI2CBus = xf86CreateI2CBusRec(); 1946209ff23fSmrg if (!pI2CBus) return FALSE; 1947209ff23fSmrg 1948209ff23fSmrg pI2CBus->BusName = name; 1949209ff23fSmrg pI2CBus->scrnIndex = pScrn->scrnIndex; 1950209ff23fSmrg pI2CBus->I2CPutBits = RADEONI2CPutBits; 1951209ff23fSmrg pI2CBus->I2CGetBits = RADEONI2CGetBits; 1952b7e1c893Smrg pI2CBus->AcknTimeout = 5; 1953209ff23fSmrg 1954b7e1c893Smrg pI2CBus->DriverPrivate.ptr = (pointer)pRADEONI2CBus; 1955209ff23fSmrg 1956b7e1c893Smrg if (!xf86I2CBusInit(pI2CBus)) 1957b7e1c893Smrg return FALSE; 1958209ff23fSmrg 1959b7e1c893Smrg *bus_ptr = pI2CBus; 1960209ff23fSmrg return TRUE; 1961209ff23fSmrg} 1962209ff23fSmrg 1963b7e1c893SmrgRADEONI2CBusRec 1964b7e1c893Smrglegacy_setup_i2c_bus(int ddc_line) 1965209ff23fSmrg{ 1966b7e1c893Smrg RADEONI2CBusRec i2c; 1967209ff23fSmrg 1968b7e1c893Smrg i2c.hw_line = 0; 1969b7e1c893Smrg i2c.hw_capable = FALSE; 1970b7e1c893Smrg i2c.mask_clk_mask = RADEON_GPIO_EN_1; 1971b7e1c893Smrg i2c.mask_data_mask = RADEON_GPIO_EN_0; 1972b7e1c893Smrg i2c.a_clk_mask = RADEON_GPIO_A_1; 1973b7e1c893Smrg i2c.a_data_mask = RADEON_GPIO_A_0; 1974b7e1c893Smrg i2c.put_clk_mask = RADEON_GPIO_EN_1; 1975b7e1c893Smrg i2c.put_data_mask = RADEON_GPIO_EN_0; 1976b7e1c893Smrg i2c.get_clk_mask = RADEON_GPIO_Y_1; 1977b7e1c893Smrg i2c.get_data_mask = RADEON_GPIO_Y_0; 1978b7e1c893Smrg if ((ddc_line == RADEON_LCD_GPIO_MASK) || 1979b7e1c893Smrg (ddc_line == RADEON_MDGPIO_EN_REG)) { 1980b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 1981b7e1c893Smrg i2c.mask_data_reg = ddc_line; 1982b7e1c893Smrg i2c.a_clk_reg = ddc_line; 1983b7e1c893Smrg i2c.a_data_reg = ddc_line; 1984b7e1c893Smrg i2c.put_clk_reg = ddc_line; 1985b7e1c893Smrg i2c.put_data_reg = ddc_line; 1986b7e1c893Smrg i2c.get_clk_reg = ddc_line + 4; 1987b7e1c893Smrg i2c.get_data_reg = ddc_line + 4; 1988b7e1c893Smrg } else { 1989b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 1990b7e1c893Smrg i2c.mask_data_reg = ddc_line; 1991b7e1c893Smrg i2c.a_clk_reg = ddc_line; 1992b7e1c893Smrg i2c.a_data_reg = ddc_line; 1993b7e1c893Smrg i2c.put_clk_reg = ddc_line; 1994b7e1c893Smrg i2c.put_data_reg = ddc_line; 1995b7e1c893Smrg i2c.get_clk_reg = ddc_line; 1996b7e1c893Smrg i2c.get_data_reg = ddc_line; 1997209ff23fSmrg } 1998b7e1c893Smrg 1999b7e1c893Smrg if (ddc_line) 2000b7e1c893Smrg i2c.valid = TRUE; 2001b7e1c893Smrg else 2002b7e1c893Smrg i2c.valid = FALSE; 2003b7e1c893Smrg 2004b7e1c893Smrg return i2c; 2005209ff23fSmrg} 2006209ff23fSmrg 2007b7e1c893SmrgRADEONI2CBusRec 2008b7e1c893Smrgatom_setup_i2c_bus(int ddc_line) 2009209ff23fSmrg{ 2010b7e1c893Smrg RADEONI2CBusRec i2c; 2011209ff23fSmrg 2012b7e1c893Smrg i2c.hw_line = 0; 2013b7e1c893Smrg i2c.hw_capable = FALSE; 2014b7e1c893Smrg if (ddc_line == AVIVO_GPIO_0) { 2015b7e1c893Smrg i2c.put_clk_mask = (1 << 19); 2016b7e1c893Smrg i2c.put_data_mask = (1 << 18); 2017b7e1c893Smrg i2c.get_clk_mask = (1 << 19); 2018b7e1c893Smrg i2c.get_data_mask = (1 << 18); 2019b7e1c893Smrg i2c.mask_clk_mask = (1 << 19); 2020b7e1c893Smrg i2c.mask_data_mask = (1 << 18); 2021b7e1c893Smrg i2c.a_clk_mask = (1 << 19); 2022b7e1c893Smrg i2c.a_data_mask = (1 << 18); 2023b7e1c893Smrg } else { 2024b7e1c893Smrg i2c.put_clk_mask = (1 << 0); 2025b7e1c893Smrg i2c.put_data_mask = (1 << 8); 2026b7e1c893Smrg i2c.get_clk_mask = (1 << 0); 2027b7e1c893Smrg i2c.get_data_mask = (1 << 8); 2028b7e1c893Smrg i2c.mask_clk_mask = (1 << 0); 2029b7e1c893Smrg i2c.mask_data_mask = (1 << 8); 2030b7e1c893Smrg i2c.a_clk_mask = (1 << 0); 2031b7e1c893Smrg i2c.a_data_mask = (1 << 8); 2032209ff23fSmrg } 2033b7e1c893Smrg i2c.mask_clk_reg = ddc_line; 2034b7e1c893Smrg i2c.mask_data_reg = ddc_line; 2035b7e1c893Smrg i2c.a_clk_reg = ddc_line + 0x4; 2036b7e1c893Smrg i2c.a_data_reg = ddc_line + 0x4; 2037b7e1c893Smrg i2c.put_clk_reg = ddc_line + 0x8; 2038b7e1c893Smrg i2c.put_data_reg = ddc_line + 0x8; 2039b7e1c893Smrg i2c.get_clk_reg = ddc_line + 0xc; 2040b7e1c893Smrg i2c.get_data_reg = ddc_line + 0xc; 2041b7e1c893Smrg if (ddc_line) 2042b7e1c893Smrg i2c.valid = TRUE; 2043b7e1c893Smrg else 2044b7e1c893Smrg i2c.valid = FALSE; 2045209ff23fSmrg 2046b7e1c893Smrg return i2c; 2047209ff23fSmrg} 2048209ff23fSmrg 2049209ff23fSmrgstatic void 2050209ff23fSmrgRADEONGetTVInfo(xf86OutputPtr output) 2051209ff23fSmrg{ 2052209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 2053209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2054209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2055b7e1c893Smrg radeon_tvout_ptr tvout = &radeon_output->tvout; 2056209ff23fSmrg char *optstr; 2057209ff23fSmrg 2058b7e1c893Smrg tvout->hPos = 0; 2059b7e1c893Smrg tvout->vPos = 0; 2060b7e1c893Smrg tvout->hSize = 0; 2061b7e1c893Smrg tvout->tv_on = FALSE; 2062209ff23fSmrg 2063209ff23fSmrg if (!RADEONGetTVInfoFromBIOS(output)) { 2064209ff23fSmrg /* set some reasonable defaults */ 2065b7e1c893Smrg tvout->default_tvStd = TV_STD_NTSC; 2066b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 2067b7e1c893Smrg tvout->TVRefClk = 27.000000000; 2068b7e1c893Smrg tvout->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL; 2069209ff23fSmrg } 2070209ff23fSmrg 2071209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_TVSTD); 2072209ff23fSmrg if (optstr) { 2073209ff23fSmrg if (!strncmp("ntsc", optstr, strlen("ntsc"))) 2074b7e1c893Smrg tvout->tvStd = TV_STD_NTSC; 2075209ff23fSmrg else if (!strncmp("pal", optstr, strlen("pal"))) 2076b7e1c893Smrg tvout->tvStd = TV_STD_PAL; 2077209ff23fSmrg else if (!strncmp("pal-m", optstr, strlen("pal-m"))) 2078b7e1c893Smrg tvout->tvStd = TV_STD_PAL_M; 2079209ff23fSmrg else if (!strncmp("pal-60", optstr, strlen("pal-60"))) 2080b7e1c893Smrg tvout->tvStd = TV_STD_PAL_60; 2081209ff23fSmrg else if (!strncmp("ntsc-j", optstr, strlen("ntsc-j"))) 2082b7e1c893Smrg tvout->tvStd = TV_STD_NTSC_J; 2083209ff23fSmrg else if (!strncmp("scart-pal", optstr, strlen("scart-pal"))) 2084b7e1c893Smrg tvout->tvStd = TV_STD_SCART_PAL; 2085209ff23fSmrg else { 2086209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid TV Standard: %s\n", optstr); 2087209ff23fSmrg } 2088209ff23fSmrg } 2089209ff23fSmrg 2090209ff23fSmrg} 2091209ff23fSmrg 2092209ff23fSmrgvoid RADEONInitConnector(xf86OutputPtr output) 2093209ff23fSmrg{ 2094209ff23fSmrg ScrnInfoPtr pScrn = output->scrn; 2095209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2096209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2097209ff23fSmrg 2098b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) 2099b7e1c893Smrg radeon_output->rmx_type = RMX_FULL; 2100209ff23fSmrg else 2101b7e1c893Smrg radeon_output->rmx_type = RMX_OFF; 2102209ff23fSmrg 2103b7e1c893Smrg /* dce 3.2 chips have problems with low dot clocks, so use the scaler */ 2104b7e1c893Smrg if (IS_DCE32_VARIANT && (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT))) 2105209ff23fSmrg radeon_output->rmx_type = RMX_FULL; 2106209ff23fSmrg 2107b7e1c893Smrg if (!IS_AVIVO_VARIANT) { 2108b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_CRT2_SUPPORT)) { 2109b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_TVDAC_LOAD_DETECT, FALSE)) 2110b7e1c893Smrg radeon_output->load_detection = 1; 2111b7e1c893Smrg } 2112209ff23fSmrg } 2113209ff23fSmrg 2114b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) 2115209ff23fSmrg RADEONGetTVInfo(output); 2116209ff23fSmrg 2117b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_DFP_SUPPORT)) 2118209ff23fSmrg radeon_output->coherent_mode = TRUE; 2119209ff23fSmrg 2120ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_DISPLAY_PORT) { 2121ad43ddacSmrg strcpy(radeon_output->dp_bus_name, output->name); 2122ad43ddacSmrg strcat(radeon_output->dp_bus_name, "-DP"); 2123ad43ddacSmrg RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output); 2124ad43ddacSmrg RADEON_DP_GetSinkType(output); 2125ad43ddacSmrg } 2126ad43ddacSmrg 2127ad43ddacSmrg if (radeon_output->ConnectorType == CONNECTOR_EDP) { 2128ad43ddacSmrg strcpy(radeon_output->dp_bus_name, output->name); 2129ad43ddacSmrg strcat(radeon_output->dp_bus_name, "-eDP"); 2130ad43ddacSmrg RADEON_DP_I2CInit(pScrn, &radeon_output->dp_pI2CBus, radeon_output->dp_bus_name, output); 2131ad43ddacSmrg RADEON_DP_GetSinkType(output); 2132ad43ddacSmrg } 2133ad43ddacSmrg 2134209ff23fSmrg if (radeon_output->ddc_i2c.valid) 2135b7e1c893Smrg RADEONI2CInit(pScrn, &radeon_output->pI2CBus, output->name, &radeon_output->ddc_i2c); 2136209ff23fSmrg 2137209ff23fSmrg} 2138209ff23fSmrg 2139209ff23fSmrg#if defined(__powerpc__) 2140209ff23fSmrgstatic Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) 2141209ff23fSmrg{ 2142209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2143209ff23fSmrg 2144209ff23fSmrg 2145209ff23fSmrg switch (info->MacModel) { 2146209ff23fSmrg case RADEON_MAC_IBOOK: 2147209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2148209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2149209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2150b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2151b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2152b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2153b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2154b7e1c893Smrg 0), 2155b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2156b7e1c893Smrg return FALSE; 2157209ff23fSmrg 2158209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2159b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2160209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2161209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2162b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2163b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2164b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2165b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2166b7e1c893Smrg 2), 2167b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2168b7e1c893Smrg return FALSE; 2169209ff23fSmrg 2170209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2171b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2172209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2173209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2174b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2175b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2176b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2177b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2178b7e1c893Smrg 2), 2179b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2180b7e1c893Smrg return FALSE; 2181209ff23fSmrg return TRUE; 2182209ff23fSmrg case RADEON_MAC_POWERBOOK_EXTERNAL: 2183209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2184209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2185209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2186b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2187b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2188b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2189b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2190b7e1c893Smrg 0), 2191b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2192b7e1c893Smrg return FALSE; 2193209ff23fSmrg 2194209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2195209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2196209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2197b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2198b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2199b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2200b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2201b7e1c893Smrg 1), 2202b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2203b7e1c893Smrg return FALSE; 2204b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2205b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2206b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2207b7e1c893Smrg 0), 2208b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 2209b7e1c893Smrg return FALSE; 2210209ff23fSmrg 2211209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2212b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2213209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2214209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2215b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2216b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2217b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2218b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2219b7e1c893Smrg 2), 2220b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2221b7e1c893Smrg return FALSE; 2222209ff23fSmrg return TRUE; 2223209ff23fSmrg case RADEON_MAC_POWERBOOK_INTERNAL: 2224209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2225209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2226209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2227b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2228b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2229b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2230b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2231b7e1c893Smrg 0), 2232b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2233b7e1c893Smrg return FALSE; 2234209ff23fSmrg 2235209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2236209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2237209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2238b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2239b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2240b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2241b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2242b7e1c893Smrg 1), 2243b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2244b7e1c893Smrg return FALSE; 2245b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2246b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2247b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2248b7e1c893Smrg 0), 2249b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2250b7e1c893Smrg return FALSE; 2251209ff23fSmrg 2252209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2253b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2254209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2255209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2256b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2257b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2258b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2259b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2260b7e1c893Smrg 2), 2261b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2262b7e1c893Smrg return FALSE; 2263209ff23fSmrg return TRUE; 2264209ff23fSmrg case RADEON_MAC_POWERBOOK_VGA: 2265209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2266b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2267209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2268b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2269b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2270b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2271b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2272b7e1c893Smrg 0), 2273b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT)) 2274b7e1c893Smrg return FALSE; 2275209ff23fSmrg 2276209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2277b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2278209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2279b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2280b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2281b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2282b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2283b7e1c893Smrg 1), 2284b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2285b7e1c893Smrg return FALSE; 2286209ff23fSmrg 2287209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2288b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2289209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2290209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2291b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2292b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2293b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2294b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2295b7e1c893Smrg 2), 2296b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2297b7e1c893Smrg return FALSE; 2298209ff23fSmrg return TRUE; 2299209ff23fSmrg case RADEON_MAC_MINI_EXTERNAL: 2300209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2301b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2302209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2303209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2304b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2305b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2306b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2307b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2308b7e1c893Smrg 2), 2309b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2310b7e1c893Smrg return FALSE; 2311b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2312b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2313b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2314b7e1c893Smrg 0), 2315b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 2316b7e1c893Smrg return FALSE; 2317209ff23fSmrg 2318209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_STV; 2319b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2320209ff23fSmrg info->BiosConnector[1].ddc_i2c.valid = FALSE; 2321209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2322b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT; 2323b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2324b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2325b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2326b7e1c893Smrg 2), 2327b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2328b7e1c893Smrg return FALSE; 2329209ff23fSmrg return TRUE; 2330209ff23fSmrg case RADEON_MAC_MINI_INTERNAL: 2331209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2332b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2333209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2334209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2335b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2336b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2337b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2338b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2339b7e1c893Smrg 2), 2340b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2341b7e1c893Smrg return FALSE; 2342b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2343b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2344b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2345b7e1c893Smrg 0), 2346b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2347b7e1c893Smrg return FALSE; 2348209ff23fSmrg 2349209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_STV; 2350b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2351209ff23fSmrg info->BiosConnector[1].ddc_i2c.valid = FALSE; 2352209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2353b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_TV1_SUPPORT; 2354b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2355b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2356b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2357b7e1c893Smrg 2), 2358b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2359b7e1c893Smrg return FALSE; 2360209ff23fSmrg return TRUE; 2361209ff23fSmrg case RADEON_MAC_IMAC_G5_ISIGHT: 2362209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID); 2363209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_D; 2364209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2365b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_DFP1_SUPPORT; 2366b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2367b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2368b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2369b7e1c893Smrg 0), 2370b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2371b7e1c893Smrg return FALSE; 2372209ff23fSmrg 2373209ff23fSmrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2374b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2375b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2376b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2377b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2378b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2379b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2380b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2381b7e1c893Smrg 2), 2382b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2383b7e1c893Smrg return FALSE; 2384b7e1c893Smrg 2385b7e1c893Smrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2386b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2387b7e1c893Smrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2388b7e1c893Smrg info->BiosConnector[2].valid = TRUE; 2389b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2390b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2391b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2392b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2393b7e1c893Smrg 2), 2394b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2395b7e1c893Smrg return FALSE; 2396b7e1c893Smrg return TRUE; 2397b7e1c893Smrg case RADEON_MAC_EMAC: 2398b7e1c893Smrg /* eMac G4 800/1.0 with radeon 7500, no EDID on internal monitor 2399b7e1c893Smrg * later eMac's (G4 1.25/1.42) with radeon 9200 and 9600 may have 2400b7e1c893Smrg * different ddc setups. need to verify 2401b7e1c893Smrg */ 2402b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2403b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2404b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2405b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2406b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2407b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2408b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2409b7e1c893Smrg 1), 2410b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2411b7e1c893Smrg return FALSE; 2412b7e1c893Smrg 2413b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2414b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2415209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2416209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2417b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT2_SUPPORT; 2418b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2419b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2420b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2421b7e1c893Smrg 2), 2422b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT)) 2423b7e1c893Smrg return FALSE; 2424209ff23fSmrg 2425209ff23fSmrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2426b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2427209ff23fSmrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2428209ff23fSmrg info->BiosConnector[2].valid = TRUE; 2429b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2430b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2431b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2432b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2433b7e1c893Smrg 2), 2434b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT)) 2435b7e1c893Smrg return FALSE; 2436209ff23fSmrg return TRUE; 2437209ff23fSmrg default: 2438209ff23fSmrg return FALSE; 2439209ff23fSmrg } 2440209ff23fSmrg 2441209ff23fSmrg return FALSE; 2442209ff23fSmrg} 2443209ff23fSmrg#endif 2444209ff23fSmrg 2445209ff23fSmrgstatic void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn) 2446209ff23fSmrg{ 2447209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2448209ff23fSmrg RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); 2449209ff23fSmrg 2450b7e1c893Smrg if (IS_AVIVO_VARIANT) 2451b7e1c893Smrg return; 2452b7e1c893Smrg 2453209ff23fSmrg if (!pRADEONEnt->HasCRTC2) { 2454209ff23fSmrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2455209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2456209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2457b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2458b7e1c893Smrg radeon_add_encoder(pScrn, 2459b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2460b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2461b7e1c893Smrg 1), 2462b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2463209ff23fSmrg return; 2464209ff23fSmrg } 2465209ff23fSmrg 2466b7e1c893Smrg if (info->IsMobility) { 2467b7e1c893Smrg /* Below is the most common setting, but may not be true */ 2468b7e1c893Smrg if (info->IsIGP) { 2469b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 2470209ff23fSmrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2471209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2472b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2473b7e1c893Smrg radeon_add_encoder(pScrn, 2474b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2475b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2476b7e1c893Smrg 0), 2477b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT); 2478b7e1c893Smrg 2479b7e1c893Smrg /* IGP only has TVDAC */ 2480b7e1c893Smrg if ((info->ChipFamily == CHIP_FAMILY_RS400) || 2481b7e1c893Smrg (info->ChipFamily == CHIP_FAMILY_RS480)) 2482b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2483b7e1c893Smrg else 2484b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2485b7e1c893Smrg info->BiosConnector[1].load_detection = FALSE; 2486209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2487209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2488b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2489b7e1c893Smrg radeon_add_encoder(pScrn, 2490b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2491b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2492b7e1c893Smrg 2), 2493b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2494209ff23fSmrg } else { 2495b7e1c893Smrg#if defined(__powerpc__) 2496b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2497b7e1c893Smrg#else 2498b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 2499b7e1c893Smrg#endif 2500b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; 2501209ff23fSmrg info->BiosConnector[0].valid = TRUE; 2502b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; 2503b7e1c893Smrg radeon_add_encoder(pScrn, 2504b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2505b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT, 2506b7e1c893Smrg 0), 2507b7e1c893Smrg ATOM_DEVICE_LCD1_SUPPORT); 2508209ff23fSmrg 2509b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2510209ff23fSmrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2511209ff23fSmrg info->BiosConnector[1].valid = TRUE; 2512b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2513b7e1c893Smrg radeon_add_encoder(pScrn, 2514b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2515b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2516b7e1c893Smrg 1), 2517b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2518209ff23fSmrg } 2519209ff23fSmrg } else { 2520b7e1c893Smrg /* Below is the most common setting, but may not be true */ 2521b7e1c893Smrg if (info->IsIGP) { 2522b7e1c893Smrg if ((info->ChipFamily == CHIP_FAMILY_RS400) || 2523b7e1c893Smrg (info->ChipFamily == CHIP_FAMILY_RS480)) 2524b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 2525b7e1c893Smrg else 2526b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2527b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2528b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_VGA; 2529b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2530b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT1_SUPPORT; 2531b7e1c893Smrg radeon_add_encoder(pScrn, 2532b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2533b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2534b7e1c893Smrg 1), 2535b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2536b7e1c893Smrg 2537b7e1c893Smrg /* not sure what a good default DDCType for DVI on 2538b7e1c893Smrg * IGP desktop chips is 2539b7e1c893Smrg */ 2540b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_MONID); /* DDC_DVI? */ 2541b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_D; 2542b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2543b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_DFP1_SUPPORT; 2544b7e1c893Smrg radeon_add_encoder(pScrn, 2545b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2546b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2547b7e1c893Smrg 0), 2548b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT); 2549209ff23fSmrg } else { 2550b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2551b7e1c893Smrg info->BiosConnector[0].load_detection = FALSE; 2552b7e1c893Smrg info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; 2553b7e1c893Smrg info->BiosConnector[0].valid = TRUE; 2554b7e1c893Smrg info->BiosConnector[0].devices = ATOM_DEVICE_CRT2_SUPPORT | ATOM_DEVICE_DFP1_SUPPORT; 2555b7e1c893Smrg radeon_add_encoder(pScrn, 2556b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2557b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT, 2558b7e1c893Smrg 2), 2559b7e1c893Smrg ATOM_DEVICE_CRT2_SUPPORT); 2560b7e1c893Smrg radeon_add_encoder(pScrn, 2561b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2562b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2563b7e1c893Smrg 0), 2564b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT); 2565209ff23fSmrg 2566209ff23fSmrg#if defined(__powerpc__) 2567b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2568b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; 2569b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2570b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT | ATOM_DEVICE_DFP2_SUPPORT; 2571b7e1c893Smrg radeon_add_encoder(pScrn, 2572b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2573b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2574b7e1c893Smrg 1), 2575b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2576b7e1c893Smrg radeon_add_encoder(pScrn, 2577b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2578b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 2579b7e1c893Smrg 0), 2580b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT); 2581209ff23fSmrg#else 2582b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2583b7e1c893Smrg info->BiosConnector[1].ConnectorType = CONNECTOR_VGA; 2584b7e1c893Smrg info->BiosConnector[1].valid = TRUE; 2585b7e1c893Smrg info->BiosConnector[1].devices = ATOM_DEVICE_CRT1_SUPPORT; 2586b7e1c893Smrg radeon_add_encoder(pScrn, 2587b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2588b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2589b7e1c893Smrg 1), 2590b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT); 2591209ff23fSmrg#endif 2592209ff23fSmrg } 2593b7e1c893Smrg } 2594209ff23fSmrg 2595b7e1c893Smrg if (info->InternalTVOut) { 2596b7e1c893Smrg info->BiosConnector[2].ConnectorType = CONNECTOR_STV; 2597b7e1c893Smrg info->BiosConnector[2].load_detection = FALSE; 2598b7e1c893Smrg info->BiosConnector[2].ddc_i2c.valid = FALSE; 2599b7e1c893Smrg info->BiosConnector[2].valid = TRUE; 2600b7e1c893Smrg info->BiosConnector[2].devices = ATOM_DEVICE_TV1_SUPPORT; 2601b7e1c893Smrg radeon_add_encoder(pScrn, 2602b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2603b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT, 2604b7e1c893Smrg 2), 2605b7e1c893Smrg ATOM_DEVICE_TV1_SUPPORT); 2606b7e1c893Smrg } 2607209ff23fSmrg 2608b7e1c893Smrg /* Some cards have the DDC lines swapped and we have no way to 2609b7e1c893Smrg * detect it yet (Mac cards) 2610b7e1c893Smrg */ 2611b7e1c893Smrg if (xf86ReturnOptValBool(info->Options, OPTION_REVERSE_DDC, FALSE)) { 2612b7e1c893Smrg info->BiosConnector[0].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 2613b7e1c893Smrg info->BiosConnector[1].ddc_i2c = legacy_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 2614209ff23fSmrg } 2615209ff23fSmrg} 2616209ff23fSmrg 2617209ff23fSmrg#if defined(__powerpc__) 2618209ff23fSmrg 2619ad43ddacSmrg#ifdef __OpenBSD__ 2620ad43ddacSmrg#include <sys/param.h> 2621ad43ddacSmrg#include <sys/sysctl.h> 2622ad43ddacSmrg#endif 2623ad43ddacSmrg 2624209ff23fSmrg/* 2625209ff23fSmrg * Returns RADEONMacModel or 0 based on lines 'detected as' and 'machine' 2626209ff23fSmrg * in /proc/cpuinfo (on Linux) */ 2627209ff23fSmrgstatic RADEONMacModel RADEONDetectMacModel(ScrnInfoPtr pScrn) 2628209ff23fSmrg{ 2629209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2630209ff23fSmrg RADEONMacModel ret = 0; 2631209ff23fSmrg#ifdef __linux__ 2632209ff23fSmrg char cpuline[50]; /* 50 should be sufficient for our purposes */ 2633209ff23fSmrg FILE *f = fopen ("/proc/cpuinfo", "r"); 2634209ff23fSmrg 2635209ff23fSmrg /* Some macs (minis and powerbooks) use internal tmds, others use external tmds 2636209ff23fSmrg * and not just for dual-link TMDS, it shows up with single-link as well. 2637209ff23fSmrg * Unforunately, there doesn't seem to be any good way to figure it out. 2638209ff23fSmrg */ 2639209ff23fSmrg 2640b7e1c893Smrg /* 2641209ff23fSmrg * PowerBook5,[1-5]: external tmds, single-link 2642209ff23fSmrg * PowerBook5,[789]: external tmds, dual-link 2643209ff23fSmrg * PowerBook5,6: external tmds, single-link or dual-link 2644209ff23fSmrg * need to add another option to specify the external tmds chip 2645209ff23fSmrg * or find out what's used and add it. 2646209ff23fSmrg */ 2647209ff23fSmrg 2648209ff23fSmrg 2649209ff23fSmrg if (f != NULL) { 2650209ff23fSmrg while (fgets(cpuline, sizeof cpuline, f)) { 2651209ff23fSmrg if (!strncmp(cpuline, "machine", strlen ("machine"))) { 2652209ff23fSmrg if (strstr(cpuline, "PowerBook5,1") || 2653209ff23fSmrg strstr(cpuline, "PowerBook5,2") || 2654209ff23fSmrg strstr(cpuline, "PowerBook5,3") || 2655209ff23fSmrg strstr(cpuline, "PowerBook5,4") || 2656209ff23fSmrg strstr(cpuline, "PowerBook5,5")) { 2657209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */ 2658209ff23fSmrg info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */ 2659209ff23fSmrg break; 2660209ff23fSmrg } 2661209ff23fSmrg 2662209ff23fSmrg if (strstr(cpuline, "PowerBook5,6")) { 2663209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */ 2664209ff23fSmrg break; 2665209ff23fSmrg } 2666209ff23fSmrg 2667209ff23fSmrg if (strstr(cpuline, "PowerBook5,7") || 2668209ff23fSmrg strstr(cpuline, "PowerBook5,8") || 2669209ff23fSmrg strstr(cpuline, "PowerBook5,9")) { 2670209ff23fSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */ 2671209ff23fSmrg info->ext_tmds_chip = RADEON_SIL_1178; /* guess */ 2672209ff23fSmrg break; 2673209ff23fSmrg } 2674209ff23fSmrg 2675209ff23fSmrg if (strstr(cpuline, "PowerBook3,3")) { 2676209ff23fSmrg ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */ 2677209ff23fSmrg break; 2678209ff23fSmrg } 2679209ff23fSmrg 2680209ff23fSmrg if (strstr(cpuline, "PowerMac10,1")) { 2681209ff23fSmrg ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */ 2682209ff23fSmrg break; 2683209ff23fSmrg } 2684209ff23fSmrg if (strstr(cpuline, "PowerMac10,2")) { 2685209ff23fSmrg ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */ 2686209ff23fSmrg break; 2687209ff23fSmrg } 2688209ff23fSmrg } else if (!strncmp(cpuline, "detected as", strlen("detected as"))) { 2689209ff23fSmrg if (strstr(cpuline, "iBook")) { 2690209ff23fSmrg ret = RADEON_MAC_IBOOK; 2691209ff23fSmrg break; 2692209ff23fSmrg } else if (strstr(cpuline, "PowerBook")) { 2693209ff23fSmrg ret = RADEON_MAC_POWERBOOK_INTERNAL; /* internal tmds */ 2694209ff23fSmrg break; 2695209ff23fSmrg } else if (strstr(cpuline, "iMac G5 (iSight)")) { 2696209ff23fSmrg ret = RADEON_MAC_IMAC_G5_ISIGHT; 2697209ff23fSmrg break; 2698b7e1c893Smrg } else if (strstr(cpuline, "eMac")) { 2699b7e1c893Smrg ret = RADEON_MAC_EMAC; 2700b7e1c893Smrg break; 2701209ff23fSmrg } 2702209ff23fSmrg 2703209ff23fSmrg /* No known PowerMac model detected */ 2704209ff23fSmrg break; 2705209ff23fSmrg } 2706209ff23fSmrg } 2707209ff23fSmrg 2708209ff23fSmrg fclose (f); 2709209ff23fSmrg } else 2710209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 2711209ff23fSmrg "Cannot detect PowerMac model because /proc/cpuinfo not " 2712209ff23fSmrg "readable.\n"); 2713209ff23fSmrg 2714209ff23fSmrg#endif /* __linux */ 2715209ff23fSmrg 2716ad43ddacSmrg#ifdef __OpenBSD__ 2717ad43ddacSmrg char model[32]; 2718ad43ddacSmrg int mib[2]; 2719ad43ddacSmrg size_t len; 2720ad43ddacSmrg 2721ad43ddacSmrg mib[0] = CTL_HW; 2722ad43ddacSmrg mib[1] = HW_PRODUCT; 2723ad43ddacSmrg len = sizeof(model); 2724ad43ddacSmrg if (sysctl(mib, 2, model, &len, NULL, 0) >= 0) { 2725ad43ddacSmrg if (strcmp(model, "PowerBook5,1") == 0 || 2726ad43ddacSmrg strcmp(model, "PowerBook5,2") == 0 || 2727ad43ddacSmrg strcmp(model, "PowerBook5,3") == 0 || 2728ad43ddacSmrg strcmp(model, "PowerBook5,4") == 0 || 2729ad43ddacSmrg strcmp(model, "PowerBook5,5") == 0) { 2730ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* single link */ 2731ad43ddacSmrg info->ext_tmds_chip = RADEON_SIL_164; /* works on 5,2 */ 2732ad43ddacSmrg } 2733ad43ddacSmrg 2734ad43ddacSmrg if (strcmp(model, "PowerBook5,6") == 0) { 2735ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual or single link */ 2736ad43ddacSmrg } 2737ad43ddacSmrg 2738ad43ddacSmrg if (strcmp(model, "PowerBook5,7") || 2739ad43ddacSmrg strcmp(model, "PowerBook5,8") == 0 || 2740ad43ddacSmrg strcmp(model, "PowerBook5,9") == 0) { 2741ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_EXTERNAL; /* dual link */ 2742ad43ddacSmrg info->ext_tmds_chip = RADEON_SIL_1178; /* guess */ 2743ad43ddacSmrg } 2744ad43ddacSmrg 2745ad43ddacSmrg if (strcmp(model, "PowerBook3,3") == 0) { 2746ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_VGA; /* vga rather than dvi */ 2747ad43ddacSmrg } 2748ad43ddacSmrg 2749ad43ddacSmrg if (strcmp(model, "PowerMac10,1") == 0) { 2750ad43ddacSmrg ret = RADEON_MAC_MINI_INTERNAL; /* internal tmds */ 2751ad43ddacSmrg } 2752ad43ddacSmrg 2753ad43ddacSmrg if (strcmp(model, "PowerMac10,2") == 0) { 2754ad43ddacSmrg ret = RADEON_MAC_MINI_EXTERNAL; /* external tmds */ 2755ad43ddacSmrg } 2756ad43ddacSmrg 2757ad43ddacSmrg if (strcmp(model, "PowerBook2,1") == 0 || 2758ad43ddacSmrg strcmp(model, "PowerBook2,2") == 0 || 2759ad43ddacSmrg strcmp(model, "PowerBook4,1") == 0 || 2760ad43ddacSmrg strcmp(model, "PowerBook4,2") == 0 || 2761ad43ddacSmrg strcmp(model, "PowerBook4,3") == 0 || 2762ad43ddacSmrg strcmp(model, "PowerBook6,3") == 0 || 2763ad43ddacSmrg strcmp(model, "PowerBook6,5") == 0 || 2764ad43ddacSmrg strcmp(model, "PowerBook6,7") == 0) { 2765ad43ddacSmrg ret = RADEON_MAC_IBOOK; 2766ad43ddacSmrg } 2767ad43ddacSmrg 2768ad43ddacSmrg if (strcmp(model, "PowerBook1,1") == 0 || 2769ad43ddacSmrg strcmp(model, "PowerBook3,1") == 0 || 2770ad43ddacSmrg strcmp(model, "PowerBook3,2") == 0 || 2771ad43ddacSmrg strcmp(model, "PowerBook3,4") == 0 || 2772ad43ddacSmrg strcmp(model, "PowerBook3,5") == 0) { 2773ad43ddacSmrg ret = RADEON_MAC_POWERBOOK_INTERNAL; 2774ad43ddacSmrg } 2775ad43ddacSmrg 2776ad43ddacSmrg if (strcmp(model, "PowerMac12,1") == 0) { 2777ad43ddacSmrg ret = RADEON_MAC_IMAC_G5_ISIGHT; 2778ad43ddacSmrg } 2779ad43ddacSmrg } 2780ad43ddacSmrg#endif /* __OpenBSD__ */ 2781ad43ddacSmrg 2782209ff23fSmrg if (ret) { 2783209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Detected %s.\n", 2784209ff23fSmrg ret == RADEON_MAC_POWERBOOK_EXTERNAL ? "PowerBook with external DVI" : 2785209ff23fSmrg ret == RADEON_MAC_POWERBOOK_INTERNAL ? "PowerBook with integrated DVI" : 2786209ff23fSmrg ret == RADEON_MAC_POWERBOOK_VGA ? "PowerBook with VGA" : 2787209ff23fSmrg ret == RADEON_MAC_IBOOK ? "iBook" : 2788209ff23fSmrg ret == RADEON_MAC_MINI_EXTERNAL ? "Mac Mini with external DVI" : 2789209ff23fSmrg ret == RADEON_MAC_MINI_INTERNAL ? "Mac Mini with integrated DVI" : 2790209ff23fSmrg "iMac G5 iSight"); 2791209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 2792209ff23fSmrg "If this is not correct, try Option \"MacModel\" and " 2793209ff23fSmrg "consider reporting to the\n"); 2794209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, 2795209ff23fSmrg "xorg-driver-ati@lists.x.org mailing list" 2796209ff23fSmrg#ifdef __linux__ 2797209ff23fSmrg " with the contents of /proc/cpuinfo" 2798209ff23fSmrg#endif 2799209ff23fSmrg ".\n"); 2800209ff23fSmrg } 2801209ff23fSmrg 2802209ff23fSmrg return ret; 2803209ff23fSmrg} 2804209ff23fSmrg 2805209ff23fSmrg#endif /* __powerpc__ */ 2806209ff23fSmrg 2807209ff23fSmrgstatic int 2808209ff23fSmrgradeon_output_clones (ScrnInfoPtr pScrn, xf86OutputPtr output) 2809209ff23fSmrg{ 2810b7e1c893Smrg RADEONInfoPtr info = RADEONPTR(pScrn); 2811209ff23fSmrg RADEONOutputPrivatePtr radeon_output = output->driver_private; 2812209ff23fSmrg xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn); 2813209ff23fSmrg int o; 2814209ff23fSmrg int index_mask = 0; 2815209ff23fSmrg 2816ad43ddacSmrg /* no cloning with zaphod */ 2817ad43ddacSmrg if (info->IsPrimary || info->IsSecondary) 2818ad43ddacSmrg return index_mask; 2819ad43ddacSmrg 2820b7e1c893Smrg /* DIG routing gets problematic */ 2821ad43ddacSmrg if (info->ChipFamily >= CHIP_FAMILY_R600) 2822209ff23fSmrg return index_mask; 2823209ff23fSmrg 2824209ff23fSmrg /* LVDS is too wacky */ 2825b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT)) 2826b7e1c893Smrg return index_mask; 2827b7e1c893Smrg 2828ad43ddacSmrg /* TV requires very specific timing */ 2829b7e1c893Smrg if (radeon_output->devices & (ATOM_DEVICE_TV_SUPPORT)) 2830209ff23fSmrg return index_mask; 2831209ff23fSmrg 2832ad43ddacSmrg /* DVO requires 2x ppll clocks depending on the tmds chip */ 2833ad43ddacSmrg if (radeon_output->devices & (ATOM_DEVICE_DFP2_SUPPORT)) 2834ad43ddacSmrg return index_mask; 2835ad43ddacSmrg 2836209ff23fSmrg for (o = 0; o < config->num_output; o++) { 2837209ff23fSmrg xf86OutputPtr clone = config->output[o]; 2838209ff23fSmrg RADEONOutputPrivatePtr radeon_clone = clone->driver_private; 2839b7e1c893Smrg 2840209ff23fSmrg if (output == clone) /* don't clone yourself */ 2841209ff23fSmrg continue; 2842b7e1c893Smrg else if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT)) /* LVDS */ 2843209ff23fSmrg continue; 2844b7e1c893Smrg else if (radeon_clone->devices & (ATOM_DEVICE_TV_SUPPORT)) /* TV */ 2845209ff23fSmrg continue; 2846209ff23fSmrg else 2847209ff23fSmrg index_mask |= (1 << o); 2848209ff23fSmrg } 2849209ff23fSmrg 2850209ff23fSmrg return index_mask; 2851209ff23fSmrg} 2852209ff23fSmrg 2853b7e1c893Smrgstatic xf86OutputPtr 2854b7e1c893SmrgRADEONOutputCreate(ScrnInfoPtr pScrn, const char *name, int i) 2855b7e1c893Smrg{ 2856b7e1c893Smrg char buf[32]; 2857b7e1c893Smrg sprintf(buf, name, i); 2858b7e1c893Smrg return xf86OutputCreate(pScrn, &radeon_output_funcs, buf); 2859b7e1c893Smrg} 2860b7e1c893Smrg 2861209ff23fSmrg/* 2862209ff23fSmrg * initialise the static data sos we don't have to re-do at randr change */ 2863209ff23fSmrgBool RADEONSetupConnectors(ScrnInfoPtr pScrn) 2864209ff23fSmrg{ 2865209ff23fSmrg xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); 2866209ff23fSmrg RADEONInfoPtr info = RADEONPTR(pScrn); 2867209ff23fSmrg xf86OutputPtr output; 2868209ff23fSmrg char *optstr; 2869b7e1c893Smrg int i; 2870209ff23fSmrg int num_vga = 0; 2871209ff23fSmrg int num_dvi = 0; 2872209ff23fSmrg int num_hdmi = 0; 2873b7e1c893Smrg int num_dp = 0; 2874ad43ddacSmrg int num_edp = 0; 2875209ff23fSmrg 2876209ff23fSmrg /* We first get the information about all connectors from BIOS. 2877209ff23fSmrg * This is how the card is phyiscally wired up. 2878209ff23fSmrg * The information should be correct even on a OEM card. 2879209ff23fSmrg */ 2880209ff23fSmrg for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 2881b7e1c893Smrg info->encoders[i] = NULL; 2882209ff23fSmrg info->BiosConnector[i].valid = FALSE; 2883b7e1c893Smrg info->BiosConnector[i].load_detection = TRUE; 2884b7e1c893Smrg info->BiosConnector[i].shared_ddc = FALSE; 2885209ff23fSmrg info->BiosConnector[i].ddc_i2c.valid = FALSE; 2886209ff23fSmrg info->BiosConnector[i].ConnectorType = CONNECTOR_NONE; 2887b7e1c893Smrg info->BiosConnector[i].devices = 0; 2888209ff23fSmrg } 2889209ff23fSmrg 2890209ff23fSmrg#if defined(__powerpc__) 2891209ff23fSmrg info->MacModel = 0; 2892209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_MAC_MODEL); 2893209ff23fSmrg if (optstr) { 2894209ff23fSmrg if (!strncmp("ibook", optstr, strlen("ibook"))) 2895209ff23fSmrg info->MacModel = RADEON_MAC_IBOOK; 2896209ff23fSmrg else if (!strncmp("powerbook-duallink", optstr, strlen("powerbook-duallink"))) /* alias */ 2897209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL; 2898209ff23fSmrg else if (!strncmp("powerbook-external", optstr, strlen("powerbook-external"))) 2899209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_EXTERNAL; 2900209ff23fSmrg else if (!strncmp("powerbook-internal", optstr, strlen("powerbook-internal"))) 2901209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL; 2902209ff23fSmrg else if (!strncmp("powerbook-vga", optstr, strlen("powerbook-vga"))) 2903209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_VGA; 2904209ff23fSmrg else if (!strncmp("powerbook", optstr, strlen("powerbook"))) /* alias */ 2905209ff23fSmrg info->MacModel = RADEON_MAC_POWERBOOK_INTERNAL; 2906209ff23fSmrg else if (!strncmp("mini-internal", optstr, strlen("mini-internal"))) 2907209ff23fSmrg info->MacModel = RADEON_MAC_MINI_INTERNAL; 2908209ff23fSmrg else if (!strncmp("mini-external", optstr, strlen("mini-external"))) 2909209ff23fSmrg info->MacModel = RADEON_MAC_MINI_EXTERNAL; 2910209ff23fSmrg else if (!strncmp("mini", optstr, strlen("mini"))) /* alias */ 2911209ff23fSmrg info->MacModel = RADEON_MAC_MINI_EXTERNAL; 2912209ff23fSmrg else if (!strncmp("imac-g5-isight", optstr, strlen("imac-g5-isight"))) 2913209ff23fSmrg info->MacModel = RADEON_MAC_IMAC_G5_ISIGHT; 2914b7e1c893Smrg else if (!strncmp("emac", optstr, strlen("emac"))) 2915b7e1c893Smrg info->MacModel = RADEON_MAC_EMAC; 2916209ff23fSmrg else { 2917209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid Mac Model: %s\n", optstr); 2918209ff23fSmrg } 2919209ff23fSmrg } 2920209ff23fSmrg 2921209ff23fSmrg if (!info->MacModel) { 2922209ff23fSmrg info->MacModel = RADEONDetectMacModel(pScrn); 2923209ff23fSmrg } 2924209ff23fSmrg 2925209ff23fSmrg if (info->MacModel){ 2926209ff23fSmrg if (!RADEONSetupAppleConnectors(pScrn)) 2927209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2928209ff23fSmrg } else 2929209ff23fSmrg#endif 2930209ff23fSmrg if (xf86ReturnOptValBool(info->Options, OPTION_DEFAULT_CONNECTOR_TABLE, FALSE)) { 2931209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2932209ff23fSmrg } else { 2933209ff23fSmrg if (!RADEONGetConnectorInfoFromBIOS(pScrn)) 2934209ff23fSmrg RADEONSetupGenericConnectors(pScrn); 2935209ff23fSmrg } 2936209ff23fSmrg 2937209ff23fSmrg /* parse connector table option */ 2938209ff23fSmrg optstr = (char *)xf86GetOptValString(info->Options, OPTION_CONNECTORTABLE); 2939209ff23fSmrg 2940209ff23fSmrg if (optstr) { 2941209ff23fSmrg unsigned int ddc_line[2]; 2942b7e1c893Smrg int DACType[2], TMDSType[2]; 2943209ff23fSmrg 2944209ff23fSmrg for (i = 2; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 2945209ff23fSmrg info->BiosConnector[i].valid = FALSE; 2946209ff23fSmrg } 2947b7e1c893Smrg 2948209ff23fSmrg if (sscanf(optstr, "%u,%u,%u,%u,%u,%u,%u,%u", 2949209ff23fSmrg &ddc_line[0], 2950b7e1c893Smrg &DACType[0], 2951b7e1c893Smrg &TMDSType[0], 2952209ff23fSmrg &info->BiosConnector[0].ConnectorType, 2953209ff23fSmrg &ddc_line[1], 2954b7e1c893Smrg &DACType[1], 2955b7e1c893Smrg &TMDSType[1], 2956209ff23fSmrg &info->BiosConnector[1].ConnectorType) != 8) { 2957209ff23fSmrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid ConnectorTable option: %s\n", optstr); 2958209ff23fSmrg return FALSE; 2959209ff23fSmrg } 2960209ff23fSmrg 2961b7e1c893Smrg for (i = 0; i < 2; i++) { 2962b7e1c893Smrg info->BiosConnector[i].valid = TRUE; 2963b7e1c893Smrg info->BiosConnector[i].ddc_i2c = legacy_setup_i2c_bus(ddc_line[i]); 2964b7e1c893Smrg switch (DACType[i]) { 2965b7e1c893Smrg case 1: 2966b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_CRT1_SUPPORT; 2967b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2968b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2969b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2970b7e1c893Smrg 1), 2971b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2972b7e1c893Smrg return FALSE; 2973b7e1c893Smrg info->BiosConnector[i].load_detection = TRUE; 2974b7e1c893Smrg break; 2975b7e1c893Smrg case 2: 2976b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_CRT2_SUPPORT; 2977b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2978b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2979b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT, 2980b7e1c893Smrg 2), 2981b7e1c893Smrg ATOM_DEVICE_CRT1_SUPPORT)) 2982b7e1c893Smrg return FALSE; 2983b7e1c893Smrg info->BiosConnector[i].load_detection = FALSE; 2984b7e1c893Smrg break; 2985b7e1c893Smrg } 2986b7e1c893Smrg switch (TMDSType[i]) { 2987b7e1c893Smrg case 1: 2988b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_DFP1_SUPPORT; 2989b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2990b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 2991b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT, 2992b7e1c893Smrg 0), 2993b7e1c893Smrg ATOM_DEVICE_DFP1_SUPPORT)) 2994b7e1c893Smrg return FALSE; 2995b7e1c893Smrg break; 2996b7e1c893Smrg case 2: 2997b7e1c893Smrg info->BiosConnector[i].devices |= ATOM_DEVICE_DFP2_SUPPORT; 2998b7e1c893Smrg if (!radeon_add_encoder(pScrn, 2999b7e1c893Smrg radeon_get_encoder_id_from_supported_device(pScrn, 3000b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT, 3001b7e1c893Smrg 0), 3002b7e1c893Smrg ATOM_DEVICE_DFP2_SUPPORT)) 3003b7e1c893Smrg return FALSE; 3004b7e1c893Smrg break; 3005b7e1c893Smrg } 3006b7e1c893Smrg } 3007209ff23fSmrg } 3008209ff23fSmrg 3009209ff23fSmrg for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 3010209ff23fSmrg if (info->BiosConnector[i].valid) { 3011b7e1c893Smrg RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType; 3012b7e1c893Smrg if ((conntype == CONNECTOR_DVI_D) || 3013b7e1c893Smrg (conntype == CONNECTOR_DVI_I) || 3014ad43ddacSmrg (conntype == CONNECTOR_DVI_A) || 3015ad43ddacSmrg (conntype == CONNECTOR_HDMI_TYPE_B)) { 3016209ff23fSmrg num_dvi++; 3017b7e1c893Smrg } else if (conntype == CONNECTOR_VGA) { 3018209ff23fSmrg num_vga++; 3019ad43ddacSmrg } else if (conntype == CONNECTOR_HDMI_TYPE_A) { 3020209ff23fSmrg num_hdmi++; 3021b7e1c893Smrg } else if (conntype == CONNECTOR_DISPLAY_PORT) { 3022b7e1c893Smrg num_dp++; 3023ad43ddacSmrg } else if (conntype == CONNECTOR_EDP) { 3024ad43ddacSmrg num_edp++; 3025209ff23fSmrg } 3026209ff23fSmrg } 3027209ff23fSmrg } 3028209ff23fSmrg 3029209ff23fSmrg for (i = 0 ; i < RADEON_MAX_BIOS_CONNECTOR; i++) { 3030209ff23fSmrg if (info->BiosConnector[i].valid) { 3031209ff23fSmrg RADEONOutputPrivatePtr radeon_output; 3032b7e1c893Smrg RADEONConnectorType conntype = info->BiosConnector[i].ConnectorType; 3033209ff23fSmrg 3034b7e1c893Smrg if (conntype == CONNECTOR_NONE) 3035209ff23fSmrg continue; 3036209ff23fSmrg 3037209ff23fSmrg radeon_output = xnfcalloc(sizeof(RADEONOutputPrivateRec), 1); 3038209ff23fSmrg if (!radeon_output) { 3039209ff23fSmrg return FALSE; 3040209ff23fSmrg } 3041209ff23fSmrg radeon_output->MonType = MT_UNKNOWN; 3042b7e1c893Smrg radeon_output->ConnectorType = conntype; 3043209ff23fSmrg radeon_output->devices = info->BiosConnector[i].devices; 3044209ff23fSmrg radeon_output->ddc_i2c = info->BiosConnector[i].ddc_i2c; 3045209ff23fSmrg radeon_output->igp_lane_info = info->BiosConnector[i].igp_lane_info; 3046b7e1c893Smrg radeon_output->shared_ddc = info->BiosConnector[i].shared_ddc; 3047b7e1c893Smrg radeon_output->load_detection = info->BiosConnector[i].load_detection; 3048b7e1c893Smrg radeon_output->linkb = info->BiosConnector[i].linkb; 3049ad43ddacSmrg radeon_output->dig_encoder = -1; 3050b7e1c893Smrg radeon_output->connector_id = info->BiosConnector[i].connector_object; 3051ad43ddacSmrg radeon_output->connector_object_id = info->BiosConnector[i].connector_object_id; 3052ad43ddacSmrg radeon_output->ucI2cId = info->BiosConnector[i].ucI2cId; 3053ad43ddacSmrg radeon_output->hpd_id = info->BiosConnector[i].hpd_id; 3054b7e1c893Smrg 3055ad43ddacSmrg /* Technically HDMI-B is a glorfied DL DVI so the bios is correct, 3056ad43ddacSmrg * but this can be confusing to users when it comes to output names, 3057ad43ddacSmrg * so call it DVI 3058ad43ddacSmrg */ 3059b7e1c893Smrg if ((conntype == CONNECTOR_DVI_D) || 3060b7e1c893Smrg (conntype == CONNECTOR_DVI_I) || 3061ad43ddacSmrg (conntype == CONNECTOR_DVI_A) || 3062ad43ddacSmrg (conntype == CONNECTOR_HDMI_TYPE_B)) { 3063b7e1c893Smrg output = RADEONOutputCreate(pScrn, "DVI-%d", --num_dvi); 3064b7e1c893Smrg } else if (conntype == CONNECTOR_VGA) { 3065b7e1c893Smrg output = RADEONOutputCreate(pScrn, "VGA-%d", --num_vga); 3066ad43ddacSmrg } else if (conntype == CONNECTOR_HDMI_TYPE_A) { 3067b7e1c893Smrg output = RADEONOutputCreate(pScrn, "HDMI-%d", --num_hdmi); 3068b7e1c893Smrg } else if (conntype == CONNECTOR_DISPLAY_PORT) { 3069b7e1c893Smrg output = RADEONOutputCreate(pScrn, "DisplayPort-%d", --num_dp); 3070ad43ddacSmrg } else if (conntype == CONNECTOR_EDP) { 3071ad43ddacSmrg output = RADEONOutputCreate(pScrn, "eDP-%d", --num_edp); 3072b7e1c893Smrg } else { 3073b7e1c893Smrg output = RADEONOutputCreate(pScrn, 3074b7e1c893Smrg ConnectorTypeName[conntype], 0); 3075b7e1c893Smrg } 3076209ff23fSmrg 3077209ff23fSmrg if (!output) { 3078209ff23fSmrg return FALSE; 3079209ff23fSmrg } 3080209ff23fSmrg output->driver_private = radeon_output; 3081ad43ddacSmrg if (IS_DCE4_VARIANT) { 3082ad43ddacSmrg output->possible_crtcs = 0x3f; 3083ad43ddacSmrg } else { 3084ad43ddacSmrg output->possible_crtcs = 1; 3085ad43ddacSmrg /* crtc2 can drive LVDS, it just doesn't have RMX */ 3086ad43ddacSmrg if (!(radeon_output->devices & (ATOM_DEVICE_LCD_SUPPORT))) 3087ad43ddacSmrg output->possible_crtcs |= 2; 3088ad43ddacSmrg } 3089209ff23fSmrg 3090b7e1c893Smrg /* we can clone the DACs, and probably TV-out, 3091209ff23fSmrg but I'm not sure it's worth the trouble */ 3092209ff23fSmrg output->possible_clones = 0; 3093209ff23fSmrg 3094209ff23fSmrg RADEONInitConnector(output); 3095209ff23fSmrg } 3096209ff23fSmrg } 3097209ff23fSmrg 3098209ff23fSmrg for (i = 0; i < xf86_config->num_output; i++) { 3099209ff23fSmrg xf86OutputPtr output = xf86_config->output[i]; 3100209ff23fSmrg 3101209ff23fSmrg output->possible_clones = radeon_output_clones(pScrn, output); 3102ad43ddacSmrg RADEONGetHardCodedEDIDFromFile(output); 3103209ff23fSmrg } 3104209ff23fSmrg 3105209ff23fSmrg return TRUE; 3106209ff23fSmrg} 3107209ff23fSmrg 3108