radeon_probe.h revision 6322c902
1209ff23fSmrg/*
2209ff23fSmrg * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3209ff23fSmrg *                VA Linux Systems Inc., Fremont, California.
4209ff23fSmrg *
5209ff23fSmrg * All Rights Reserved.
6209ff23fSmrg *
7209ff23fSmrg * Permission is hereby granted, free of charge, to any person obtaining
8209ff23fSmrg * a copy of this software and associated documentation files (the
9209ff23fSmrg * "Software"), to deal in the Software without restriction, including
10209ff23fSmrg * without limitation on the rights to use, copy, modify, merge,
11209ff23fSmrg * publish, distribute, sublicense, and/or sell copies of the Software,
12209ff23fSmrg * and to permit persons to whom the Software is furnished to do so,
13209ff23fSmrg * subject to the following conditions:
14209ff23fSmrg *
15209ff23fSmrg * The above copyright notice and this permission notice (including the
16209ff23fSmrg * next paragraph) shall be included in all copies or substantial
17209ff23fSmrg * portions of the Software.
18209ff23fSmrg *
19209ff23fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20209ff23fSmrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21209ff23fSmrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
22209ff23fSmrg * NON-INFRINGEMENT.  IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR
23209ff23fSmrg * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
24209ff23fSmrg * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
25209ff23fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26209ff23fSmrg * DEALINGS IN THE SOFTWARE.
27209ff23fSmrg */
28209ff23fSmrg
29209ff23fSmrg/*
30209ff23fSmrg * Authors:
31209ff23fSmrg *   Kevin E. Martin <martin@xfree86.org>
32209ff23fSmrg *
33209ff23fSmrg * Modified by Marc Aurele La France <tsi@xfree86.org> for ATI driver merge.
34209ff23fSmrg */
35209ff23fSmrg
36209ff23fSmrg#ifndef _RADEON_PROBE_H_
37209ff23fSmrg#define _RADEON_PROBE_H_ 1
38209ff23fSmrg
39209ff23fSmrg#include <stdint.h>
406322c902Smrg#include "xorg-server.h"
41209ff23fSmrg#include "xf86str.h"
42209ff23fSmrg#include "xf86DDC.h"
43209ff23fSmrg#include "randrstr.h"
44209ff23fSmrg
45209ff23fSmrg#include "xf86Crtc.h"
46209ff23fSmrg
476322c902Smrg#ifdef XSERVER_PLATFORM_BUS
486322c902Smrg#include "xf86platformBus.h"
496322c902Smrg#endif
506322c902Smrg
5168105dcbSveego#include "compat-api.h"
52209ff23fSmrg#include "exa.h"
53209ff23fSmrg
54209ff23fSmrgextern DriverRec RADEON;
55209ff23fSmrg
5640732134Srjstypedef enum {
5740732134Srjs    CHIP_FAMILY_UNKNOW,
5840732134Srjs    CHIP_FAMILY_LEGACY,
5940732134Srjs    CHIP_FAMILY_RADEON,
6040732134Srjs    CHIP_FAMILY_RV100,
6140732134Srjs    CHIP_FAMILY_RS100,    /* U1 (IGP320M) or A3 (IGP320)*/
6240732134Srjs    CHIP_FAMILY_RV200,
6340732134Srjs    CHIP_FAMILY_RS200,    /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350), RS250 (IGP 7000) */
6440732134Srjs    CHIP_FAMILY_R200,
6540732134Srjs    CHIP_FAMILY_RV250,
6640732134Srjs    CHIP_FAMILY_RS300,    /* RS300/RS350 */
6740732134Srjs    CHIP_FAMILY_RV280,
6840732134Srjs    CHIP_FAMILY_R300,
6940732134Srjs    CHIP_FAMILY_R350,
7040732134Srjs    CHIP_FAMILY_RV350,
7140732134Srjs    CHIP_FAMILY_RV380,    /* RV370/RV380/M22/M24 */
7240732134Srjs    CHIP_FAMILY_R420,     /* R420/R423/M18 */
7340732134Srjs    CHIP_FAMILY_RV410,    /* RV410, M26 */
7440732134Srjs    CHIP_FAMILY_RS400,    /* xpress 200, 200m (RS400) Intel */
7540732134Srjs    CHIP_FAMILY_RS480,    /* xpress 200, 200m (RS410/480/482/485) AMD */
7640732134Srjs    CHIP_FAMILY_RV515,    /* rv515 */
7740732134Srjs    CHIP_FAMILY_R520,    /* r520 */
7840732134Srjs    CHIP_FAMILY_RV530,    /* rv530 */
7940732134Srjs    CHIP_FAMILY_R580,    /* r580 */
8040732134Srjs    CHIP_FAMILY_RV560,   /* rv560 */
8140732134Srjs    CHIP_FAMILY_RV570,   /* rv570 */
8240732134Srjs    CHIP_FAMILY_RS600,
8340732134Srjs    CHIP_FAMILY_RS690,
8440732134Srjs    CHIP_FAMILY_RS740,
8540732134Srjs    CHIP_FAMILY_R600,    /* r600 */
8640732134Srjs    CHIP_FAMILY_RV610,
8740732134Srjs    CHIP_FAMILY_RV630,
8840732134Srjs    CHIP_FAMILY_RV670,
8940732134Srjs    CHIP_FAMILY_RV620,
9040732134Srjs    CHIP_FAMILY_RV635,
9140732134Srjs    CHIP_FAMILY_RS780,
9240732134Srjs    CHIP_FAMILY_RS880,
9340732134Srjs    CHIP_FAMILY_RV770,   /* r700 */
9440732134Srjs    CHIP_FAMILY_RV730,
9540732134Srjs    CHIP_FAMILY_RV710,
9640732134Srjs    CHIP_FAMILY_RV740,
9740732134Srjs    CHIP_FAMILY_CEDAR,   /* evergreen */
9840732134Srjs    CHIP_FAMILY_REDWOOD,
9940732134Srjs    CHIP_FAMILY_JUNIPER,
10040732134Srjs    CHIP_FAMILY_CYPRESS,
10140732134Srjs    CHIP_FAMILY_HEMLOCK,
10240732134Srjs    CHIP_FAMILY_PALM,
10340732134Srjs    CHIP_FAMILY_SUMO,
10440732134Srjs    CHIP_FAMILY_SUMO2,
10540732134Srjs    CHIP_FAMILY_BARTS,
10640732134Srjs    CHIP_FAMILY_TURKS,
10740732134Srjs    CHIP_FAMILY_CAICOS,
10840732134Srjs    CHIP_FAMILY_CAYMAN,
10940732134Srjs    CHIP_FAMILY_ARUBA,
1106322c902Smrg    CHIP_FAMILY_TAHITI,
1116322c902Smrg    CHIP_FAMILY_PITCAIRN,
1126322c902Smrg    CHIP_FAMILY_VERDE,
1136322c902Smrg    CHIP_FAMILY_OLAND,
1146322c902Smrg    CHIP_FAMILY_HAINAN,
1156322c902Smrg    CHIP_FAMILY_BONAIRE,
1166322c902Smrg    CHIP_FAMILY_KAVERI,
1176322c902Smrg    CHIP_FAMILY_KABINI,
1186322c902Smrg    CHIP_FAMILY_HAWAII,
1196322c902Smrg    CHIP_FAMILY_MULLINS,
12040732134Srjs    CHIP_FAMILY_LAST
12140732134Srjs} RADEONChipFamily;
12240732134Srjs
12340732134Srjstypedef struct {
12440732134Srjs    uint32_t pci_device_id;
12540732134Srjs    RADEONChipFamily chip_family;
12640732134Srjs    int mobility;
12740732134Srjs    int igp;
12840732134Srjs    int nocrtc2;
12940732134Srjs    int nointtvout;
13040732134Srjs    int singledac;
13140732134Srjs} RADEONCardInfo;
13240732134Srjs
133209ff23fSmrgtypedef struct
134209ff23fSmrg{
135209ff23fSmrg    Bool              HasCRTC2;         /* All cards except original Radeon  */
136209ff23fSmrg
137ad43ddacSmrg    int fd;                             /* for sharing across zaphod heads   */
1386322c902Smrg    int fd_ref;
13940732134Srjs    unsigned long     fd_wakeup_registered; /* server generation for which fd has been registered for wakeup handling */
1406322c902Smrg    int fd_wakeup_ref;
1416322c902Smrg    unsigned int assigned_crtcs;
1426322c902Smrg#ifdef XSERVER_PLATFORM_BUS
1436322c902Smrg    struct xf86_platform_device *platform_dev;
144209ff23fSmrg#endif
1456322c902Smrg} RADEONEntRec, *RADEONEntPtr;
146209ff23fSmrg
147209ff23fSmrgextern const OptionInfoRec *RADEONOptionsWeak(void);
148209ff23fSmrg
149ad43ddacSmrgextern Bool                 RADEONPreInit_KMS(ScrnInfoPtr, int);
15068105dcbSveegoextern Bool                 RADEONScreenInit_KMS(SCREEN_INIT_ARGS_DECL);
15168105dcbSveegoextern Bool                 RADEONSwitchMode_KMS(SWITCH_MODE_ARGS_DECL);
15268105dcbSveegoextern void                 RADEONAdjustFrame_KMS(ADJUST_FRAME_ARGS_DECL);
15368105dcbSveegoextern Bool                 RADEONEnterVT_KMS(VT_FUNC_ARGS_DECL);
15468105dcbSveegoextern void                 RADEONLeaveVT_KMS(VT_FUNC_ARGS_DECL);
15568105dcbSveegoextern void RADEONFreeScreen_KMS(FREE_SCREEN_ARGS_DECL);
156ad43ddacSmrg
1576322c902Smrgextern ModeStatus RADEONValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode,
1586322c902Smrg			   Bool verbose, int flag);
159209ff23fSmrg#endif /* _RADEON_PROBE_H_ */
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