ct_bank.c revision c06b6b69
1/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_bank.c,v 1.6 2002/01/25 21:55:58 tsi Exp $ */ 2 3/* 4 * Copyright 1997 5 * Digital Equipment Corporation. All rights reserved. 6 * This software is furnished under license and may be used and copied only in 7 * accordance with the following terms and conditions. Subject to these 8 * conditions, you may download, copy, install, use, modify and distribute 9 * this software in source and/or binary form. No title or ownership is 10 * transferred hereby. 11 * 1) Any source code used, modified or distributed must reproduce and retain 12 * this copyright notice and list of conditions as they appear in the 13 * source file. 14 * 15 * 2) No right is granted to use any trade name, trademark, or logo of Digital 16 * Equipment Corporation. Neither the "Digital Equipment Corporation" name 17 * nor any trademark or logo of Digital Equipment Corporation may be used 18 * to endorse or promote products derived from this software without the 19 * prior written permission of Digital Equipment Corporation. 20 * 21 * 3) This software is provided "AS-IS" and any express or implied warranties, 22 * including but not limited to, any implied warranties of merchantability, 23 * fitness for a particular purpose, or non-infringement are disclaimed. In 24 * no event shall DIGITAL be liable for any damages whatsoever, and in 25 * particular, DIGITAL shall not be liable for special, indirect, 26 * consequential, or incidental damages or damages for lost profits, loss 27 * of revenue or loss of use, whether such damages arise in contract, 28 * negligence, tort, under statute, in equity, at law or otherwise, even if 29 * advised of the possibility of such damage. 30 */ 31 32#ifdef HAVE_CONFIG_H 33#include "config.h" 34#endif 35 36#define PSZ 8 37 38/* 39 * Define DIRECT_REGISTER_ACCESS if you want to bypass the wrapped register 40 * access functions 41 */ 42/* #define DIRECT_REGISTER_ACCESS */ 43 44/* All drivers should typically include these */ 45#include "xf86.h" 46#include "xf86_OSproc.h" 47 48/* Everything using inb/outb, etc needs "compiler.h" */ 49#include "compiler.h" 50 51/* Drivers for PCI hardware need this */ 52#include "xf86PciInfo.h" 53 54/* Drivers that need to access the PCI config space directly need this */ 55#include "xf86Pci.h" 56 57/* Driver specific headers */ 58#include "ct_driver.h" 59 60#if defined(__arm32__) && defined(__NetBSD__) 61#include <machine/sysarch.h> 62#define arm32_drain_writebuf() sysarch(1, 0) 63#elif defined(__arm32__) 64#define arm32_drain_writebuf() 65#endif 66 67#define ChipsBank(pScreen) CHIPSPTR(xf86Screens[pScreen->myNum])->Bank 68 69#ifdef DIRECT_REGISTER_ACCESS 70int 71CHIPSSetRead(ScreenPtr pScreen, int bank) 72{ 73 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 74 75 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10)); 76 77#ifdef __arm32__ 78 /* Must drain StrongARM write buffer on bank switch! */ 79 if (bank != ChipsBank(pScreen)) { 80 arm32_drain_writebuf(); 81 ChipsBank(pScreen) = bank; 82 } 83#endif 84 85 return 0; 86} 87 88 89int 90CHIPSSetWrite(ScreenPtr pScreen, int bank) 91{ 92 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 93 94 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11)); 95 96#ifdef __arm32__ 97 /* Must drain StrongARM write buffer on bank switch! */ 98 if (bank != ChipsBank(pScreen)) { 99 arm32_drain_writebuf(); 100 ChipsBank(pScreen) = bank; 101 } 102#endif 103 104 return 0; 105} 106 107 108int 109CHIPSSetReadWrite(ScreenPtr pScreen, int bank) 110{ 111 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 112 113 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10)); 114 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11)); 115 116#ifdef __arm32__ 117 /* Must drain StrongARM write buffer on bank switch! */ 118 if (bank != ChipsBank(pScreen)) { 119 arm32_drain_writebuf(); 120 ChipsBank(pScreen) = bank; 121 } 122#endif 123 124 return 0; 125} 126 127int 128CHIPSSetReadPlanar(ScreenPtr pScreen, int bank) 129{ 130 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 131 132 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10)); 133 134#ifdef __arm32__ 135 /* Must drain StrongARM write buffer on bank switch! */ 136 if (bank != ChipsBank(pScreen)) { 137 arm32_drain_writebuf(); 138 ChipsBank(pScreen) = bank; 139 } 140#endif 141 142 return 0; 143} 144 145int 146CHIPSSetWritePlanar(ScreenPtr pScreen, int bank) 147{ 148 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 149 150 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11)); 151 152#ifdef __arm32__ 153 /* Must drain StrongARM write buffer on bank switch! */ 154 if (bank != ChipsBank(pScreen)) { 155 arm32_drain_writebuf(); 156 ChipsBank(pScreen) = bank; 157 } 158#endif 159 160 return 0; 161} 162 163int 164CHIPSSetReadWritePlanar(ScreenPtr pScreen, int bank) 165{ 166 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 167 168 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10)); 169 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11)); 170 171#ifdef __arm32__ 172 /* Must drain StrongARM write buffer on bank switch! */ 173 if (bank != ChipsBank(pScreen)) { 174 arm32_drain_writebuf(); 175 ChipsBank(pScreen) = bank; 176 } 177#endif 178 179 return 0; 180} 181 182int 183CHIPSWINSetRead(ScreenPtr pScreen, int bank) 184{ 185 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 186 register unsigned char tmp; 187 188 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10)); 189 outb(cPtr->PIOBase + 0x3D6, 0x0C); 190 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xEF; 191 outw(cPtr->PIOBase + 0x3D6, (((((bank >> 1) & 0x10) | tmp) << 8) | 0x0C)); 192 193#ifdef __arm32__ 194 /* Must drain StrongARM write buffer on bank switch! */ 195 if (bank != ChipsBank(pScreen)) { 196 arm32_drain_writebuf(); 197 ChipsBank(pScreen) = bank; 198 } 199#endif 200 201 return 0; 202} 203 204 205int 206CHIPSWINSetWrite(ScreenPtr pScreen, int bank) 207{ 208 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 209 register unsigned char tmp; 210 211 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11)); 212 outb(cPtr->PIOBase + 0x3D6, 0x0C); 213 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xBF; 214 outw(cPtr->PIOBase + 0x3D6, (((((bank << 1) & 0x40) | tmp) << 8) | 0x0C)); 215 216#ifdef __arm32__ 217 /* Must drain StrongARM write buffer on bank switch! */ 218 if (bank != ChipsBank(pScreen)) { 219 arm32_drain_writebuf(); 220 ChipsBank(pScreen) = bank; 221 } 222#endif 223 224 return 0; 225} 226 227int 228CHIPSWINSetReadWrite(ScreenPtr pScreen, int bank) 229{ 230 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 231 register unsigned char tmp; 232 233 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10)); 234 outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11)); 235 outb(cPtr->PIOBase + 0x3D6, 0x0C); 236 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xAF; 237 outw(cPtr->PIOBase + 0x3D6, 238 (((((bank << 1) & 0x40) | ((bank >> 1) & 0x10) | tmp) << 8) | 0x0C)); 239 240#ifdef __arm32__ 241 /* Must drain StrongARM write buffer on bank switch! */ 242 if (bank != ChipsBank(pScreen)) { 243 arm32_drain_writebuf(); 244 ChipsBank(pScreen) = bank; 245 } 246#endif 247 248 return 0; 249} 250 251int 252CHIPSWINSetReadPlanar(ScreenPtr pScreen, int bank) 253{ 254 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 255 register unsigned char tmp; 256 257 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10)); 258 outb(cPtr->PIOBase + 0x3D6, 0x0C); 259 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xEF; 260 outw(cPtr->PIOBase + 0x3D6, (((((bank << 1) & 0x10) | tmp) << 8) | 0x0C)); 261 262#ifdef __arm32__ 263 /* Must drain StrongARM write buffer on bank switch! */ 264 if (bank != ChipsBank(pScreen)) { 265 arm32_drain_writebuf(); 266 ChipsBank(pScreen) = bank; 267 } 268#endif 269 270 return 0; 271} 272 273int 274CHIPSWINSetWritePlanar(ScreenPtr pScreen, int bank) 275{ 276 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 277 register unsigned char tmp; 278 279 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11)); 280 outb(cPtr->PIOBase + 0x3D6, 0x0C); 281 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xBF; 282 outw(cPtr->PIOBase + 0x3D6, (((((bank << 3) & 0x40) | tmp) << 8) | 0x0C)); 283 284#ifdef __arm32__ 285 /* Must drain StrongARM write buffer on bank switch! */ 286 if (bank != ChipsBank(pScreen)) { 287 arm32_drain_writebuf(); 288 ChipsBank(pScreen) = bank; 289 } 290#endif 291 292 return 0; 293} 294 295int 296CHIPSWINSetReadWritePlanar(ScreenPtr pScreen, int bank) 297{ 298 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 299 register unsigned char tmp; 300 301 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10)); 302 outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11)); 303 outb(cPtr->PIOBase + 0x3D6, 0x0C); 304 tmp = inb(cPtr->PIOBase + 0x3D7) & 0xAF; 305 outw(cPtr->PIOBase + 0x3D6, 306 (((((bank << 3) & 0x40) | ((bank << 1) & 0x10) | tmp) << 8) | 0x0C)); 307 308#ifdef __arm32__ 309 /* Must drain StrongARM write buffer on bank switch! */ 310 if (bank != ChipsBank(pScreen)) { 311 arm32_drain_writebuf(); 312 ChipsBank(pScreen) = bank; 313 } 314#endif 315 316 return 0; 317} 318 319int 320CHIPSHiQVSetReadWrite(ScreenPtr pScreen, int bank) 321{ 322 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 323 324 outw(cPtr->PIOBase + 0x3D6, (((bank & 0x7F) << 8) | 0x0E)); 325 326#ifdef __arm32__ 327 /* Must drain StrongARM write buffer on bank switch! */ 328 if (bank != ChipsBank(pScreen)) { 329 arm32_drain_writebuf(); 330 ChipsBank(pScreen) = bank; 331 } 332#endif 333 334 return 0; 335} 336 337int 338CHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen, int bank) 339{ 340 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 341 342 outw(cPtr->PIOBase + 0x3D6, ((((bank << 2) & 0x7F) << 8) | 0x0E)); 343 344#ifdef __arm32__ 345 /* Must drain StrongARM write buffer on bank switch! */ 346 if (bank != ChipsBank(pScreen)) { 347 arm32_drain_writebuf(); 348 ChipsBank(pScreen) = bank; 349 } 350#endif 351 352 return 0; 353} 354 355#else /* DIRECT_REGISTER_ACCESS */ 356 357int 358CHIPSSetRead(ScreenPtr pScreen, int bank) 359{ 360 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 361 362 cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF)); 363 364#ifdef __arm32__ 365 /* Must drain StrongARM write buffer on bank switch! */ 366 if (bank != cPtr->Bank) { 367 arm32_drain_writebuf(); 368 cPtr->Bank = bank; 369 } 370#endif 371 372 return 0; 373} 374 375 376int 377CHIPSSetWrite(ScreenPtr pScreen, int bank) 378{ 379 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 380 381 cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF)); 382 383#ifdef __arm32__ 384 /* Must drain StrongARM write buffer on bank switch! */ 385 if (bank != cPtr->Bank) { 386 arm32_drain_writebuf(); 387 cPtr->Bank = bank; 388 } 389#endif 390 391 return 0; 392} 393 394 395int 396CHIPSSetReadWrite(ScreenPtr pScreen, int bank) 397{ 398 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 399 400 cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF)); 401 cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF)); 402 403#ifdef __arm32__ 404 /* Must drain StrongARM write buffer on bank switch! */ 405 if (bank != cPtr->Bank) { 406 arm32_drain_writebuf(); 407 cPtr->Bank = bank; 408 } 409#endif 410 411 return 0; 412} 413 414int 415CHIPSSetReadPlanar(ScreenPtr pScreen, int bank) 416{ 417 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 418 419 cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF)); 420 421#ifdef __arm32__ 422 /* Must drain StrongARM write buffer on bank switch! */ 423 if (bank != cPtr->Bank) { 424 arm32_drain_writebuf(); 425 cPtr->Bank = bank; 426 } 427#endif 428 429 return 0; 430} 431 432int 433CHIPSSetWritePlanar(ScreenPtr pScreen, int bank) 434{ 435 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 436 437 cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF)); 438 439#ifdef __arm32__ 440 /* Must drain StrongARM write buffer on bank switch! */ 441 if (bank != cPtr->Bank) { 442 arm32_drain_writebuf(); 443 cPtr->Bank = bank; 444 } 445#endif 446 447 return 0; 448} 449 450int 451CHIPSSetReadWritePlanar(ScreenPtr pScreen, int bank) 452{ 453 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 454 455 cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF)); 456 cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF)); 457 458#ifdef __arm32__ 459 /* Must drain StrongARM write buffer on bank switch! */ 460 if (bank != cPtr->Bank) { 461 arm32_drain_writebuf(); 462 cPtr->Bank = bank; 463 } 464#endif 465 466 return 0; 467} 468 469int 470CHIPSWINSetRead(ScreenPtr pScreen, int bank) 471{ 472 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 473 register unsigned char tmp; 474 475 cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF)); 476 tmp = cPtr->readXR(cPtr, 0x0C) & 0xEF; 477 cPtr->writeXR(cPtr, 0x0C, ((bank >> 1) & 0x10) | tmp); 478 479#ifdef __arm32__ 480 /* Must drain StrongARM write buffer on bank switch! */ 481 if (bank != cPtr->Bank) { 482 arm32_drain_writebuf(); 483 cPtr->Bank = bank; 484 } 485#endif 486 487 return 0; 488} 489 490 491int 492CHIPSWINSetWrite(ScreenPtr pScreen, int bank) 493{ 494 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 495 register unsigned char tmp; 496 497 cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF)); 498 tmp = cPtr->readXR(cPtr, 0x0C) & 0xBF; 499 cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x40) | tmp); 500 501#ifdef __arm32__ 502 /* Must drain StrongARM write buffer on bank switch! */ 503 if (bank != cPtr->Bank) { 504 arm32_drain_writebuf(); 505 cPtr->Bank = bank; 506 } 507#endif 508 509 return 0; 510} 511 512int 513CHIPSWINSetReadWrite(ScreenPtr pScreen, int bank) 514{ 515 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 516 register unsigned char tmp; 517 518 cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF)); 519 cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF)); 520 tmp = cPtr->readXR(cPtr, 0x0C) & 0xAF; 521 cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x40) | ((bank >> 1) & 0x10) | tmp); 522 523#ifdef __arm32__ 524 /* Must drain StrongARM write buffer on bank switch! */ 525 if (bank != cPtr->Bank) { 526 arm32_drain_writebuf(); 527 cPtr->Bank = bank; 528 } 529#endif 530 531 return 0; 532} 533 534int 535CHIPSWINSetReadPlanar(ScreenPtr pScreen, int bank) 536{ 537 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 538 register unsigned char tmp; 539 540 cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF)); 541 tmp = cPtr->readXR(cPtr, 0x0C) & 0xEF; 542 cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x10) | tmp); 543 544#ifdef __arm32__ 545 /* Must drain StrongARM write buffer on bank switch! */ 546 if (bank != cPtr->Bank) { 547 arm32_drain_writebuf(); 548 cPtr->Bank = bank; 549 } 550#endif 551 552 return 0; 553} 554 555int 556CHIPSWINSetWritePlanar(ScreenPtr pScreen, int bank) 557{ 558 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 559 register unsigned char tmp; 560 561 cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF)); 562 tmp = cPtr->readXR(cPtr, 0x0C) & 0xBF; 563 cPtr->writeXR(cPtr, 0x0C, ((bank << 3) & 0x40) | tmp); 564 565#ifdef __arm32__ 566 /* Must drain StrongARM write buffer on bank switch! */ 567 if (bank != cPtr->Bank) { 568 arm32_drain_writebuf(); 569 cPtr->Bank = bank; 570 } 571#endif 572 573 return 0; 574} 575 576int 577CHIPSWINSetReadWritePlanar(ScreenPtr pScreen, int bank) 578{ 579 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 580 register unsigned char tmp; 581 582 cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF)); 583 cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF)); 584 tmp = cPtr->readXR(cPtr, 0x0C) & 0xAF; 585 cPtr->writeXR(cPtr, 0x0C, ((bank << 3) & 0x40) | ((bank << 1) & 0x10) | tmp); 586 587#ifdef __arm32__ 588 /* Must drain StrongARM write buffer on bank switch! */ 589 if (bank != cPtr->Bank) { 590 arm32_drain_writebuf(); 591 cPtr->Bank = bank; 592 } 593#endif 594 595 return 0; 596} 597 598int 599CHIPSHiQVSetReadWrite(ScreenPtr pScreen, int bank) 600{ 601 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 602 603 cPtr->writeXR(cPtr, 0x0E, bank & 0x7F); 604 605#ifdef __arm32__ 606 /* Must drain StrongARM write buffer on bank switch! */ 607 if (bank != cPtr->Bank) { 608 arm32_drain_writebuf(); 609 cPtr->Bank = bank; 610 } 611#endif 612 613 return 0; 614} 615 616int 617CHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen, int bank) 618{ 619 CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]); 620 621 cPtr->writeXR(cPtr, 0x0E, (bank << 2) & 0x7F); 622 623#ifdef __arm32__ 624 /* Must drain StrongARM write buffer on bank switch! */ 625 if (bank != cPtr->Bank) { 626 arm32_drain_writebuf(); 627 cPtr->Bank = bank; 628 } 629#endif 630 631 return 0; 632} 633#endif 634