19f4658d1Smrg/* 29f4658d1Smrg * Copyright 2007 George Sapountzis 39f4658d1Smrg * 49f4658d1Smrg * Permission is hereby granted, free of charge, to any person obtaining a 59f4658d1Smrg * copy of this software and associated documentation files (the "Software"), 69f4658d1Smrg * to deal in the Software without restriction, including without limitation 79f4658d1Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 89f4658d1Smrg * and/or sell copies of the Software, and to permit persons to whom the 99f4658d1Smrg * Software is furnished to do so, subject to the following conditions: 109f4658d1Smrg * 119f4658d1Smrg * The above copyright notice and this permission notice (including the next 129f4658d1Smrg * paragraph) shall be included in all copies or substantial portions of the 139f4658d1Smrg * Software. 149f4658d1Smrg * 159f4658d1Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 169f4658d1Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 179f4658d1Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 189f4658d1Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 199f4658d1Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 209f4658d1Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 219f4658d1Smrg * SOFTWARE. 229f4658d1Smrg */ 239f4658d1Smrg 249f4658d1Smrg/** 259f4658d1Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess 269f4658d1Smrg * library. The main purpose being to facilitate source code compatibility. 279f4658d1Smrg */ 289f4658d1Smrg 299f4658d1Smrg#ifndef CIRPCIRENAME_H 309f4658d1Smrg#define CIRPCIRENAME_H 319f4658d1Smrg 329f4658d1Smrgenum region_type { 339f4658d1Smrg REGION_MEM, 349f4658d1Smrg REGION_IO 359f4658d1Smrg}; 369f4658d1Smrg 379f4658d1Smrg#ifndef XSERVER_LIBPCIACCESS 389f4658d1Smrg 399f4658d1Smrg/* pciVideoPtr */ 409f4658d1Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor) 419f4658d1Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) 429f4658d1Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) 439f4658d1Smrg 449f4658d1Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) 459f4658d1Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) 469f4658d1Smrg 479f4658d1Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ 489f4658d1Smrg (_pcidev)->device, \ 499f4658d1Smrg (_pcidev)->func) 509f4658d1Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 519f4658d1Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device) 529f4658d1Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 539f4658d1Smrg 549f4658d1Smrg/* pciConfigPtr */ 559f4658d1Smrg#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag) 569f4658d1Smrg#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum) 579f4658d1Smrg#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum) 589f4658d1Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum) 599f4658d1Smrg 609f4658d1Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */ 619f4658d1Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) \ 629f4658d1Smrg (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \ 639f4658d1Smrg : (_pcidev)->ioBase[(_b)]) 649f4658d1Smrg 659f4658d1Smrg/* region size: xfree86 uses the log2 of the region size, 669f4658d1Smrg * but with zero meaning no region, not size of one XXX */ 679f4658d1Smrg#define PCI_REGION_SIZE(_pcidev, _b) \ 689f4658d1Smrg (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) 699f4658d1Smrg 709f4658d1Smrg/* read/write PCI configuration space */ 719f4658d1Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 729f4658d1Smrg *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) 739f4658d1Smrg 749f4658d1Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 759f4658d1Smrg *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) 769f4658d1Smrg 779f4658d1Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 789f4658d1Smrg pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value)) 799f4658d1Smrg 809f4658d1Smrg#else /* XSERVER_LIBPCIACCESS */ 819f4658d1Smrg 829f4658d1Smrgtypedef struct pci_device *pciVideoPtr; 839f4658d1Smrg 849f4658d1Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id) 859f4658d1Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) 869f4658d1Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) 879f4658d1Smrg 889f4658d1Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) 899f4658d1Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) 909f4658d1Smrg 919f4658d1Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 929f4658d1Smrg#define PCI_DEV_TAG(_pcidev) (_pcidev) 939f4658d1Smrg 949f4658d1Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */ 959f4658d1Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 969f4658d1Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev) 979f4658d1Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 989f4658d1Smrg 999f4658d1Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 1009f4658d1Smrg#define PCI_CFG_TAG(_pcidev) (_pcidev) 1019f4658d1Smrg 1029f4658d1Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */ 1039f4658d1Smrg#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \ 1049f4658d1Smrg (_pcidev)->bus) 1059f4658d1Smrg#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev) 1069f4658d1Smrg#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func) 1079f4658d1Smrg 1089f4658d1Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) 1099f4658d1Smrg#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) 1109f4658d1Smrg 1119f4658d1Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 1129f4658d1Smrg pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) 1139f4658d1Smrg 1149f4658d1Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 1159f4658d1Smrg pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) 1169f4658d1Smrg 1179f4658d1Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 1189f4658d1Smrg pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) 1199f4658d1Smrg 1209f4658d1Smrg#endif /* XSERVER_LIBPCIACCESS */ 1219f4658d1Smrg 1229f4658d1Smrg#endif /* CIRPCIRENAME_H */ 123