11ae1b5e8Smrg/* 21ae1b5e8Smrg * Copyright 2007 George Sapountzis 31ae1b5e8Smrg * 41ae1b5e8Smrg * Permission is hereby granted, free of charge, to any person obtaining a 51ae1b5e8Smrg * copy of this software and associated documentation files (the "Software"), 61ae1b5e8Smrg * to deal in the Software without restriction, including without limitation 71ae1b5e8Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 81ae1b5e8Smrg * and/or sell copies of the Software, and to permit persons to whom the 91ae1b5e8Smrg * Software is furnished to do so, subject to the following conditions: 101ae1b5e8Smrg * 111ae1b5e8Smrg * The above copyright notice and this permission notice (including the next 121ae1b5e8Smrg * paragraph) shall be included in all copies or substantial portions of the 131ae1b5e8Smrg * Software. 141ae1b5e8Smrg * 151ae1b5e8Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 161ae1b5e8Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 171ae1b5e8Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 181ae1b5e8Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 191ae1b5e8Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 201ae1b5e8Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 211ae1b5e8Smrg * SOFTWARE. 221ae1b5e8Smrg */ 231ae1b5e8Smrg 241ae1b5e8Smrg/** 251ae1b5e8Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess 261ae1b5e8Smrg * library. The main purpose being to facilitate source code compatibility. 271ae1b5e8Smrg */ 281ae1b5e8Smrg 291ae1b5e8Smrg#ifndef CIRPCIRENAME_H 301ae1b5e8Smrg#define CIRPCIRENAME_H 311ae1b5e8Smrg 321ae1b5e8Smrgenum region_type { 331ae1b5e8Smrg REGION_MEM, 341ae1b5e8Smrg REGION_IO 351ae1b5e8Smrg}; 361ae1b5e8Smrg 3763847c39Smrg#include "xf86Module.h" 3863847c39Smrg 3963847c39Smrg#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) >= 12 4063847c39Smrg 4163847c39Smrg#if (defined(__alpha__) || defined(__ia64__)) && defined (linux) 4263847c39Smrg#define PCI_DOM_MASK 0x01fful 4363847c39Smrg#else 4463847c39Smrg#define PCI_DOM_MASK 0x0ffu 4563847c39Smrg#endif 4663847c39Smrg 4763847c39Smrg#ifndef PCI_DOM_MASK 4863847c39Smrg# define PCI_DOM_MASK 0x0ffu 4963847c39Smrg#endif 5063847c39Smrg#define PCI_DOMBUS_MASK (((PCI_DOM_MASK) << 8) | 0x0ffu) 5163847c39Smrg 5263847c39Smrgstatic inline uint32_t 5363847c39SmrgpciTag(int busnum, int devnum, int funcnum) 5463847c39Smrg{ 5563847c39Smrg uint32_t tag; 5663847c39Smrg tag = (busnum & (PCI_DOMBUS_MASK)) << 16; 5763847c39Smrg tag |= (devnum & 0x00001fu) << 11; 5863847c39Smrg tag |= (funcnum & 0x000007u) << 8; 5963847c39Smrg 6063847c39Smrg return tag; 6163847c39Smrg} 6263847c39Smrg#endif /* GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) >= 12 */ 6363847c39Smrg 641ae1b5e8Smrg#ifndef XSERVER_LIBPCIACCESS 651ae1b5e8Smrg 661ae1b5e8Smrg/* pciVideoPtr */ 671ae1b5e8Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor) 681ae1b5e8Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType) 691ae1b5e8Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev) 701ae1b5e8Smrg 711ae1b5e8Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor) 721ae1b5e8Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard) 731ae1b5e8Smrg 741ae1b5e8Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \ 751ae1b5e8Smrg (_pcidev)->device, \ 761ae1b5e8Smrg (_pcidev)->func) 771ae1b5e8Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 781ae1b5e8Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device) 791ae1b5e8Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 801ae1b5e8Smrg 811ae1b5e8Smrg/* pciConfigPtr */ 821ae1b5e8Smrg#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag) 831ae1b5e8Smrg#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum) 841ae1b5e8Smrg#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum) 851ae1b5e8Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum) 861ae1b5e8Smrg 871ae1b5e8Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */ 881ae1b5e8Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) \ 891ae1b5e8Smrg (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \ 901ae1b5e8Smrg : (_pcidev)->ioBase[(_b)]) 911ae1b5e8Smrg 921ae1b5e8Smrg/* region size: xfree86 uses the log2 of the region size, 931ae1b5e8Smrg * but with zero meaning no region, not size of one XXX */ 941ae1b5e8Smrg#define PCI_REGION_SIZE(_pcidev, _b) \ 951ae1b5e8Smrg (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0) 961ae1b5e8Smrg 971ae1b5e8Smrg/* read/write PCI configuration space */ 981ae1b5e8Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 991ae1b5e8Smrg *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset)) 1001ae1b5e8Smrg 1011ae1b5e8Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 1021ae1b5e8Smrg *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset)) 1031ae1b5e8Smrg 1041ae1b5e8Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 1051ae1b5e8Smrg pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value)) 1061ae1b5e8Smrg 1071ae1b5e8Smrg#else /* XSERVER_LIBPCIACCESS */ 1081ae1b5e8Smrg 1091ae1b5e8Smrgtypedef struct pci_device *pciVideoPtr; 1101ae1b5e8Smrg 1111ae1b5e8Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id) 1121ae1b5e8Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id) 1131ae1b5e8Smrg#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision) 1141ae1b5e8Smrg 1151ae1b5e8Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id) 1161ae1b5e8Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id) 1171ae1b5e8Smrg 1181ae1b5e8Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 1191ae1b5e8Smrg#define PCI_DEV_TAG(_pcidev) (_pcidev) 1201ae1b5e8Smrg 1211ae1b5e8Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */ 1221ae1b5e8Smrg#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus) 1231ae1b5e8Smrg#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev) 1241ae1b5e8Smrg#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func) 1251ae1b5e8Smrg 1261ae1b5e8Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */ 1271ae1b5e8Smrg#define PCI_CFG_TAG(_pcidev) (_pcidev) 1281ae1b5e8Smrg 1291ae1b5e8Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */ 1301ae1b5e8Smrg#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \ 1311ae1b5e8Smrg (_pcidev)->bus) 1321ae1b5e8Smrg#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev) 1331ae1b5e8Smrg#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func) 1341ae1b5e8Smrg 1351ae1b5e8Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr) 1361ae1b5e8Smrg#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size) 1371ae1b5e8Smrg 1381ae1b5e8Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \ 1391ae1b5e8Smrg pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset)) 1401ae1b5e8Smrg 1411ae1b5e8Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \ 1421ae1b5e8Smrg pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset)) 1431ae1b5e8Smrg 1441ae1b5e8Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \ 1451ae1b5e8Smrg pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) 1461ae1b5e8Smrg 1471ae1b5e8Smrg#endif /* XSERVER_LIBPCIACCESS */ 1481ae1b5e8Smrg 14963847c39Smrg#ifndef _XF86_PCIINFO_H 15063847c39Smrg 15163847c39Smrg#define PCI_VENDOR_CIRRUS 0x1013 15263847c39Smrg/* Cirrus Logic */ 15363847c39Smrg#define PCI_CHIP_GD7548 0x0038 15463847c39Smrg#define PCI_CHIP_GD7555 0x0040 15563847c39Smrg#define PCI_CHIP_GD7556 0x004C 15663847c39Smrg#define PCI_CHIP_GD5430 0x00A0 15763847c39Smrg#define PCI_CHIP_GD5434_4 0x00A4 15863847c39Smrg#define PCI_CHIP_GD5434_8 0x00A8 15963847c39Smrg#define PCI_CHIP_GD5436 0x00AC 16063847c39Smrg#define PCI_CHIP_GD5446 0x00B8 16163847c39Smrg#define PCI_CHIP_GD5480 0x00BC 16263847c39Smrg#define PCI_CHIP_GD5462 0x00D0 16363847c39Smrg#define PCI_CHIP_GD5464 0x00D4 16463847c39Smrg#define PCI_CHIP_GD5464BD 0x00D5 16563847c39Smrg#define PCI_CHIP_GD5465 0x00D6 16663847c39Smrg#define PCI_CHIP_6729 0x1100 16763847c39Smrg#define PCI_CHIP_6832 0x1110 16863847c39Smrg#define PCI_CHIP_GD7542 0x1200 16963847c39Smrg#define PCI_CHIP_GD7543 0x1202 17063847c39Smrg#define PCI_CHIP_GD7541 0x1204 17163847c39Smrg 17263847c39Smrg#endif 1731ae1b5e8Smrg#endif /* CIRPCIRENAME_H */ 174