cir_pcirename.h revision 63847c39 
1/*
2 * Copyright 2007 George Sapountzis
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24/**
25 * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
26 * library. The main purpose being to facilitate source code compatibility.
27 */
28
29#ifndef CIRPCIRENAME_H
30#define CIRPCIRENAME_H
31
32enum region_type {
33    REGION_MEM,
34    REGION_IO
35};
36
37#include "xf86Module.h"
38
39#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) >= 12
40
41#if (defined(__alpha__) || defined(__ia64__)) && defined (linux)
42#define PCI_DOM_MASK    0x01fful
43#else
44#define PCI_DOM_MASK 0x0ffu
45#endif
46
47#ifndef PCI_DOM_MASK
48# define PCI_DOM_MASK 0x0ffu
49#endif
50#define PCI_DOMBUS_MASK (((PCI_DOM_MASK) << 8) | 0x0ffu)
51
52static inline uint32_t
53pciTag(int busnum, int devnum, int funcnum)
54{
55	uint32_t tag;
56	tag  = (busnum & (PCI_DOMBUS_MASK)) << 16;
57	tag |= (devnum & 0x00001fu) << 11;
58	tag |= (funcnum & 0x000007u) << 8;
59
60	return tag;
61}
62#endif /* GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) >= 12 */
63
64#ifndef XSERVER_LIBPCIACCESS
65
66/* pciVideoPtr */
67#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
68#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
69#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
70
71#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
72#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
73
74#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
75                                    (_pcidev)->device, \
76                                    (_pcidev)->func)
77#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
78#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
79#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
80
81/* pciConfigPtr */
82#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
83#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
84#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
85#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
86
87/* region addr: xfree86 uses different fields for memory regions and I/O ports */
88#define PCI_REGION_BASE(_pcidev, _b, _type)             \
89    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
90                             : (_pcidev)->ioBase[(_b)])
91
92/* region size: xfree86 uses the log2 of the region size,
93 * but with zero meaning no region, not size of one XXX */
94#define PCI_REGION_SIZE(_pcidev, _b) \
95    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
96
97/* read/write PCI configuration space */
98#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
99    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
100
101#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
102    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
103
104#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
105    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
106
107#else /* XSERVER_LIBPCIACCESS */
108
109typedef struct pci_device *pciVideoPtr;
110
111#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
112#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
113#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
114
115#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
116#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
117
118/* pci-rework functions take a 'pci_device' parameter instead of a tag */
119#define PCI_DEV_TAG(_pcidev)        (_pcidev)
120
121/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
122#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
123#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
124#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
125
126/* pci-rework functions take a 'pci_device' parameter instead of a tag */
127#define PCI_CFG_TAG(_pcidev)        (_pcidev)
128
129/* PCI_CFG macros, typically used in DRI init, contain the domain */
130#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
131                                    (_pcidev)->bus)
132#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
133#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
134
135#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
136#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
137
138#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
139    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
140
141#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
142    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
143
144#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
145    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
146
147#endif /* XSERVER_LIBPCIACCESS */
148
149#ifndef _XF86_PCIINFO_H
150
151#define PCI_VENDOR_CIRRUS		0x1013
152/* Cirrus Logic */
153#define PCI_CHIP_GD7548			0x0038
154#define PCI_CHIP_GD7555			0x0040
155#define PCI_CHIP_GD7556                 0x004C
156#define PCI_CHIP_GD5430			0x00A0
157#define PCI_CHIP_GD5434_4		0x00A4
158#define PCI_CHIP_GD5434_8		0x00A8
159#define PCI_CHIP_GD5436			0x00AC
160#define PCI_CHIP_GD5446			0x00B8
161#define PCI_CHIP_GD5480			0x00BC
162#define PCI_CHIP_GD5462			0x00D0
163#define PCI_CHIP_GD5464			0x00D4
164#define PCI_CHIP_GD5464BD		0x00D5
165#define PCI_CHIP_GD5465			0x00D6
166#define PCI_CHIP_6729			0x1100
167#define PCI_CHIP_6832			0x1110
168#define PCI_CHIP_GD7542			0x1200
169#define PCI_CHIP_GD7543			0x1202
170#define PCI_CHIP_GD7541			0x1204
171
172#endif
173#endif /* CIRPCIRENAME_H */
174