init_gu1.c revision 04007eba 
1/* Copyright (c) 2005 Advanced Micro Devices, Inc.
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to
5 * deal in the Software without restriction, including without limitation the
6 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
7 * sell copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
18 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
19 * IN THE SOFTWARE.
20 *
21 * Neither the name of the Advanced Micro Devices, Inc. nor the names of its
22 * contributors may be used to endorse or promote products derived from this
23 * software without specific prior written permission.
24 * */
25
26/*
27 * This file contains routines used in the initialization of Geode-family
28 * processors.
29 * */
30
31/*----------------------------------------------------------------------------
32 * gfx_gxm_config_read
33 *
34 * This routine reads the value of the specified GXm configuration register.
35 *----------------------------------------------------------------------------
36 */
37unsigned char
38gfx_gxm_config_read(unsigned char index)
39{
40    unsigned char value = 0xFF;
41    unsigned char lock;
42
43    OUTB(0x22, GXM_CONFIG_CCR3);
44    lock = INB(0x23);
45    OUTB(0x22, GXM_CONFIG_CCR3);
46    OUTB(0x23, (unsigned char) (lock | 0x10));
47    OUTB(0x22, index);
48    value = INB(0x23);
49    OUTB(0x22, GXM_CONFIG_CCR3);
50    OUTB(0x23, lock);
51    return (value);
52}
53
54/*----------------------------------------------------------------------------
55 * gfx_get_core_freq
56 *
57 * This routine returns the core clock frequency of a GXm if valid jumper
58 * settings are detected; 0 It assumes that a 33.3 MHz PCI clock is being used
59 * for GX1.
60 * For SCx2xx, the fast PCI divisor is read.
61 *----------------------------------------------------------------------------
62 */
63#if GFX_INIT_DYNAMIC
64unsigned long
65gu1_get_core_freq(void)
66#else
67unsigned long
68gfx_get_core_freq(void)
69#endif
70{
71    unsigned char dir0, dir1;
72    unsigned long cpu_speed;
73
74    dir0 = gfx_gxm_config_read(GXM_CONFIG_DIR0) & 0x0F;
75    dir1 = gfx_gxm_config_read(GXM_CONFIG_DIR1);
76
77    /* REVISION 4.0 AND UP */
78
79    if (dir1 >= 0x50) {
80        switch (dir0) {
81        case 0:
82        case 2:
83            cpu_speed = 133;
84            break;
85        case 5:
86            cpu_speed = 166;
87            break;
88        case 3:
89            cpu_speed = 200;
90            break;
91        case 6:
92            cpu_speed = 233;
93            break;
94        case 7:
95            cpu_speed = 266;
96            break;
97        case 4:
98            cpu_speed = 300;
99            break;
100        case 1:
101            cpu_speed = 333;
102            break;
103        default:
104            return (0);
105        }
106    }
107    else {
108        switch (dir0) {
109        case 0:
110        case 2:
111            cpu_speed = 133;
112            break;
113        case 7:
114            cpu_speed = 166;
115            break;
116        case 1:
117        case 3:
118            cpu_speed = 200;
119            break;
120        case 4:
121        case 6:
122            cpu_speed = 233;
123            break;
124        case 5:
125            cpu_speed = 266;
126            break;
127        default:
128            return (0);
129        }
130    }
131
132    if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200) {
133        cpu_speed = (cpu_speed * gfx_pci_speed_khz) / 33300;
134    }
135    return (cpu_speed);
136}
137
138/*----------------------------------------------------------------------------
139 * gfx_get_cpu_register_base
140 *
141 * This routine returns the base address for graphics registers.
142 *----------------------------------------------------------------------------
143 */
144#if GFX_INIT_DYNAMIC
145unsigned long
146gu1_get_cpu_register_base(void)
147#else
148unsigned long
149gfx_get_cpu_register_base(void)
150#endif
151{
152    unsigned long base;
153
154    base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
155    base = (base & 0x03) << 30;
156    return (base);
157}
158
159/*----------------------------------------------------------------------------
160 * gfx_get_frame_buffer_base
161 *
162 * This routine returns the base address for graphics memory.  This is an
163 * offset of 0x00800000 from the base address specified in the GCR register.
164 *
165 * The function returns zero if the GCR indicates the graphics subsystem
166 * is disabled.
167 *----------------------------------------------------------------------------
168 */
169#if GFX_INIT_DYNAMIC
170unsigned long
171gu1_get_frame_buffer_base(void)
172#else
173unsigned long
174gfx_get_frame_buffer_base(void)
175#endif
176{
177    unsigned long base;
178
179    base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
180    base = (base & 0x03) << 30;
181    if (base)
182        base |= 0x00800000;
183    return (base);
184}
185
186/*----------------------------------------------------------------------------
187 * gfx_get_frame_buffer_size
188 *
189 * This routine returns the total size of graphics memory, in bytes.
190 *
191 * Currently this routine is hardcoded to return 2 Meg.
192 *----------------------------------------------------------------------------
193 */
194#if GFX_INIT_DYNAMIC
195unsigned long
196gu1_get_frame_buffer_size(void)
197#else
198unsigned long
199gfx_get_frame_buffer_size(void)
200#endif
201{
202#if FB4MB
203    return (0x00400000);
204#else
205    return (0x00200000);
206#endif
207}
208
209/*----------------------------------------------------------------------------
210 * gfx_get_vid_register_base
211 *
212 * This routine returns the base address for the video hardware.  It assumes
213 * an offset of 0x00010000 from the base address specified by the GCR.
214 *
215 * The function returns zero if the GCR indicates the graphics subsystem
216 * is disabled.
217 *----------------------------------------------------------------------------
218 */
219#if GFX_INIT_DYNAMIC
220unsigned long
221gu1_get_vid_register_base(void)
222#else
223unsigned long
224gfx_get_vid_register_base(void)
225#endif
226{
227    unsigned long base;
228
229    base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
230    base = (base & 0x03) << 30;
231    if (base)
232        base |= 0x00010000;
233    return (base);
234}
235
236/*----------------------------------------------------------------------------
237 * gfx_get_vip_register_base
238 *
239 * This routine returns the base address for the VIP hardware.  This is
240 * only applicable to the SC1200, for which this routine assumes an offset
241 * of 0x00015000 from the base address specified by the GCR.
242 *
243 * The function returns zero if the GCR indicates the graphics subsystem
244 * is disabled.
245 *----------------------------------------------------------------------------
246 */
247#if GFX_INIT_DYNAMIC
248unsigned long
249gu1_get_vip_register_base(void)
250#else
251unsigned long
252gfx_get_vip_register_base(void)
253#endif
254{
255    unsigned long base = 0;
256
257    if ((gfx_cpu_version & 0xFF) == GFX_CPU_SC1200) {
258        base = (unsigned long) gfx_gxm_config_read(GXM_CONFIG_GCR);
259        base = (base & 0x03) << 30;
260        if (base)
261            base |= 0x00015000;
262    }
263    return (base);
264}
265
266/* END OF FILE */
267