TIramdac.c revision 1fb744b4 
1/*
2 * Copyright 1998-2001 by Alan Hourihane, Wigan, England.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that
7 * copyright notice and this permission notice appear in supporting
8 * documentation, and that the name of Alan Hourihane not be used in
9 * advertising or publicity pertaining to distribution of the software without
10 * specific, written prior permission.  Alan Hourihane makes no representations
11 * about the suitability of this software for any purpose.  It is provided
12 * "as is" without express or implied warranty.
13 *
14 * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20 * PERFORMANCE OF THIS SOFTWARE.
21 *
22 * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
23 *
24 * Modified from IBMramdac.c to support TI RAMDAC routines
25 *   by Jens Owen, <jens@tungstengraphics.com>.
26 *
27 * glintOutTIIndReg() and glintInTIIndReg() are used to access
28 * the indirect TI RAMDAC registers only.
29 */
30
31#ifdef HAVE_CONFIG_H
32#include "config.h"
33#endif
34
35#include "xf86.h"
36#include "xf86_OSproc.h"
37
38#include "xf86Pci.h"
39
40#include "TI.h"
41#include "glint_regs.h"
42#include "glint.h"
43
44#define TI_WRITE_ADDR            0x4000
45#define TI_RAMDAC_DATA           0x4008
46#define TI_PIXEL_MASK            0x4010
47#define TI_READ_ADDR             0x4018
48#define TI_CURS_COLOR_WRITE_ADDR 0x4020
49#define TI_CURS_COLOR_DATA       0x4028
50#define TI_CURS_COLOR_READ_ADDR  0x4038
51#define TI_DIRECT_CURS_CTRL      0x4048
52#define TI_INDEX_DATA            0x4050
53#define TI_CURS_RAM_DATA         0x4058
54#define TI_CURS_X_LOW            0x4060
55#define TI_CURS_X_HIGH           0x4068
56#define TI_CURS_Y_LOW            0x4070
57#define TI_CURS_Y_HIGH           0x4078
58
59void
60glintOutTIIndReg(ScrnInfoPtr pScrn,
61		     CARD32 reg, unsigned char mask, unsigned char data)
62{
63    GLINTPtr pGlint = GLINTPTR(pScrn);
64    unsigned char tmp = 0x00;
65    int offset;
66
67    if ((reg & 0xf0) == 0xa0) { /* this is really a direct register write */
68	offset = TI_WRITE_ADDR + ((reg & 0xf) << 3);
69	if (mask != 0x00)
70	    tmp = GLINT_READ_REG(offset) & mask;
71
72	GLINT_SLOW_WRITE_REG(tmp | data, offset);
73    }
74    else { /* normal indirect access */
75	GLINT_SLOW_WRITE_REG(reg & 0xFF, TI_WRITE_ADDR);
76
77	if (mask != 0x00)
78	    tmp = GLINT_READ_REG(TI_INDEX_DATA) & mask;
79
80	GLINT_SLOW_WRITE_REG(tmp | data, TI_INDEX_DATA);
81    }
82}
83
84unsigned char
85glintInTIIndReg (ScrnInfoPtr pScrn, CARD32 reg)
86{
87    GLINTPtr pGlint = GLINTPTR(pScrn);
88    unsigned char ret;
89    int offset;
90
91    if ((reg & 0xf0) == 0xa0) { /* this is really a direct register write */
92	offset = TI_WRITE_ADDR + ((reg & 0xf) << 3);
93	ret = GLINT_READ_REG(offset);
94    }
95    else { /* normal indirect access */
96	GLINT_SLOW_WRITE_REG(reg & 0xFF, TI_WRITE_ADDR);
97	ret = GLINT_READ_REG(TI_INDEX_DATA);
98    }
99
100    return (ret);
101}
102
103void
104glintTIWriteAddress (ScrnInfoPtr pScrn, CARD32 index)
105{
106    GLINTPtr pGlint = GLINTPTR(pScrn);
107
108    GLINT_SLOW_WRITE_REG(index, TI_WRITE_ADDR);
109}
110
111void
112glintTIWriteData (ScrnInfoPtr pScrn, unsigned char data)
113{
114    GLINTPtr pGlint = GLINTPTR(pScrn);
115
116    GLINT_SLOW_WRITE_REG(data, TI_RAMDAC_DATA);
117}
118
119void
120glintTIReadAddress (ScrnInfoPtr pScrn, CARD32 index)
121{
122    GLINTPtr pGlint = GLINTPTR(pScrn);
123
124    GLINT_SLOW_WRITE_REG(0xFF, TI_PIXEL_MASK);
125    GLINT_SLOW_WRITE_REG(index, TI_READ_ADDR);
126}
127
128unsigned char
129glintTIReadData (ScrnInfoPtr pScrn)
130{
131    GLINTPtr pGlint = GLINTPTR(pScrn);
132
133    return(GLINT_READ_REG(TI_RAMDAC_DATA));
134}
135
136Bool
137glintTIHWCursorInit(ScreenPtr pScreen)
138{
139    ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen);
140    GLINTPtr pGlint = GLINTPTR(pScrn);
141    xf86CursorInfoPtr infoPtr;
142
143    infoPtr = xf86CreateCursorInfoRec();
144    if(!infoPtr) return FALSE;
145
146    pGlint->CursorInfoRec = infoPtr;
147
148    (*pGlint->RamDac->HWCursorInit)(infoPtr);
149
150    return(xf86InitCursor(pScreen, infoPtr));
151}
152
153/* Special cases */
154
155/* GMX2000 */
156void
157GMX2000OutIndReg(ScrnInfoPtr pScrn,
158		     CARD32 reg, unsigned char mask, unsigned char data)
159{
160    GLINTPtr pGlint = GLINTPTR(pScrn);
161
162    ACCESSCHIP2();
163
164    glintOutTIIndReg(pScrn, reg, mask, data);
165
166    ACCESSCHIP1();
167}
168
169unsigned char
170GMX2000InIndReg (ScrnInfoPtr pScrn, CARD32 reg)
171{
172    GLINTPtr pGlint = GLINTPTR(pScrn);
173    unsigned char ret;
174
175    ACCESSCHIP2();
176
177    ret = glintInTIIndReg(pScrn, reg);
178
179    ACCESSCHIP1();
180
181    return (ret);
182}
183
184void
185GMX2000WriteAddress (ScrnInfoPtr pScrn, CARD32 index)
186{
187    GLINTPtr pGlint = GLINTPTR(pScrn);
188
189    ACCESSCHIP2();
190
191    glintTIWriteAddress(pScrn, index);
192
193    ACCESSCHIP1();
194}
195
196void
197GMX2000WriteData (ScrnInfoPtr pScrn, unsigned char data)
198{
199    GLINTPtr pGlint = GLINTPTR(pScrn);
200
201    ACCESSCHIP2();
202
203    glintTIWriteData(pScrn, data);
204
205    ACCESSCHIP1();
206}
207
208void
209GMX2000ReadAddress (ScrnInfoPtr pScrn, CARD32 index)
210{
211    GLINTPtr pGlint = GLINTPTR(pScrn);
212
213    ACCESSCHIP2();
214
215    glintTIReadAddress(pScrn, index);
216
217    ACCESSCHIP1();
218}
219
220unsigned char
221GMX2000ReadData (ScrnInfoPtr pScrn)
222{
223    GLINTPtr pGlint = GLINTPTR(pScrn);
224    unsigned char ret;
225
226    ACCESSCHIP2();
227
228    ret = glintTIReadData(pScrn);
229
230    ACCESSCHIP1();
231
232    return (ret);
233}
234