14f6cd06fSmrg/*
24f6cd06fSmrg * Copyright 2007 George Sapountzis
34f6cd06fSmrg *
44f6cd06fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
54f6cd06fSmrg * copy of this software and associated documentation files (the "Software"),
64f6cd06fSmrg * to deal in the Software without restriction, including without limitation
74f6cd06fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
84f6cd06fSmrg * and/or sell copies of the Software, and to permit persons to whom the
94f6cd06fSmrg * Software is furnished to do so, subject to the following conditions:
104f6cd06fSmrg *
114f6cd06fSmrg * The above copyright notice and this permission notice (including the next
124f6cd06fSmrg * paragraph) shall be included in all copies or substantial portions of the
134f6cd06fSmrg * Software.
144f6cd06fSmrg *
154f6cd06fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
164f6cd06fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
174f6cd06fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
184f6cd06fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
194f6cd06fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
204f6cd06fSmrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
214f6cd06fSmrg * SOFTWARE.
224f6cd06fSmrg */
234f6cd06fSmrg
244f6cd06fSmrg/**
254f6cd06fSmrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
264f6cd06fSmrg * library. The main purpose being to facilitate source code compatibility.
274f6cd06fSmrg */
284f6cd06fSmrg
294f6cd06fSmrg#ifndef SISPCIRENAME_H
304f6cd06fSmrg#define SISPCIRENAME_H
314f6cd06fSmrg
324f6cd06fSmrgenum region_type {
334f6cd06fSmrg    REGION_MEM,
344f6cd06fSmrg    REGION_IO
354f6cd06fSmrg};
364f6cd06fSmrg
374f6cd06fSmrg#ifndef XSERVER_LIBPCIACCESS
384f6cd06fSmrg
394f6cd06fSmrg/* pciVideoPtr */
404f6cd06fSmrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
414f6cd06fSmrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
424f6cd06fSmrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
434f6cd06fSmrg
444f6cd06fSmrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
454f6cd06fSmrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
464f6cd06fSmrg
474f6cd06fSmrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
484f6cd06fSmrg                                    (_pcidev)->device, \
494f6cd06fSmrg                                    (_pcidev)->func)
504f6cd06fSmrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
514f6cd06fSmrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
524f6cd06fSmrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
534f6cd06fSmrg
544f6cd06fSmrg/* pciConfigPtr */
554f6cd06fSmrg#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
564f6cd06fSmrg#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
574f6cd06fSmrg#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
584f6cd06fSmrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
594f6cd06fSmrg
604f6cd06fSmrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */
614f6cd06fSmrg#define PCI_REGION_BASE(_pcidev, _b, _type)             \
624f6cd06fSmrg    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
634f6cd06fSmrg                             : (_pcidev)->ioBase[(_b)])
644f6cd06fSmrg
654f6cd06fSmrg/* region size: xfree86 uses the log2 of the region size,
664f6cd06fSmrg * but with zero meaning no region, not size of one XXX */
674f6cd06fSmrg#define PCI_REGION_SIZE(_pcidev, _b) \
684f6cd06fSmrg    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
694f6cd06fSmrg
704f6cd06fSmrg/* read/write PCI configuration space */
714f6cd06fSmrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
724f6cd06fSmrg    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
734f6cd06fSmrg
744f6cd06fSmrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
754f6cd06fSmrg    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
764f6cd06fSmrg
774f6cd06fSmrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
784f6cd06fSmrg    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
794f6cd06fSmrg
804f6cd06fSmrg#define PCI_WRITE_BYTE(_pcidev, _value, _offset) \
814f6cd06fSmrg    pciWriteByte(PCI_CFG_TAG(_pcidev), (_offset), (_value))
824f6cd06fSmrg
834f6cd06fSmrg#else /* XSERVER_LIBPCIACCESS */
844f6cd06fSmrg
854f6cd06fSmrgtypedef struct pci_device *pciVideoPtr;
864f6cd06fSmrg
874f6cd06fSmrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
884f6cd06fSmrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
894f6cd06fSmrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
904f6cd06fSmrg
914f6cd06fSmrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
924f6cd06fSmrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
934f6cd06fSmrg
944f6cd06fSmrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
954f6cd06fSmrg#define PCI_DEV_TAG(_pcidev)        (_pcidev)
964f6cd06fSmrg
974f6cd06fSmrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
984f6cd06fSmrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
994f6cd06fSmrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
1004f6cd06fSmrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
1014f6cd06fSmrg
1024f6cd06fSmrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
1034f6cd06fSmrg#define PCI_CFG_TAG(_pcidev)        (_pcidev)
1044f6cd06fSmrg
1054f6cd06fSmrg/* PCI_CFG macros, typically used in DRI init, contain the domain */
1064f6cd06fSmrg#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
1074f6cd06fSmrg                                    (_pcidev)->bus)
1084f6cd06fSmrg#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
1094f6cd06fSmrg#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
1104f6cd06fSmrg
1114f6cd06fSmrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
1124f6cd06fSmrg#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
1134f6cd06fSmrg
1144f6cd06fSmrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
1154f6cd06fSmrg    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
1164f6cd06fSmrg
1174f6cd06fSmrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
1184f6cd06fSmrg    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
1194f6cd06fSmrg
1204f6cd06fSmrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
1214f6cd06fSmrg    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
1224f6cd06fSmrg
1234f6cd06fSmrg#define PCI_WRITE_BYTE(_pcidev, _value, _offset) \
1244f6cd06fSmrg    pci_device_cfg_write_u8((_pcidev), (_value), (_offset))
1254f6cd06fSmrg
1264f6cd06fSmrg#endif /* XSERVER_LIBPCIACCESS */
1274f6cd06fSmrg
1284f6cd06fSmrg#endif /* SISPCIRENAME_H */
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