pm2_dac.c revision c35d236e
1c35d236eSmrg/*
2c35d236eSmrg * Copyright 1997-2001 by Alan Hourihane <alanh@fairlite.demon.co.uk>
3c35d236eSmrg *
4c35d236eSmrg * Permission to use, copy, modify, distribute, and sell this software and its
5c35d236eSmrg * documentation for any purpose is hereby granted without fee, provided that
6c35d236eSmrg * the above copyright notice appear in all copies and that both that
7c35d236eSmrg * copyright notice and this permission notice appear in supporting
8c35d236eSmrg * documentation, and that the name of Alan Hourihane not be used in
9c35d236eSmrg * advertising or publicity pertaining to distribution of the software without
10c35d236eSmrg * specific, written prior permission.  Alan Hourihane makes no representations
11c35d236eSmrg * about the suitability of this software for any purpose.  It is provided
12c35d236eSmrg * "as is" without express or implied warranty.
13c35d236eSmrg *
14c35d236eSmrg * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15c35d236eSmrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16c35d236eSmrg * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17c35d236eSmrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18c35d236eSmrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19c35d236eSmrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20c35d236eSmrg * PERFORMANCE OF THIS SOFTWARE.
21c35d236eSmrg *
22c35d236eSmrg * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
23c35d236eSmrg *           Dirk Hohndel,   <hohndel@suse.de>
24c35d236eSmrg *	     Stefan Dirsch,  <sndirsch@suse.de>
25c35d236eSmrg *	     Helmut Fahrion, <hf@suse.de>
26c35d236eSmrg *	     Michel Dänzer,  <michdaen@iiic.ethz.ch>
27c35d236eSmrg *
28c35d236eSmrg * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen and
29c35d236eSmrg * Siemens Nixdorf Informationssysteme
30c35d236eSmrg */
31c35d236eSmrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c,v 1.26tsi Exp $ */
32c35d236eSmrg
33c35d236eSmrg#ifdef HAVE_CONFIG_H
34c35d236eSmrg#include "config.h"
35c35d236eSmrg#endif
36c35d236eSmrg
37c35d236eSmrg#include <X11/Xarch.h>
38c35d236eSmrg#include "xf86.h"
39c35d236eSmrg#include "xf86_OSproc.h"
40c35d236eSmrg
41c35d236eSmrg#include "xf86PciInfo.h"
42c35d236eSmrg#include "xf86Pci.h"
43c35d236eSmrg
44c35d236eSmrg#include "glint_regs.h"
45c35d236eSmrg#include "glint.h"
46c35d236eSmrg
47c35d236eSmrg#define INITIALFREQERR 100000
48c35d236eSmrg#define MINCLK 110000		/* VCO frequency range */
49c35d236eSmrg#define MAXCLK 250000
50c35d236eSmrg
51c35d236eSmrgstatic unsigned long
52c35d236eSmrgPM2DAC_CalculateMNPCForClock
53c35d236eSmrg(
54c35d236eSmrg unsigned long reqclock,		/* In kHz units */
55c35d236eSmrg unsigned long refclock,		/* In kHz units */
56c35d236eSmrg unsigned char *rm, 			/* M Out */
57c35d236eSmrg unsigned char *rn, 			/* N Out */
58c35d236eSmrg unsigned char *rp			/* P Out */
59c35d236eSmrg )
60c35d236eSmrg{
61c35d236eSmrg    unsigned char	m, n, p;
62c35d236eSmrg    unsigned long	f;
63c35d236eSmrg    long		freqerr, lowestfreqerr = INITIALFREQERR;
64c35d236eSmrg    unsigned long  	clock,actualclock = 0;
65c35d236eSmrg
66c35d236eSmrg    for (n = 2; n <= 14; n++) {
67c35d236eSmrg        for (m = 2; m != 0; m++) { /* this is a char, so this counts to 255 */
68c35d236eSmrg	    f = refclock * m / n;
69c35d236eSmrg	    if ( (f < MINCLK) || (f > MAXCLK) )
70c35d236eSmrg	    	continue;
71c35d236eSmrg	    for (p = 0; p <= 4; p++) {
72c35d236eSmrg	    	clock = f >> p;
73c35d236eSmrg		freqerr = reqclock - clock;
74c35d236eSmrg		if (freqerr < 0)
75c35d236eSmrg		    freqerr = -freqerr;
76c35d236eSmrg		if (freqerr < lowestfreqerr) {
77c35d236eSmrg		    *rn = n;
78c35d236eSmrg		    *rm = m;
79c35d236eSmrg		    *rp = p;
80c35d236eSmrg		    lowestfreqerr = freqerr;
81c35d236eSmrg		    actualclock = clock;
82c35d236eSmrg#ifdef DEBUG
83c35d236eSmrg	ErrorF("Best %ld diff %ld\n",actualclock,freqerr);
84c35d236eSmrg#endif
85c35d236eSmrg		}
86c35d236eSmrg	    }
87c35d236eSmrg	}
88c35d236eSmrg    }
89c35d236eSmrg
90c35d236eSmrg    return(actualclock);
91c35d236eSmrg}
92c35d236eSmrg
93c35d236eSmrgBool
94c35d236eSmrgPermedia2Init(ScrnInfoPtr pScrn, DisplayModePtr mode)
95c35d236eSmrg{
96c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
97c35d236eSmrg    GLINTRegPtr pReg = &pGlint->ModeReg[0];
98c35d236eSmrg    CARD32 temp1, temp2, temp3, temp4;
99c35d236eSmrg
100c35d236eSmrg    pReg->glintRegs[Aperture0 >> 3] = 0;
101c35d236eSmrg    pReg->glintRegs[Aperture1 >> 3] = 0;
102c35d236eSmrg    pReg->glintRegs[PMFramebufferWriteMask >> 3] = 0xFFFFFFFF;
103c35d236eSmrg    pReg->glintRegs[PMBypassWriteMask >> 3] = 0xFFFFFFFF;
104c35d236eSmrg
105c35d236eSmrg    pReg->glintRegs[DFIFODis >> 3] = 0;
106c35d236eSmrg    pReg->glintRegs[FIFODis >> 3] = 1;
107c35d236eSmrg
108c35d236eSmrg    if (pGlint->UseBlockWrite)
109c35d236eSmrg	pReg->glintRegs[PMMemConfig >> 3] = GLINT_READ_REG(PMMemConfig) | 1<<21;
110c35d236eSmrg
111c35d236eSmrg
112c35d236eSmrg    temp1 = mode->CrtcHSyncStart - mode->CrtcHDisplay;
113c35d236eSmrg    temp2 = mode->CrtcVSyncStart - mode->CrtcVDisplay;
114c35d236eSmrg    temp3 = mode->CrtcHSyncEnd - mode->CrtcHSyncStart;
115c35d236eSmrg    temp4 = mode->CrtcVSyncEnd - mode->CrtcVSyncStart;
116c35d236eSmrg
117c35d236eSmrg    pReg->glintRegs[PMHTotal >> 3] = Shiftbpp(pScrn,mode->CrtcHTotal);
118c35d236eSmrg    pReg->glintRegs[PMHsEnd >> 3] = Shiftbpp(pScrn, temp1 + temp3);
119c35d236eSmrg    pReg->glintRegs[PMHsStart >> 3] = Shiftbpp(pScrn, temp1);
120c35d236eSmrg    pReg->glintRegs[PMHbEnd >> 3] =
121c35d236eSmrg			Shiftbpp(pScrn,mode->CrtcHTotal-mode->CrtcHDisplay);
122c35d236eSmrg    pReg->glintRegs[PMScreenStride >> 3] =
123c35d236eSmrg			Shiftbpp(pScrn,pScrn->displayWidth>>1);
124c35d236eSmrg
125c35d236eSmrg    pReg->glintRegs[PMVTotal >> 3] = mode->CrtcVTotal;
126c35d236eSmrg    pReg->glintRegs[PMVsEnd >> 3] = temp2 + temp4;
127c35d236eSmrg    pReg->glintRegs[PMVsStart >> 3] = temp2;
128c35d236eSmrg    pReg->glintRegs[PMVbEnd >> 3] = mode->CrtcVTotal - mode->CrtcVDisplay;
129c35d236eSmrg
130c35d236eSmrg    /* The hw cursor needs /VSYNC to recognize vert retrace. We'll stick
131c35d236eSmrg       both sync lines to active high here and if needed invert them
132c35d236eSmrg       using the RAMDAC's MCR below. */
133c35d236eSmrg    pReg->glintRegs[PMVideoControl >> 3] =
134c35d236eSmrg	(1 << 5) | (1 << 3) | 1;
135c35d236eSmrg
136c35d236eSmrg    if (pScrn->bitsPerPixel > 8) {
137c35d236eSmrg	/* When != 8bpp then we stick the RAMDAC into 64bit mode */
138c35d236eSmrg	/* And reduce the horizontal timings by half */
139c35d236eSmrg	pReg->glintRegs[PMVideoControl >> 3] |= 1<<16;
140c35d236eSmrg    	pReg->glintRegs[PMHTotal >> 3] >>= 1;
141c35d236eSmrg	pReg->glintRegs[PMHsEnd >> 3] >>= 1;
142c35d236eSmrg	pReg->glintRegs[PMHsStart >> 3] >>= 1;
143c35d236eSmrg	pReg->glintRegs[PMHbEnd >> 3] >>= 1;
144c35d236eSmrg    }
145c35d236eSmrg
146c35d236eSmrg    pReg->glintRegs[VClkCtl >> 3] = (GLINT_READ_REG(VClkCtl) & 0xFFFFFFFC);
147c35d236eSmrg    pReg->glintRegs[PMScreenBase >> 3] = 0;
148c35d236eSmrg    pReg->glintRegs[PMHTotal >> 3] -= 1;
149c35d236eSmrg    pReg->glintRegs[PMHsStart >> 3] -= 1;
150c35d236eSmrg    pReg->glintRegs[PMVTotal >> 3] -= 1;
151c35d236eSmrg
152c35d236eSmrg    pReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig) & 0xFFFFFFDD;
153c35d236eSmrg
154c35d236eSmrg    pReg->DacRegs[PM2DACIndexMDCR] = 0x00; /* Disable Overlay */
155c35d236eSmrg
156c35d236eSmrg    {
157c35d236eSmrg	/* Get the programmable clock values */
158c35d236eSmrg    	unsigned char m,n,p;
159c35d236eSmrg
160c35d236eSmrg	(void) PM2DAC_CalculateMNPCForClock(mode->Clock,pGlint->RefClock,
161c35d236eSmrg								&m,&n,&p);
162c35d236eSmrg	pReg->DacRegs[PM2DACIndexClockAM] = m;
163c35d236eSmrg	pReg->DacRegs[PM2DACIndexClockAN] = n;
164c35d236eSmrg	pReg->DacRegs[PM2DACIndexClockAP] = p|0x08;
165c35d236eSmrg    }
166c35d236eSmrg
167c35d236eSmrg    if (pScrn->rgbBits == 8)
168c35d236eSmrg	pReg->DacRegs[PM2DACIndexMCR] = 0x02; /* 8bit DAC */
169c35d236eSmrg    else
170c35d236eSmrg        pReg->DacRegs[PM2DACIndexMCR] = 0x00; /* 6bit DAC */
171c35d236eSmrg
172c35d236eSmrg    if (!(mode->Flags & V_PHSYNC))
173c35d236eSmrg        pReg->DacRegs[PM2DACIndexMCR] |= 0x04; /* invert hsync */
174c35d236eSmrg    if (!(mode->Flags & V_PVSYNC))
175c35d236eSmrg        pReg->DacRegs[PM2DACIndexMCR] |= 0x08; /* invert vsync */
176c35d236eSmrg
177c35d236eSmrg    switch (pScrn->bitsPerPixel)
178c35d236eSmrg    {
179c35d236eSmrg    case 8:
180c35d236eSmrg	pReg->DacRegs[PM2DACIndexCMR] = PM2DAC_RGB | PM2DAC_GRAPHICS |
181c35d236eSmrg					PM2DAC_CI8;
182c35d236eSmrg    	break;
183c35d236eSmrg    case 16:
184c35d236eSmrg	if (pScrn->depth == 15) {
185c35d236eSmrg	      pReg->DacRegs[PM2DACIndexCMR] = PM2DAC_RGB | PM2DAC_TRUECOLOR|
186c35d236eSmrg				        PM2DAC_GRAPHICS | PM2DAC_5551;
187c35d236eSmrg	} else {
188c35d236eSmrg	    pReg->DacRegs[PM2DACIndexCMR] = PM2DAC_RGB | PM2DAC_TRUECOLOR|
189c35d236eSmrg				 	PM2DAC_GRAPHICS | PM2DAC_565;
190c35d236eSmrg	}
191c35d236eSmrg    	break;
192c35d236eSmrg    case 24:
193c35d236eSmrg	pReg->DacRegs[PM2DACIndexCMR] = PM2DAC_RGB | PM2DAC_TRUECOLOR|
194c35d236eSmrg				 	PM2DAC_GRAPHICS | PM2DAC_PACKED;
195c35d236eSmrg    	break;
196c35d236eSmrg    case 32:
197c35d236eSmrg	pReg->DacRegs[PM2DACIndexCMR] = PM2DAC_RGB |
198c35d236eSmrg				 	PM2DAC_GRAPHICS | PM2DAC_8888;
199c35d236eSmrg	if (pScrn->overlayFlags & OVERLAY_8_32_PLANAR) {
200c35d236eSmrg	    pReg->DacRegs[PM2DACIndexColorKeyControl] = 0x11;
201c35d236eSmrg	    pReg->DacRegs[PM2DACIndexColorKeyOverlay] = pScrn->colorKey;
202c35d236eSmrg	} else
203c35d236eSmrg	    pReg->DacRegs[PM2DACIndexCMR] |= PM2DAC_TRUECOLOR;
204c35d236eSmrg    	break;
205c35d236eSmrg    }
206c35d236eSmrg
207c35d236eSmrg    return(TRUE);
208c35d236eSmrg}
209c35d236eSmrg
210c35d236eSmrgvoid
211c35d236eSmrgPermedia2Save(ScrnInfoPtr pScrn, GLINTRegPtr glintReg)
212c35d236eSmrg{
213c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
214c35d236eSmrg    int i;
215c35d236eSmrg
216c35d236eSmrg    /* We can't rely on the vgahw layer copying the font information
217c35d236eSmrg     * back properly, due to problems with MMIO access to VGA space
218c35d236eSmrg     * so we memcpy the information using the slow routines */
219c35d236eSmrg    xf86SlowBcopy((CARD8*)pGlint->FbBase, (CARD8*)pGlint->VGAdata, 65536);
220c35d236eSmrg
221c35d236eSmrg    glintReg->glintRegs[Aperture0 >> 3] = GLINT_READ_REG(Aperture0);
222c35d236eSmrg    glintReg->glintRegs[Aperture1 >> 3] = GLINT_READ_REG(Aperture1);
223c35d236eSmrg    glintReg->glintRegs[PMFramebufferWriteMask >> 3] =
224c35d236eSmrg					GLINT_READ_REG(PMFramebufferWriteMask);
225c35d236eSmrg    glintReg->glintRegs[PMBypassWriteMask >> 3]  = GLINT_READ_REG(PMBypassWriteMask);
226c35d236eSmrg    glintReg->glintRegs[DFIFODis >> 3]  = GLINT_READ_REG(DFIFODis);
227c35d236eSmrg    glintReg->glintRegs[FIFODis >> 3]  = GLINT_READ_REG(FIFODis);
228c35d236eSmrg    /* We only muck about with PMMemConfig, if user wants to */
229c35d236eSmrg    if (pGlint->UseBlockWrite)
230c35d236eSmrg	glintReg->glintRegs[PMMemConfig >> 3] = GLINT_READ_REG(PMMemConfig);
231c35d236eSmrg    glintReg->glintRegs[PMHTotal >> 3] = GLINT_READ_REG(PMHTotal);
232c35d236eSmrg    glintReg->glintRegs[PMHbEnd >> 3] = GLINT_READ_REG(PMHbEnd);
233c35d236eSmrg    glintReg->glintRegs[PMHbEnd >> 3] = GLINT_READ_REG(PMHgEnd);
234c35d236eSmrg    glintReg->glintRegs[PMScreenStride >> 3] = GLINT_READ_REG(PMScreenStride);
235c35d236eSmrg    glintReg->glintRegs[PMHsStart >> 3] = GLINT_READ_REG(PMHsStart);
236c35d236eSmrg    glintReg->glintRegs[PMHsEnd >> 3] = GLINT_READ_REG(PMHsEnd);
237c35d236eSmrg    glintReg->glintRegs[PMVTotal >> 3] = GLINT_READ_REG(PMVTotal);
238c35d236eSmrg    glintReg->glintRegs[PMVbEnd >> 3] = GLINT_READ_REG(PMVbEnd);
239c35d236eSmrg    glintReg->glintRegs[PMVsStart >> 3] = GLINT_READ_REG(PMVsStart);
240c35d236eSmrg    glintReg->glintRegs[PMVsEnd >> 3] = GLINT_READ_REG(PMVsEnd);
241c35d236eSmrg    glintReg->glintRegs[PMScreenBase >> 3] = GLINT_READ_REG(PMScreenBase);
242c35d236eSmrg    glintReg->glintRegs[PMVideoControl >> 3] = GLINT_READ_REG(PMVideoControl);
243c35d236eSmrg    glintReg->glintRegs[VClkCtl >> 3] = GLINT_READ_REG(VClkCtl);
244c35d236eSmrg    glintReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig);
245c35d236eSmrg
246c35d236eSmrg    for (i=0;i<768;i++) {
247c35d236eSmrg    	Permedia2ReadAddress(pScrn, i);
248c35d236eSmrg	glintReg->cmap[i] = Permedia2ReadData(pScrn);
249c35d236eSmrg    }
250c35d236eSmrg
251c35d236eSmrg    glintReg->DacRegs[PM2DACIndexColorKeyOverlay] =
252c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexColorKeyOverlay);
253c35d236eSmrg    glintReg->DacRegs[PM2DACIndexColorKeyControl] =
254c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexColorKeyControl);
255c35d236eSmrg    glintReg->DacRegs[PM2DACIndexMCR] =
256c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexMCR);
257c35d236eSmrg    glintReg->DacRegs[PM2DACIndexMDCR] =
258c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexMDCR);
259c35d236eSmrg    glintReg->DacRegs[PM2DACIndexCMR] =
260c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexCMR);
261c35d236eSmrg
262c35d236eSmrg    glintReg->DacRegs[PM2DACIndexClockAM] =
263c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexClockAM);
264c35d236eSmrg    glintReg->DacRegs[PM2DACIndexClockAN] =
265c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexClockAN);
266c35d236eSmrg    glintReg->DacRegs[PM2DACIndexClockAP] =
267c35d236eSmrg				Permedia2InIndReg(pScrn, PM2DACIndexClockAP);
268c35d236eSmrg}
269c35d236eSmrg
270c35d236eSmrgvoid
271c35d236eSmrgPermedia2Restore(ScrnInfoPtr pScrn, GLINTRegPtr glintReg)
272c35d236eSmrg{
273c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
274c35d236eSmrg    int i;
275c35d236eSmrg
276c35d236eSmrg    /* We can't rely on the vgahw layer copying the font information
277c35d236eSmrg     * back properly, due to problems with MMIO access to VGA space
278c35d236eSmrg     * so we memcpy the information using the slow routines */
279c35d236eSmrg    if (pGlint->STATE)
280c35d236eSmrg	xf86SlowBcopy((CARD8*)pGlint->VGAdata, (CARD8*)pGlint->FbBase, 65536);
281c35d236eSmrg
282c35d236eSmrg#if 0
283c35d236eSmrg    GLINT_SLOW_WRITE_REG(0, ResetStatus);
284c35d236eSmrg    while(GLINT_READ_REG(ResetStatus) != 0) {
285c35d236eSmrg	xf86MsgVerb(X_INFO, 2, "Resetting Engine - Please Wait.\n");
286c35d236eSmrg    };
287c35d236eSmrg#endif
288c35d236eSmrg
289c35d236eSmrg    GLINT_SLOW_WRITE_REG(0xFF, PM2DACReadMask);
290c35d236eSmrg
291c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[Aperture0 >> 3], Aperture0);
292c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[Aperture1 >> 3], Aperture1);
293c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMFramebufferWriteMask >> 3],
294c35d236eSmrg							PMFramebufferWriteMask);
295c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMBypassWriteMask >> 3],
296c35d236eSmrg							PMBypassWriteMask);
297c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[DFIFODis >> 3], DFIFODis);
298c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[FIFODis >> 3], FIFODis);
299c35d236eSmrg    /* We only muck about with PMMemConfig, if user wants to */
300c35d236eSmrg    if (pGlint->UseBlockWrite)
301c35d236eSmrg    	GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMMemConfig >> 3],PMMemConfig);
302c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMVideoControl >> 3],
303c35d236eSmrg								PMVideoControl);
304c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMHbEnd >> 3], PMHgEnd);
305c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMScreenBase >> 3], PMScreenBase);
306c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[VClkCtl >> 3], VClkCtl);
307c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMScreenStride >> 3],
308c35d236eSmrg								PMScreenStride);
309c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMHTotal >> 3], PMHTotal);
310c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMHbEnd >> 3], PMHbEnd);
311c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMHsStart >> 3], PMHsStart);
312c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMHsEnd >> 3], PMHsEnd);
313c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMVTotal >> 3], PMVTotal);
314c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMVbEnd >> 3], PMVbEnd);
315c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMVsStart >> 3], PMVsStart);
316c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[PMVsEnd >> 3], PMVsEnd);
317c35d236eSmrg    GLINT_SLOW_WRITE_REG(glintReg->glintRegs[ChipConfig >> 3], ChipConfig);
318c35d236eSmrg
319c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexColorKeyOverlay, 0x00,
320c35d236eSmrg					glintReg->DacRegs[PM2DACIndexColorKeyOverlay]);
321c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexColorKeyControl, 0x00,
322c35d236eSmrg					glintReg->DacRegs[PM2DACIndexColorKeyControl]);
323c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexMCR, 0x00,
324c35d236eSmrg					glintReg->DacRegs[PM2DACIndexMCR]);
325c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexMDCR, 0x00,
326c35d236eSmrg					glintReg->DacRegs[PM2DACIndexMDCR]);
327c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexCMR, 0x00,
328c35d236eSmrg					glintReg->DacRegs[PM2DACIndexCMR]);
329c35d236eSmrg
330c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexClockAM, 0x00,
331c35d236eSmrg					glintReg->DacRegs[PM2DACIndexClockAM]);
332c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexClockAN, 0x00,
333c35d236eSmrg					glintReg->DacRegs[PM2DACIndexClockAN]);
334c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACIndexClockAP, 0x00,
335c35d236eSmrg					glintReg->DacRegs[PM2DACIndexClockAP]);
336c35d236eSmrg
337c35d236eSmrg    for (i=0;i<768;i++) {
338c35d236eSmrg    	Permedia2WriteAddress(pScrn, i);
339c35d236eSmrg        Permedia2WriteData(pScrn, glintReg->cmap[i]);
340c35d236eSmrg    }
341c35d236eSmrg}
342c35d236eSmrg
343c35d236eSmrgstatic void
344c35d236eSmrgPermedia2ShowCursor(ScrnInfoPtr pScrn)
345c35d236eSmrg{
346c35d236eSmrg    /* Enable cursor - X11 mode */
347c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACCursorControl, 0x00, 0x43);
348c35d236eSmrg}
349c35d236eSmrg
350c35d236eSmrgstatic void
351c35d236eSmrgPermedia2HideCursor(ScrnInfoPtr pScrn)
352c35d236eSmrg{
353c35d236eSmrg    /* Disable cursor */
354c35d236eSmrg    Permedia2OutIndReg(pScrn, PM2DACCursorControl, 0x00, 0x00);
355c35d236eSmrg}
356c35d236eSmrg
357c35d236eSmrgstatic void
358c35d236eSmrgPermedia2LoadCursorImage(
359c35d236eSmrg    ScrnInfoPtr pScrn,
360c35d236eSmrg    unsigned char *src
361c35d236eSmrg)
362c35d236eSmrg{
363c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
364c35d236eSmrg    int i;
365c35d236eSmrg
366c35d236eSmrg    GLINT_SLOW_WRITE_REG(0x00, PM2DACWriteAddress);
367c35d236eSmrg    for (i=0; i<1024; i++) {
368c35d236eSmrg	GLINT_SLOW_WRITE_REG(*(src++), PM2DACCursorData);
369c35d236eSmrg    }
370c35d236eSmrg}
371c35d236eSmrg
372c35d236eSmrgstatic void
373c35d236eSmrgPermedia2SetCursorPosition(
374c35d236eSmrg   ScrnInfoPtr pScrn,
375c35d236eSmrg   int x, int y
376c35d236eSmrg)
377c35d236eSmrg{
378c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
379c35d236eSmrg
380c35d236eSmrg    x += 64;
381c35d236eSmrg    y += 64;
382c35d236eSmrg
383c35d236eSmrg    /* Output position - "only" 11 bits of location documented */
384c35d236eSmrg
385c35d236eSmrg    GLINT_WRITE_REG(x & 0xFF,	   PM2DACCursorXLsb);
386c35d236eSmrg    GLINT_WRITE_REG((x>>8) & 0x07, PM2DACCursorXMsb);
387c35d236eSmrg    GLINT_WRITE_REG(y & 0xFF,	   PM2DACCursorYLsb);
388c35d236eSmrg    GLINT_WRITE_REG((y>>8) & 0x07, PM2DACCursorYMsb);
389c35d236eSmrg}
390c35d236eSmrg
391c35d236eSmrgstatic void
392c35d236eSmrgPermedia2SetCursorColors(
393c35d236eSmrg   ScrnInfoPtr pScrn,
394c35d236eSmrg   int bg, int fg
395c35d236eSmrg)
396c35d236eSmrg{
397c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
398c35d236eSmrg    /* The Permedia2 cursor is always 8 bits so shift 8, not 10 */
399c35d236eSmrg
400c35d236eSmrg    GLINT_SLOW_WRITE_REG(1, PM2DACCursorColorAddress);
401c35d236eSmrg    /* Background color */
402c35d236eSmrg    GLINT_SLOW_WRITE_REG(bg >> 0, PM2DACCursorColorData);
403c35d236eSmrg    GLINT_SLOW_WRITE_REG(bg >> 8, PM2DACCursorColorData);
404c35d236eSmrg    GLINT_SLOW_WRITE_REG(bg >> 16, PM2DACCursorColorData);
405c35d236eSmrg
406c35d236eSmrg    /* Foreground color */
407c35d236eSmrg    GLINT_SLOW_WRITE_REG(fg >> 0, PM2DACCursorColorData);
408c35d236eSmrg    GLINT_SLOW_WRITE_REG(fg >> 8, PM2DACCursorColorData);
409c35d236eSmrg    GLINT_SLOW_WRITE_REG(fg >> 16, PM2DACCursorColorData);
410c35d236eSmrg}
411c35d236eSmrg
412c35d236eSmrgstatic Bool
413c35d236eSmrgPermedia2UseHWCursor(ScreenPtr pScr, CursorPtr pCurs)
414c35d236eSmrg{
415c35d236eSmrg    return TRUE;
416c35d236eSmrg}
417c35d236eSmrg
418c35d236eSmrgBool
419c35d236eSmrgPermedia2HWCursorInit(ScreenPtr pScreen)
420c35d236eSmrg{
421c35d236eSmrg    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
422c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
423c35d236eSmrg    xf86CursorInfoPtr infoPtr;
424c35d236eSmrg
425c35d236eSmrg    infoPtr = xf86CreateCursorInfoRec();
426c35d236eSmrg    if(!infoPtr) return FALSE;
427c35d236eSmrg
428c35d236eSmrg    pGlint->CursorInfoRec = infoPtr;
429c35d236eSmrg
430c35d236eSmrg    infoPtr->MaxWidth = 64;
431c35d236eSmrg    infoPtr->MaxHeight = 64;
432c35d236eSmrg    infoPtr->Flags = HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
433c35d236eSmrg#if X_BYTE_ORDER == X_LITTLE_ENDIAN
434c35d236eSmrg		HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
435c35d236eSmrg#endif
436c35d236eSmrg		HARDWARE_CURSOR_SOURCE_MASK_NOT_INTERLEAVED;
437c35d236eSmrg    infoPtr->SetCursorColors = Permedia2SetCursorColors;
438c35d236eSmrg    infoPtr->SetCursorPosition = Permedia2SetCursorPosition;
439c35d236eSmrg    infoPtr->LoadCursorImage = Permedia2LoadCursorImage;
440c35d236eSmrg    infoPtr->HideCursor = Permedia2HideCursor;
441c35d236eSmrg    infoPtr->ShowCursor = Permedia2ShowCursor;
442c35d236eSmrg    infoPtr->UseHWCursor = Permedia2UseHWCursor;
443c35d236eSmrg
444c35d236eSmrg    return(xf86InitCursor(pScreen, infoPtr));
445c35d236eSmrg}
446c35d236eSmrg
447c35d236eSmrg/* I2C Functions */
448c35d236eSmrg
449c35d236eSmrgvoid
450c35d236eSmrgPermedia2I2CUDelay(I2CBusPtr b, int usec)
451c35d236eSmrg{
452c35d236eSmrg    GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
453c35d236eSmrg    CARD32 ct1 = GLINT_READ_REG(PMCount);
454c35d236eSmrg    CARD32 ct2 = usec * 100;
455c35d236eSmrg
456c35d236eSmrg    if (GLINT_READ_REG(PMCount) != ct1)
457c35d236eSmrg	while ((GLINT_READ_REG(PMCount) - ct1) < ct2);
458c35d236eSmrg}
459c35d236eSmrg
460c35d236eSmrgvoid
461c35d236eSmrgPermedia2I2CPutBits(I2CBusPtr b, int scl, int sda)
462c35d236eSmrg{
463c35d236eSmrg    GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
464c35d236eSmrg    int r = (pGlint->DDCBus == b) ? PMDDCData : VSSerialBusControl;
465c35d236eSmrg    CARD32 v = GLINT_READ_REG(r) & ~(ClkOut | DataOut);
466c35d236eSmrg
467c35d236eSmrg    if (scl > 0) v |= ClkOut;
468c35d236eSmrg    if (sda > 0) v |= DataOut;
469c35d236eSmrg
470c35d236eSmrg    GLINT_WRITE_REG(v, r);
471c35d236eSmrg}
472c35d236eSmrg
473c35d236eSmrgvoid
474c35d236eSmrgPermedia2I2CGetBits(I2CBusPtr b, int *scl, int *sda)
475c35d236eSmrg{
476c35d236eSmrg    GLINTPtr pGlint = (GLINTPtr) b->DriverPrivate.ptr;
477c35d236eSmrg    CARD32 v = GLINT_READ_REG((pGlint->DDCBus == b) ?
478c35d236eSmrg	    PMDDCData : VSSerialBusControl);
479c35d236eSmrg
480c35d236eSmrg    *scl = (v & ClkIn) > 0;
481c35d236eSmrg    *sda = (v & DataIn) > 0;
482c35d236eSmrg}
483c35d236eSmrg
484c35d236eSmrgvoid
485c35d236eSmrgPermedia2PreInit(ScrnInfoPtr pScrn)
486c35d236eSmrg{
487c35d236eSmrg#if defined(__alpha__)
488c35d236eSmrg    GLINTPtr pGlint = GLINTPTR(pScrn);
489c35d236eSmrg
490c35d236eSmrg    /*
491c35d236eSmrg     * On Alpha, we have to init secondary PM2 cards, since
492c35d236eSmrg     * int10 cannot be run on the OEMed cards with VGA disable
493c35d236eSmrg     * jumpers.
494c35d236eSmrg     */
495c35d236eSmrg    if (!xf86IsPrimaryPci(pGlint->PciInfo)) {
496c35d236eSmrg	if ( IS_GLORIASYNERGY ) {
497c35d236eSmrg
498c35d236eSmrg	    /* PM2DAC_CalculateMNPCForClock(80000, 14318, &m, &n, &p); */
499c35d236eSmrg	    Permedia2OutIndReg(pScrn, PM2DACIndexMemClockM, 0x00, 0x7b);
500c35d236eSmrg	    Permedia2OutIndReg(pScrn, PM2DACIndexMemClockN, 0x00, 0x0b);
501c35d236eSmrg	    Permedia2OutIndReg(pScrn, PM2DACIndexMemClockP, 0x00, 0x09);
502c35d236eSmrg
503c35d236eSmrg	    GLINT_SLOW_WRITE_REG( 0x20, PMBootAddress);
504c35d236eSmrg	    GLINT_SLOW_WRITE_REG( 0xe6002021, PMMemConfig);
505c35d236eSmrg	}
506c35d236eSmrg    }
507c35d236eSmrg#endif /* __alpha__ */
508c35d236eSmrg}
509