i128_driver.c revision a73423d7
150806d53Smrg/* 250806d53Smrg * Copyright 1995-2000 by Robin Cutshaw <robin@XFree86.Org> 350806d53Smrg * Copyright 1998 by Number Nine Visual Technology, Inc. 450806d53Smrg * 550806d53Smrg * Permission to use, copy, modify, distribute, and sell this software and its 650806d53Smrg * documentation for any purpose is hereby granted without fee, provided that 750806d53Smrg * the above copyright notice appear in all copies and that both that 850806d53Smrg * copyright notice and this permission notice appear in supporting 950806d53Smrg * documentation, and that the name of Robin Cutshaw not be used in 1050806d53Smrg * advertising or publicity pertaining to distribution of the software without 1150806d53Smrg * specific, written prior permission. Robin Cutshaw and Number Nine make no 1250806d53Smrg * representations about the suitability of this software for any purpose. It 1350806d53Smrg * is provided "as is" without express or implied warranty. 1450806d53Smrg * 1550806d53Smrg * ROBIN CUTSHAW AND NUMBER NINE DISCLAIM ALL WARRANTIES WITH REGARD TO THIS 1650806d53Smrg * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND 1750806d53Smrg * FITNESS, IN NO EVENT SHALL ROBIN CUTSHAW OR NUMBER NINE BE LIABLE FOR 1850806d53Smrg * ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1950806d53Smrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN 2050806d53Smrg * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING 2150806d53Smrg * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 2250806d53Smrg * 2350806d53Smrg */ 2450806d53Smrg 2550806d53Smrg#ifdef HAVE_CONFIG_H 2650806d53Smrg#include "config.h" 2750806d53Smrg#endif 2850806d53Smrg 2950806d53Smrg 3050806d53Smrg 3150806d53Smrg/* All drivers should typically include these */ 3250806d53Smrg#include "xf86.h" 3350806d53Smrg#include "xf86_OSproc.h" 34a18ebfb2Smrg#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 6 3550806d53Smrg#include "xf86Resources.h" 36a18ebfb2Smrg#include "xf86RAC.h" 37a18ebfb2Smrg#endif 3850806d53Smrg 3950806d53Smrg#include "compiler.h" 4050806d53Smrg 4150806d53Smrg/* Drivers for PCI hardware need this */ 4250806d53Smrg#include "xf86PciInfo.h" 4350806d53Smrg 4450806d53Smrg/* Drivers that need to access the PCI config space directly need this */ 4550806d53Smrg#include "xf86Pci.h" 4650806d53Smrg 4750806d53Smrg/* vgaHW module is only used to save/restore fonts by this driver */ 4850806d53Smrg#include "vgaHW.h" 4950806d53Smrg 5050806d53Smrg/* All drivers initialising the SW cursor need this */ 5150806d53Smrg#include "mipointer.h" 5250806d53Smrg 5350806d53Smrg/* All drivers implementing backing store need this */ 5450806d53Smrg#include "mibstore.h" 5550806d53Smrg#include "micmap.h" 5650806d53Smrg 5750806d53Smrg#include "xf86DDC.h" 5850806d53Smrg#include "vbe.h" 5950806d53Smrg 6050806d53Smrg#include "xf86cmap.h" 6150806d53Smrg#include "fb.h" 6250806d53Smrg 6350806d53Smrg#include "xf86xv.h" 6450806d53Smrg#include <X11/extensions/Xv.h> 6550806d53Smrg 6650806d53Smrg/* driver specific includes */ 6750806d53Smrg#include "i128.h" 6850806d53Smrg#include "i128reg.h" 6950806d53Smrg 707965d9acSmrg#include <unistd.h> 717965d9acSmrg 7250806d53Smrg/* 7350806d53Smrg * Forward definitions for the functions that make up the driver. 7450806d53Smrg */ 7550806d53Smrg 7650806d53Smrg/* Mandatory functions */ 7750806d53Smrgstatic const OptionInfoRec * I128AvailableOptions(int chipid, int busid); 7850806d53Smrgstatic void I128Identify(int flags); 7950806d53Smrgstatic Bool I128Probe(DriverPtr drv, int flags); 8050806d53Smrgstatic Bool I128PreInit(ScrnInfoPtr pScrn, int flags); 81a73423d7Smrgstatic Bool I128ScreenInit(SCREEN_INIT_ARGS_DECL); 82a73423d7Smrgstatic Bool I128EnterVT(VT_FUNC_ARGS_DECL); 83a73423d7Smrgstatic void I128LeaveVT(VT_FUNC_ARGS_DECL); 84a73423d7Smrgstatic Bool I128CloseScreen(CLOSE_SCREEN_ARGS_DECL); 8550806d53Smrgstatic Bool I128SaveScreen(ScreenPtr pScreen, int mode); 8650806d53Smrg 8750806d53Smrgstatic void I128DumpBaseRegisters(ScrnInfoPtr pScrn); 8850806d53Smrgstatic void I128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg); 8950806d53Smrg 9050806d53Smrg/* Optional functions */ 91a73423d7Smrgstatic void I128FreeScreen(FREE_SCREEN_ARGS_DECL); 92a73423d7Smrgstatic ModeStatus I128ValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, 9350806d53Smrg Bool verbose, int flags); 9450806d53Smrgstatic void I128DisplayPowerManagementSet(ScrnInfoPtr pScrn, 9550806d53Smrg int PowerManagementMode, 9650806d53Smrg int flags); 9750806d53Smrg 9850806d53Smrg/* Internally used functions */ 9950806d53Smrgstatic Bool I128GetRec(ScrnInfoPtr pScrn); 10050806d53Smrgstatic void I128FreeRec(ScrnInfoPtr pScrn); 10150806d53Smrgstatic Bool I128MapMem(ScrnInfoPtr pScrn); 10250806d53Smrgstatic Bool I128UnmapMem(ScrnInfoPtr pScrn); 10350806d53Smrgstatic void I128Save(ScrnInfoPtr pScrn); 10450806d53Smrgstatic void I128Restore(ScrnInfoPtr pScrn); 10550806d53Smrgstatic Bool I128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 10650806d53Smrgstatic int I128CountRam(ScrnInfoPtr pScrn); 10750806d53Smrgstatic void I128SoftReset(ScrnInfoPtr pScrn); 10850806d53Smrgstatic Bool I128I2CInit(ScrnInfoPtr pScrn); 10950806d53Smrgstatic xf86MonPtr I128getDDC(ScrnInfoPtr pScrn); 11050806d53Smrg#if 0 11150806d53Smrgstatic unsigned int I128DDC1Read(ScrnInfoPtr pScrn); 11250806d53Smrg#endif 11350806d53Smrg 11450806d53Smrg#define I128_VERSION 4000 11550806d53Smrg#define I128_NAME "I128" 11650806d53Smrg#define I128_DRIVER_NAME "i128" 1177965d9acSmrg#define I128_MAJOR_VERSION PACKAGE_VERSION_MAJOR 1187965d9acSmrg#define I128_MINOR_VERSION PACKAGE_VERSION_MINOR 1197965d9acSmrg#define I128_PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 12050806d53Smrg 12150806d53Smrg/* 12250806d53Smrg * This contains the functions needed by the server after loading the 12350806d53Smrg * driver module. It must be supplied, and gets added the driver list by 12450806d53Smrg * the Module Setup funtion in the dynamic case. In the static case a 12550806d53Smrg * reference to this is compiled in, and this requires that the name of 12650806d53Smrg * this DriverRec be an upper-case version of the driver name. 12750806d53Smrg */ 12850806d53Smrg 12950806d53Smrg_X_EXPORT DriverRec I128 = { 13050806d53Smrg I128_VERSION, 13150806d53Smrg I128_DRIVER_NAME, 13250806d53Smrg I128Identify, 13350806d53Smrg I128Probe, 13450806d53Smrg I128AvailableOptions, 13550806d53Smrg NULL, 13650806d53Smrg 0 13750806d53Smrg}; 13850806d53Smrg 13950806d53Smrg#ifdef XFree86LOADER 14050806d53Smrg 14150806d53Smrgstatic MODULESETUPPROTO(i128Setup); 14250806d53Smrg 14350806d53Smrgstatic XF86ModuleVersionInfo i128VersRec = 14450806d53Smrg{ 14550806d53Smrg "i128", 14650806d53Smrg MODULEVENDORSTRING, 14750806d53Smrg MODINFOSTRING1, 14850806d53Smrg MODINFOSTRING2, 14950806d53Smrg XORG_VERSION_CURRENT, 15050806d53Smrg I128_MAJOR_VERSION, I128_MINOR_VERSION, I128_PATCHLEVEL, 15150806d53Smrg ABI_CLASS_VIDEODRV, /* This is a video driver */ 15250806d53Smrg ABI_VIDEODRV_VERSION, 15350806d53Smrg MOD_CLASS_VIDEODRV, 15450806d53Smrg {0,0,0,0} 15550806d53Smrg}; 15650806d53Smrg 15750806d53Smrg/* 15850806d53Smrg * XF86ModuleData structure is the first part of the driver that is used 15950806d53Smrg * by the module loader. It provides the XF86ModuleVersionInfo structure 16050806d53Smrg * used to verify that the module version is compatable with the loader 16150806d53Smrg * version. It also provides a pointer to the module specific 16250806d53Smrg * ModuleSetupProc() and ModuleTearDownProc() functions. 16350806d53Smrg */ 16450806d53Smrg 16550806d53Smrg_X_EXPORT XF86ModuleData i128ModuleData = { &i128VersRec, i128Setup, NULL }; 16650806d53Smrg 16750806d53Smrg#endif 16850806d53Smrg 16950806d53Smrg#ifdef XFree86LOADER 17050806d53Smrg 17150806d53Smrg/* Mandatory 17250806d53Smrg * 17350806d53Smrg * The Setup() function is the first entry point called once that the 17450806d53Smrg * module has been linked into the server. It adds this driver to 17550806d53Smrg * the driver list and lets the server know which symbols it might use. 17650806d53Smrg * This is only called once, not called with each server generation. 17750806d53Smrg * 17850806d53Smrg * Arguments: 17950806d53Smrg * pointer module - module being loaded, passed to xf86AddDriver() 18050806d53Smrg * pointer opts - unused but contains options from config file 18150806d53Smrg * int *errmaj - if function error returns major error value 18250806d53Smrg * int *errmin - if function error returns minor error value 18350806d53Smrg * Returns: 18450806d53Smrg * pointer to TearDownData which is passed to TearDownProc() 18550806d53Smrg * or NULL for failure. 18650806d53Smrg */ 18750806d53Smrg 18850806d53Smrgstatic pointer 18950806d53Smrgi128Setup(pointer module, pointer opts, int *errmaj, int *errmin) 19050806d53Smrg{ 19150806d53Smrg static Bool setupDone = FALSE; 19250806d53Smrg 19350806d53Smrg /* This module should be loaded only once, but check to be sure. */ 19450806d53Smrg 19550806d53Smrg if (!setupDone) { 19650806d53Smrg setupDone = TRUE; 19750806d53Smrg xf86AddDriver(&I128, module, 0); 19850806d53Smrg 19950806d53Smrg /* 20050806d53Smrg * Modules that this driver always requires may be loaded here 20150806d53Smrg * by calling LoadSubModule(). 20250806d53Smrg */ 20350806d53Smrg 20450806d53Smrg /* 20550806d53Smrg * The return value must be non-NULL on success even though there 20650806d53Smrg * is no TearDownProc. 20750806d53Smrg */ 20850806d53Smrg return (pointer)1; 20950806d53Smrg } else { 21050806d53Smrg if (errmaj) *errmaj = LDR_ONCEONLY; 21150806d53Smrg return NULL; 21250806d53Smrg } 21350806d53Smrg} 21450806d53Smrg 21550806d53Smrg#endif /* XFree86LOADER */ 21650806d53Smrg 21750806d53Smrg 21850806d53Smrg/* Define supported chipsets. Used by Probe(). */ 21950806d53Smrg 22050806d53Smrgstatic SymTabRec I128Chipsets[] = { 22150806d53Smrg { PCI_CHIP_I128, "i128" }, 22250806d53Smrg { PCI_CHIP_I128_2, "i128v2" }, 22350806d53Smrg { PCI_CHIP_I128_T2R, "i128t2r" }, 22450806d53Smrg { PCI_CHIP_I128_T2R4, "i128t2r4" }, 22550806d53Smrg {-1, NULL } 22650806d53Smrg}; 22750806d53Smrg 22850806d53Smrgstatic PciChipsets I128PciChipsets[] = { 22950806d53Smrg { PCI_CHIP_I128, PCI_CHIP_I128, NULL }, 23050806d53Smrg { PCI_CHIP_I128_2, PCI_CHIP_I128_2, NULL }, 23150806d53Smrg { PCI_CHIP_I128_T2R, PCI_CHIP_I128_T2R, NULL }, 23250806d53Smrg { PCI_CHIP_I128_T2R4, PCI_CHIP_I128_T2R4, NULL }, 23350806d53Smrg { -1, -1, RES_UNDEFINED } 23450806d53Smrg}; 23550806d53Smrg 23650806d53Smrg/* Mandatory 23750806d53Smrg * 23850806d53Smrg * The Probe() function is the second entry point called once that the 23950806d53Smrg * module has been linked into the server. This function finds all 24050806d53Smrg * instances of hardware that it supports and allocates a ScrnInfoRec 24150806d53Smrg * using xf86ConfigPciEntity() for each unclaimed slot. This should be 24250806d53Smrg * a minimal probe and under no circumstances should it leave the hardware 24350806d53Smrg * state changed. No initialisations other than the required ScrnInfoRec 24450806d53Smrg * should be done and no data structures should be allocated. 24550806d53Smrg * 24650806d53Smrg * Arguments: 24750806d53Smrg * DriverPtr drv - pointer to the driver structure 24850806d53Smrg * int flags - PROBE_DEFAULT for normal function 24950806d53Smrg * PROBE_DETECT for use with "-config" and "-probe" 25050806d53Smrg * Returns: 25150806d53Smrg * Bool TRUE if a screen was allocated, FALSE otherwise 25250806d53Smrg */ 25350806d53Smrg 25450806d53Smrgstatic Bool 25550806d53SmrgI128Probe(DriverPtr drv, int flags) 25650806d53Smrg{ 25750806d53Smrg int i; 25850806d53Smrg GDevPtr *devSections; 25950806d53Smrg int *usedChips; 26050806d53Smrg int numDevSections; 26150806d53Smrg int numUsed; 26250806d53Smrg Bool foundScreen = FALSE; 26350806d53Smrg 26450806d53Smrg /* 26550806d53Smrg * Check if there has been a chipset override in the config file. 26650806d53Smrg * For this we must find out if there is an active device section which 26750806d53Smrg * is relevant, i.e., which has no driver specified or has THIS driver 26850806d53Smrg * specified. 26950806d53Smrg */ 27050806d53Smrg 27150806d53Smrg if ((numDevSections = xf86MatchDevice(I128_DRIVER_NAME, 27250806d53Smrg &devSections)) <= 0) { 27350806d53Smrg /* 27450806d53Smrg * There's no matching device section in the config file, so quit 27550806d53Smrg * now. 27650806d53Smrg */ 27750806d53Smrg return FALSE; 27850806d53Smrg } 27950806d53Smrg 28050806d53Smrg /* 28150806d53Smrg * We need to probe the hardware first. We then need to see how this 28250806d53Smrg * fits in with what is given in the config file, and allow the config 28350806d53Smrg * file info to override any contradictions. 28450806d53Smrg */ 28550806d53Smrg 28650806d53Smrg /* 28750806d53Smrg * All of the cards this driver supports are PCI, so the "probing" just 28850806d53Smrg * amounts to checking the PCI data that the server has already collected. 28950806d53Smrg */ 2907965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 29150806d53Smrg if (xf86GetPciVideoInfo() == NULL) { 29250806d53Smrg /* 29350806d53Smrg * We won't let anything in the config file override finding no 29450806d53Smrg * PCI video cards at all. This seems reasonable now, but we'll see. 29550806d53Smrg */ 29650806d53Smrg return FALSE; 29750806d53Smrg } 2987965d9acSmrg#endif 29950806d53Smrg 30050806d53Smrg numUsed = xf86MatchPciInstances(I128_NAME, PCI_VENDOR_NUMNINE, 30150806d53Smrg I128Chipsets, I128PciChipsets, devSections, 30250806d53Smrg numDevSections, drv, &usedChips); 30350806d53Smrg 30450806d53Smrg /* Free it since we don't need that list after this */ 305a73423d7Smrg free(devSections); 30650806d53Smrg 30750806d53Smrg if (numUsed <= 0) 30850806d53Smrg return FALSE; 30950806d53Smrg 31050806d53Smrg if (flags & PROBE_DETECT) { 311a73423d7Smrg free(usedChips); 31250806d53Smrg return FALSE; 31350806d53Smrg } 31450806d53Smrg 31550806d53Smrg for (i = 0; i < numUsed; i++) { 31650806d53Smrg ScrnInfoPtr pScrn = NULL; 31750806d53Smrg 31850806d53Smrg /* Allocate a ScrnInfoRec and claim the slot */ 31950806d53Smrg if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], 32050806d53Smrg I128PciChipsets, NULL, NULL, 32150806d53Smrg NULL, NULL, NULL)) == NULL) 32250806d53Smrg continue; 32350806d53Smrg 32450806d53Smrg 32550806d53Smrg /* Fill in what we can of the ScrnInfoRec */ 32650806d53Smrg pScrn->driverVersion = I128_VERSION; 32750806d53Smrg pScrn->driverName = I128_DRIVER_NAME; 32850806d53Smrg pScrn->name = I128_NAME; 32950806d53Smrg pScrn->Probe = I128Probe; 33050806d53Smrg pScrn->PreInit = I128PreInit; 33150806d53Smrg pScrn->ScreenInit = I128ScreenInit; 33250806d53Smrg pScrn->SwitchMode = I128SwitchMode; 33350806d53Smrg pScrn->AdjustFrame = I128AdjustFrame; 33450806d53Smrg pScrn->EnterVT = I128EnterVT; 33550806d53Smrg pScrn->LeaveVT = I128LeaveVT; 33650806d53Smrg pScrn->FreeScreen = I128FreeScreen; 33750806d53Smrg pScrn->ValidMode = I128ValidMode; 33850806d53Smrg foundScreen = TRUE; 33950806d53Smrg } 34050806d53Smrg 341a73423d7Smrg free(usedChips); 34250806d53Smrg 34350806d53Smrg return foundScreen; 34450806d53Smrg} 34550806d53Smrg 34650806d53Smrg 34750806d53Smrg/* Mandatory 34850806d53Smrg * 34950806d53Smrg * The Identify() function is the third entry point called once that the 35050806d53Smrg * module has been linked into the server. This function prints driver 35150806d53Smrg * identity information. 35250806d53Smrg * 35350806d53Smrg * Arguments: 35450806d53Smrg * int flags - currently unused 35550806d53Smrg * Returns: 35650806d53Smrg * no return 35750806d53Smrg */ 35850806d53Smrg 35950806d53Smrgstatic void 36050806d53SmrgI128Identify(int flags) 36150806d53Smrg{ 36250806d53Smrg xf86PrintChipsets(I128_NAME, "driver for Number Nine I128 chipsets", 36350806d53Smrg I128Chipsets); 36450806d53Smrg} 36550806d53Smrg 36650806d53Smrg 36750806d53Smrg/* 36850806d53Smrg * Define options that this driver will accept. Used by AvailableOptions(). 36950806d53Smrg */ 37050806d53Smrg 37150806d53Smrgtypedef enum { 37250806d53Smrg OPTION_FLATPANEL, 37350806d53Smrg OPTION_SW_CURSOR, 37450806d53Smrg OPTION_HW_CURSOR, 37550806d53Smrg OPTION_SYNC_ON_GREEN, 37650806d53Smrg OPTION_NOACCEL, 37750806d53Smrg OPTION_SHOWCACHE, 37850806d53Smrg OPTION_DAC6BIT, 37950806d53Smrg OPTION_DEBUG, 38050806d53Smrg OPTION_ACCELMETHOD 38150806d53Smrg} I128Opts; 38250806d53Smrg 38350806d53Smrgstatic const OptionInfoRec I128Options[] = { 38450806d53Smrg { OPTION_FLATPANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE }, 38550806d53Smrg { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, 38650806d53Smrg { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, 38750806d53Smrg { OPTION_SYNC_ON_GREEN, "SyncOnGreen", OPTV_BOOLEAN, {0}, FALSE }, 38850806d53Smrg { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, 38950806d53Smrg { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE }, 39050806d53Smrg { OPTION_DAC6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE }, 39150806d53Smrg { OPTION_DEBUG, "Debug", OPTV_BOOLEAN, {0}, FALSE }, 39250806d53Smrg { OPTION_ACCELMETHOD, "AccelMethod", OPTV_STRING, {0}, FALSE }, 39350806d53Smrg { -1, NULL, OPTV_NONE, {0}, FALSE } 39450806d53Smrg}; 39550806d53Smrg 39650806d53Smrg 39750806d53Smrg/* Mandatory 39850806d53Smrg * 39950806d53Smrg * The AvailableOptions() function is called to provide the options that 40050806d53Smrg * this driver will accept. This is used with the "-configure" server option. 40150806d53Smrg * 40250806d53Smrg * Arguments: 40350806d53Smrg * int chipid - currently unused 40450806d53Smrg * int busid - currently unused 40550806d53Smrg * Returns: 40650806d53Smrg * const OptionInfoRec * - all accepted options 40750806d53Smrg */ 40850806d53Smrg 40950806d53Smrgstatic const OptionInfoRec * 41050806d53SmrgI128AvailableOptions(int chipid, int busid) 41150806d53Smrg{ 41250806d53Smrg return I128Options; 41350806d53Smrg} 41450806d53Smrg 41550806d53Smrg 41650806d53Smrg/* Mandatory 41750806d53Smrg * 41850806d53Smrg * The PreInit() function called after the Probe() function once at 41950806d53Smrg * server startup and not at each server generation. Only things that 42050806d53Smrg * are persistent across server generations can be initialized here. 42150806d53Smrg * This function determines if the configuration is usable and, if so, 42250806d53Smrg * initializes those parts of the ScrnInfoRec that can be set at the 42350806d53Smrg * beginning of the first server generation. This should be done in 42450806d53Smrg * the least intrusive way possible. Note that although the ScrnInfoRec 42550806d53Smrg * has been allocated, the ScreenRec has not. 42650806d53Smrg * 42750806d53Smrg * Use xf86AllocateScrnInfoPrivateIndex() for persistent data across 42850806d53Smrg * screen generations and AllocateScreenprivateIndex() in ScreenInit() 42950806d53Smrg * for per-generation data. 43050806d53Smrg * 43150806d53Smrg * Arguments: 43250806d53Smrg * ScrnInfoPtr pScrn - 43350806d53Smrg * int flags - PROBE_DEFAULT for normal function 43450806d53Smrg * PROBE_DETECT for use with "-config" and "-probe" 43550806d53Smrg * Returns: 43650806d53Smrg * Bool TRUE if ScrnInfoRec was initialized, FALSE otherwise 43750806d53Smrg */ 43850806d53Smrg 43950806d53Smrgstatic Bool 44050806d53SmrgI128PreInit(ScrnInfoPtr pScrn, int flags) 44150806d53Smrg{ 44250806d53Smrg I128Ptr pI128; 44350806d53Smrg vgaHWPtr hwp; 44450806d53Smrg int i; 44550806d53Smrg ClockRangePtr clockRanges; 44650806d53Smrg MessageType from; 447a73423d7Smrg unsigned long iobase; 44850806d53Smrg char *ramdac = NULL; 44950806d53Smrg CARD32 tmpl, tmph, tmp; 45050806d53Smrg unsigned char n, m, p, mdc, df; 45150806d53Smrg float mclk; 45250806d53Smrg xf86MonPtr mon; 45350806d53Smrg 45450806d53Smrg /* Check the number of entities, and fail if it isn't one. */ 45550806d53Smrg if (pScrn->numEntities != 1) 45650806d53Smrg return FALSE; 45750806d53Smrg 45850806d53Smrg /* Allocate the I128Rec driverPrivate */ 45950806d53Smrg I128GetRec(pScrn); 46050806d53Smrg 46150806d53Smrg pI128 = I128PTR(pScrn); 46250806d53Smrg 46350806d53Smrg /* Get the entity, and make sure it is PCI. */ 46450806d53Smrg pI128->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); 46550806d53Smrg if (pI128->pEnt->location.type != BUS_PCI) 46650806d53Smrg return FALSE; 46750806d53Smrg 46850806d53Smrg if (flags & PROBE_DETECT) { 46950806d53Smrg /* I128ProbeDDC(pScrn, pI128->pEnt->index); */ 47050806d53Smrg return TRUE; 47150806d53Smrg } 47250806d53Smrg 47350806d53Smrg /* Find the PCI info for this screen */ 47450806d53Smrg pI128->PciInfo = xf86GetPciInfoForEntity(pI128->pEnt->index); 4757965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 47650806d53Smrg pI128->PciTag = pciTag(pI128->PciInfo->bus, pI128->PciInfo->device, 47750806d53Smrg pI128->PciInfo->func); 4787965d9acSmrg#endif 47950806d53Smrg 48050806d53Smrg pI128->Primary = xf86IsPrimaryPci(pI128->PciInfo); 48150806d53Smrg 48250806d53Smrg /* The vgahw module should be allocated here when needed */ 48350806d53Smrg if (!xf86LoadSubModule(pScrn, "vgahw")) 48450806d53Smrg return FALSE; 48550806d53Smrg 48650806d53Smrg /* 48750806d53Smrg * Allocate a vgaHWRec 48850806d53Smrg */ 48950806d53Smrg if (!vgaHWGetHWRec(pScrn)) 49050806d53Smrg return FALSE; 49150806d53Smrg 49250806d53Smrg hwp = VGAHWPTR(pScrn); 493a73423d7Smrg vgaHWSetStdFuncs(hwp); 49450806d53Smrg vgaHWGetIOBase(hwp); 49550806d53Smrg 49650806d53Smrg /* Set pScrn->monitor */ 49750806d53Smrg pScrn->monitor = pScrn->confScreen->monitor; 49850806d53Smrg 49950806d53Smrg /* 50050806d53Smrg * The first thing we should figure out is the depth, bpp, etc. 50150806d53Smrg * Our default depth is 8, so pass it to the helper function. 50250806d53Smrg * We support both 24bpp and 32bpp layouts, so indicate that. 50350806d53Smrg */ 50450806d53Smrg 50550806d53Smrg if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) { 50650806d53Smrg return FALSE; 50750806d53Smrg } else { 50850806d53Smrg /* Check that the returned depth is one we support */ 50950806d53Smrg switch (pScrn->depth) { 51050806d53Smrg case 8: 51150806d53Smrg case 15: 51250806d53Smrg case 16: 51350806d53Smrg case 24: 51450806d53Smrg /* OK */ 51550806d53Smrg break; 51650806d53Smrg default: 51750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 51850806d53Smrg "Given depth (%d) is not supported by this driver\n", 51950806d53Smrg pScrn->depth); 52050806d53Smrg return FALSE; 52150806d53Smrg } 52250806d53Smrg } 52350806d53Smrg xf86PrintDepthBpp(pScrn); 52450806d53Smrg 52550806d53Smrg /* 52650806d53Smrg * This must happen after pScrn->display has been set because 52750806d53Smrg * xf86SetWeight references it. 52850806d53Smrg */ 52950806d53Smrg if (pScrn->depth > 8) { 53050806d53Smrg /* The defaults are OK for us */ 53150806d53Smrg rgb zeros = {0, 0, 0}; 53250806d53Smrg 53350806d53Smrg if (!xf86SetWeight(pScrn, zeros, zeros)) { 53450806d53Smrg return FALSE; 53550806d53Smrg } else { 53650806d53Smrg /* XXX check that weight returned is supported */ 53750806d53Smrg ; 53850806d53Smrg } 53950806d53Smrg } 54050806d53Smrg 54150806d53Smrg if (!xf86SetDefaultVisual(pScrn, -1)) { 54250806d53Smrg return FALSE; 54350806d53Smrg } else { 54450806d53Smrg /* We don't currently support DirectColor at > 8bpp */ 54550806d53Smrg if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { 54650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" 54750806d53Smrg " (%s) is not supported at depth %d\n", 54850806d53Smrg xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); 54950806d53Smrg return FALSE; 55050806d53Smrg } 55150806d53Smrg } 55250806d53Smrg 55350806d53Smrg /* We use a programmable clock */ 55450806d53Smrg pScrn->progClock = TRUE; 55550806d53Smrg 55650806d53Smrg /* Collect all of the relevant option flags (fill in pScrn->options) */ 55750806d53Smrg xf86CollectOptions(pScrn, NULL); 55850806d53Smrg 55950806d53Smrg /* Process the options */ 560a73423d7Smrg if (!(pI128->Options = malloc(sizeof(I128Options)))) 56150806d53Smrg return FALSE; 56250806d53Smrg memcpy(pI128->Options, I128Options, sizeof(I128Options)); 56350806d53Smrg xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI128->Options); 56450806d53Smrg 56550806d53Smrg if (pScrn->depth == 8) 56650806d53Smrg pScrn->rgbBits = 8; 56750806d53Smrg 56850806d53Smrg /* 56950806d53Smrg * The preferred method is to use the "hw cursor" option as a tri-state 57050806d53Smrg * option, with the default set above. 57150806d53Smrg */ 57250806d53Smrg from = X_DEFAULT; 57350806d53Smrg pI128->HWCursor = TRUE; 57450806d53Smrg if (xf86GetOptValBool(pI128->Options, OPTION_HW_CURSOR, &pI128->HWCursor)) { 57550806d53Smrg from = X_CONFIG; 57650806d53Smrg } 57750806d53Smrg /* For compatibility, accept this too (as an override) */ 57850806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_SW_CURSOR, FALSE)) { 57950806d53Smrg from = X_CONFIG; 58050806d53Smrg pI128->HWCursor = FALSE; 58150806d53Smrg } 58250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", 58350806d53Smrg pI128->HWCursor ? "HW" : "SW"); 58450806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_NOACCEL, FALSE)) { 58550806d53Smrg pI128->NoAccel = TRUE; 58650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); 58750806d53Smrg } else { 58850806d53Smrg int from = X_DEFAULT; 58950806d53Smrg char *s = xf86GetOptValString(pI128->Options, OPTION_ACCELMETHOD); 59050806d53Smrg pI128->NoAccel = FALSE; 59150806d53Smrg if (!xf86NameCmp(s, "EXA")) { 59250806d53Smrg pI128->exa = TRUE; 59350806d53Smrg from = X_CONFIG; 59450806d53Smrg } 59550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration\n", 59650806d53Smrg pI128->exa ? "EXA" : "XAA"); 59750806d53Smrg } 59850806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_SYNC_ON_GREEN, FALSE)) { 59950806d53Smrg pI128->DACSyncOnGreen = TRUE; 60050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Sync-on-Green enabled\n"); 60150806d53Smrg } else pI128->DACSyncOnGreen = FALSE; 60250806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_SHOWCACHE, FALSE)) { 60350806d53Smrg pI128->ShowCache = TRUE; 60450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n"); 60550806d53Smrg } else pI128->ShowCache = FALSE; 60650806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_DAC6BIT, FALSE)) { 60750806d53Smrg pI128->DAC8Bit = FALSE; 60850806d53Smrg pScrn->rgbBits = 6; 60950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Dac6Bit enabled\n"); 61050806d53Smrg } else pI128->DAC8Bit = TRUE; 61150806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_DEBUG, FALSE)) { 61250806d53Smrg pI128->Debug = TRUE; 61350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Debug enabled\n"); 61450806d53Smrg } else pI128->Debug = FALSE; 61550806d53Smrg if (xf86ReturnOptValBool(pI128->Options, OPTION_FLATPANEL, FALSE)) { 61650806d53Smrg pI128->FlatPanel = TRUE; 61750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "FlatPanel forced\n"); 61850806d53Smrg } else pI128->FlatPanel = FALSE; 61950806d53Smrg 62050806d53Smrg /* 62150806d53Smrg * Set the Chipset and ChipRev. 62250806d53Smrg */ 62350806d53Smrg from = X_PROBED; 6247965d9acSmrg pI128->Chipset = PCI_DEV_DEVICE_ID(pI128->PciInfo); 62550806d53Smrg pScrn->chipset = (char *)xf86TokenToString(I128Chipsets, pI128->Chipset); 6267965d9acSmrg pI128->ChipRev = PCI_DEV_REVISION(pI128->PciInfo); 62750806d53Smrg 62850806d53Smrg /* 62950806d53Smrg * This shouldn't happen because such problems should be caught in 63050806d53Smrg * I128Probe(), but check it just in case. 63150806d53Smrg */ 63250806d53Smrg if (pScrn->chipset == NULL) { 63350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 63450806d53Smrg "ChipID 0x%04X is not recognised\n", pI128->Chipset); 63550806d53Smrg return FALSE; 63650806d53Smrg } 63750806d53Smrg if (pI128->Chipset < 0) { 63850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 63950806d53Smrg "Chipset \"%s\" is not recognised\n", pScrn->chipset); 64050806d53Smrg return FALSE; 64150806d53Smrg } 64250806d53Smrg 64350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset); 6447965d9acSmrg if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x105D) 64550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Number Nine\"\n"); 6467965d9acSmrg else if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x10F0) 64750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Peritek\"\n"); 64850806d53Smrg else 64950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"%x\"\n", 6507965d9acSmrg PCI_SUB_VENDOR_ID(pI128->PciInfo)); 65150806d53Smrg 652a73423d7Smrg iobase = (PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00); 653a73423d7Smrg#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 12 654a73423d7Smrg iobase += hwp->PIOOffset; 655a73423d7Smrg#endif 65650806d53Smrg pI128->RegRec.iobase = iobase; 65750806d53Smrg 65850806d53Smrg pI128->io.rbase_g = inl(iobase) & 0xFFFFFF00; 65950806d53Smrg pI128->io.rbase_w = inl(iobase + 0x04) & 0xFFFFFF00; 66050806d53Smrg pI128->io.rbase_a = inl(iobase + 0x08) & 0xFFFFFF00; 66150806d53Smrg pI128->io.rbase_b = inl(iobase + 0x0C) & 0xFFFFFF00; 66250806d53Smrg pI128->io.rbase_i = inl(iobase + 0x10) & 0xFFFFFF00; 66350806d53Smrg pI128->io.rbase_e = inl(iobase + 0x14) & 0xFFFF8003; 66450806d53Smrg pI128->io.id = inl(iobase + 0x18) & /* 0x7FFFFFFF */ 0xFFFFFFFF; 66550806d53Smrg pI128->io.config1 = inl(iobase + 0x1C) & /* 0xF3333F1F */ 0xFF133706; 66650806d53Smrg pI128->io.config2 = inl(iobase + 0x20) & 0xC1F70FFF; 66750806d53Smrg pI128->io.sgram = inl(iobase + 0x24) & 0xFFFFFFFF; 66850806d53Smrg pI128->io.soft_sw = inl(iobase + 0x28) & 0x0000FFFF; 66950806d53Smrg pI128->io.vga_ctl = inl(iobase + 0x30) & 0x0000FFFF; 67050806d53Smrg 67150806d53Smrg if (pI128->Debug) 67250806d53Smrg I128DumpBaseRegisters(pScrn); 67350806d53Smrg 67450806d53Smrg pI128->RegRec.config1 = pI128->io.config1; 67550806d53Smrg pI128->RegRec.config2 = pI128->io.config2; 67650806d53Smrg pI128->RegRec.sgram = pI128->io.sgram; 67750806d53Smrg if (pI128->Chipset == PCI_CHIP_I128_T2R4) 67850806d53Smrg pI128->io.sgram = 0x211BF030; 67950806d53Smrg else 68050806d53Smrg pI128->io.sgram = 0x21089030; 68150806d53Smrg /* vga_ctl is saved later */ 68250806d53Smrg 68350806d53Smrg /* enable all of the memory mapped windows */ 68450806d53Smrg 68550806d53Smrg pI128->io.config1 &= 0x3300001F; 68650806d53Smrg pI128->io.config1 |= 0x00331F10; 68750806d53Smrg outl(iobase + 0x1C, pI128->io.config1); 68850806d53Smrg 68950806d53Smrg pI128->MemoryType = I128_MEMORY_UNKNOWN; 69050806d53Smrg 69150806d53Smrg if (pI128->Chipset == PCI_CHIP_I128_T2R4) 69250806d53Smrg pI128->MemoryType = I128_MEMORY_SGRAM; 69350806d53Smrg else if (pI128->Chipset == PCI_CHIP_I128_T2R) { 69450806d53Smrg if ((pI128->io.config2&6) == 2) 69550806d53Smrg pI128->MemoryType = I128_MEMORY_SGRAM; 69650806d53Smrg else 69750806d53Smrg pI128->MemoryType = I128_MEMORY_WRAM; 69850806d53Smrg } else if (pI128->Chipset == PCI_CHIP_I128_2) { 6997965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 70050806d53Smrg if (((((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command & 0x03) 7017965d9acSmrg == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 70250806d53Smrg pI128->MemoryType = I128_MEMORY_DRAM; 7037965d9acSmrg#else 7047965d9acSmrg { 7057965d9acSmrg unsigned short temp; 7067965d9acSmrg pci_device_cfg_read_u16(pI128->PciInfo, &temp, 0x4); 7077965d9acSmrg if (((temp & 0x03) == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 7087965d9acSmrg pI128->MemoryType = I128_MEMORY_DRAM; 7097965d9acSmrg } 7107965d9acSmrg#endif 71150806d53Smrg } 71250806d53Smrg 71350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory type %s\n", 71450806d53Smrg pI128->MemoryType == I128_MEMORY_SGRAM ? "SGRAM" : 71550806d53Smrg pI128->MemoryType == I128_MEMORY_DRAM ? "DRAM" : 71650806d53Smrg pI128->MemoryType == I128_MEMORY_WRAM ? "WRAM" : "UNKNOWN"); 71750806d53Smrg 71850806d53Smrg pI128->io.config2 &= 0xFF0FFF7F; 71950806d53Smrg pI128->io.config2 |= 0x00100000; 72050806d53Smrg if (pI128->MemoryType != I128_MEMORY_SGRAM) 72150806d53Smrg pI128->io.config2 |= 0x00400000; 72250806d53Smrg outl(pI128->RegRec.iobase + 0x20, pI128->io.config2); 72350806d53Smrg 72450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n", 7257965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM)); 72650806d53Smrg 72750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "MMIO registers at 0x%lX\n", 7287965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO)); 72950806d53Smrg 730a18ebfb2Smrg#ifndef XSERVER_LIBPCIACCESS 73150806d53Smrg if (xf86RegisterResources(pI128->pEnt->index, NULL, ResExclusive)) { 73250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 73350806d53Smrg "xf86RegisterResources() found resource conflicts\n"); 73450806d53Smrg I128FreeRec(pScrn); 73550806d53Smrg return FALSE; 73650806d53Smrg } 737a18ebfb2Smrg#endif 73850806d53Smrg 73950806d53Smrg /* HW bpp matches reported bpp */ 74050806d53Smrg pI128->bitsPerPixel = pScrn->bitsPerPixel; 74150806d53Smrg pI128->depth = pScrn->depth; 74250806d53Smrg pI128->weight.red = pScrn->weight.red; 74350806d53Smrg pI128->weight.green = pScrn->weight.green; 74450806d53Smrg pI128->weight.blue = pScrn->weight.blue; 74550806d53Smrg pI128->mode = pScrn->modes; 74650806d53Smrg 74750806d53Smrg pScrn->videoRam = I128CountRam(pScrn); 74850806d53Smrg pI128->MemorySize = pScrn->videoRam; 74950806d53Smrg 75050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kByte\n", 75150806d53Smrg pScrn->videoRam); 75250806d53Smrg 75350806d53Smrg 75450806d53Smrg /* 75550806d53Smrg * If the driver can do gamma correction, it should call xf86SetGamma() 75650806d53Smrg * here. 75750806d53Smrg */ 75850806d53Smrg 75950806d53Smrg { 76050806d53Smrg Gamma zeros = {0.0, 0.0, 0.0}; 76150806d53Smrg 76250806d53Smrg if (!xf86SetGamma(pScrn, zeros)) { 76350806d53Smrg return FALSE; 76450806d53Smrg } 76550806d53Smrg } 76650806d53Smrg 76750806d53Smrg if (!I128MapMem(pScrn)) 76850806d53Smrg return FALSE; 76950806d53Smrg 77050806d53Smrg /* 77150806d53Smrg * Reset card if it isn't primary one (must be done after config1 is set) 77250806d53Smrg */ 77350806d53Smrg if (!pI128->Primary) 77450806d53Smrg I128SoftReset(pScrn); 77550806d53Smrg 77650806d53Smrg if (pI128->Chipset != PCI_CHIP_I128) { 77750806d53Smrg pI128->ddc1Read = NULL /*I128DDC1Read*/; 77850806d53Smrg pI128->i2cInit = I128I2CInit; 77950806d53Smrg } 78050806d53Smrg 78150806d53Smrg /* Load DDC if we have the code to use it */ 78250806d53Smrg /* This gives us DDC1 */ 78350806d53Smrg if (pI128->ddc1Read || pI128->i2cInit) { 784af1a9c97Smrg if (!xf86LoadSubModule(pScrn, "ddc")) { 78550806d53Smrg /* ddc module not found, we can do without it */ 78650806d53Smrg pI128->ddc1Read = NULL; 78750806d53Smrg 78850806d53Smrg /* Without DDC, we have no use for the I2C bus */ 78950806d53Smrg pI128->i2cInit = NULL; 79050806d53Smrg } 79150806d53Smrg } 79250806d53Smrg /* - DDC can use I2C bus */ 79350806d53Smrg /* Load I2C if we have the code to use it */ 79450806d53Smrg if (pI128->i2cInit) { 795af1a9c97Smrg if (!xf86LoadSubModule(pScrn, "i2c")) { 79650806d53Smrg /* i2c module not found, we can do without it */ 79750806d53Smrg pI128->i2cInit = NULL; 79850806d53Smrg pI128->I2C = NULL; 79950806d53Smrg } 80050806d53Smrg } 80150806d53Smrg 80250806d53Smrg /* Read and print the Monitor DDC info */ 80350806d53Smrg mon = I128getDDC(pScrn); 80450806d53Smrg 80550806d53Smrg /* see if we can find a flatpanel */ 80650806d53Smrg if (!pI128->FlatPanel && mon) { 80750806d53Smrg for (i=0; i<4; i++) 80850806d53Smrg if (mon->det_mon[i].type == DS_NAME) { 80950806d53Smrg if (strncmp((char *)mon->det_mon[i].section.name, 81050806d53Smrg "SGI 1600SW FP", 13) == 0) { 81150806d53Smrg pI128->FlatPanel = TRUE; 81250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 81350806d53Smrg "Found FlatPanel via DDC2\n"); 81450806d53Smrg } 81550806d53Smrg break; 81650806d53Smrg } 81750806d53Smrg } 81850806d53Smrg 81950806d53Smrg pI128->maxClock = 175000; 82050806d53Smrg 82150806d53Smrg switch (pI128->Chipset) { 82250806d53Smrg case PCI_CHIP_I128: 82350806d53Smrg if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 82450806d53Smrg pI128->RamdacType = IBM528_DAC; 82550806d53Smrg else 82650806d53Smrg pI128->RamdacType = TI3025_DAC; 82750806d53Smrg break; 82850806d53Smrg case PCI_CHIP_I128_2: 82950806d53Smrg if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 83050806d53Smrg pI128->RamdacType = IBM528_DAC; 83150806d53Smrg else 83250806d53Smrg pI128->RamdacType = IBM526_DAC; 83350806d53Smrg pI128->maxClock = 220000; 83450806d53Smrg break; 83550806d53Smrg case PCI_CHIP_I128_T2R: 83650806d53Smrg pI128->RamdacType = IBM526_DAC; 83750806d53Smrg pI128->maxClock = 220000; 83850806d53Smrg break; 83950806d53Smrg case PCI_CHIP_I128_T2R4: 84050806d53Smrg pI128->RamdacType = SILVER_HAMMER_DAC; 84150806d53Smrg pI128->maxClock = 270000; 84250806d53Smrg break; 84350806d53Smrg default: 84450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 84550806d53Smrg "Unknown I128 chipset: %d\n", 84650806d53Smrg pI128->Chipset); 84750806d53Smrg return(FALSE); 84850806d53Smrg } 84950806d53Smrg 85050806d53Smrg if ((pI128->maxClock == 175000) && (pI128->MemorySize == 8192)) 85150806d53Smrg pI128->maxClock = 220000; 85250806d53Smrg 85350806d53Smrg switch(pI128->RamdacType) { 85450806d53Smrg case TI3025_DAC: 85550806d53Smrg /* verify that the ramdac is a TVP3025 */ 85650806d53Smrg 85750806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_ID; MB; 85850806d53Smrg if ((pI128->mem.rbase_g[DATA_TI]&0xFF) != TI_VIEWPOINT25_ID) { 85950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 86050806d53Smrg "Ti3025 Ramdac not found\n"); 86150806d53Smrg return(FALSE); 86250806d53Smrg } 86350806d53Smrg ramdac = "TI3025"; 86450806d53Smrg 86550806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 86650806d53Smrg pI128->mem.rbase_g[DATA_TI] = 0x00; MB; 86750806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 86850806d53Smrg n = pI128->mem.rbase_g[DATA_TI]&0x7f; 86950806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 87050806d53Smrg pI128->mem.rbase_g[DATA_TI] = 0x01; MB; 87150806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 87250806d53Smrg m = pI128->mem.rbase_g[DATA_TI]&0x7f; 87350806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 87450806d53Smrg pI128->mem.rbase_g[DATA_TI] = 0x02; MB; 87550806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 87650806d53Smrg p = pI128->mem.rbase_g[DATA_TI]&0x03; 87750806d53Smrg pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_DCLK_CONTROL; MB; 87850806d53Smrg mdc = pI128->mem.rbase_g[DATA_TI]&0xFF; 87950806d53Smrg if (mdc&0x08) 88050806d53Smrg mdc = (mdc&0x07)*2 + 2; 88150806d53Smrg else 88250806d53Smrg mdc = 1; 88350806d53Smrg mclk = ((1431818 * ((m+2) * 8)) / (n+2) / (1 << p) / mdc + 50) / 100; 88450806d53Smrg 88550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 88650806d53Smrg "Using TI 3025 programmable clock (MCLK %1.3f MHz)\n", 88750806d53Smrg mclk / 1000.0); 88850806d53Smrg pI128->minClock = 20000; 88950806d53Smrg pI128->ProgramDAC = I128ProgramTi3025; 89050806d53Smrg break; 89150806d53Smrg 89250806d53Smrg case IBM524_DAC: 89350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 89450806d53Smrg "IBM524 Ramdac not supported\n"); 89550806d53Smrg return(FALSE); 89650806d53Smrg 89750806d53Smrg case IBM526_DAC: 89850806d53Smrg /* verify that the ramdac is an IBM526 */ 89950806d53Smrg 90050806d53Smrg ramdac = "IBM526"; 90150806d53Smrg tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 90250806d53Smrg tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 90350806d53Smrg pI128->mem.rbase_g[IDXH_I] = 0; MB; 90450806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 90550806d53Smrg tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 90650806d53Smrg 90750806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 90850806d53Smrg n = pI128->mem.rbase_g[DATA_I] & 0x1f; 90950806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 91050806d53Smrg m = pI128->mem.rbase_g[DATA_I]; 91150806d53Smrg df = m>>6; 91250806d53Smrg m &= 0x3f; 91350806d53Smrg if (n == 0) { m=0; n=1; } 91450806d53Smrg mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 91550806d53Smrg 91650806d53Smrg pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 91750806d53Smrg pI128->mem.rbase_g[IDXH_I] = tmph; MB; 91850806d53Smrg if (tmp != 2) { 91950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 92050806d53Smrg "IBM526 Ramdac not found\n"); 92150806d53Smrg return(FALSE); 92250806d53Smrg } 92350806d53Smrg 92450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 92550806d53Smrg "Using IBM 526 programmable clock (MCLK %1.3f MHz)\n", 92650806d53Smrg mclk / 1000.0); 92750806d53Smrg pI128->minClock = 25000; 92850806d53Smrg pI128->ProgramDAC = I128ProgramIBMRGB; 92950806d53Smrg break; 93050806d53Smrg 93150806d53Smrg case IBM528_DAC: 93250806d53Smrg /* verify that the ramdac is an IBM528 */ 93350806d53Smrg 93450806d53Smrg ramdac = "IBM528"; 93550806d53Smrg tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 93650806d53Smrg tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 93750806d53Smrg pI128->mem.rbase_g[IDXH_I] = 0; MB; 93850806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 93950806d53Smrg tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 94050806d53Smrg 94150806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 94250806d53Smrg n = pI128->mem.rbase_g[DATA_I] & 0x1f; 94350806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 94450806d53Smrg m = pI128->mem.rbase_g[DATA_I] & 0xFF; 94550806d53Smrg df = m>>6; 94650806d53Smrg m &= 0x3f; 94750806d53Smrg if (n == 0) { m=0; n=1; } 94850806d53Smrg mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 94950806d53Smrg 95050806d53Smrg pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 95150806d53Smrg pI128->mem.rbase_g[IDXH_I] = tmph; MB; 95250806d53Smrg if (tmp != 2) { 95350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 95450806d53Smrg "IBM528 Ramdac not found\n"); 95550806d53Smrg return(FALSE); 95650806d53Smrg } 95750806d53Smrg 95850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 95950806d53Smrg "Using IBM 528 programmable clock (MCLK %1.3f MHz)\n", 96050806d53Smrg mclk / 1000.0); 96150806d53Smrg pI128->minClock = 25000; 96250806d53Smrg pI128->ProgramDAC = I128ProgramIBMRGB; 96350806d53Smrg break; 96450806d53Smrg 96550806d53Smrg case SILVER_HAMMER_DAC: 96650806d53Smrg /* verify that the ramdac is a Silver Hammer */ 96750806d53Smrg 96850806d53Smrg ramdac = "SilverHammer"; 96950806d53Smrg tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 97050806d53Smrg tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 97150806d53Smrg tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 97250806d53Smrg 97350806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 97450806d53Smrg n = pI128->mem.rbase_g[DATA_I] & 0x1f; 97550806d53Smrg pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 97650806d53Smrg m = pI128->mem.rbase_g[DATA_I]; 97750806d53Smrg df = m>>6; 97850806d53Smrg m &= 0x3f; 97950806d53Smrg if (n == 0) { m=0; n=1; } 98050806d53Smrg mclk = ((3750000 * (m+65)) / n / (8>>df) + 50) / 100; 98150806d53Smrg 98250806d53Smrg pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 98350806d53Smrg pI128->mem.rbase_g[IDXH_I] = tmph; MB; 98450806d53Smrg if (pI128->Chipset != PCI_CHIP_I128_T2R4) { 98550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 98650806d53Smrg "SilverHammer Ramdac not found\n"); 98750806d53Smrg return(FALSE); 98850806d53Smrg } 98950806d53Smrg 99050806d53Smrg if (pI128->mem.rbase_g[CRT_1CON] & 0x00000100) { 99150806d53Smrg pI128->FlatPanel = TRUE; 99250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 99350806d53Smrg "Digital flat panel detected\n"); 99450806d53Smrg } else if (pI128->FlatPanel) 99550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, 99650806d53Smrg "Digital flat panel forced\n"); 99750806d53Smrg 99850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 99950806d53Smrg "Using SilverHammer programmable clock (MCLK %1.3f MHz)\n", 100050806d53Smrg mclk / 1000.0); 100150806d53Smrg pI128->minClock = 25000; 100250806d53Smrg pI128->ProgramDAC = I128ProgramSilverHammer; 100350806d53Smrg break; 100450806d53Smrg 100550806d53Smrg default: 100650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 100750806d53Smrg "Ramdac Unknown\n"); 100850806d53Smrg return(FALSE); 100950806d53Smrg } 101050806d53Smrg 101150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 101250806d53Smrg "Ramdac Type min/max speed: %s %d/%d MHz\n", 101350806d53Smrg ramdac, pI128->minClock/1000, pI128->maxClock/1000); 101450806d53Smrg 101550806d53Smrg /* 101650806d53Smrg * Setup the ClockRanges, which describe what clock ranges are available, 101750806d53Smrg * and what sort of modes they can be used for. 101850806d53Smrg */ 101950806d53Smrg clockRanges = xnfcalloc(sizeof(ClockRange),1); 102050806d53Smrg clockRanges->next = NULL; 102150806d53Smrg clockRanges->minClock = pI128->minClock; 102250806d53Smrg clockRanges->maxClock = pI128->maxClock; 102350806d53Smrg clockRanges->clockIndex = -1; /* programmable */ 102450806d53Smrg clockRanges->interlaceAllowed = TRUE; 102550806d53Smrg clockRanges->doubleScanAllowed = TRUE; 102650806d53Smrg clockRanges->ClockMulFactor = 1; 102750806d53Smrg clockRanges->ClockDivFactor = 1; 102850806d53Smrg 102950806d53Smrg /* 103050806d53Smrg * xf86ValidateModes will check that the mode HTotal and VTotal values 103150806d53Smrg * don't exceed the chipset's limit if pScrn->maxHValue and 103250806d53Smrg * pScrn->maxVValue are set. Since our I128ValidMode() already takes 103350806d53Smrg * care of this, we don't worry about setting them here. 103450806d53Smrg */ 103550806d53Smrg { 103650806d53Smrg int *linePitches = NULL; 103750806d53Smrg int minPitch = 256; 103850806d53Smrg int maxPitch = 2048; 103950806d53Smrg int pitchAlignment = 256; 104050806d53Smrg 104150806d53Smrg if (pI128->MemoryType == I128_MEMORY_WRAM) 104250806d53Smrg pitchAlignment = (128 * 8); 104350806d53Smrg pitchAlignment /= pI128->bitsPerPixel; 104450806d53Smrg 104550806d53Smrg i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, 104650806d53Smrg pScrn->display->modes, clockRanges, 104750806d53Smrg linePitches, minPitch, maxPitch, 104850806d53Smrg pitchAlignment * pI128->bitsPerPixel, 104950806d53Smrg 128, 2048, 105050806d53Smrg pScrn->display->virtualX, 105150806d53Smrg pScrn->display->virtualY, 105250806d53Smrg pI128->MemorySize, 105350806d53Smrg LOOKUP_BEST_REFRESH); 105450806d53Smrg 105550806d53Smrg pI128->displayWidth = pScrn->virtualX; 105650806d53Smrg 105750806d53Smrg if ((pScrn->virtualX % pitchAlignment) != 0) 105850806d53Smrg pI128->displayWidth += pitchAlignment - 105950806d53Smrg (pScrn->virtualX % pitchAlignment); 106050806d53Smrg } 106150806d53Smrg 106250806d53Smrg if (i == -1) { 106350806d53Smrg I128FreeRec(pScrn); 106450806d53Smrg return FALSE; 106550806d53Smrg } 106650806d53Smrg 106750806d53Smrg /* Prune the modes marked as invalid */ 106850806d53Smrg xf86PruneDriverModes(pScrn); 106950806d53Smrg 107050806d53Smrg if (i == 0 || pScrn->modes == NULL) { 107150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); 107250806d53Smrg I128FreeRec(pScrn); 107350806d53Smrg return FALSE; 107450806d53Smrg } 107550806d53Smrg 107650806d53Smrg if ((pI128->MemorySize > 4096) && 107750806d53Smrg (pI128->MemoryType != I128_MEMORY_DRAM) && 107850806d53Smrg (pI128->MemoryType != I128_MEMORY_SGRAM)) 107950806d53Smrg pI128->displayOffset = 0x400000L % 108050806d53Smrg (pI128->displayWidth * (pI128->bitsPerPixel/8)); 108150806d53Smrg else 108250806d53Smrg pI128->displayOffset = 0; 108350806d53Smrg 108450806d53Smrg pI128->MemoryPtr = 108550806d53Smrg (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 108650806d53Smrg 108750806d53Smrg /* Set the current mode to the first in the list */ 108850806d53Smrg pScrn->currentMode = pScrn->modes; 108950806d53Smrg 109050806d53Smrg /* Print the list of modes being used */ 109150806d53Smrg xf86PrintModes(pScrn); 109250806d53Smrg 109350806d53Smrg /* Set display resolution */ 109450806d53Smrg xf86SetDpi(pScrn, 0, 0); 109550806d53Smrg 109650806d53Smrg if (!xf86LoadSubModule(pScrn, "fb")) { 109750806d53Smrg I128FreeRec(pScrn); 109850806d53Smrg return FALSE; 109950806d53Smrg } 110050806d53Smrg 110150806d53Smrg /* Load the acceleration engine */ 110250806d53Smrg if (!pI128->NoAccel) { 110350806d53Smrg if (pI128->exa) { 110450806d53Smrg XF86ModReqInfo req; 110550806d53Smrg int errmaj, errmin; 110650806d53Smrg 110750806d53Smrg memset(&req, 0, sizeof(req)); 110850806d53Smrg req.majorversion = 2; 110950806d53Smrg req.minorversion = 0; 111050806d53Smrg if (!LoadSubModule(pScrn->module, "exa", NULL, NULL, NULL, &req, 111150806d53Smrg &errmaj, &errmin)) 111250806d53Smrg { 111350806d53Smrg LoaderErrorMsg(NULL, "exa", errmaj, errmin); 111450806d53Smrg I128FreeRec(pScrn); 111550806d53Smrg return FALSE; 1116af1a9c97Smrg } 111750806d53Smrg } else { 111850806d53Smrg if (!xf86LoadSubModule(pScrn, "xaa")) { 1119a73423d7Smrg xf86DrvMsg(pScrn->scrnIndex, X_WARNING, 1120a73423d7Smrg "No acceleration available\n"); 1121a73423d7Smrg pI128->NoAccel = 1; 1122af1a9c97Smrg } 112350806d53Smrg } 112450806d53Smrg } 112550806d53Smrg 112650806d53Smrg /* Load ramdac if needed */ 112750806d53Smrg if (pI128->HWCursor) { 112850806d53Smrg if (!xf86LoadSubModule(pScrn, "ramdac")) { 112950806d53Smrg I128FreeRec(pScrn); 113050806d53Smrg return FALSE; 113150806d53Smrg } 113250806d53Smrg } 113350806d53Smrg 113450806d53Smrg I128UnmapMem(pScrn); 113550806d53Smrg 113650806d53Smrg if (pI128->Debug) 113750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "PreInit complete\n"); 113850806d53Smrg return TRUE; 113950806d53Smrg} 114050806d53Smrg 114150806d53Smrg 114250806d53Smrgstatic Bool 114350806d53SmrgI128GetRec(ScrnInfoPtr pScrn) 114450806d53Smrg{ 114550806d53Smrg /* 114650806d53Smrg * Allocate an I128Rec, and hook it into pScrn->driverPrivate. 114750806d53Smrg * pScrn->driverPrivate is initialised to NULL, so we can check if 114850806d53Smrg * the allocation has already been done. 114950806d53Smrg */ 115050806d53Smrg if (pScrn->driverPrivate != NULL) 115150806d53Smrg return TRUE; 115250806d53Smrg 115350806d53Smrg pScrn->driverPrivate = xnfcalloc(sizeof(I128Rec), 1); 115450806d53Smrg 115550806d53Smrg return TRUE; 115650806d53Smrg} 115750806d53Smrg 115850806d53Smrgstatic void 115950806d53SmrgI128FreeRec(ScrnInfoPtr pScrn) 116050806d53Smrg{ 116150806d53Smrg if (pScrn->driverPrivate == NULL) 116250806d53Smrg return; 1163a73423d7Smrg free(pScrn->driverPrivate); 116450806d53Smrg pScrn->driverPrivate = NULL; 116550806d53Smrg} 116650806d53Smrg 116750806d53Smrg 116850806d53Smrg 116950806d53Smrg/* 117050806d53Smrg * I128SoftReset -- 117150806d53Smrg * 117250806d53Smrg * Resets drawing engine 117350806d53Smrg */ 117450806d53Smrgstatic void 117550806d53SmrgI128SoftReset(ScrnInfoPtr pScrn) 117650806d53Smrg{ 117750806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 117850806d53Smrg 117950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Performing soft reset\n"); 118050806d53Smrg pI128->io.config1 |= 0x00000002; 118150806d53Smrg outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 118250806d53Smrg usleep(10000); 118350806d53Smrg pI128->io.config1 &= 0xFFFFFFFD; 118450806d53Smrg outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 118550806d53Smrg} 118650806d53Smrg 118750806d53Smrg/* 118850806d53Smrg * I128CountRAM -- 118950806d53Smrg * 119050806d53Smrg * Counts amount of installed RAM 119150806d53Smrg */ 119250806d53Smrgstatic int 119350806d53SmrgI128CountRam(ScrnInfoPtr pScrn) 119450806d53Smrg{ 119550806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 119650806d53Smrg int SizeFound = 0; 119750806d53Smrg 119850806d53Smrg SizeFound = 0; 119950806d53Smrg 120050806d53Smrg switch(pI128->Chipset) { 120150806d53Smrg case PCI_CHIP_I128_T2R4: 120250806d53Smrg /* Use the subsystem ID to determine the memory size */ 12037965d9acSmrg switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0x0007) { 120450806d53Smrg case 0x00: /* 4MB card */ 120550806d53Smrg SizeFound = 4 * 1024; break; 120650806d53Smrg case 0x01: /* 8MB card */ 120750806d53Smrg SizeFound = 8 * 1024; break; 120850806d53Smrg case 0x02: /* 12MB card */ 120950806d53Smrg SizeFound = 12 * 1024; break; 121050806d53Smrg case 0x03: /* 16MB card */ 121150806d53Smrg SizeFound = 16 * 1024; break; 121250806d53Smrg case 0x04: /* 20MB card */ 121350806d53Smrg SizeFound = 20 * 1024; break; 121450806d53Smrg case 0x05: /* 24MB card */ 121550806d53Smrg SizeFound = 24 * 1024; break; 121650806d53Smrg case 0x06: /* 28MB card */ 121750806d53Smrg SizeFound = 28 * 1024; break; 121850806d53Smrg case 0x07: /* 32MB card */ 121950806d53Smrg SizeFound = 32 * 1024; break; 122050806d53Smrg default: /* Unknown board... */ 122150806d53Smrg break; 122250806d53Smrg } 122350806d53Smrg break; 122450806d53Smrg case PCI_CHIP_I128_T2R: 12257965d9acSmrg switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0xFFF7) { 122650806d53Smrg case 0x00: /* 4MB card, no daughtercard */ 122750806d53Smrg SizeFound = 4 * 1024; break; 122850806d53Smrg case 0x01: /* 4MB card, 4MB daughtercard */ 122950806d53Smrg case 0x04: /* 8MB card, no daughtercard */ 123050806d53Smrg SizeFound = 8 * 1024; break; 123150806d53Smrg case 0x02: /* 4MB card, 8MB daughtercard */ 123250806d53Smrg case 0x05: /* 8MB card, 4MB daughtercard */ 123350806d53Smrg SizeFound = 12 * 1024; break; 123450806d53Smrg case 0x06: /* 8MB card, 8MB daughtercard */ 123550806d53Smrg SizeFound = 16 * 1024; break; 123650806d53Smrg case 0x03: /* 4MB card, 16 daughtercard */ 123750806d53Smrg SizeFound = 20 * 1024; break; 123850806d53Smrg case 0x07: /* 8MB card, 16MB daughtercard */ 123950806d53Smrg SizeFound = 24 * 1024; break; 124050806d53Smrg default: 124150806d53Smrg break; 124250806d53Smrg } 124350806d53Smrg } 124450806d53Smrg 124550806d53Smrg if (SizeFound == 0) { 124650806d53Smrg SizeFound = 2048; /* default to 2MB */ 124750806d53Smrg if (pI128->io.config1 & 0x04) /* 128 bit mode */ 124850806d53Smrg SizeFound <<= 1; 124950806d53Smrg if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 125050806d53Smrg SizeFound <<= 1; 125150806d53Smrg } 125250806d53Smrg return SizeFound; 125350806d53Smrg} 125450806d53Smrg 125550806d53Smrg 125650806d53Smrg/* 125750806d53Smrg * Map the framebuffer and MMIO memory. 125850806d53Smrg */ 125950806d53Smrg 126050806d53Smrgstatic Bool 126150806d53SmrgI128MapMem(ScrnInfoPtr pScrn) 126250806d53Smrg{ 126350806d53Smrg I128Ptr pI128; 126450806d53Smrg 126550806d53Smrg pI128 = I128PTR(pScrn); 126650806d53Smrg 126750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Mapping memory\n"); 126850806d53Smrg 126950806d53Smrg if (pI128->mem.rbase_g != NULL) 127050806d53Smrg return TRUE; 127150806d53Smrg 127250806d53Smrg /* 127350806d53Smrg * Map IO registers to virtual address space 127450806d53Smrg */ 12757965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 127650806d53Smrg pI128->mem.mw0_ad = (unsigned char *)xf86MapPciMem(pScrn->scrnIndex, 127750806d53Smrg VIDMEM_FRAMEBUFFER, 127850806d53Smrg pI128->PciTag, 127950806d53Smrg pI128->PciInfo->memBase[0] & 0xFFC00000, 128050806d53Smrg pI128->MemorySize*1024); 12817965d9acSmrg#else 12827965d9acSmrg { 12837965d9acSmrg void** result = (void**)&pI128->mem.mw0_ad; 12847965d9acSmrg int err = pci_device_map_range(pI128->PciInfo, 12857965d9acSmrg PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xffc00000, 12867965d9acSmrg pI128->MemorySize * 1024, 12877965d9acSmrg PCI_DEV_MAP_FLAG_WRITABLE | 12887965d9acSmrg PCI_DEV_MAP_FLAG_WRITE_COMBINE, 12897965d9acSmrg result); 12907965d9acSmrg if (err) 12917965d9acSmrg return FALSE; 12927965d9acSmrg } 12937965d9acSmrg#endif 12947965d9acSmrg 129550806d53Smrg if (pI128->mem.mw0_ad == NULL) 129650806d53Smrg return FALSE; 129750806d53Smrg 129850806d53Smrg pI128->MemoryPtr = pI128->mem.mw0_ad; 129950806d53Smrg 13007965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 130150806d53Smrg pI128->mem.rbase_g = (CARD32 *)xf86MapPciMem(pScrn->scrnIndex, 130250806d53Smrg VIDMEM_MMIO | VIDMEM_MMIO_32BIT, 130350806d53Smrg pI128->PciTag, 130450806d53Smrg pI128->PciInfo->memBase[4] & 0xFFFF0000, 130550806d53Smrg 64*1024); 13067965d9acSmrg#else 13077965d9acSmrg { 13087965d9acSmrg void** result = (void**)&pI128->mem.rbase_g; 13097965d9acSmrg int err = pci_device_map_range(pI128->PciInfo, 13107965d9acSmrg PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xffff0000, 13117965d9acSmrg 64 * 1024, 13127965d9acSmrg PCI_DEV_MAP_FLAG_WRITABLE, 13137965d9acSmrg result); 13147965d9acSmrg if (err) 13157965d9acSmrg return FALSE; 13167965d9acSmrg } 13177965d9acSmrg#endif 131850806d53Smrg if (pI128->mem.rbase_g == NULL) 131950806d53Smrg return FALSE; 132050806d53Smrg 132150806d53Smrg pI128->mem.rbase_w = pI128->mem.rbase_g + ( 8 * 1024)/4; 132250806d53Smrg pI128->mem.rbase_a = pI128->mem.rbase_g + (16 * 1024)/4; 132350806d53Smrg pI128->mem.rbase_b = pI128->mem.rbase_g + (24 * 1024)/4; 132450806d53Smrg pI128->mem.rbase_i = pI128->mem.rbase_g + (32 * 1024)/4; 132550806d53Smrg 132650806d53Smrg return TRUE; 132750806d53Smrg} 132850806d53Smrg 132950806d53Smrg 133050806d53Smrg/* 133150806d53Smrg * Unmap the framebuffer and MMIO memory. 133250806d53Smrg */ 133350806d53Smrg 133450806d53Smrgstatic Bool 133550806d53SmrgI128UnmapMem(ScrnInfoPtr pScrn) 133650806d53Smrg{ 133750806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 133850806d53Smrg 133950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Unmapping memory\n"); 134050806d53Smrg 134150806d53Smrg if (pI128->mem.rbase_g == NULL) 134250806d53Smrg return TRUE; 134350806d53Smrg 134450806d53Smrg /* 134550806d53Smrg * Unmap IO registers to virtual address space 134650806d53Smrg */ 1347af1a9c97Smrg#ifndef XSERVER_LIBPCIACCESS 134850806d53Smrg xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.mw0_ad, 134950806d53Smrg pI128->MemorySize*1024); 1350af1a9c97Smrg#else 1351af1a9c97Smrg pci_device_unmap_range(pI128->PciInfo, pI128->mem.mw0_ad, 1352af1a9c97Smrg pI128->MemorySize*1024); 1353af1a9c97Smrg#endif 135450806d53Smrg pI128->mem.mw0_ad = NULL; 135550806d53Smrg pI128->MemoryPtr = NULL; 135650806d53Smrg 1357af1a9c97Smrg#ifndef XSERVER_LIBPCIACCESS 135850806d53Smrg xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.rbase_g, 64*1024); 1359af1a9c97Smrg#else 1360af1a9c97Smrg pci_device_unmap_range(pI128->PciInfo, pI128->mem.rbase_g, 64*1024); 1361af1a9c97Smrg#endif 136250806d53Smrg pI128->mem.rbase_g = NULL; 136350806d53Smrg pI128->mem.rbase_w = NULL; 136450806d53Smrg pI128->mem.rbase_a = NULL; 136550806d53Smrg pI128->mem.rbase_b = NULL; 136650806d53Smrg pI128->mem.rbase_i = NULL; 136750806d53Smrg 136850806d53Smrg return TRUE; 136950806d53Smrg} 137050806d53Smrg 137150806d53Smrg 137250806d53Smrg/* 137350806d53Smrg * This function saves the video state. 137450806d53Smrg */ 137550806d53Smrgstatic void 137650806d53SmrgI128Save(ScrnInfoPtr pScrn) 137750806d53Smrg{ 137850806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 137950806d53Smrg vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 138050806d53Smrg 138150806d53Smrg if (pI128->Primary) 138250806d53Smrg vgaHWSave(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 138350806d53Smrg 138450806d53Smrg I128SaveState(pScrn); 138550806d53Smrg} 138650806d53Smrg 138750806d53Smrg/* 138850806d53Smrg * Restore the initial (text) mode. 138950806d53Smrg */ 139050806d53Smrgstatic void 139150806d53SmrgI128Restore(ScrnInfoPtr pScrn) 139250806d53Smrg{ 139350806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 139450806d53Smrg vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 139550806d53Smrg 139650806d53Smrg I128RestoreState(pScrn); 139750806d53Smrg 139850806d53Smrg if (pI128->Primary) { 139950806d53Smrg vgaHWProtect(pScrn, TRUE); 140050806d53Smrg vgaHWRestore(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 140150806d53Smrg vgaHWProtect(pScrn, FALSE); 140250806d53Smrg } 140350806d53Smrg} 140450806d53Smrg 140550806d53Smrg/* Usually mandatory */ 140650806d53SmrgBool 1407a73423d7SmrgI128SwitchMode(SWITCH_MODE_ARGS_DECL) 140850806d53Smrg{ 1409a73423d7Smrg SCRN_INFO_PTR(arg); 1410a73423d7Smrg return I128ModeInit(pScrn, mode); 141150806d53Smrg} 141250806d53Smrg 141350806d53Smrg 141450806d53Smrgstatic Bool 141550806d53SmrgI128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) 141650806d53Smrg{ 141750806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 141850806d53Smrg 141950806d53Smrg if (pI128->Debug) 142050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit start\n"); 142150806d53Smrg 142250806d53Smrg /* Initialise the ModeReg values */ 142350806d53Smrg pScrn->vtSema = TRUE; 142450806d53Smrg 142550806d53Smrg if (!I128Init(pScrn, mode)) 142650806d53Smrg return FALSE; 142750806d53Smrg 142850806d53Smrg pI128->ModeSwitched = TRUE; 142950806d53Smrg 143050806d53Smrg pI128->mode = mode; 143150806d53Smrg 143250806d53Smrg if (pI128->Debug) 143350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit complete\n"); 143450806d53Smrg 143550806d53Smrg return TRUE; 143650806d53Smrg} 143750806d53Smrg 143850806d53Smrg 143950806d53Smrg/* Mandatory */ 144050806d53Smrg 144150806d53Smrg/* This gets called at the start of each server generation */ 144250806d53Smrg 144350806d53Smrgstatic Bool 1444a73423d7SmrgI128ScreenInit(SCREEN_INIT_ARGS_DECL) 144550806d53Smrg{ 144650806d53Smrg ScrnInfoPtr pScrn; 144750806d53Smrg I128Ptr pI128; 144850806d53Smrg int ret; 144950806d53Smrg VisualPtr visual; 145050806d53Smrg unsigned char *FBStart; 145150806d53Smrg int width, height, displayWidth; 145250806d53Smrg 145350806d53Smrg /* 145450806d53Smrg * First get the ScrnInfoRec 145550806d53Smrg */ 1456a73423d7Smrg pScrn = xf86ScreenToScrn(pScreen); 145750806d53Smrg 145850806d53Smrg pI128 = I128PTR(pScrn); 145950806d53Smrg 146050806d53Smrg if (pI128->Debug) 146150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit start\n"); 146250806d53Smrg 146350806d53Smrg /* Map the I128 memory and MMIO areas */ 146450806d53Smrg if (!I128MapMem(pScrn)) 146550806d53Smrg return FALSE; 146650806d53Smrg 146750806d53Smrg pI128->MemoryPtr = 146850806d53Smrg (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 146950806d53Smrg 147050806d53Smrg /* Save the current state */ 147150806d53Smrg I128Save(pScrn); 147250806d53Smrg 147350806d53Smrg /* Initialise the first mode */ 147450806d53Smrg if (!I128ModeInit(pScrn, pScrn->currentMode)) 147550806d53Smrg return FALSE; 147650806d53Smrg 147750806d53Smrg /* Darken the screen for aesthetic reasons and set the viewport */ 147850806d53Smrg I128SaveScreen(pScreen, SCREEN_SAVER_ON); 1479a73423d7Smrg pScrn->AdjustFrame(ADJUST_FRAME_ARGS(pScrn, pScrn->frameX0, pScrn->frameY0)); 148050806d53Smrg 148150806d53Smrg /* 148250806d53Smrg * The next step is to setup the screen's visuals, and initialise the 148350806d53Smrg * framebuffer code. In cases where the framebuffer's default 148450806d53Smrg * choices for things like visual layouts and bits per RGB are OK, 148550806d53Smrg * this may be as simple as calling the framebuffer's ScreenInit() 148650806d53Smrg * function. If not, the visuals will need to be setup before calling 148750806d53Smrg * a fb ScreenInit() function and fixed up after. 148850806d53Smrg * 148950806d53Smrg * For most PC hardware at depths >= 8, the defaults that fb uses 149050806d53Smrg * are not appropriate. In this driver, we fixup the visuals after. 149150806d53Smrg */ 149250806d53Smrg 149350806d53Smrg /* 149450806d53Smrg * Reset the visual list. 149550806d53Smrg */ 149650806d53Smrg miClearVisualTypes(); 149750806d53Smrg 149850806d53Smrg /* Setup the visuals we support. */ 149950806d53Smrg 150050806d53Smrg if (!miSetVisualTypes(pScrn->depth, 150150806d53Smrg miGetDefaultVisualMask(pScrn->depth), 150250806d53Smrg pScrn->rgbBits, pScrn->defaultVisual)) 150350806d53Smrg return FALSE; 150450806d53Smrg 150550806d53Smrg if (!miSetPixmapDepths()) 150650806d53Smrg return FALSE; 150750806d53Smrg 150850806d53Smrg 150950806d53Smrg /* 151050806d53Smrg * Call the framebuffer layer's ScreenInit function, and fill in other 151150806d53Smrg * pScreen fields. 151250806d53Smrg */ 151350806d53Smrg 151450806d53Smrg width = pScrn->virtualX; 151550806d53Smrg height = pScrn->virtualY; 151650806d53Smrg displayWidth = pScrn->displayWidth; 151750806d53Smrg 151850806d53Smrg FBStart = pI128->MemoryPtr; 151950806d53Smrg 152050806d53Smrg ret = fbScreenInit(pScreen, FBStart, 152150806d53Smrg width, height, 152250806d53Smrg pScrn->xDpi, pScrn->yDpi, 152350806d53Smrg displayWidth, pScrn->bitsPerPixel); 152450806d53Smrg if (!ret) 152550806d53Smrg return FALSE; 152650806d53Smrg 152750806d53Smrg fbPictureInit(pScreen, 0, 0); 152850806d53Smrg 152950806d53Smrg if (pScrn->bitsPerPixel > 8) { 153050806d53Smrg /* Fixup RGB ordering */ 153150806d53Smrg visual = pScreen->visuals + pScreen->numVisuals; 153250806d53Smrg while (--visual >= pScreen->visuals) { 153350806d53Smrg if ((visual->class | DynamicClass) == DirectColor) { 153450806d53Smrg visual->offsetRed = pScrn->offset.red; 153550806d53Smrg visual->offsetGreen = pScrn->offset.green; 153650806d53Smrg visual->offsetBlue = pScrn->offset.blue; 153750806d53Smrg visual->redMask = pScrn->mask.red; 153850806d53Smrg visual->greenMask = pScrn->mask.green; 153950806d53Smrg visual->blueMask = pScrn->mask.blue; 154050806d53Smrg } 154150806d53Smrg } 154250806d53Smrg } 154350806d53Smrg 154450806d53Smrg xf86SetBlackWhitePixels(pScreen); 154550806d53Smrg 154650806d53Smrg if (!pI128->NoAccel) { 154750806d53Smrg if (pI128->exa) 154850806d53Smrg ret = I128ExaInit(pScreen); 154950806d53Smrg else { 155050806d53Smrg I128DGAInit(pScreen); 155150806d53Smrg ret = I128XaaInit(pScreen); 155250806d53Smrg } 155350806d53Smrg } 155450806d53Smrg 155550806d53Smrg if (!ret) { 155650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Acceleration setup failed\n"); 155750806d53Smrg return FALSE; 155850806d53Smrg } 155950806d53Smrg 156050806d53Smrg miInitializeBackingStore(pScreen); 156150806d53Smrg xf86SetBackingStore(pScreen); 156250806d53Smrg xf86SetSilkenMouse(pScreen); 156350806d53Smrg 156450806d53Smrg /* Initialize software cursor. 156550806d53Smrg Must precede creation of the default colormap */ 156650806d53Smrg miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); 156750806d53Smrg 156850806d53Smrg /* Initialize HW cursor layer. 156950806d53Smrg Must follow software cursor initialization*/ 157050806d53Smrg if (pI128->HWCursor) { 157150806d53Smrg ret = TRUE; 157250806d53Smrg switch(pI128->RamdacType) { 157350806d53Smrg case TI3025_DAC: 157450806d53Smrg ret = I128TIHWCursorInit(pScrn); break; 157550806d53Smrg case IBM524_DAC: 157650806d53Smrg case IBM526_DAC: 157750806d53Smrg case IBM528_DAC: 157850806d53Smrg ret = I128IBMHWCursorInit(pScrn); break; 157950806d53Smrg case SILVER_HAMMER_DAC: 158050806d53Smrg ret = I128IBMHWCursorInit(pScrn); break; 158150806d53Smrg default: 158250806d53Smrg break; 158350806d53Smrg } 158450806d53Smrg if(!ret) 158550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 158650806d53Smrg "Hardware cursor initialization failed\n"); 158750806d53Smrg } 158850806d53Smrg 158950806d53Smrg /* Initialise default colourmap */ 159050806d53Smrg if (!miCreateDefColormap(pScreen)) 159150806d53Smrg return FALSE; 159250806d53Smrg 159350806d53Smrg /* Initialize colormap layer. 159450806d53Smrg Must follow initialization of the default colormap */ 159550806d53Smrg if(!xf86HandleColormaps(pScreen, 256, 8, 159650806d53Smrg I128LoadPalette, NULL, 159750806d53Smrg CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) 159850806d53Smrg return FALSE; 159950806d53Smrg 160050806d53Smrg xf86DPMSInit(pScreen, I128DisplayPowerManagementSet, 0); 160150806d53Smrg 160250806d53Smrg pScrn->memPhysBase = (unsigned long)pI128->MemoryPtr; 160350806d53Smrg pScrn->fbOffset = 0; 160450806d53Smrg 160550806d53Smrg pScreen->SaveScreen = I128SaveScreen; 160650806d53Smrg 160750806d53Smrg /* Wrap the current CloseScreen function */ 160850806d53Smrg pI128->CloseScreen = pScreen->CloseScreen; 160950806d53Smrg pScreen->CloseScreen = I128CloseScreen; 161050806d53Smrg 161150806d53Smrg /* Report any unused options (only for the first generation) */ 161250806d53Smrg if (serverGeneration == 1) { 161350806d53Smrg xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); 161450806d53Smrg } 161550806d53Smrg 161650806d53Smrg if (pI128->Debug) 161750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit complete\n"); 161850806d53Smrg 161950806d53Smrg /* Done */ 162050806d53Smrg return TRUE; 162150806d53Smrg} 162250806d53Smrg 162350806d53Smrg 162450806d53Smrg/* 162550806d53Smrg * This function is used to initialize the Start Address - the first 162650806d53Smrg * displayed location in the video memory. 162750806d53Smrg */ 162850806d53Smrg/* Usually mandatory */ 162950806d53Smrgvoid 1630a73423d7SmrgI128AdjustFrame(ADJUST_FRAME_ARGS_DECL) 163150806d53Smrg{ 1632a73423d7Smrg SCRN_INFO_PTR(arg); 163350806d53Smrg int Base; 163450806d53Smrg I128Ptr pI128; 163550806d53Smrg#define I128_PAN_MASK 0x01FFFFE0 163650806d53Smrg 163750806d53Smrg pI128 = I128PTR(pScrn); 163850806d53Smrg 163950806d53Smrg if (pI128->ShowCache && y && pScrn->vtSema) 164050806d53Smrg y += pScrn->virtualY - 1; 164150806d53Smrg 164250806d53Smrg if (x > (pI128->displayWidth - pI128->mode->HDisplay)) 164350806d53Smrg x = pI128->displayWidth - pI128->mode->HDisplay; 164450806d53Smrg 164550806d53Smrg Base = ((y*pI128->displayWidth + x) * (pI128->bitsPerPixel/8)); 164650806d53Smrg pI128->mem.rbase_g[DB_ADR] = 164750806d53Smrg (Base & I128_PAN_MASK) + pI128->displayOffset; MB; 164850806d53Smrg 164950806d53Smrg /* now warp the cursor after the screen move */ 165050806d53Smrg pI128->AdjustCursorXPos = (Base - (Base & I128_PAN_MASK)) 165150806d53Smrg / (pI128->bitsPerPixel/8); 165250806d53Smrg} 165350806d53Smrg 165450806d53Smrg/* 165550806d53Smrg * This is called when VT switching back to the X server. Its job is 165650806d53Smrg * to reinitialise the video mode. 165750806d53Smrg * 165850806d53Smrg */ 165950806d53Smrg 166050806d53Smrg/* Mandatory */ 166150806d53Smrgstatic Bool 1662a73423d7SmrgI128EnterVT(VT_FUNC_ARGS_DECL) 166350806d53Smrg{ 1664a73423d7Smrg SCRN_INFO_PTR(arg); 166550806d53Smrg 166650806d53Smrg if (!I128ModeInit(pScrn, pScrn->currentMode)) 166750806d53Smrg return FALSE; 1668a73423d7Smrg I128AdjustFrame(ADJUST_FRAME_ARGS(pScrn, pScrn->frameX0, pScrn->frameY0)); 166950806d53Smrg return TRUE; 167050806d53Smrg} 167150806d53Smrg 167250806d53Smrg/* 167350806d53Smrg * This is called when VT switching away from the X server. Its job is 167450806d53Smrg * to restore the previous (text) mode. 167550806d53Smrg * 167650806d53Smrg */ 167750806d53Smrg 167850806d53Smrg/* Mandatory */ 167950806d53Smrgstatic void 1680a73423d7SmrgI128LeaveVT(VT_FUNC_ARGS_DECL) 168150806d53Smrg{ 1682a73423d7Smrg SCRN_INFO_PTR(arg); 168350806d53Smrg 168450806d53Smrg I128Restore(pScrn); 168550806d53Smrg} 168650806d53Smrg 168750806d53Smrg 168850806d53Smrg/* 168950806d53Smrg * This is called at the end of each server generation. It restores the 169050806d53Smrg * original (text) mode. It should also unmap the video memory, and free 169150806d53Smrg * any per-generation data allocated by the driver. It should finish 169250806d53Smrg * by unwrapping and calling the saved CloseScreen function. 169350806d53Smrg */ 169450806d53Smrg 169550806d53Smrg/* Mandatory */ 169650806d53Smrgstatic Bool 1697a73423d7SmrgI128CloseScreen(CLOSE_SCREEN_ARGS_DECL) 169850806d53Smrg{ 1699a73423d7Smrg ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); 170050806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 170150806d53Smrg 170250806d53Smrg if (pScrn->vtSema) { 170350806d53Smrg I128Restore(pScrn); 170450806d53Smrg I128UnmapMem(pScrn); 170550806d53Smrg } 1706a73423d7Smrg#ifdef HAVE_XAA_H 170750806d53Smrg if (pI128->XaaInfoRec) 170850806d53Smrg XAADestroyInfoRec(pI128->XaaInfoRec); 1709a73423d7Smrg#endif 171050806d53Smrg if (pI128->ExaDriver) { 171150806d53Smrg exaDriverFini(pScreen); 1712a73423d7Smrg free(pI128->ExaDriver); 171350806d53Smrg } 171450806d53Smrg if (pI128->CursorInfoRec) 171550806d53Smrg xf86DestroyCursorInfoRec(pI128->CursorInfoRec); 171650806d53Smrg if (pI128->DGAModes) 1717a73423d7Smrg free(pI128->DGAModes); 171850806d53Smrg pScrn->vtSema = FALSE; 171950806d53Smrg 172050806d53Smrg pScreen->CloseScreen = pI128->CloseScreen; 1721a73423d7Smrg return (*pScreen->CloseScreen)(CLOSE_SCREEN_ARGS); 172250806d53Smrg} 172350806d53Smrg 172450806d53Smrg 172550806d53Smrg/* Free up any persistent data structures */ 172650806d53Smrg 172750806d53Smrg/* Optional */ 172850806d53Smrgstatic void 1729a73423d7SmrgI128FreeScreen(FREE_SCREEN_ARGS_DECL) 173050806d53Smrg{ 1731a73423d7Smrg SCRN_INFO_PTR(arg); 173250806d53Smrg /* 173350806d53Smrg * This only gets called when a screen is being deleted. It does not 173450806d53Smrg * get called routinely at the end of a server generation. 173550806d53Smrg */ 173650806d53Smrg if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) 1737a73423d7Smrg vgaHWFreeHWRec(pScrn); 1738a73423d7Smrg 1739a73423d7Smrg I128FreeRec(pScrn); 174050806d53Smrg} 174150806d53Smrg 174250806d53Smrg 174350806d53Smrg/* Checks if a mode is suitable for the selected chipset. */ 174450806d53Smrg 174550806d53Smrg/* Optional */ 174650806d53Smrgstatic ModeStatus 1747a73423d7SmrgI128ValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags) 174850806d53Smrg{ 174950806d53Smrg int lace; 175050806d53Smrg 175150806d53Smrg lace = 1 + ((mode->Flags & V_INTERLACE) != 0); 175250806d53Smrg 175350806d53Smrg if ((mode->CrtcHDisplay <= 2048) && 175450806d53Smrg (mode->CrtcHSyncStart <= 4096) && 175550806d53Smrg (mode->CrtcHSyncEnd <= 4096) && 175650806d53Smrg (mode->CrtcHTotal <= 4096) && 175750806d53Smrg (mode->CrtcVDisplay <= 2048 * lace) && 175850806d53Smrg (mode->CrtcVSyncStart <= 4096 * lace) && 175950806d53Smrg (mode->CrtcVSyncEnd <= 4096 * lace) && 176050806d53Smrg (mode->CrtcVTotal <= 4096 * lace)) { 176150806d53Smrg return(MODE_OK); 176250806d53Smrg } else { 176350806d53Smrg return(MODE_BAD); 176450806d53Smrg } 176550806d53Smrg} 176650806d53Smrg 176750806d53Smrg 176850806d53Smrg/* Do screen blanking */ 176950806d53Smrg 177050806d53Smrg/* Mandatory */ 177150806d53Smrgstatic Bool 177250806d53SmrgI128SaveScreen(ScreenPtr pScreen, int mode) 177350806d53Smrg{ 177450806d53Smrg ScrnInfoPtr pScrn = NULL; 177550806d53Smrg I128Ptr pI128; 177650806d53Smrg Bool on; 177750806d53Smrg 177850806d53Smrg if (pScreen != NULL) 1779a73423d7Smrg pScrn = xf86ScreenToScrn(pScreen); 178050806d53Smrg 178150806d53Smrg on = xf86IsUnblank(mode); 178250806d53Smrg 178350806d53Smrg if ((pScrn != NULL) && pScrn->vtSema) { 178450806d53Smrg pI128 = I128PTR(pScrn); 178550806d53Smrg if (on) { 178650806d53Smrg pI128->mem.rbase_g[CRT_1CON] |= 0x40; MB; 178750806d53Smrg } else { 178850806d53Smrg pI128->mem.rbase_g[CRT_1CON] &= ~0x40; MB; 178950806d53Smrg } 179050806d53Smrg } 179150806d53Smrg return TRUE; 179250806d53Smrg} 179350806d53Smrg 179450806d53Smrg 179550806d53Smrgstatic const int DDC_SDA_IN_MASK = 1 << 1; 179650806d53Smrgstatic const int DDC_SDA_OUT_MASK = 1 << 2; 179750806d53Smrgstatic const int DDC_SCL_IN_MASK = 1 << 3; 179850806d53Smrgstatic const int DDC_SCL_OUT_MASK = 1 << 0; 179950806d53Smrg 180050806d53Smrgstatic const int DDC_MODE_MASK = 3 << 8; 180150806d53Smrg#if 0 180250806d53Smrgstatic const int DDC_MODE_DDC1 = 1 << 8; 180350806d53Smrg#endif 180450806d53Smrgstatic const int DDC_MODE_DDC2 = 2 << 8; 180550806d53Smrg 180650806d53Smrg#if 0 180750806d53Smrgstatic unsigned int 180850806d53SmrgI128DDC1Read(ScrnInfoPtr pScrn) 180950806d53Smrg{ 181050806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 181150806d53Smrg unsigned char val; 181250806d53Smrg unsigned long tmp, ddc; 1813a73423d7Smrg unsigned long iobase; 181450806d53Smrg 181550806d53Smrg iobase = pI128->RegRec.iobase; 181650806d53Smrg ddc = inl(iobase + 0x2C); 181750806d53Smrg if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 181850806d53Smrg outl(iobase + 0x2C, DDC_MODE_DDC1); 18197965d9acSmrg usleep(40); 182050806d53Smrg } 182150806d53Smrg 182250806d53Smrg /* wait for Vsync */ 182350806d53Smrg do { 182450806d53Smrg tmp = inl(iobase + 0x2C); 182550806d53Smrg } while (tmp & 1); 182650806d53Smrg do { 182750806d53Smrg tmp = inl(iobase + 0x2C); 182850806d53Smrg } while (!(tmp & 1)); 182950806d53Smrg 183050806d53Smrg /* Get the result */ 183150806d53Smrg tmp = inl(iobase + 0x2C); 183250806d53Smrg val = tmp & DDC_SDA_IN_MASK; 183350806d53Smrg 183450806d53Smrg if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 183550806d53Smrg outl(iobase + 0x2C, ~DDC_MODE_MASK & ddc); 18367965d9acSmrg usleep(40); 183750806d53Smrg } 183850806d53Smrg 183950806d53Smrg return val; 184050806d53Smrg} 184150806d53Smrg#endif 184250806d53Smrg 184350806d53Smrgstatic void 184450806d53SmrgI128I2CGetBits(I2CBusPtr b, int *clock, int *data) 184550806d53Smrg{ 184650806d53Smrg I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 184750806d53Smrg unsigned long ddc; 1848a73423d7Smrg unsigned long iobase; 184950806d53Smrg#if 0 185050806d53Smrg static int lastclock = -1, lastdata = -1; 185150806d53Smrg#endif 185250806d53Smrg 185350806d53Smrg /* Get the result. */ 185450806d53Smrg iobase = pI128->RegRec.iobase; 185550806d53Smrg ddc = inl(iobase + 0x2C); 185650806d53Smrg 185750806d53Smrg *clock = (ddc & DDC_SCL_IN_MASK) != 0; 185850806d53Smrg *data = (ddc & DDC_SDA_IN_MASK) != 0; 185950806d53Smrg 186050806d53Smrg#if 0 186150806d53Smrg if (pI128->Debug && ((lastclock != *clock) || (lastdata != *data))) { 186250806d53Smrg xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> c %d d %d\n", *clock, *data); 186350806d53Smrg lastclock = *clock; 186450806d53Smrg lastdata = *data; 186550806d53Smrg } 186650806d53Smrg#endif 186750806d53Smrg} 186850806d53Smrg 186950806d53Smrgstatic void 187050806d53SmrgI128I2CPutBits(I2CBusPtr b, int clock, int data) 187150806d53Smrg{ 187250806d53Smrg I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 187350806d53Smrg unsigned char drv, val; 187450806d53Smrg unsigned long ddc; 187550806d53Smrg unsigned long tmp; 1876a73423d7Smrg unsigned long iobase; 187750806d53Smrg 187850806d53Smrg iobase = pI128->RegRec.iobase; 187950806d53Smrg ddc = inl(iobase + 0x2C); 188050806d53Smrg 188150806d53Smrg val = (clock ? DDC_SCL_IN_MASK : 0) | (data ? DDC_SDA_IN_MASK : 0); 188250806d53Smrg drv = ((clock) ? DDC_SCL_OUT_MASK : 0) | ((data) ? DDC_SDA_OUT_MASK : 0); 188350806d53Smrg 188450806d53Smrg tmp = (DDC_MODE_MASK & ddc) | val | drv; 188550806d53Smrg outl(iobase + 0x2C, tmp); 188650806d53Smrg#if 0 188750806d53Smrg if (pI128->Debug) 188850806d53Smrg xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> 0x%x\n", tmp); 188950806d53Smrg#endif 189050806d53Smrg} 189150806d53Smrg 189250806d53Smrg 189350806d53Smrgstatic Bool 189450806d53SmrgI128I2CInit(ScrnInfoPtr pScrn) 189550806d53Smrg{ 189650806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 189750806d53Smrg I2CBusPtr I2CPtr; 1898a73423d7Smrg unsigned long iobase; 189950806d53Smrg unsigned long soft_sw, ddc; 190050806d53Smrg 190150806d53Smrg I2CPtr = xf86CreateI2CBusRec(); 190250806d53Smrg if(!I2CPtr) return FALSE; 190350806d53Smrg 190450806d53Smrg pI128->I2C = I2CPtr; 190550806d53Smrg 190650806d53Smrg I2CPtr->BusName = "DDC"; 190750806d53Smrg I2CPtr->scrnIndex = pScrn->scrnIndex; 190850806d53Smrg I2CPtr->I2CPutBits = I128I2CPutBits; 190950806d53Smrg I2CPtr->I2CGetBits = I128I2CGetBits; 191050806d53Smrg I2CPtr->BitTimeout = 4; 191150806d53Smrg I2CPtr->ByteTimeout = 4; 191250806d53Smrg I2CPtr->AcknTimeout = 4; 191350806d53Smrg I2CPtr->StartTimeout = 4; 191450806d53Smrg 191550806d53Smrg /* soft switch register bits 1,0 control I2C channel */ 191650806d53Smrg iobase = pI128->RegRec.iobase; 191750806d53Smrg soft_sw = inl(iobase + 0x28); 191850806d53Smrg soft_sw &= 0xfffffffc; 191950806d53Smrg soft_sw |= 0x00000001; 192050806d53Smrg outl(iobase + 0x28, soft_sw); 19217965d9acSmrg usleep(1000); 192250806d53Smrg 192350806d53Smrg /* set default as ddc2 mode */ 192450806d53Smrg ddc = inl(iobase + 0x2C); 192550806d53Smrg ddc &= ~DDC_MODE_MASK; 192650806d53Smrg ddc |= DDC_MODE_DDC2; 192750806d53Smrg outl(iobase + 0x2C, ddc); 19287965d9acSmrg usleep(40); 192950806d53Smrg 193050806d53Smrg if (!xf86I2CBusInit(I2CPtr)) { 193150806d53Smrg return FALSE; 193250806d53Smrg } 193350806d53Smrg return TRUE; 193450806d53Smrg} 193550806d53Smrg 193650806d53Smrg 193750806d53Smrgstatic xf86MonPtr 193850806d53SmrgI128getDDC(ScrnInfoPtr pScrn) 193950806d53Smrg{ 194050806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 194150806d53Smrg xf86MonPtr MonInfo = NULL; 194250806d53Smrg 194350806d53Smrg /* Initialize I2C bus - used by DDC if available */ 194450806d53Smrg if (pI128->i2cInit) { 194550806d53Smrg pI128->i2cInit(pScrn); 194650806d53Smrg } 194750806d53Smrg /* Read and output monitor info using DDC2 over I2C bus */ 194850806d53Smrg if (pI128->I2C) { 1949a73423d7Smrg MonInfo = xf86DoEDID_DDC2(XF86_SCRN_ARG(pScrn), pI128->I2C); 195050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", 195150806d53Smrg (void *)MonInfo); 195250806d53Smrg xf86PrintEDID(MonInfo); 195350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n"); 195450806d53Smrg } 195550806d53Smrg if (!MonInfo) { 195650806d53Smrg /* Read and output monitor info using DDC1 */ 195750806d53Smrg if (pI128->ddc1Read) { 1958a73423d7Smrg MonInfo = xf86DoEDID_DDC1(XF86_SCRN_ARG(pScrn), NULL, pI128->ddc1Read ) ; 195950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n", 196050806d53Smrg (void *)MonInfo); 196150806d53Smrg xf86PrintEDID(MonInfo); 196250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n"); 196350806d53Smrg } 196450806d53Smrg } 196550806d53Smrg 196650806d53Smrg if (MonInfo) 196750806d53Smrg xf86SetDDCproperties(pScrn, MonInfo); 196850806d53Smrg 196950806d53Smrg return MonInfo; 197050806d53Smrg} 197150806d53Smrg 197250806d53Smrg 197350806d53Smrg/* 197450806d53Smrg * I128DisplayPowerManagementSet -- 197550806d53Smrg * 197650806d53Smrg * Sets VESA Display Power Management Signaling (DPMS) Mode. 197750806d53Smrg */ 197850806d53Smrgvoid 197950806d53SmrgI128DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, 198050806d53Smrg int flags) 198150806d53Smrg{ 198250806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 198350806d53Smrg CARD32 snc; 198450806d53Smrg 198550806d53Smrg if (pI128->Debug) 198650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "I128DisplayPowerManagementSet: %d\n", PowerManagementMode); 198750806d53Smrg 198850806d53Smrg if (pI128->RamdacType == TI3025_DAC) return; 198950806d53Smrg 199050806d53Smrg snc = pI128->mem.rbase_g[CRT_1CON]; 199150806d53Smrg 199250806d53Smrg switch (PowerManagementMode) 199350806d53Smrg { 199450806d53Smrg case DPMSModeOn: 199550806d53Smrg /* HSync: On, VSync: On */ 199650806d53Smrg snc |= 0x30; 199750806d53Smrg break; 199850806d53Smrg case DPMSModeStandby: 199950806d53Smrg /* HSync: Off, VSync: On */ 200050806d53Smrg snc = (snc & ~0x10) | 0x20; 200150806d53Smrg break; 200250806d53Smrg case DPMSModeSuspend: 200350806d53Smrg /* HSync: On, VSync: Off */ 200450806d53Smrg snc = (snc & ~0x20) | 0x10; 200550806d53Smrg break; 200650806d53Smrg case DPMSModeOff: 200750806d53Smrg /* HSync: Off, VSync: Off */ 200850806d53Smrg snc &= ~0x30; 200950806d53Smrg break; 201050806d53Smrg } 201150806d53Smrg pI128->mem.rbase_g[CRT_1CON] = snc; MB; 201250806d53Smrg} 201350806d53Smrg 201450806d53Smrgstatic void 201550806d53SmrgI128DumpBaseRegisters(ScrnInfoPtr pScrn) 201650806d53Smrg{ 201750806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 201850806d53Smrg 201950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 202050806d53Smrg " PCI Registers\n"); 202150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 202250806d53Smrg " MW0_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 20237965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM), 20247965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xFFC00000), 20257965d9acSmrg PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0x8 ? "" : "not-"); 202650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 202750806d53Smrg " MW1_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 20287965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM), 20297965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0xFFC00000), 20307965d9acSmrg PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0x8 ? "" : "not-"); 203150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 203250806d53Smrg " XYW_AD(A) 0x%08lx addr 0x%08lx\n", 20337965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM), 20347965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM) & 0xFFC00000)); 203550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 203650806d53Smrg " XYW_AD(B) 0x%08lx addr 0x%08lx\n", 20377965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM), 20387965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM) & 0xFFC00000)); 203950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 204050806d53Smrg " RBASE_G 0x%08lx addr 0x%08lx\n", 20417965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM), 20427965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xFFFF0000)); 204350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 204450806d53Smrg " IO 0x%08lx addr 0x%08lx\n", 20457965d9acSmrg (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO), 20467965d9acSmrg (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00)); 204750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 204850806d53Smrg " SSC 0x%08x addr 0x%08x\n", 20497965d9acSmrg (unsigned int)PCI_SUB_DEVICE_ID(pI128->PciInfo), 20507965d9acSmrg (unsigned int)(PCI_SUB_DEVICE_ID(pI128->PciInfo) & 0xFFFFFF00)); 205150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 205250806d53Smrg " SSV 0x%08x addr 0x%08x\n", 20537965d9acSmrg (unsigned int)PCI_SUB_VENDOR_ID(pI128->PciInfo), 20547965d9acSmrg (unsigned int)(PCI_SUB_VENDOR_ID(pI128->PciInfo) & 0xFFFFFF00)); 20557965d9acSmrg#ifndef XSERVER_LIBPCIACCESS 205650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 205750806d53Smrg " RBASE_E 0x%08lx addr 0x%08lx %sdecode-enabled\n\n", 205850806d53Smrg pI128->PciInfo->biosBase, 205950806d53Smrg pI128->PciInfo->biosBase & 0xFFFF8000, 206050806d53Smrg pI128->PciInfo->biosBase & 0x1 ? "" : "not-"); 206150806d53Smrg 206250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 206350806d53Smrg " PCICMDST 0x%08x 0x%08x\n", 206450806d53Smrg ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command, 206550806d53Smrg ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_status); 20667965d9acSmrg#endif 206750806d53Smrg 206850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 206950806d53Smrg " IO Mapped Registers\n"); 207050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 207150806d53Smrg " RBASE_G 0x%08lx addr 0x%08lx\n", 207250806d53Smrg (unsigned long)pI128->io.rbase_g, pI128->io.rbase_g & 0xFFFFFF00UL); 207350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 207450806d53Smrg " RBASE_W 0x%08lx addr 0x%08lx\n", 207550806d53Smrg (unsigned long)pI128->io.rbase_w, pI128->io.rbase_w & 0xFFFFFF00UL); 207650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 207750806d53Smrg " RBASE_A 0x%08lx addr 0x%08lx\n", 207850806d53Smrg (unsigned long)pI128->io.rbase_a, pI128->io.rbase_a & 0xFFFFFF00UL); 207950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 208050806d53Smrg " RBASE_B 0x%08lx addr 0x%08lx\n", 208150806d53Smrg (unsigned long)pI128->io.rbase_b, pI128->io.rbase_b & 0xFFFFFF00UL); 208250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 208350806d53Smrg " RBASE_I 0x%08lx addr 0x%08lx\n", 208450806d53Smrg (unsigned long)pI128->io.rbase_i, pI128->io.rbase_i & 0xFFFFFF00UL); 208550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 208650806d53Smrg " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n\n", 208750806d53Smrg (unsigned long)pI128->io.rbase_e, pI128->io.rbase_e & 0xFFFF8000UL, 208850806d53Smrg pI128->io.rbase_e & 0x7UL); 208950806d53Smrg 209050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 209150806d53Smrg " Miscellaneous IO Registers\n"); 209250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 209350806d53Smrg " ID 0x%08lx\n", (unsigned long)pI128->io.id); 209450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 209550806d53Smrg " CONFIG1 0x%08lx\n", (unsigned long)pI128->io.config1); 209650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 209750806d53Smrg " CONFIG2 0x%08lx\n", (unsigned long)pI128->io.config2); 209850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 209950806d53Smrg " SGRAM 0x%08lx\n", (unsigned long)pI128->io.sgram); 210050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 210150806d53Smrg " SOFT_SW 0x%08lx\n", (unsigned long)pI128->io.soft_sw); 210250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 210350806d53Smrg " VGA_CTL 0x%08lx\n", (unsigned long)pI128->io.vga_ctl); 210450806d53Smrg} 210550806d53Smrg 210650806d53Smrg 210750806d53Smrgvoid 210850806d53SmrgI128DumpActiveRegisters(ScrnInfoPtr pScrn) 210950806d53Smrg{ 211050806d53Smrg I128Ptr pI128 = I128PTR(pScrn); 2111a73423d7Smrg unsigned long iobase; 211250806d53Smrg unsigned long rbase_g, rbase_w, rbase_a, rbase_b, rbase_i, rbase_e; 211350806d53Smrg unsigned long id, config1, config2, sgram, soft_sw, ddc, vga_ctl; 211450806d53Smrg volatile CARD32 *vrba, *vrbg, *vrbw; 211550806d53Smrg 211650806d53Smrg vrba = pI128->mem.rbase_a; 211750806d53Smrg vrbg = pI128->mem.rbase_g; 211850806d53Smrg vrbw = pI128->mem.rbase_w; 211950806d53Smrg 212050806d53Smrg iobase = pI128->RegRec.iobase; 212150806d53Smrg rbase_g = inl(iobase); 212250806d53Smrg rbase_w = inl(iobase + 0x04); 212350806d53Smrg rbase_a = inl(iobase + 0x08); 212450806d53Smrg rbase_b = inl(iobase + 0x0C); 212550806d53Smrg rbase_i = inl(iobase + 0x10); 212650806d53Smrg rbase_e = inl(iobase + 0x14); 212750806d53Smrg id = inl(iobase + 0x18); 212850806d53Smrg config1 = inl(iobase + 0x1C); 212950806d53Smrg config2 = inl(iobase + 0x20); 213050806d53Smrg sgram = inl(iobase + 0x24); 213150806d53Smrg soft_sw = inl(iobase + 0x28); 213250806d53Smrg ddc = inl(iobase + 0x2C); 213350806d53Smrg vga_ctl = inl(iobase + 0x30); 213450806d53Smrg 213550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IO Mapped Registers\n"); 213650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 213750806d53Smrg " RBASE_G 0x%08lx addr 0x%08lx\n", 213850806d53Smrg rbase_g, rbase_g & 0xFFFFFF00); 213950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 214050806d53Smrg " RBASE_W 0x%08lx addr 0x%08lx\n", 214150806d53Smrg rbase_w, rbase_w & 0xFFFFFF00); 214250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 214350806d53Smrg " RBASE_A 0x%08lx addr 0x%08lx\n", 214450806d53Smrg rbase_a, rbase_a & 0xFFFFFF00); 214550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 214650806d53Smrg " RBASE_B 0x%08lx addr 0x%08lx\n", 214750806d53Smrg rbase_b, rbase_b & 0xFFFFFF00); 214850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 214950806d53Smrg " RBASE_I 0x%08lx addr 0x%08lx\n", 215050806d53Smrg rbase_i, rbase_i & 0xFFFFFF00); 215150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 215250806d53Smrg " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n", 215350806d53Smrg rbase_e, rbase_e & 0xFFFF8000, rbase_e & 0x7); 215450806d53Smrg 215550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Miscellaneous IO Registers\n"); 215650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ID 0x%08lx\n", id); 215750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " REV %ld HBT %ld BASE0 %ld VDEN %ld VB %ld BASE1 %ld BASE2 %ld DS %ld\n", 215850806d53Smrg id&7, (id>>3)&3, (id>>6)&3, (id>>8)&3, (id>>10)&1, 215950806d53Smrg (id>>11)&3, (id>>13)&3, (id>>15)&1); 216050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDEN %ld DB %ld BASE3 %ld BASER %ld MDEN %ld TR %ld VS %ld\n", 216150806d53Smrg (id>>16)&3, (id>>18)&1, (id>>19)&3, (id>>21)&7, (id>>24)&3, 216250806d53Smrg (id>>26)&1, (id>>27)&1); 216350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLASS %ld EE %ld\n", 216450806d53Smrg (id>>28)&3, (id>>30)&1); 216550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG1 0x%08lx\n", config1); 216650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VE %ld SFT_RST %ld ONE28 %ld VS %ld\n", 216750806d53Smrg config1&1, (config1>>1)&1, 216850806d53Smrg (config1>>2)&1, (config1>>3)&1); 216950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " G %ld W %ld A %ld B %ld I %ld E %ld W0 %ld W1 %ld XA %ld XB %ld\n", 217050806d53Smrg (config1>>8)&1, (config1>>9)&1, 217150806d53Smrg (config1>>10)&1, (config1>>11)&1, 217250806d53Smrg (config1>>12)&1, (config1>>13)&1, 217350806d53Smrg (config1>>16)&1, (config1>>17)&1, 217450806d53Smrg (config1>>20)&1, (config1>>21)&1); 217550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " HBPRI %ld VBPRI %ld DE1PRI %ld ISAPRI %ld\n", 217650806d53Smrg (config1>>24)&3, (config1>>26)&3, 217750806d53Smrg (config1>>28)&3, (config1>>30)&3); 217850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG2 0x%08lx\n", config2); 217950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DWT %lx EWS %lx DWS %lx MC %lx FBB %ld IOB %ld FST %ld CNT %ld DEC %ld\n", 218050806d53Smrg config2&0x3, (config2>>8)&0xF, 218150806d53Smrg (config2>>16)&0x7, (config2>>20)&0xF, 218250806d53Smrg (config2>>24)&1, (config2>>25)&1, 218350806d53Smrg (config2>>26)&1, (config2>>27)&1, 218450806d53Smrg (config2>>28)&1); 218550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PRE %ld RVD %ld SDAC %ld\n", 218650806d53Smrg (config2>>29)&1, (config2>>30)&1, (config2>>31)&1); 218750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SGRAM 0x%08lx\n", sgram); 218850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SOFT_SW 0x%08lx\n", soft_sw); 218950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDC 0x%08lx\n", ddc); 219050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VGA_CTL 0x%08lx\n", vga_ctl); 219150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MEMMUX %ld VGADEC %ld VIDMUX %ld ENA %ld BUFSEL %ld STR %ld\n", 219250806d53Smrg vga_ctl&1, (vga_ctl>>1)&1, 219350806d53Smrg (vga_ctl>>2)&1, (vga_ctl>>3)&1, 219450806d53Smrg (vga_ctl>>4)&1, (vga_ctl>>5)&1); 219550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " 3C2 %ld DACDEC %ld MSK 0x%02lx\n", 219650806d53Smrg (vga_ctl>>6)&1, 219750806d53Smrg (vga_ctl>>7)&1, 219850806d53Smrg (vga_ctl>>8)&0xff); 219950806d53Smrg 220050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT Registers\n"); 220150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_VCNT 0x%08lx (%ld)\n", 220250806d53Smrg vrbg[0x20/4]&0x000000FFUL, vrbg[0x20/4]&0x000000FFUL); 220350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_HCNT 0x%08lx (%ld)\n", 220450806d53Smrg vrbg[0x24/4]&0x00000FFFUL, vrbg[0x24/4]&0x00000FFFUL); 220550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_ADR 0x%08lx (%ld)\n", 220650806d53Smrg vrbg[0x28/4]&0x01FFFFF0UL, vrbg[0x28/4]&0x01FFFFF0UL); 220750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_PTCH 0x%08lx (%ld)\n", 220850806d53Smrg vrbg[0x2C/4]&0x0000FFF0UL, vrbg[0x2C/4]&0x0000FFF0UL); 220950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HAC 0x%08lx (%ld)\n", 221050806d53Smrg vrbg[0x30/4]&0x00003FFFUL, vrbg[0x30/4]&0x00003FFFUL); 221150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HBL 0x%08lx (%ld)\n", 221250806d53Smrg vrbg[0x34/4]&0x00003FFFUL, vrbg[0x34/4]&0x00003FFFUL); 221350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HFP 0x%08lx (%ld)\n", 221450806d53Smrg vrbg[0x38/4]&0x00003FFFUL, vrbg[0x38/4]&0x00003FFFUL); 221550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HS 0x%08lx (%ld)\n", 221650806d53Smrg vrbg[0x3C/4]&0x00003FFFUL, vrbg[0x3C/4]&0x00003FFFUL); 221750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VAC 0x%08lx (%ld)\n", 221850806d53Smrg vrbg[0x40/4]&0x00000FFFUL, vrbg[0x40/4]&0x00000FFFUL); 221950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VBL 0x%08lx (%ld)\n", 222050806d53Smrg vrbg[0x44/4]&0x00000FFFUL, vrbg[0x44/4]&0x00000FFFUL); 222150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VFP 0x%08lx (%ld)\n", 222250806d53Smrg vrbg[0x48/4]&0x00000FFFUL, vrbg[0x48/4]&0x00000FFFUL); 222350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VS 0x%08lx (%ld)\n", 222450806d53Smrg vrbg[0x4C/4]&0x00000FFFUL, vrbg[0x4C/4]&0x00000FFFUL); 222550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_LCNT 0x%08lx\n", 222650806d53Smrg vrbg[0x50/4]&0x00000FFFUL); 222750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_ZOOM 0x%08lx\n", 222850806d53Smrg vrbg[0x54/4]&0x0000000FUL); 222950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_1CON 0x%08lx PH %ld PV %ld CS %ld INL %ld H/VSE %ld/%ld VE %ld BTS %ld\n", 223050806d53Smrg (unsigned long)vrbg[0x58/4], 223150806d53Smrg vrbg[0x58/4]&1UL, (vrbg[0x58/4]>>1)&1UL, (vrbg[0x58/4]>>2)&1UL, 223250806d53Smrg (vrbg[0x58/4]>>3)&1UL, (vrbg[0x58/4]>>4)&1UL, (vrbg[0x58/4]>>5)&1UL, 223350806d53Smrg (vrbg[0x58/4]>>6)&1UL, (vrbg[0x58/4]>>8)&1UL); 223450806d53Smrg 223550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_2CON 0x%08lx MEM %ld RFR %ld TRD %ld SPL %ld\n", 223650806d53Smrg (unsigned long)vrbg[0x5C/4], 223750806d53Smrg vrbg[0x5C/4]&7UL, (vrbg[0x5C/4]>>8)&1UL, 223850806d53Smrg (vrbg[0x5C/4]>>16)&7UL, (vrbg[0x5C/4]>>24)&1UL); 223950806d53Smrg 224050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory Windows Registers\n"); 224150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_CTRL 0x%08lx\n", 224250806d53Smrg (unsigned long)vrbw[0x00]); 224350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 224450806d53Smrg (vrbw[0x00]>>1)&1UL, (vrbw[0x00]>>2)&1UL, (vrbw[0x00]>>3)&1UL, 224550806d53Smrg (vrbw[0x00]>>4)&3UL, (vrbw[0x00]>>8)&1UL, (vrbw[0x00]>>21)&3UL, 224650806d53Smrg (vrbw[0x00]>>24)&3UL, (vrbw[0x00]>>26)&3UL); 224750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 224850806d53Smrg (vrbw[0x00]>>28)&1UL, (vrbw[0x00]>>29)&1UL, (vrbw[0x00]>>30)&1UL); 224950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_AD 0x%08lx MW0_SZ 0x%08lx MW0_PGE 0x%08lx\n", 225050806d53Smrg vrbw[0x04/4]&0xFFFFF000UL, vrbw[0x08/4]&0x0000000FUL, 225150806d53Smrg vrbw[0x0C/4]&0x000F001FUL); 225250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_ORG10 0x%08lx MW0_ORG14 0x%08lx MW0_MSRC 0x%08lx\n", 225350806d53Smrg vrbw[0x10/4]&0x01FFF000UL, vrbw[0x14/4]&0x01FFF000UL, 225450806d53Smrg vrbw[0x18/4]&0x00FFFF00UL); 225550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_WKEY 0x%08lx MW0_KYDAT 0x%08lx MW0_MASK 0x%08lx\n", 225650806d53Smrg (unsigned long)vrbw[0x1C/4], vrbw[0x20/4]&0x000F000FUL, 225750806d53Smrg (unsigned long)vrbw[0x24/4]); 225850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_CTRL 0x%08lx\n", 225950806d53Smrg (unsigned long)vrbw[0x28/4]); 226050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 226150806d53Smrg (vrbw[0x28/4]>>1)&1UL, (vrbw[0x28/4]>>2)&1UL, (vrbw[0x28/4]>>3)&1UL, 226250806d53Smrg (vrbw[0x28/4]>>4)&3UL, (vrbw[0x28/4]>>8)&1UL, (vrbw[0x28/4]>>21)&3UL, 226350806d53Smrg (vrbw[0x28/4]>>24)&3UL, (vrbw[0x28/4]>>26)&3UL); 226450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 226550806d53Smrg (vrbw[0x28/4]>>28)&1UL, (vrbw[0x28/4]>>29)&1UL, (vrbw[0x28/4]>>30)&1UL); 226650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_AD 0x%08lx MW1_SZ 0x%08lx MW1_PGE 0x%08lx\n", 226750806d53Smrg vrbw[0x2C/4]&0xFFFFF000UL, vrbw[0x30/4]&0x0000000FUL, 226850806d53Smrg vrbw[0x34/4]&0x000F001FUL); 226950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_ORG10 0x%08lx MW1_ORG14 0x%08lx MW1_MSRC 0x%08lx\n", 227050806d53Smrg vrbw[0x38/4]&0x01FFF000UL, vrbw[0x3c/4]&0x01FFF000UL, 227150806d53Smrg vrbw[0x40/4]&0x00FFFF00UL); 227250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_WKEY 0x%08lx MW1_KYDAT 0x%08lx MW1_MASK 0x%08lx\n", 227350806d53Smrg (unsigned long)vrbw[0x44/4], vrbw[0x48/4]&0x000F000FUL, 227450806d53Smrg (unsigned long)vrbw[0x4C/4]); 227550806d53Smrg 227650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Engine A Registers\n"); 227750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTP 0x%08lx\n", 227850806d53Smrg vrba[0x00/4]&0x03UL); 227950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTM 0x%08lx\n", 228050806d53Smrg vrba[0x04/4]&0x03UL); 228150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FLOW 0x%08lx\n", 228250806d53Smrg vrba[0x08/4]&0x0FUL); 228350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUSY 0x%08lx\n", 228450806d53Smrg vrba[0x0C/4]&0x01UL); 228550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XYW_AD 0x%08lx SIZE 0x%lx ADDR 0x%lx\n", 228650806d53Smrg vrba[0x10/4]&0xFFFFFF00UL, (vrba[0x10/4]>>8)&0x0000000FUL, 228750806d53Smrg vrba[0x10/4]&0xFFFFF000UL); 228850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ZCTL 0x%08lx\n", 228950806d53Smrg (unsigned long)vrba[0x18/4]); 229050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUF_CTRL 0x%08lx\n", 229150806d53Smrg (unsigned long)vrba[0x20/4]); 229250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld DEN %ld DSE %ld VSE %ld MSE %ld\n", 229350806d53Smrg (vrba[0x20/4]>>1)&1UL, (vrba[0x20/4]>>2)&1UL, (vrba[0x20/4]>>3)&1UL, 229450806d53Smrg (vrba[0x20/4]>>8)&3UL, (vrba[0x20/4]>>10)&3UL, (vrba[0x20/4]>>12)&1UL, 229550806d53Smrg (vrba[0x20/4]>>13)&1UL, (vrba[0x20/4]>>14)&1UL); 229650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PS %ld MDM %ld PSIZE %ld CRCO %ld\n", 229750806d53Smrg (vrba[0x20/4]>>16)&0x1FUL, 229850806d53Smrg (vrba[0x20/4]>>21)&3UL, (vrba[0x20/4]>>24)&3UL, (vrba[0x20/4]>>30)&3UL); 229950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_PGE 0x%08lx DVPGE 0x%lx MPGE 0x%lx\n", 230050806d53Smrg vrba[0x24/4]&0x000F001FUL, (vrba[0x24/4]>>8)&0x01FUL, 230150806d53Smrg (vrba[0x24/4]&0x000F0000UL)>>16); 230250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SORG 0x%08lx\n", 230350806d53Smrg vrba[0x28/4]&0x0FFFFFFFUL); 230450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DORG 0x%08lx\n", 230550806d53Smrg vrba[0x2C/4]&0x0FFFFFFFUL); 230650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_MSRC 0x%08lx\n", 230750806d53Smrg vrba[0x30/4]&0x03FFFFF0UL); 230850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_WKEY 0x%08lx\n", 230950806d53Smrg (unsigned long)vrba[0x38/4]); 231050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_ZPTCH 0x%08lx\n", 231150806d53Smrg vrba[0x3C/4]&0x000FFFF0UL); 231250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SPTCH 0x%08lx\n", 231350806d53Smrg vrba[0x40/4]&0x0000FFF0UL); 231450806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DPTCH 0x%08lx\n", 231550806d53Smrg vrba[0x44/4]&0x0000FFF0UL); 231650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD 0x%08lx\n", 231750806d53Smrg vrba[0x48/4]&0x7FFFFFFFUL); 231850806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " OPC 0x%02lx ROP 0x%02lx STYLE 0x%02lx CLP 0x%lx PATRN 0x%lx HDF %ld\n", 231950806d53Smrg vrba[0x48/4]&0x00FFUL, (vrba[0x48/4]>>8)&0x00FFUL, (vrba[0x48/4]>>16)&0x001FUL, 232050806d53Smrg (vrba[0x48/4]>>21)&7UL, (vrba[0x48/4]>>24)&0x0FUL, (vrba[0x48/4]>>28)&7UL); 232150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_SHADE 0x%02lx\n", 232250806d53Smrg vrba[0x4C/4]&0x00FFUL); 232350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_OPC 0x%02lx\n", 232450806d53Smrg vrba[0x50/4]&0x00FFUL); 232550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_ROP 0x%02lx\n", 232650806d53Smrg vrba[0x54/4]&0x00FFUL); 232750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_STYLE 0x%02lx\n", 232850806d53Smrg vrba[0x58/4]&0x001FUL); 232950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_PATRN 0x%02lx\n", 233050806d53Smrg vrba[0x5C/4]&0x000FUL); 233150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_CLP 0x%02lx\n", 233250806d53Smrg vrba[0x60/4]&0x0007UL); 233350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_HDF 0x%02lx\n", 233450806d53Smrg vrba[0x64/4]&0x0007UL); 233550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FORE 0x%08lx\n", 233650806d53Smrg (unsigned long)vrba[0x68/4]); 233750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BACK 0x%08lx\n", 233850806d53Smrg (unsigned long)vrba[0x6C/4]); 233950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MASK 0x%08lx\n", 234050806d53Smrg (unsigned long)vrba[0x70/4]); 234150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " RMSK 0x%08lx\n", 234250806d53Smrg (unsigned long)vrba[0x74/4]); 234350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " LPAT 0x%08lx\n", 234450806d53Smrg (unsigned long)vrba[0x78/4]); 234550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PCTRL 0x%08lx\n", 234650806d53Smrg (unsigned long)vrba[0x7C/4]); 234750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PLEN 0x%02ld PSCL 0x%02ld SPTR 0x%02ld SSCL 0x%lx STATE 0x%04lx\n", 234850806d53Smrg vrba[0x7C/4]&0x1FUL, (vrba[0x7C/4]>>5)&7UL, (vrba[0x7C/4]>>8)&0x1FUL, 234950806d53Smrg (vrba[0x7C/4]>>13)&7UL, (vrba[0x7C/4]>>16)&0xFFFFUL); 235050806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPTL 0x%08lx CLPTLY 0x%04lx CLPTLX 0x%04lx\n", 235150806d53Smrg (unsigned long)vrba[0x80/4], vrba[0x80/4]&0x00FFFFUL, (vrba[0x80/4]>>16)&0x00FFFFUL); 235250806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPBR 0x%08lx CLPBRY 0x%04lx CLPBRX 0x%04lx\n", 235350806d53Smrg (unsigned long)vrba[0x84/4], 235450806d53Smrg vrba[0x84/4]&0x00FFFFUL, (vrba[0x84/4]>>16)&0x00FFFFUL); 235550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY0 0x%08lx\n", 235650806d53Smrg (unsigned long)vrba[0x88/4]); 235750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY1 0x%08lx\n", 235850806d53Smrg (unsigned long)vrba[0x8C/4]); 235950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY2 0x%08lx\n", 236050806d53Smrg (unsigned long)vrba[0x90/4]); 236150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY3 0x%08lx\n", 236250806d53Smrg (unsigned long)vrba[0x94/4]); 236350806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY4 0x%08lx\n", 236450806d53Smrg (unsigned long)vrba[0x98/4]); 236550806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY5 0x%08lx\n", 236650806d53Smrg (unsigned long)vrba[0x9C/4]); 236750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY6 0x%08lx\n", 236850806d53Smrg (unsigned long)vrba[0xA0/4]); 236950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY7 0x%08lx\n", 237050806d53Smrg (unsigned long)vrba[0xA4/4]); 237150806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY8 0x%08lx\n", 237250806d53Smrg (unsigned long)vrba[0xA8/4]); 237350806d53Smrg if (pI128->RamdacType != TI3025_DAC) 237450806d53Smrg I128DumpIBMDACRegisters(pScrn, vrbg); 237550806d53Smrg} 237650806d53Smrg 237750806d53Smrgstatic const unsigned char ibm52Xmask[0xA0] = { 237850806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 00-07 */ 237950806d53Smrg0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 08-0F */ 238050806d53Smrg0xFF, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, /* 10-17 */ 238150806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 18-1F */ 238250806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, /* 20-27 */ 238350806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 28-2F */ 238450806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 30-37 */ 238550806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 38-3F */ 238650806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 40-47 */ 238750806d53Smrg0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48-4F */ 238850806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 238950806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 239050806d53Smrg0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60-67 */ 239150806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 68-6F */ 239250806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 70-77 */ 239350806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 78-7F */ 239450806d53Smrg0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, /* 80-87 */ 239550806d53Smrg0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, /* 88-8F */ 239650806d53Smrg0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 90-97 */ 239750806d53Smrg0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 98-9F */ 239850806d53Smrg}; 239950806d53Smrg 240050806d53Smrgstatic void 240150806d53SmrgI128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg) 240250806d53Smrg{ 240350806d53Smrg unsigned char ibmr[0x100]; 240450806d53Smrg char buf[128], tbuf[10]; 240550806d53Smrg int i; 240650806d53Smrg 240750806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IBM52X Registers\n"); 240850806d53Smrg 240950806d53Smrg vrbg[IDXH_I] = 0x00; 241050806d53Smrg vrbg[IDXH_I] = 0x00; 241150806d53Smrg vrbg[IDXCTL_I] = 0x01; 241250806d53Smrg buf[0] = '\0'; 241350806d53Smrg 241450806d53Smrg for (i=0; i<0xA0; i++) { 241550806d53Smrg if ((i%16 == 0) && (i != 0)) { 241650806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 241750806d53Smrg buf[0] = '\0'; 241850806d53Smrg } 241950806d53Smrg if (ibm52Xmask[i] == 0x00) { 242050806d53Smrg strcat(buf, " .."); 242150806d53Smrg } else { 242250806d53Smrg vrbg[IDXL_I] = i; 242350806d53Smrg ibmr[i] = vrbg[DATA_I] & 0xFF; 242450806d53Smrg ibmr[i] &= ibm52Xmask[i]; 242550806d53Smrg sprintf(tbuf, " %02x", ibmr[i]); 242650806d53Smrg strcat(buf, tbuf); 242750806d53Smrg } 242850806d53Smrg } 242950806d53Smrg xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 243050806d53Smrg} 243150806d53Smrg 2432