i128_driver.c revision a18ebfb2
1/* 2 * Copyright 1995-2000 by Robin Cutshaw <robin@XFree86.Org> 3 * Copyright 1998 by Number Nine Visual Technology, Inc. 4 * 5 * Permission to use, copy, modify, distribute, and sell this software and its 6 * documentation for any purpose is hereby granted without fee, provided that 7 * the above copyright notice appear in all copies and that both that 8 * copyright notice and this permission notice appear in supporting 9 * documentation, and that the name of Robin Cutshaw not be used in 10 * advertising or publicity pertaining to distribution of the software without 11 * specific, written prior permission. Robin Cutshaw and Number Nine make no 12 * representations about the suitability of this software for any purpose. It 13 * is provided "as is" without express or implied warranty. 14 * 15 * ROBIN CUTSHAW AND NUMBER NINE DISCLAIM ALL WARRANTIES WITH REGARD TO THIS 16 * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND 17 * FITNESS, IN NO EVENT SHALL ROBIN CUTSHAW OR NUMBER NINE BE LIABLE FOR 18 * ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 19 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN 20 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING 21 * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 * 23 */ 24 25#ifdef HAVE_CONFIG_H 26#include "config.h" 27#endif 28 29 30 31/* All drivers should typically include these */ 32#include "xf86.h" 33#include "xf86_OSproc.h" 34#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 6 35#include "xf86Resources.h" 36#include "xf86RAC.h" 37#endif 38 39#include "compiler.h" 40 41/* Drivers for PCI hardware need this */ 42#include "xf86PciInfo.h" 43 44/* Drivers that need to access the PCI config space directly need this */ 45#include "xf86Pci.h" 46 47/* vgaHW module is only used to save/restore fonts by this driver */ 48#include "vgaHW.h" 49 50/* All drivers initialising the SW cursor need this */ 51#include "mipointer.h" 52 53/* All drivers implementing backing store need this */ 54#include "mibstore.h" 55#include "micmap.h" 56 57#include "xf86DDC.h" 58#include "vbe.h" 59 60#include "xaa.h" 61#include "xf86cmap.h" 62#include "fb.h" 63 64#include "xf86xv.h" 65#include <X11/extensions/Xv.h> 66 67/* driver specific includes */ 68#include "i128.h" 69#include "i128reg.h" 70 71#include <unistd.h> 72 73/* 74 * Forward definitions for the functions that make up the driver. 75 */ 76 77/* Mandatory functions */ 78static const OptionInfoRec * I128AvailableOptions(int chipid, int busid); 79static void I128Identify(int flags); 80static Bool I128Probe(DriverPtr drv, int flags); 81static Bool I128PreInit(ScrnInfoPtr pScrn, int flags); 82static Bool I128ScreenInit(int Index, ScreenPtr pScreen, int argc, 83 char **argv); 84static Bool I128EnterVT(int scrnIndex, int flags); 85static void I128LeaveVT(int scrnIndex, int flags); 86static Bool I128CloseScreen(int scrnIndex, ScreenPtr pScreen); 87static Bool I128SaveScreen(ScreenPtr pScreen, int mode); 88 89static void I128DumpBaseRegisters(ScrnInfoPtr pScrn); 90static void I128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg); 91 92/* Optional functions */ 93static void I128FreeScreen(int scrnIndex, int flags); 94static ModeStatus I128ValidMode(int scrnIndex, DisplayModePtr mode, 95 Bool verbose, int flags); 96static void I128DisplayPowerManagementSet(ScrnInfoPtr pScrn, 97 int PowerManagementMode, 98 int flags); 99 100/* Internally used functions */ 101static Bool I128GetRec(ScrnInfoPtr pScrn); 102static void I128FreeRec(ScrnInfoPtr pScrn); 103static Bool I128MapMem(ScrnInfoPtr pScrn); 104static Bool I128UnmapMem(ScrnInfoPtr pScrn); 105static void I128Save(ScrnInfoPtr pScrn); 106static void I128Restore(ScrnInfoPtr pScrn); 107static Bool I128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 108static int I128CountRam(ScrnInfoPtr pScrn); 109static void I128SoftReset(ScrnInfoPtr pScrn); 110static Bool I128I2CInit(ScrnInfoPtr pScrn); 111static xf86MonPtr I128getDDC(ScrnInfoPtr pScrn); 112#if 0 113static unsigned int I128DDC1Read(ScrnInfoPtr pScrn); 114#endif 115 116#define I128_VERSION 4000 117#define I128_NAME "I128" 118#define I128_DRIVER_NAME "i128" 119#define I128_MAJOR_VERSION PACKAGE_VERSION_MAJOR 120#define I128_MINOR_VERSION PACKAGE_VERSION_MINOR 121#define I128_PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 122 123/* 124 * This contains the functions needed by the server after loading the 125 * driver module. It must be supplied, and gets added the driver list by 126 * the Module Setup funtion in the dynamic case. In the static case a 127 * reference to this is compiled in, and this requires that the name of 128 * this DriverRec be an upper-case version of the driver name. 129 */ 130 131_X_EXPORT DriverRec I128 = { 132 I128_VERSION, 133 I128_DRIVER_NAME, 134 I128Identify, 135 I128Probe, 136 I128AvailableOptions, 137 NULL, 138 0 139}; 140 141#ifdef XFree86LOADER 142 143static MODULESETUPPROTO(i128Setup); 144 145static XF86ModuleVersionInfo i128VersRec = 146{ 147 "i128", 148 MODULEVENDORSTRING, 149 MODINFOSTRING1, 150 MODINFOSTRING2, 151 XORG_VERSION_CURRENT, 152 I128_MAJOR_VERSION, I128_MINOR_VERSION, I128_PATCHLEVEL, 153 ABI_CLASS_VIDEODRV, /* This is a video driver */ 154 ABI_VIDEODRV_VERSION, 155 MOD_CLASS_VIDEODRV, 156 {0,0,0,0} 157}; 158 159/* 160 * XF86ModuleData structure is the first part of the driver that is used 161 * by the module loader. It provides the XF86ModuleVersionInfo structure 162 * used to verify that the module version is compatable with the loader 163 * version. It also provides a pointer to the module specific 164 * ModuleSetupProc() and ModuleTearDownProc() functions. 165 */ 166 167_X_EXPORT XF86ModuleData i128ModuleData = { &i128VersRec, i128Setup, NULL }; 168 169#endif 170 171#ifdef XFree86LOADER 172 173/* Mandatory 174 * 175 * The Setup() function is the first entry point called once that the 176 * module has been linked into the server. It adds this driver to 177 * the driver list and lets the server know which symbols it might use. 178 * This is only called once, not called with each server generation. 179 * 180 * Arguments: 181 * pointer module - module being loaded, passed to xf86AddDriver() 182 * pointer opts - unused but contains options from config file 183 * int *errmaj - if function error returns major error value 184 * int *errmin - if function error returns minor error value 185 * Returns: 186 * pointer to TearDownData which is passed to TearDownProc() 187 * or NULL for failure. 188 */ 189 190static pointer 191i128Setup(pointer module, pointer opts, int *errmaj, int *errmin) 192{ 193 static Bool setupDone = FALSE; 194 195 /* This module should be loaded only once, but check to be sure. */ 196 197 if (!setupDone) { 198 setupDone = TRUE; 199 xf86AddDriver(&I128, module, 0); 200 201 /* 202 * Modules that this driver always requires may be loaded here 203 * by calling LoadSubModule(). 204 */ 205 206 /* 207 * The return value must be non-NULL on success even though there 208 * is no TearDownProc. 209 */ 210 return (pointer)1; 211 } else { 212 if (errmaj) *errmaj = LDR_ONCEONLY; 213 return NULL; 214 } 215} 216 217#endif /* XFree86LOADER */ 218 219 220/* Define supported chipsets. Used by Probe(). */ 221 222static SymTabRec I128Chipsets[] = { 223 { PCI_CHIP_I128, "i128" }, 224 { PCI_CHIP_I128_2, "i128v2" }, 225 { PCI_CHIP_I128_T2R, "i128t2r" }, 226 { PCI_CHIP_I128_T2R4, "i128t2r4" }, 227 {-1, NULL } 228}; 229 230static PciChipsets I128PciChipsets[] = { 231 { PCI_CHIP_I128, PCI_CHIP_I128, NULL }, 232 { PCI_CHIP_I128_2, PCI_CHIP_I128_2, NULL }, 233 { PCI_CHIP_I128_T2R, PCI_CHIP_I128_T2R, NULL }, 234 { PCI_CHIP_I128_T2R4, PCI_CHIP_I128_T2R4, NULL }, 235 { -1, -1, RES_UNDEFINED } 236}; 237 238/* Mandatory 239 * 240 * The Probe() function is the second entry point called once that the 241 * module has been linked into the server. This function finds all 242 * instances of hardware that it supports and allocates a ScrnInfoRec 243 * using xf86ConfigPciEntity() for each unclaimed slot. This should be 244 * a minimal probe and under no circumstances should it leave the hardware 245 * state changed. No initialisations other than the required ScrnInfoRec 246 * should be done and no data structures should be allocated. 247 * 248 * Arguments: 249 * DriverPtr drv - pointer to the driver structure 250 * int flags - PROBE_DEFAULT for normal function 251 * PROBE_DETECT for use with "-config" and "-probe" 252 * Returns: 253 * Bool TRUE if a screen was allocated, FALSE otherwise 254 */ 255 256static Bool 257I128Probe(DriverPtr drv, int flags) 258{ 259 int i; 260 GDevPtr *devSections; 261 int *usedChips; 262 int numDevSections; 263 int numUsed; 264 Bool foundScreen = FALSE; 265 266 /* 267 * Check if there has been a chipset override in the config file. 268 * For this we must find out if there is an active device section which 269 * is relevant, i.e., which has no driver specified or has THIS driver 270 * specified. 271 */ 272 273 if ((numDevSections = xf86MatchDevice(I128_DRIVER_NAME, 274 &devSections)) <= 0) { 275 /* 276 * There's no matching device section in the config file, so quit 277 * now. 278 */ 279 return FALSE; 280 } 281 282 /* 283 * We need to probe the hardware first. We then need to see how this 284 * fits in with what is given in the config file, and allow the config 285 * file info to override any contradictions. 286 */ 287 288 /* 289 * All of the cards this driver supports are PCI, so the "probing" just 290 * amounts to checking the PCI data that the server has already collected. 291 */ 292#ifndef XSERVER_LIBPCIACCESS 293 if (xf86GetPciVideoInfo() == NULL) { 294 /* 295 * We won't let anything in the config file override finding no 296 * PCI video cards at all. This seems reasonable now, but we'll see. 297 */ 298 return FALSE; 299 } 300#endif 301 302 numUsed = xf86MatchPciInstances(I128_NAME, PCI_VENDOR_NUMNINE, 303 I128Chipsets, I128PciChipsets, devSections, 304 numDevSections, drv, &usedChips); 305 306 /* Free it since we don't need that list after this */ 307 xfree(devSections); 308 309 if (numUsed <= 0) 310 return FALSE; 311 312 if (flags & PROBE_DETECT) { 313 xfree(usedChips); 314 return FALSE; 315 } 316 317 for (i = 0; i < numUsed; i++) { 318 ScrnInfoPtr pScrn = NULL; 319 320 /* Allocate a ScrnInfoRec and claim the slot */ 321 if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], 322 I128PciChipsets, NULL, NULL, 323 NULL, NULL, NULL)) == NULL) 324 continue; 325 326 327 /* Fill in what we can of the ScrnInfoRec */ 328 pScrn->driverVersion = I128_VERSION; 329 pScrn->driverName = I128_DRIVER_NAME; 330 pScrn->name = I128_NAME; 331 pScrn->Probe = I128Probe; 332 pScrn->PreInit = I128PreInit; 333 pScrn->ScreenInit = I128ScreenInit; 334 pScrn->SwitchMode = I128SwitchMode; 335 pScrn->AdjustFrame = I128AdjustFrame; 336 pScrn->EnterVT = I128EnterVT; 337 pScrn->LeaveVT = I128LeaveVT; 338 pScrn->FreeScreen = I128FreeScreen; 339 pScrn->ValidMode = I128ValidMode; 340 foundScreen = TRUE; 341 } 342 343 xfree(usedChips); 344 345 return foundScreen; 346} 347 348 349/* Mandatory 350 * 351 * The Identify() function is the third entry point called once that the 352 * module has been linked into the server. This function prints driver 353 * identity information. 354 * 355 * Arguments: 356 * int flags - currently unused 357 * Returns: 358 * no return 359 */ 360 361static void 362I128Identify(int flags) 363{ 364 xf86PrintChipsets(I128_NAME, "driver for Number Nine I128 chipsets", 365 I128Chipsets); 366} 367 368 369/* 370 * Define options that this driver will accept. Used by AvailableOptions(). 371 */ 372 373typedef enum { 374 OPTION_FLATPANEL, 375 OPTION_SW_CURSOR, 376 OPTION_HW_CURSOR, 377 OPTION_SYNC_ON_GREEN, 378 OPTION_NOACCEL, 379 OPTION_SHOWCACHE, 380 OPTION_DAC6BIT, 381 OPTION_DEBUG, 382 OPTION_ACCELMETHOD 383} I128Opts; 384 385static const OptionInfoRec I128Options[] = { 386 { OPTION_FLATPANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE }, 387 { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, 388 { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, 389 { OPTION_SYNC_ON_GREEN, "SyncOnGreen", OPTV_BOOLEAN, {0}, FALSE }, 390 { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, 391 { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE }, 392 { OPTION_DAC6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE }, 393 { OPTION_DEBUG, "Debug", OPTV_BOOLEAN, {0}, FALSE }, 394 { OPTION_ACCELMETHOD, "AccelMethod", OPTV_STRING, {0}, FALSE }, 395 { -1, NULL, OPTV_NONE, {0}, FALSE } 396}; 397 398 399/* Mandatory 400 * 401 * The AvailableOptions() function is called to provide the options that 402 * this driver will accept. This is used with the "-configure" server option. 403 * 404 * Arguments: 405 * int chipid - currently unused 406 * int busid - currently unused 407 * Returns: 408 * const OptionInfoRec * - all accepted options 409 */ 410 411static const OptionInfoRec * 412I128AvailableOptions(int chipid, int busid) 413{ 414 return I128Options; 415} 416 417 418/* Mandatory 419 * 420 * The PreInit() function called after the Probe() function once at 421 * server startup and not at each server generation. Only things that 422 * are persistent across server generations can be initialized here. 423 * This function determines if the configuration is usable and, if so, 424 * initializes those parts of the ScrnInfoRec that can be set at the 425 * beginning of the first server generation. This should be done in 426 * the least intrusive way possible. Note that although the ScrnInfoRec 427 * has been allocated, the ScreenRec has not. 428 * 429 * Use xf86AllocateScrnInfoPrivateIndex() for persistent data across 430 * screen generations and AllocateScreenprivateIndex() in ScreenInit() 431 * for per-generation data. 432 * 433 * Arguments: 434 * ScrnInfoPtr pScrn - 435 * int flags - PROBE_DEFAULT for normal function 436 * PROBE_DETECT for use with "-config" and "-probe" 437 * Returns: 438 * Bool TRUE if ScrnInfoRec was initialized, FALSE otherwise 439 */ 440 441static Bool 442I128PreInit(ScrnInfoPtr pScrn, int flags) 443{ 444 I128Ptr pI128; 445 vgaHWPtr hwp; 446 int i; 447 ClockRangePtr clockRanges; 448 MessageType from; 449 IOADDRESS iobase; 450 char *ramdac = NULL; 451 CARD32 tmpl, tmph, tmp; 452 unsigned char n, m, p, mdc, df; 453 float mclk; 454 xf86MonPtr mon; 455 456 /* Check the number of entities, and fail if it isn't one. */ 457 if (pScrn->numEntities != 1) 458 return FALSE; 459 460 /* Allocate the I128Rec driverPrivate */ 461 I128GetRec(pScrn); 462 463 pI128 = I128PTR(pScrn); 464 465 /* Get the entity, and make sure it is PCI. */ 466 pI128->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); 467 if (pI128->pEnt->location.type != BUS_PCI) 468 return FALSE; 469 470 if (flags & PROBE_DETECT) { 471 /* I128ProbeDDC(pScrn, pI128->pEnt->index); */ 472 return TRUE; 473 } 474 475 /* Find the PCI info for this screen */ 476 pI128->PciInfo = xf86GetPciInfoForEntity(pI128->pEnt->index); 477#ifndef XSERVER_LIBPCIACCESS 478 pI128->PciTag = pciTag(pI128->PciInfo->bus, pI128->PciInfo->device, 479 pI128->PciInfo->func); 480#endif 481 482 pI128->Primary = xf86IsPrimaryPci(pI128->PciInfo); 483 484 /* The vgahw module should be allocated here when needed */ 485 if (!xf86LoadSubModule(pScrn, "vgahw")) 486 return FALSE; 487 488 /* 489 * Allocate a vgaHWRec 490 */ 491 if (!vgaHWGetHWRec(pScrn)) 492 return FALSE; 493 494 hwp = VGAHWPTR(pScrn); 495 vgaHWGetIOBase(hwp); 496 497 /* Set pScrn->monitor */ 498 pScrn->monitor = pScrn->confScreen->monitor; 499 500 /* 501 * The first thing we should figure out is the depth, bpp, etc. 502 * Our default depth is 8, so pass it to the helper function. 503 * We support both 24bpp and 32bpp layouts, so indicate that. 504 */ 505 506 if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) { 507 return FALSE; 508 } else { 509 /* Check that the returned depth is one we support */ 510 switch (pScrn->depth) { 511 case 8: 512 case 15: 513 case 16: 514 case 24: 515 /* OK */ 516 break; 517 default: 518 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 519 "Given depth (%d) is not supported by this driver\n", 520 pScrn->depth); 521 return FALSE; 522 } 523 } 524 xf86PrintDepthBpp(pScrn); 525 526 /* 527 * This must happen after pScrn->display has been set because 528 * xf86SetWeight references it. 529 */ 530 if (pScrn->depth > 8) { 531 /* The defaults are OK for us */ 532 rgb zeros = {0, 0, 0}; 533 534 if (!xf86SetWeight(pScrn, zeros, zeros)) { 535 return FALSE; 536 } else { 537 /* XXX check that weight returned is supported */ 538 ; 539 } 540 } 541 542 if (!xf86SetDefaultVisual(pScrn, -1)) { 543 return FALSE; 544 } else { 545 /* We don't currently support DirectColor at > 8bpp */ 546 if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { 547 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" 548 " (%s) is not supported at depth %d\n", 549 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); 550 return FALSE; 551 } 552 } 553 554 /* We use a programmable clock */ 555 pScrn->progClock = TRUE; 556 557 /* Collect all of the relevant option flags (fill in pScrn->options) */ 558 xf86CollectOptions(pScrn, NULL); 559 560 /* Process the options */ 561 if (!(pI128->Options = xalloc(sizeof(I128Options)))) 562 return FALSE; 563 memcpy(pI128->Options, I128Options, sizeof(I128Options)); 564 xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI128->Options); 565 566 if (pScrn->depth == 8) 567 pScrn->rgbBits = 8; 568 569 /* 570 * The preferred method is to use the "hw cursor" option as a tri-state 571 * option, with the default set above. 572 */ 573 from = X_DEFAULT; 574 pI128->HWCursor = TRUE; 575 if (xf86GetOptValBool(pI128->Options, OPTION_HW_CURSOR, &pI128->HWCursor)) { 576 from = X_CONFIG; 577 } 578 /* For compatibility, accept this too (as an override) */ 579 if (xf86ReturnOptValBool(pI128->Options, OPTION_SW_CURSOR, FALSE)) { 580 from = X_CONFIG; 581 pI128->HWCursor = FALSE; 582 } 583 xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", 584 pI128->HWCursor ? "HW" : "SW"); 585 if (xf86ReturnOptValBool(pI128->Options, OPTION_NOACCEL, FALSE)) { 586 pI128->NoAccel = TRUE; 587 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); 588 } else { 589 int from = X_DEFAULT; 590 char *s = xf86GetOptValString(pI128->Options, OPTION_ACCELMETHOD); 591 pI128->NoAccel = FALSE; 592 if (!xf86NameCmp(s, "EXA")) { 593 pI128->exa = TRUE; 594 from = X_CONFIG; 595 } 596 xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration\n", 597 pI128->exa ? "EXA" : "XAA"); 598 } 599 if (xf86ReturnOptValBool(pI128->Options, OPTION_SYNC_ON_GREEN, FALSE)) { 600 pI128->DACSyncOnGreen = TRUE; 601 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Sync-on-Green enabled\n"); 602 } else pI128->DACSyncOnGreen = FALSE; 603 if (xf86ReturnOptValBool(pI128->Options, OPTION_SHOWCACHE, FALSE)) { 604 pI128->ShowCache = TRUE; 605 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n"); 606 } else pI128->ShowCache = FALSE; 607 if (xf86ReturnOptValBool(pI128->Options, OPTION_DAC6BIT, FALSE)) { 608 pI128->DAC8Bit = FALSE; 609 pScrn->rgbBits = 6; 610 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Dac6Bit enabled\n"); 611 } else pI128->DAC8Bit = TRUE; 612 if (xf86ReturnOptValBool(pI128->Options, OPTION_DEBUG, FALSE)) { 613 pI128->Debug = TRUE; 614 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Debug enabled\n"); 615 } else pI128->Debug = FALSE; 616 if (xf86ReturnOptValBool(pI128->Options, OPTION_FLATPANEL, FALSE)) { 617 pI128->FlatPanel = TRUE; 618 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "FlatPanel forced\n"); 619 } else pI128->FlatPanel = FALSE; 620 621 /* 622 * Set the Chipset and ChipRev. 623 */ 624 from = X_PROBED; 625 pI128->Chipset = PCI_DEV_DEVICE_ID(pI128->PciInfo); 626 pScrn->chipset = (char *)xf86TokenToString(I128Chipsets, pI128->Chipset); 627 pI128->ChipRev = PCI_DEV_REVISION(pI128->PciInfo); 628 629 /* 630 * This shouldn't happen because such problems should be caught in 631 * I128Probe(), but check it just in case. 632 */ 633 if (pScrn->chipset == NULL) { 634 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 635 "ChipID 0x%04X is not recognised\n", pI128->Chipset); 636 return FALSE; 637 } 638 if (pI128->Chipset < 0) { 639 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 640 "Chipset \"%s\" is not recognised\n", pScrn->chipset); 641 return FALSE; 642 } 643 644 xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset); 645 if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x105D) 646 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Number Nine\"\n"); 647 else if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x10F0) 648 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Peritek\"\n"); 649 else 650 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"%x\"\n", 651 PCI_SUB_VENDOR_ID(pI128->PciInfo)); 652 653 iobase = (PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00) + hwp->PIOOffset; 654 pI128->RegRec.iobase = iobase; 655 656 pI128->io.rbase_g = inl(iobase) & 0xFFFFFF00; 657 pI128->io.rbase_w = inl(iobase + 0x04) & 0xFFFFFF00; 658 pI128->io.rbase_a = inl(iobase + 0x08) & 0xFFFFFF00; 659 pI128->io.rbase_b = inl(iobase + 0x0C) & 0xFFFFFF00; 660 pI128->io.rbase_i = inl(iobase + 0x10) & 0xFFFFFF00; 661 pI128->io.rbase_e = inl(iobase + 0x14) & 0xFFFF8003; 662 pI128->io.id = inl(iobase + 0x18) & /* 0x7FFFFFFF */ 0xFFFFFFFF; 663 pI128->io.config1 = inl(iobase + 0x1C) & /* 0xF3333F1F */ 0xFF133706; 664 pI128->io.config2 = inl(iobase + 0x20) & 0xC1F70FFF; 665 pI128->io.sgram = inl(iobase + 0x24) & 0xFFFFFFFF; 666 pI128->io.soft_sw = inl(iobase + 0x28) & 0x0000FFFF; 667 pI128->io.vga_ctl = inl(iobase + 0x30) & 0x0000FFFF; 668 669 if (pI128->Debug) 670 I128DumpBaseRegisters(pScrn); 671 672 pI128->RegRec.config1 = pI128->io.config1; 673 pI128->RegRec.config2 = pI128->io.config2; 674 pI128->RegRec.sgram = pI128->io.sgram; 675 if (pI128->Chipset == PCI_CHIP_I128_T2R4) 676 pI128->io.sgram = 0x211BF030; 677 else 678 pI128->io.sgram = 0x21089030; 679 /* vga_ctl is saved later */ 680 681 /* enable all of the memory mapped windows */ 682 683 pI128->io.config1 &= 0x3300001F; 684 pI128->io.config1 |= 0x00331F10; 685 outl(iobase + 0x1C, pI128->io.config1); 686 687 pI128->MemoryType = I128_MEMORY_UNKNOWN; 688 689 if (pI128->Chipset == PCI_CHIP_I128_T2R4) 690 pI128->MemoryType = I128_MEMORY_SGRAM; 691 else if (pI128->Chipset == PCI_CHIP_I128_T2R) { 692 if ((pI128->io.config2&6) == 2) 693 pI128->MemoryType = I128_MEMORY_SGRAM; 694 else 695 pI128->MemoryType = I128_MEMORY_WRAM; 696 } else if (pI128->Chipset == PCI_CHIP_I128_2) { 697#ifndef XSERVER_LIBPCIACCESS 698 if (((((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command & 0x03) 699 == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 700 pI128->MemoryType = I128_MEMORY_DRAM; 701#else 702 { 703 unsigned short temp; 704 pci_device_cfg_read_u16(pI128->PciInfo, &temp, 0x4); 705 if (((temp & 0x03) == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 706 pI128->MemoryType = I128_MEMORY_DRAM; 707 } 708#endif 709 } 710 711 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory type %s\n", 712 pI128->MemoryType == I128_MEMORY_SGRAM ? "SGRAM" : 713 pI128->MemoryType == I128_MEMORY_DRAM ? "DRAM" : 714 pI128->MemoryType == I128_MEMORY_WRAM ? "WRAM" : "UNKNOWN"); 715 716 pI128->io.config2 &= 0xFF0FFF7F; 717 pI128->io.config2 |= 0x00100000; 718 if (pI128->MemoryType != I128_MEMORY_SGRAM) 719 pI128->io.config2 |= 0x00400000; 720 outl(pI128->RegRec.iobase + 0x20, pI128->io.config2); 721 722 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n", 723 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM)); 724 725 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "MMIO registers at 0x%lX\n", 726 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO)); 727 728#ifndef XSERVER_LIBPCIACCESS 729 if (xf86RegisterResources(pI128->pEnt->index, NULL, ResExclusive)) { 730 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 731 "xf86RegisterResources() found resource conflicts\n"); 732 I128FreeRec(pScrn); 733 return FALSE; 734 } 735#endif 736 737 /* HW bpp matches reported bpp */ 738 pI128->bitsPerPixel = pScrn->bitsPerPixel; 739 pI128->depth = pScrn->depth; 740 pI128->weight.red = pScrn->weight.red; 741 pI128->weight.green = pScrn->weight.green; 742 pI128->weight.blue = pScrn->weight.blue; 743 pI128->mode = pScrn->modes; 744 745 pScrn->videoRam = I128CountRam(pScrn); 746 pI128->MemorySize = pScrn->videoRam; 747 748 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kByte\n", 749 pScrn->videoRam); 750 751 752 /* 753 * If the driver can do gamma correction, it should call xf86SetGamma() 754 * here. 755 */ 756 757 { 758 Gamma zeros = {0.0, 0.0, 0.0}; 759 760 if (!xf86SetGamma(pScrn, zeros)) { 761 return FALSE; 762 } 763 } 764 765 if (!I128MapMem(pScrn)) 766 return FALSE; 767 768 /* 769 * Reset card if it isn't primary one (must be done after config1 is set) 770 */ 771 if (!pI128->Primary) 772 I128SoftReset(pScrn); 773 774 if (pI128->Chipset != PCI_CHIP_I128) { 775 pI128->ddc1Read = NULL /*I128DDC1Read*/; 776 pI128->i2cInit = I128I2CInit; 777 } 778 779 /* Load DDC if we have the code to use it */ 780 /* This gives us DDC1 */ 781 if (pI128->ddc1Read || pI128->i2cInit) { 782 if (!xf86LoadSubModule(pScrn, "ddc")) { 783 /* ddc module not found, we can do without it */ 784 pI128->ddc1Read = NULL; 785 786 /* Without DDC, we have no use for the I2C bus */ 787 pI128->i2cInit = NULL; 788 } 789 } 790 /* - DDC can use I2C bus */ 791 /* Load I2C if we have the code to use it */ 792 if (pI128->i2cInit) { 793 if (!xf86LoadSubModule(pScrn, "i2c")) { 794 /* i2c module not found, we can do without it */ 795 pI128->i2cInit = NULL; 796 pI128->I2C = NULL; 797 } 798 } 799 800 /* Read and print the Monitor DDC info */ 801 mon = I128getDDC(pScrn); 802 803 /* see if we can find a flatpanel */ 804 if (!pI128->FlatPanel && mon) { 805 for (i=0; i<4; i++) 806 if (mon->det_mon[i].type == DS_NAME) { 807 if (strncmp((char *)mon->det_mon[i].section.name, 808 "SGI 1600SW FP", 13) == 0) { 809 pI128->FlatPanel = TRUE; 810 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 811 "Found FlatPanel via DDC2\n"); 812 } 813 break; 814 } 815 } 816 817 pI128->maxClock = 175000; 818 819 switch (pI128->Chipset) { 820 case PCI_CHIP_I128: 821 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 822 pI128->RamdacType = IBM528_DAC; 823 else 824 pI128->RamdacType = TI3025_DAC; 825 break; 826 case PCI_CHIP_I128_2: 827 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 828 pI128->RamdacType = IBM528_DAC; 829 else 830 pI128->RamdacType = IBM526_DAC; 831 pI128->maxClock = 220000; 832 break; 833 case PCI_CHIP_I128_T2R: 834 pI128->RamdacType = IBM526_DAC; 835 pI128->maxClock = 220000; 836 break; 837 case PCI_CHIP_I128_T2R4: 838 pI128->RamdacType = SILVER_HAMMER_DAC; 839 pI128->maxClock = 270000; 840 break; 841 default: 842 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 843 "Unknown I128 chipset: %d\n", 844 pI128->Chipset); 845 return(FALSE); 846 } 847 848 if ((pI128->maxClock == 175000) && (pI128->MemorySize == 8192)) 849 pI128->maxClock = 220000; 850 851 switch(pI128->RamdacType) { 852 case TI3025_DAC: 853 /* verify that the ramdac is a TVP3025 */ 854 855 pI128->mem.rbase_g[INDEX_TI] = TI_ID; MB; 856 if ((pI128->mem.rbase_g[DATA_TI]&0xFF) != TI_VIEWPOINT25_ID) { 857 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 858 "Ti3025 Ramdac not found\n"); 859 return(FALSE); 860 } 861 ramdac = "TI3025"; 862 863 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 864 pI128->mem.rbase_g[DATA_TI] = 0x00; MB; 865 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 866 n = pI128->mem.rbase_g[DATA_TI]&0x7f; 867 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 868 pI128->mem.rbase_g[DATA_TI] = 0x01; MB; 869 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 870 m = pI128->mem.rbase_g[DATA_TI]&0x7f; 871 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 872 pI128->mem.rbase_g[DATA_TI] = 0x02; MB; 873 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 874 p = pI128->mem.rbase_g[DATA_TI]&0x03; 875 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_DCLK_CONTROL; MB; 876 mdc = pI128->mem.rbase_g[DATA_TI]&0xFF; 877 if (mdc&0x08) 878 mdc = (mdc&0x07)*2 + 2; 879 else 880 mdc = 1; 881 mclk = ((1431818 * ((m+2) * 8)) / (n+2) / (1 << p) / mdc + 50) / 100; 882 883 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 884 "Using TI 3025 programmable clock (MCLK %1.3f MHz)\n", 885 mclk / 1000.0); 886 pI128->minClock = 20000; 887 pI128->ProgramDAC = I128ProgramTi3025; 888 break; 889 890 case IBM524_DAC: 891 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 892 "IBM524 Ramdac not supported\n"); 893 return(FALSE); 894 895 case IBM526_DAC: 896 /* verify that the ramdac is an IBM526 */ 897 898 ramdac = "IBM526"; 899 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 900 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 901 pI128->mem.rbase_g[IDXH_I] = 0; MB; 902 pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 903 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 904 905 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 906 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 907 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 908 m = pI128->mem.rbase_g[DATA_I]; 909 df = m>>6; 910 m &= 0x3f; 911 if (n == 0) { m=0; n=1; } 912 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 913 914 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 915 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 916 if (tmp != 2) { 917 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 918 "IBM526 Ramdac not found\n"); 919 return(FALSE); 920 } 921 922 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 923 "Using IBM 526 programmable clock (MCLK %1.3f MHz)\n", 924 mclk / 1000.0); 925 pI128->minClock = 25000; 926 pI128->ProgramDAC = I128ProgramIBMRGB; 927 break; 928 929 case IBM528_DAC: 930 /* verify that the ramdac is an IBM528 */ 931 932 ramdac = "IBM528"; 933 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 934 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 935 pI128->mem.rbase_g[IDXH_I] = 0; MB; 936 pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 937 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 938 939 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 940 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 941 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 942 m = pI128->mem.rbase_g[DATA_I] & 0xFF; 943 df = m>>6; 944 m &= 0x3f; 945 if (n == 0) { m=0; n=1; } 946 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 947 948 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 949 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 950 if (tmp != 2) { 951 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 952 "IBM528 Ramdac not found\n"); 953 return(FALSE); 954 } 955 956 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 957 "Using IBM 528 programmable clock (MCLK %1.3f MHz)\n", 958 mclk / 1000.0); 959 pI128->minClock = 25000; 960 pI128->ProgramDAC = I128ProgramIBMRGB; 961 break; 962 963 case SILVER_HAMMER_DAC: 964 /* verify that the ramdac is a Silver Hammer */ 965 966 ramdac = "SilverHammer"; 967 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 968 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 969 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 970 971 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 972 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 973 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 974 m = pI128->mem.rbase_g[DATA_I]; 975 df = m>>6; 976 m &= 0x3f; 977 if (n == 0) { m=0; n=1; } 978 mclk = ((3750000 * (m+65)) / n / (8>>df) + 50) / 100; 979 980 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 981 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 982 if (pI128->Chipset != PCI_CHIP_I128_T2R4) { 983 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 984 "SilverHammer Ramdac not found\n"); 985 return(FALSE); 986 } 987 988 if (pI128->mem.rbase_g[CRT_1CON] & 0x00000100) { 989 pI128->FlatPanel = TRUE; 990 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 991 "Digital flat panel detected\n"); 992 } else if (pI128->FlatPanel) 993 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, 994 "Digital flat panel forced\n"); 995 996 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 997 "Using SilverHammer programmable clock (MCLK %1.3f MHz)\n", 998 mclk / 1000.0); 999 pI128->minClock = 25000; 1000 pI128->ProgramDAC = I128ProgramSilverHammer; 1001 break; 1002 1003 default: 1004 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 1005 "Ramdac Unknown\n"); 1006 return(FALSE); 1007 } 1008 1009 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 1010 "Ramdac Type min/max speed: %s %d/%d MHz\n", 1011 ramdac, pI128->minClock/1000, pI128->maxClock/1000); 1012 1013 /* 1014 * Setup the ClockRanges, which describe what clock ranges are available, 1015 * and what sort of modes they can be used for. 1016 */ 1017 clockRanges = xnfcalloc(sizeof(ClockRange),1); 1018 clockRanges->next = NULL; 1019 clockRanges->minClock = pI128->minClock; 1020 clockRanges->maxClock = pI128->maxClock; 1021 clockRanges->clockIndex = -1; /* programmable */ 1022 clockRanges->interlaceAllowed = TRUE; 1023 clockRanges->doubleScanAllowed = TRUE; 1024 clockRanges->ClockMulFactor = 1; 1025 clockRanges->ClockDivFactor = 1; 1026 1027 /* 1028 * xf86ValidateModes will check that the mode HTotal and VTotal values 1029 * don't exceed the chipset's limit if pScrn->maxHValue and 1030 * pScrn->maxVValue are set. Since our I128ValidMode() already takes 1031 * care of this, we don't worry about setting them here. 1032 */ 1033 { 1034 int *linePitches = NULL; 1035 int minPitch = 256; 1036 int maxPitch = 2048; 1037 int pitchAlignment = 256; 1038 1039 if (pI128->MemoryType == I128_MEMORY_WRAM) 1040 pitchAlignment = (128 * 8); 1041 pitchAlignment /= pI128->bitsPerPixel; 1042 1043 i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, 1044 pScrn->display->modes, clockRanges, 1045 linePitches, minPitch, maxPitch, 1046 pitchAlignment * pI128->bitsPerPixel, 1047 128, 2048, 1048 pScrn->display->virtualX, 1049 pScrn->display->virtualY, 1050 pI128->MemorySize, 1051 LOOKUP_BEST_REFRESH); 1052 1053 pI128->displayWidth = pScrn->virtualX; 1054 1055 if ((pScrn->virtualX % pitchAlignment) != 0) 1056 pI128->displayWidth += pitchAlignment - 1057 (pScrn->virtualX % pitchAlignment); 1058 } 1059 1060 if (i == -1) { 1061 I128FreeRec(pScrn); 1062 return FALSE; 1063 } 1064 1065 /* Prune the modes marked as invalid */ 1066 xf86PruneDriverModes(pScrn); 1067 1068 if (i == 0 || pScrn->modes == NULL) { 1069 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); 1070 I128FreeRec(pScrn); 1071 return FALSE; 1072 } 1073 1074 if ((pI128->MemorySize > 4096) && 1075 (pI128->MemoryType != I128_MEMORY_DRAM) && 1076 (pI128->MemoryType != I128_MEMORY_SGRAM)) 1077 pI128->displayOffset = 0x400000L % 1078 (pI128->displayWidth * (pI128->bitsPerPixel/8)); 1079 else 1080 pI128->displayOffset = 0; 1081 1082 pI128->MemoryPtr = 1083 (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 1084 1085 /* Set the current mode to the first in the list */ 1086 pScrn->currentMode = pScrn->modes; 1087 1088 /* Print the list of modes being used */ 1089 xf86PrintModes(pScrn); 1090 1091 /* Set display resolution */ 1092 xf86SetDpi(pScrn, 0, 0); 1093 1094 if (!xf86LoadSubModule(pScrn, "fb")) { 1095 I128FreeRec(pScrn); 1096 return FALSE; 1097 } 1098 1099 /* Load the acceleration engine */ 1100 if (!pI128->NoAccel) { 1101 if (pI128->exa) { 1102 XF86ModReqInfo req; 1103 int errmaj, errmin; 1104 1105 memset(&req, 0, sizeof(req)); 1106 req.majorversion = 2; 1107 req.minorversion = 0; 1108 if (!LoadSubModule(pScrn->module, "exa", NULL, NULL, NULL, &req, 1109 &errmaj, &errmin)) 1110 { 1111 LoaderErrorMsg(NULL, "exa", errmaj, errmin); 1112 I128FreeRec(pScrn); 1113 return FALSE; 1114 } 1115 } else { 1116 if (!xf86LoadSubModule(pScrn, "xaa")) { 1117 I128FreeRec(pScrn); 1118 return FALSE; 1119 } 1120 } 1121 } 1122 1123 /* Load ramdac if needed */ 1124 if (pI128->HWCursor) { 1125 if (!xf86LoadSubModule(pScrn, "ramdac")) { 1126 I128FreeRec(pScrn); 1127 return FALSE; 1128 } 1129 } 1130 1131 I128UnmapMem(pScrn); 1132 1133 if (pI128->Debug) 1134 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "PreInit complete\n"); 1135 return TRUE; 1136} 1137 1138 1139static Bool 1140I128GetRec(ScrnInfoPtr pScrn) 1141{ 1142 /* 1143 * Allocate an I128Rec, and hook it into pScrn->driverPrivate. 1144 * pScrn->driverPrivate is initialised to NULL, so we can check if 1145 * the allocation has already been done. 1146 */ 1147 if (pScrn->driverPrivate != NULL) 1148 return TRUE; 1149 1150 pScrn->driverPrivate = xnfcalloc(sizeof(I128Rec), 1); 1151 1152 return TRUE; 1153} 1154 1155static void 1156I128FreeRec(ScrnInfoPtr pScrn) 1157{ 1158 if (pScrn->driverPrivate == NULL) 1159 return; 1160 xfree(pScrn->driverPrivate); 1161 pScrn->driverPrivate = NULL; 1162} 1163 1164 1165 1166/* 1167 * I128SoftReset -- 1168 * 1169 * Resets drawing engine 1170 */ 1171static void 1172I128SoftReset(ScrnInfoPtr pScrn) 1173{ 1174 I128Ptr pI128 = I128PTR(pScrn); 1175 1176 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Performing soft reset\n"); 1177 pI128->io.config1 |= 0x00000002; 1178 outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 1179 usleep(10000); 1180 pI128->io.config1 &= 0xFFFFFFFD; 1181 outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 1182} 1183 1184/* 1185 * I128CountRAM -- 1186 * 1187 * Counts amount of installed RAM 1188 */ 1189static int 1190I128CountRam(ScrnInfoPtr pScrn) 1191{ 1192 I128Ptr pI128 = I128PTR(pScrn); 1193 int SizeFound = 0; 1194 1195 SizeFound = 0; 1196 1197 switch(pI128->Chipset) { 1198 case PCI_CHIP_I128_T2R4: 1199 /* Use the subsystem ID to determine the memory size */ 1200 switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0x0007) { 1201 case 0x00: /* 4MB card */ 1202 SizeFound = 4 * 1024; break; 1203 case 0x01: /* 8MB card */ 1204 SizeFound = 8 * 1024; break; 1205 case 0x02: /* 12MB card */ 1206 SizeFound = 12 * 1024; break; 1207 case 0x03: /* 16MB card */ 1208 SizeFound = 16 * 1024; break; 1209 case 0x04: /* 20MB card */ 1210 SizeFound = 20 * 1024; break; 1211 case 0x05: /* 24MB card */ 1212 SizeFound = 24 * 1024; break; 1213 case 0x06: /* 28MB card */ 1214 SizeFound = 28 * 1024; break; 1215 case 0x07: /* 32MB card */ 1216 SizeFound = 32 * 1024; break; 1217 default: /* Unknown board... */ 1218 break; 1219 } 1220 break; 1221 case PCI_CHIP_I128_T2R: 1222 switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0xFFF7) { 1223 case 0x00: /* 4MB card, no daughtercard */ 1224 SizeFound = 4 * 1024; break; 1225 case 0x01: /* 4MB card, 4MB daughtercard */ 1226 case 0x04: /* 8MB card, no daughtercard */ 1227 SizeFound = 8 * 1024; break; 1228 case 0x02: /* 4MB card, 8MB daughtercard */ 1229 case 0x05: /* 8MB card, 4MB daughtercard */ 1230 SizeFound = 12 * 1024; break; 1231 case 0x06: /* 8MB card, 8MB daughtercard */ 1232 SizeFound = 16 * 1024; break; 1233 case 0x03: /* 4MB card, 16 daughtercard */ 1234 SizeFound = 20 * 1024; break; 1235 case 0x07: /* 8MB card, 16MB daughtercard */ 1236 SizeFound = 24 * 1024; break; 1237 default: 1238 break; 1239 } 1240 } 1241 1242 if (SizeFound == 0) { 1243 SizeFound = 2048; /* default to 2MB */ 1244 if (pI128->io.config1 & 0x04) /* 128 bit mode */ 1245 SizeFound <<= 1; 1246 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 1247 SizeFound <<= 1; 1248 } 1249 return SizeFound; 1250} 1251 1252 1253/* 1254 * Map the framebuffer and MMIO memory. 1255 */ 1256 1257static Bool 1258I128MapMem(ScrnInfoPtr pScrn) 1259{ 1260 I128Ptr pI128; 1261 1262 pI128 = I128PTR(pScrn); 1263 1264 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Mapping memory\n"); 1265 1266 if (pI128->mem.rbase_g != NULL) 1267 return TRUE; 1268 1269 /* 1270 * Map IO registers to virtual address space 1271 */ 1272#ifndef XSERVER_LIBPCIACCESS 1273 pI128->mem.mw0_ad = (unsigned char *)xf86MapPciMem(pScrn->scrnIndex, 1274 VIDMEM_FRAMEBUFFER, 1275 pI128->PciTag, 1276 pI128->PciInfo->memBase[0] & 0xFFC00000, 1277 pI128->MemorySize*1024); 1278#else 1279 { 1280 void** result = (void**)&pI128->mem.mw0_ad; 1281 int err = pci_device_map_range(pI128->PciInfo, 1282 PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xffc00000, 1283 pI128->MemorySize * 1024, 1284 PCI_DEV_MAP_FLAG_WRITABLE | 1285 PCI_DEV_MAP_FLAG_WRITE_COMBINE, 1286 result); 1287 if (err) 1288 return FALSE; 1289 } 1290#endif 1291 1292 if (pI128->mem.mw0_ad == NULL) 1293 return FALSE; 1294 1295 pI128->MemoryPtr = pI128->mem.mw0_ad; 1296 1297#ifndef XSERVER_LIBPCIACCESS 1298 pI128->mem.rbase_g = (CARD32 *)xf86MapPciMem(pScrn->scrnIndex, 1299 VIDMEM_MMIO | VIDMEM_MMIO_32BIT, 1300 pI128->PciTag, 1301 pI128->PciInfo->memBase[4] & 0xFFFF0000, 1302 64*1024); 1303#else 1304 { 1305 void** result = (void**)&pI128->mem.rbase_g; 1306 int err = pci_device_map_range(pI128->PciInfo, 1307 PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xffff0000, 1308 64 * 1024, 1309 PCI_DEV_MAP_FLAG_WRITABLE, 1310 result); 1311 if (err) 1312 return FALSE; 1313 } 1314#endif 1315 if (pI128->mem.rbase_g == NULL) 1316 return FALSE; 1317 1318 pI128->mem.rbase_w = pI128->mem.rbase_g + ( 8 * 1024)/4; 1319 pI128->mem.rbase_a = pI128->mem.rbase_g + (16 * 1024)/4; 1320 pI128->mem.rbase_b = pI128->mem.rbase_g + (24 * 1024)/4; 1321 pI128->mem.rbase_i = pI128->mem.rbase_g + (32 * 1024)/4; 1322 1323 return TRUE; 1324} 1325 1326 1327/* 1328 * Unmap the framebuffer and MMIO memory. 1329 */ 1330 1331static Bool 1332I128UnmapMem(ScrnInfoPtr pScrn) 1333{ 1334 I128Ptr pI128 = I128PTR(pScrn); 1335 1336 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Unmapping memory\n"); 1337 1338 if (pI128->mem.rbase_g == NULL) 1339 return TRUE; 1340 1341 /* 1342 * Unmap IO registers to virtual address space 1343 */ 1344#ifndef XSERVER_LIBPCIACCESS 1345 xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.mw0_ad, 1346 pI128->MemorySize*1024); 1347#else 1348 pci_device_unmap_range(pI128->PciInfo, pI128->mem.mw0_ad, 1349 pI128->MemorySize*1024); 1350#endif 1351 pI128->mem.mw0_ad = NULL; 1352 pI128->MemoryPtr = NULL; 1353 1354#ifndef XSERVER_LIBPCIACCESS 1355 xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.rbase_g, 64*1024); 1356#else 1357 pci_device_unmap_range(pI128->PciInfo, pI128->mem.rbase_g, 64*1024); 1358#endif 1359 pI128->mem.rbase_g = NULL; 1360 pI128->mem.rbase_w = NULL; 1361 pI128->mem.rbase_a = NULL; 1362 pI128->mem.rbase_b = NULL; 1363 pI128->mem.rbase_i = NULL; 1364 1365 return TRUE; 1366} 1367 1368 1369/* 1370 * This function saves the video state. 1371 */ 1372static void 1373I128Save(ScrnInfoPtr pScrn) 1374{ 1375 I128Ptr pI128 = I128PTR(pScrn); 1376 vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 1377 1378 if (pI128->Primary) 1379 vgaHWSave(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 1380 1381 I128SaveState(pScrn); 1382} 1383 1384/* 1385 * Restore the initial (text) mode. 1386 */ 1387static void 1388I128Restore(ScrnInfoPtr pScrn) 1389{ 1390 I128Ptr pI128 = I128PTR(pScrn); 1391 vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 1392 1393 I128RestoreState(pScrn); 1394 1395 if (pI128->Primary) { 1396 vgaHWProtect(pScrn, TRUE); 1397 vgaHWRestore(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 1398 vgaHWProtect(pScrn, FALSE); 1399 } 1400} 1401 1402/* Usually mandatory */ 1403Bool 1404I128SwitchMode(int scrnIndex, DisplayModePtr mode, int flags) 1405{ 1406 return I128ModeInit(xf86Screens[scrnIndex], mode); 1407} 1408 1409 1410static Bool 1411I128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) 1412{ 1413 I128Ptr pI128 = I128PTR(pScrn); 1414 1415 if (pI128->Debug) 1416 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit start\n"); 1417 1418 /* Initialise the ModeReg values */ 1419 pScrn->vtSema = TRUE; 1420 1421 if (!I128Init(pScrn, mode)) 1422 return FALSE; 1423 1424 pI128->ModeSwitched = TRUE; 1425 1426 pI128->mode = mode; 1427 1428 if (pI128->Debug) 1429 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit complete\n"); 1430 1431 return TRUE; 1432} 1433 1434 1435/* Mandatory */ 1436 1437/* This gets called at the start of each server generation */ 1438 1439static Bool 1440I128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) 1441{ 1442 ScrnInfoPtr pScrn; 1443 I128Ptr pI128; 1444 int ret; 1445 VisualPtr visual; 1446 unsigned char *FBStart; 1447 int width, height, displayWidth; 1448 1449 /* 1450 * First get the ScrnInfoRec 1451 */ 1452 pScrn = xf86Screens[pScreen->myNum]; 1453 1454 pI128 = I128PTR(pScrn); 1455 1456 if (pI128->Debug) 1457 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit start\n"); 1458 1459 /* Map the I128 memory and MMIO areas */ 1460 if (!I128MapMem(pScrn)) 1461 return FALSE; 1462 1463 pI128->MemoryPtr = 1464 (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 1465 1466 /* Save the current state */ 1467 I128Save(pScrn); 1468 1469 /* Initialise the first mode */ 1470 if (!I128ModeInit(pScrn, pScrn->currentMode)) 1471 return FALSE; 1472 1473 /* Darken the screen for aesthetic reasons and set the viewport */ 1474 I128SaveScreen(pScreen, SCREEN_SAVER_ON); 1475 pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); 1476 1477 /* 1478 * The next step is to setup the screen's visuals, and initialise the 1479 * framebuffer code. In cases where the framebuffer's default 1480 * choices for things like visual layouts and bits per RGB are OK, 1481 * this may be as simple as calling the framebuffer's ScreenInit() 1482 * function. If not, the visuals will need to be setup before calling 1483 * a fb ScreenInit() function and fixed up after. 1484 * 1485 * For most PC hardware at depths >= 8, the defaults that fb uses 1486 * are not appropriate. In this driver, we fixup the visuals after. 1487 */ 1488 1489 /* 1490 * Reset the visual list. 1491 */ 1492 miClearVisualTypes(); 1493 1494 /* Setup the visuals we support. */ 1495 1496 if (!miSetVisualTypes(pScrn->depth, 1497 miGetDefaultVisualMask(pScrn->depth), 1498 pScrn->rgbBits, pScrn->defaultVisual)) 1499 return FALSE; 1500 1501 if (!miSetPixmapDepths()) 1502 return FALSE; 1503 1504 1505 /* 1506 * Call the framebuffer layer's ScreenInit function, and fill in other 1507 * pScreen fields. 1508 */ 1509 1510 width = pScrn->virtualX; 1511 height = pScrn->virtualY; 1512 displayWidth = pScrn->displayWidth; 1513 1514 FBStart = pI128->MemoryPtr; 1515 1516 ret = fbScreenInit(pScreen, FBStart, 1517 width, height, 1518 pScrn->xDpi, pScrn->yDpi, 1519 displayWidth, pScrn->bitsPerPixel); 1520 if (!ret) 1521 return FALSE; 1522 1523 fbPictureInit(pScreen, 0, 0); 1524 1525 if (pScrn->bitsPerPixel > 8) { 1526 /* Fixup RGB ordering */ 1527 visual = pScreen->visuals + pScreen->numVisuals; 1528 while (--visual >= pScreen->visuals) { 1529 if ((visual->class | DynamicClass) == DirectColor) { 1530 visual->offsetRed = pScrn->offset.red; 1531 visual->offsetGreen = pScrn->offset.green; 1532 visual->offsetBlue = pScrn->offset.blue; 1533 visual->redMask = pScrn->mask.red; 1534 visual->greenMask = pScrn->mask.green; 1535 visual->blueMask = pScrn->mask.blue; 1536 } 1537 } 1538 } 1539 1540 xf86SetBlackWhitePixels(pScreen); 1541 1542 if (!pI128->NoAccel) { 1543 if (pI128->exa) 1544 ret = I128ExaInit(pScreen); 1545 else { 1546 I128DGAInit(pScreen); 1547 ret = I128XaaInit(pScreen); 1548 } 1549 } 1550 1551 if (!ret) { 1552 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Acceleration setup failed\n"); 1553 return FALSE; 1554 } 1555 1556 miInitializeBackingStore(pScreen); 1557 xf86SetBackingStore(pScreen); 1558 xf86SetSilkenMouse(pScreen); 1559 1560 /* Initialize software cursor. 1561 Must precede creation of the default colormap */ 1562 miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); 1563 1564 /* Initialize HW cursor layer. 1565 Must follow software cursor initialization*/ 1566 if (pI128->HWCursor) { 1567 ret = TRUE; 1568 switch(pI128->RamdacType) { 1569 case TI3025_DAC: 1570 ret = I128TIHWCursorInit(pScrn); break; 1571 case IBM524_DAC: 1572 case IBM526_DAC: 1573 case IBM528_DAC: 1574 ret = I128IBMHWCursorInit(pScrn); break; 1575 case SILVER_HAMMER_DAC: 1576 ret = I128IBMHWCursorInit(pScrn); break; 1577 default: 1578 break; 1579 } 1580 if(!ret) 1581 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1582 "Hardware cursor initialization failed\n"); 1583 } 1584 1585 /* Initialise default colourmap */ 1586 if (!miCreateDefColormap(pScreen)) 1587 return FALSE; 1588 1589 /* Initialize colormap layer. 1590 Must follow initialization of the default colormap */ 1591 if(!xf86HandleColormaps(pScreen, 256, 8, 1592 I128LoadPalette, NULL, 1593 CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) 1594 return FALSE; 1595 1596 xf86DPMSInit(pScreen, I128DisplayPowerManagementSet, 0); 1597 1598 pScrn->memPhysBase = (unsigned long)pI128->MemoryPtr; 1599 pScrn->fbOffset = 0; 1600 1601 pScreen->SaveScreen = I128SaveScreen; 1602 1603 /* Wrap the current CloseScreen function */ 1604 pI128->CloseScreen = pScreen->CloseScreen; 1605 pScreen->CloseScreen = I128CloseScreen; 1606 1607 /* Report any unused options (only for the first generation) */ 1608 if (serverGeneration == 1) { 1609 xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); 1610 } 1611 1612 if (pI128->Debug) 1613 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit complete\n"); 1614 1615 /* Done */ 1616 return TRUE; 1617} 1618 1619 1620/* 1621 * This function is used to initialize the Start Address - the first 1622 * displayed location in the video memory. 1623 */ 1624/* Usually mandatory */ 1625void 1626I128AdjustFrame(int scrnIndex, int x, int y, int flags) 1627{ 1628 ScrnInfoPtr pScrn; 1629 int Base; 1630 I128Ptr pI128; 1631#define I128_PAN_MASK 0x01FFFFE0 1632 1633 pScrn = xf86Screens[scrnIndex]; 1634 pI128 = I128PTR(pScrn); 1635 1636 if (pI128->ShowCache && y && pScrn->vtSema) 1637 y += pScrn->virtualY - 1; 1638 1639 if (x > (pI128->displayWidth - pI128->mode->HDisplay)) 1640 x = pI128->displayWidth - pI128->mode->HDisplay; 1641 1642 Base = ((y*pI128->displayWidth + x) * (pI128->bitsPerPixel/8)); 1643 pI128->mem.rbase_g[DB_ADR] = 1644 (Base & I128_PAN_MASK) + pI128->displayOffset; MB; 1645 1646 /* now warp the cursor after the screen move */ 1647 pI128->AdjustCursorXPos = (Base - (Base & I128_PAN_MASK)) 1648 / (pI128->bitsPerPixel/8); 1649} 1650 1651/* 1652 * This is called when VT switching back to the X server. Its job is 1653 * to reinitialise the video mode. 1654 * 1655 */ 1656 1657/* Mandatory */ 1658static Bool 1659I128EnterVT(int scrnIndex, int flags) 1660{ 1661 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1662 1663 if (!I128ModeInit(pScrn, pScrn->currentMode)) 1664 return FALSE; 1665 I128AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); 1666 return TRUE; 1667} 1668 1669/* 1670 * This is called when VT switching away from the X server. Its job is 1671 * to restore the previous (text) mode. 1672 * 1673 */ 1674 1675/* Mandatory */ 1676static void 1677I128LeaveVT(int scrnIndex, int flags) 1678{ 1679 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1680 1681 I128Restore(pScrn); 1682} 1683 1684 1685/* 1686 * This is called at the end of each server generation. It restores the 1687 * original (text) mode. It should also unmap the video memory, and free 1688 * any per-generation data allocated by the driver. It should finish 1689 * by unwrapping and calling the saved CloseScreen function. 1690 */ 1691 1692/* Mandatory */ 1693static Bool 1694I128CloseScreen(int scrnIndex, ScreenPtr pScreen) 1695{ 1696 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1697 I128Ptr pI128 = I128PTR(pScrn); 1698 1699 if (pScrn->vtSema) { 1700 I128Restore(pScrn); 1701 I128UnmapMem(pScrn); 1702 } 1703 if (pI128->XaaInfoRec) 1704 XAADestroyInfoRec(pI128->XaaInfoRec); 1705 if (pI128->ExaDriver) { 1706 exaDriverFini(pScreen); 1707 xfree(pI128->ExaDriver); 1708 } 1709 if (pI128->CursorInfoRec) 1710 xf86DestroyCursorInfoRec(pI128->CursorInfoRec); 1711 if (pI128->DGAModes) 1712 xfree(pI128->DGAModes); 1713 pScrn->vtSema = FALSE; 1714 1715 pScreen->CloseScreen = pI128->CloseScreen; 1716 return (*pScreen->CloseScreen)(scrnIndex, pScreen); 1717} 1718 1719 1720/* Free up any persistent data structures */ 1721 1722/* Optional */ 1723static void 1724I128FreeScreen(int scrnIndex, int flags) 1725{ 1726 /* 1727 * This only gets called when a screen is being deleted. It does not 1728 * get called routinely at the end of a server generation. 1729 */ 1730 if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) 1731 vgaHWFreeHWRec(xf86Screens[scrnIndex]); 1732 1733 I128FreeRec(xf86Screens[scrnIndex]); 1734} 1735 1736 1737/* Checks if a mode is suitable for the selected chipset. */ 1738 1739/* Optional */ 1740static ModeStatus 1741I128ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) 1742{ 1743 int lace; 1744 1745 lace = 1 + ((mode->Flags & V_INTERLACE) != 0); 1746 1747 if ((mode->CrtcHDisplay <= 2048) && 1748 (mode->CrtcHSyncStart <= 4096) && 1749 (mode->CrtcHSyncEnd <= 4096) && 1750 (mode->CrtcHTotal <= 4096) && 1751 (mode->CrtcVDisplay <= 2048 * lace) && 1752 (mode->CrtcVSyncStart <= 4096 * lace) && 1753 (mode->CrtcVSyncEnd <= 4096 * lace) && 1754 (mode->CrtcVTotal <= 4096 * lace)) { 1755 return(MODE_OK); 1756 } else { 1757 return(MODE_BAD); 1758 } 1759} 1760 1761 1762/* Do screen blanking */ 1763 1764/* Mandatory */ 1765static Bool 1766I128SaveScreen(ScreenPtr pScreen, int mode) 1767{ 1768 ScrnInfoPtr pScrn = NULL; 1769 I128Ptr pI128; 1770 Bool on; 1771 1772 if (pScreen != NULL) 1773 pScrn = xf86Screens[pScreen->myNum]; 1774 1775 on = xf86IsUnblank(mode); 1776 1777 if ((pScrn != NULL) && pScrn->vtSema) { 1778 pI128 = I128PTR(pScrn); 1779 if (on) { 1780 pI128->mem.rbase_g[CRT_1CON] |= 0x40; MB; 1781 } else { 1782 pI128->mem.rbase_g[CRT_1CON] &= ~0x40; MB; 1783 } 1784 } 1785 return TRUE; 1786} 1787 1788 1789static const int DDC_SDA_IN_MASK = 1 << 1; 1790static const int DDC_SDA_OUT_MASK = 1 << 2; 1791static const int DDC_SCL_IN_MASK = 1 << 3; 1792static const int DDC_SCL_OUT_MASK = 1 << 0; 1793 1794static const int DDC_MODE_MASK = 3 << 8; 1795#if 0 1796static const int DDC_MODE_DDC1 = 1 << 8; 1797#endif 1798static const int DDC_MODE_DDC2 = 2 << 8; 1799 1800#if 0 1801static unsigned int 1802I128DDC1Read(ScrnInfoPtr pScrn) 1803{ 1804 I128Ptr pI128 = I128PTR(pScrn); 1805 unsigned char val; 1806 unsigned long tmp, ddc; 1807 IOADDRESS iobase; 1808 1809 iobase = pI128->RegRec.iobase; 1810 ddc = inl(iobase + 0x2C); 1811 if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 1812 outl(iobase + 0x2C, DDC_MODE_DDC1); 1813 usleep(40); 1814 } 1815 1816 /* wait for Vsync */ 1817 do { 1818 tmp = inl(iobase + 0x2C); 1819 } while (tmp & 1); 1820 do { 1821 tmp = inl(iobase + 0x2C); 1822 } while (!(tmp & 1)); 1823 1824 /* Get the result */ 1825 tmp = inl(iobase + 0x2C); 1826 val = tmp & DDC_SDA_IN_MASK; 1827 1828 if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 1829 outl(iobase + 0x2C, ~DDC_MODE_MASK & ddc); 1830 usleep(40); 1831 } 1832 1833 return val; 1834} 1835#endif 1836 1837static void 1838I128I2CGetBits(I2CBusPtr b, int *clock, int *data) 1839{ 1840 I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 1841 unsigned long ddc; 1842 IOADDRESS iobase; 1843#if 0 1844 static int lastclock = -1, lastdata = -1; 1845#endif 1846 1847 /* Get the result. */ 1848 iobase = pI128->RegRec.iobase; 1849 ddc = inl(iobase + 0x2C); 1850 1851 *clock = (ddc & DDC_SCL_IN_MASK) != 0; 1852 *data = (ddc & DDC_SDA_IN_MASK) != 0; 1853 1854#if 0 1855 if (pI128->Debug && ((lastclock != *clock) || (lastdata != *data))) { 1856 xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> c %d d %d\n", *clock, *data); 1857 lastclock = *clock; 1858 lastdata = *data; 1859 } 1860#endif 1861} 1862 1863static void 1864I128I2CPutBits(I2CBusPtr b, int clock, int data) 1865{ 1866 I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 1867 unsigned char drv, val; 1868 unsigned long ddc; 1869 unsigned long tmp; 1870 IOADDRESS iobase; 1871 1872 iobase = pI128->RegRec.iobase; 1873 ddc = inl(iobase + 0x2C); 1874 1875 val = (clock ? DDC_SCL_IN_MASK : 0) | (data ? DDC_SDA_IN_MASK : 0); 1876 drv = ((clock) ? DDC_SCL_OUT_MASK : 0) | ((data) ? DDC_SDA_OUT_MASK : 0); 1877 1878 tmp = (DDC_MODE_MASK & ddc) | val | drv; 1879 outl(iobase + 0x2C, tmp); 1880#if 0 1881 if (pI128->Debug) 1882 xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> 0x%x\n", tmp); 1883#endif 1884} 1885 1886 1887static Bool 1888I128I2CInit(ScrnInfoPtr pScrn) 1889{ 1890 I128Ptr pI128 = I128PTR(pScrn); 1891 I2CBusPtr I2CPtr; 1892 IOADDRESS iobase; 1893 unsigned long soft_sw, ddc; 1894 1895 I2CPtr = xf86CreateI2CBusRec(); 1896 if(!I2CPtr) return FALSE; 1897 1898 pI128->I2C = I2CPtr; 1899 1900 I2CPtr->BusName = "DDC"; 1901 I2CPtr->scrnIndex = pScrn->scrnIndex; 1902 I2CPtr->I2CPutBits = I128I2CPutBits; 1903 I2CPtr->I2CGetBits = I128I2CGetBits; 1904 I2CPtr->BitTimeout = 4; 1905 I2CPtr->ByteTimeout = 4; 1906 I2CPtr->AcknTimeout = 4; 1907 I2CPtr->StartTimeout = 4; 1908 1909 /* soft switch register bits 1,0 control I2C channel */ 1910 iobase = pI128->RegRec.iobase; 1911 soft_sw = inl(iobase + 0x28); 1912 soft_sw &= 0xfffffffc; 1913 soft_sw |= 0x00000001; 1914 outl(iobase + 0x28, soft_sw); 1915 usleep(1000); 1916 1917 /* set default as ddc2 mode */ 1918 ddc = inl(iobase + 0x2C); 1919 ddc &= ~DDC_MODE_MASK; 1920 ddc |= DDC_MODE_DDC2; 1921 outl(iobase + 0x2C, ddc); 1922 usleep(40); 1923 1924 if (!xf86I2CBusInit(I2CPtr)) { 1925 return FALSE; 1926 } 1927 return TRUE; 1928} 1929 1930 1931static xf86MonPtr 1932I128getDDC(ScrnInfoPtr pScrn) 1933{ 1934 I128Ptr pI128 = I128PTR(pScrn); 1935 xf86MonPtr MonInfo = NULL; 1936 1937 /* Initialize I2C bus - used by DDC if available */ 1938 if (pI128->i2cInit) { 1939 pI128->i2cInit(pScrn); 1940 } 1941 /* Read and output monitor info using DDC2 over I2C bus */ 1942 if (pI128->I2C) { 1943 MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, pI128->I2C); 1944 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", 1945 (void *)MonInfo); 1946 xf86PrintEDID(MonInfo); 1947 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n"); 1948 } 1949 if (!MonInfo) { 1950 /* Read and output monitor info using DDC1 */ 1951 if (pI128->ddc1Read) { 1952 MonInfo = xf86DoEDID_DDC1(pScrn->scrnIndex, NULL, pI128->ddc1Read ) ; 1953 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n", 1954 (void *)MonInfo); 1955 xf86PrintEDID(MonInfo); 1956 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n"); 1957 } 1958 } 1959 1960 if (MonInfo) 1961 xf86SetDDCproperties(pScrn, MonInfo); 1962 1963 return MonInfo; 1964} 1965 1966 1967/* 1968 * I128DisplayPowerManagementSet -- 1969 * 1970 * Sets VESA Display Power Management Signaling (DPMS) Mode. 1971 */ 1972void 1973I128DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, 1974 int flags) 1975{ 1976 I128Ptr pI128 = I128PTR(pScrn); 1977 CARD32 snc; 1978 1979 if (pI128->Debug) 1980 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "I128DisplayPowerManagementSet: %d\n", PowerManagementMode); 1981 1982 if (pI128->RamdacType == TI3025_DAC) return; 1983 1984 snc = pI128->mem.rbase_g[CRT_1CON]; 1985 1986 switch (PowerManagementMode) 1987 { 1988 case DPMSModeOn: 1989 /* HSync: On, VSync: On */ 1990 snc |= 0x30; 1991 break; 1992 case DPMSModeStandby: 1993 /* HSync: Off, VSync: On */ 1994 snc = (snc & ~0x10) | 0x20; 1995 break; 1996 case DPMSModeSuspend: 1997 /* HSync: On, VSync: Off */ 1998 snc = (snc & ~0x20) | 0x10; 1999 break; 2000 case DPMSModeOff: 2001 /* HSync: Off, VSync: Off */ 2002 snc &= ~0x30; 2003 break; 2004 } 2005 pI128->mem.rbase_g[CRT_1CON] = snc; MB; 2006} 2007 2008static void 2009I128DumpBaseRegisters(ScrnInfoPtr pScrn) 2010{ 2011 I128Ptr pI128 = I128PTR(pScrn); 2012 2013 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2014 " PCI Registers\n"); 2015 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2016 " MW0_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 2017 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM), 2018 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xFFC00000), 2019 PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0x8 ? "" : "not-"); 2020 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2021 " MW1_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 2022 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM), 2023 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0xFFC00000), 2024 PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0x8 ? "" : "not-"); 2025 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2026 " XYW_AD(A) 0x%08lx addr 0x%08lx\n", 2027 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM), 2028 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM) & 0xFFC00000)); 2029 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2030 " XYW_AD(B) 0x%08lx addr 0x%08lx\n", 2031 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM), 2032 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM) & 0xFFC00000)); 2033 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2034 " RBASE_G 0x%08lx addr 0x%08lx\n", 2035 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM), 2036 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xFFFF0000)); 2037 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2038 " IO 0x%08lx addr 0x%08lx\n", 2039 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO), 2040 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00)); 2041 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2042 " SSC 0x%08x addr 0x%08x\n", 2043 (unsigned int)PCI_SUB_DEVICE_ID(pI128->PciInfo), 2044 (unsigned int)(PCI_SUB_DEVICE_ID(pI128->PciInfo) & 0xFFFFFF00)); 2045 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2046 " SSV 0x%08x addr 0x%08x\n", 2047 (unsigned int)PCI_SUB_VENDOR_ID(pI128->PciInfo), 2048 (unsigned int)(PCI_SUB_VENDOR_ID(pI128->PciInfo) & 0xFFFFFF00)); 2049#ifndef XSERVER_LIBPCIACCESS 2050 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2051 " RBASE_E 0x%08lx addr 0x%08lx %sdecode-enabled\n\n", 2052 pI128->PciInfo->biosBase, 2053 pI128->PciInfo->biosBase & 0xFFFF8000, 2054 pI128->PciInfo->biosBase & 0x1 ? "" : "not-"); 2055 2056 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2057 " PCICMDST 0x%08x 0x%08x\n", 2058 ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command, 2059 ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_status); 2060#endif 2061 2062 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2063 " IO Mapped Registers\n"); 2064 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2065 " RBASE_G 0x%08lx addr 0x%08lx\n", 2066 (unsigned long)pI128->io.rbase_g, pI128->io.rbase_g & 0xFFFFFF00UL); 2067 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2068 " RBASE_W 0x%08lx addr 0x%08lx\n", 2069 (unsigned long)pI128->io.rbase_w, pI128->io.rbase_w & 0xFFFFFF00UL); 2070 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2071 " RBASE_A 0x%08lx addr 0x%08lx\n", 2072 (unsigned long)pI128->io.rbase_a, pI128->io.rbase_a & 0xFFFFFF00UL); 2073 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2074 " RBASE_B 0x%08lx addr 0x%08lx\n", 2075 (unsigned long)pI128->io.rbase_b, pI128->io.rbase_b & 0xFFFFFF00UL); 2076 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2077 " RBASE_I 0x%08lx addr 0x%08lx\n", 2078 (unsigned long)pI128->io.rbase_i, pI128->io.rbase_i & 0xFFFFFF00UL); 2079 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2080 " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n\n", 2081 (unsigned long)pI128->io.rbase_e, pI128->io.rbase_e & 0xFFFF8000UL, 2082 pI128->io.rbase_e & 0x7UL); 2083 2084 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2085 " Miscellaneous IO Registers\n"); 2086 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2087 " ID 0x%08lx\n", (unsigned long)pI128->io.id); 2088 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2089 " CONFIG1 0x%08lx\n", (unsigned long)pI128->io.config1); 2090 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2091 " CONFIG2 0x%08lx\n", (unsigned long)pI128->io.config2); 2092 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2093 " SGRAM 0x%08lx\n", (unsigned long)pI128->io.sgram); 2094 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2095 " SOFT_SW 0x%08lx\n", (unsigned long)pI128->io.soft_sw); 2096 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2097 " VGA_CTL 0x%08lx\n", (unsigned long)pI128->io.vga_ctl); 2098} 2099 2100 2101void 2102I128DumpActiveRegisters(ScrnInfoPtr pScrn) 2103{ 2104 I128Ptr pI128 = I128PTR(pScrn); 2105 IOADDRESS iobase; 2106 unsigned long rbase_g, rbase_w, rbase_a, rbase_b, rbase_i, rbase_e; 2107 unsigned long id, config1, config2, sgram, soft_sw, ddc, vga_ctl; 2108 volatile CARD32 *vrba, *vrbg, *vrbw; 2109 2110 vrba = pI128->mem.rbase_a; 2111 vrbg = pI128->mem.rbase_g; 2112 vrbw = pI128->mem.rbase_w; 2113 2114 iobase = pI128->RegRec.iobase; 2115 rbase_g = inl(iobase); 2116 rbase_w = inl(iobase + 0x04); 2117 rbase_a = inl(iobase + 0x08); 2118 rbase_b = inl(iobase + 0x0C); 2119 rbase_i = inl(iobase + 0x10); 2120 rbase_e = inl(iobase + 0x14); 2121 id = inl(iobase + 0x18); 2122 config1 = inl(iobase + 0x1C); 2123 config2 = inl(iobase + 0x20); 2124 sgram = inl(iobase + 0x24); 2125 soft_sw = inl(iobase + 0x28); 2126 ddc = inl(iobase + 0x2C); 2127 vga_ctl = inl(iobase + 0x30); 2128 2129 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IO Mapped Registers\n"); 2130 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2131 " RBASE_G 0x%08lx addr 0x%08lx\n", 2132 rbase_g, rbase_g & 0xFFFFFF00); 2133 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2134 " RBASE_W 0x%08lx addr 0x%08lx\n", 2135 rbase_w, rbase_w & 0xFFFFFF00); 2136 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2137 " RBASE_A 0x%08lx addr 0x%08lx\n", 2138 rbase_a, rbase_a & 0xFFFFFF00); 2139 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2140 " RBASE_B 0x%08lx addr 0x%08lx\n", 2141 rbase_b, rbase_b & 0xFFFFFF00); 2142 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2143 " RBASE_I 0x%08lx addr 0x%08lx\n", 2144 rbase_i, rbase_i & 0xFFFFFF00); 2145 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2146 " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n", 2147 rbase_e, rbase_e & 0xFFFF8000, rbase_e & 0x7); 2148 2149 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Miscellaneous IO Registers\n"); 2150 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ID 0x%08lx\n", id); 2151 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " REV %ld HBT %ld BASE0 %ld VDEN %ld VB %ld BASE1 %ld BASE2 %ld DS %ld\n", 2152 id&7, (id>>3)&3, (id>>6)&3, (id>>8)&3, (id>>10)&1, 2153 (id>>11)&3, (id>>13)&3, (id>>15)&1); 2154 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDEN %ld DB %ld BASE3 %ld BASER %ld MDEN %ld TR %ld VS %ld\n", 2155 (id>>16)&3, (id>>18)&1, (id>>19)&3, (id>>21)&7, (id>>24)&3, 2156 (id>>26)&1, (id>>27)&1); 2157 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLASS %ld EE %ld\n", 2158 (id>>28)&3, (id>>30)&1); 2159 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG1 0x%08lx\n", config1); 2160 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VE %ld SFT_RST %ld ONE28 %ld VS %ld\n", 2161 config1&1, (config1>>1)&1, 2162 (config1>>2)&1, (config1>>3)&1); 2163 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " G %ld W %ld A %ld B %ld I %ld E %ld W0 %ld W1 %ld XA %ld XB %ld\n", 2164 (config1>>8)&1, (config1>>9)&1, 2165 (config1>>10)&1, (config1>>11)&1, 2166 (config1>>12)&1, (config1>>13)&1, 2167 (config1>>16)&1, (config1>>17)&1, 2168 (config1>>20)&1, (config1>>21)&1); 2169 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " HBPRI %ld VBPRI %ld DE1PRI %ld ISAPRI %ld\n", 2170 (config1>>24)&3, (config1>>26)&3, 2171 (config1>>28)&3, (config1>>30)&3); 2172 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG2 0x%08lx\n", config2); 2173 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DWT %lx EWS %lx DWS %lx MC %lx FBB %ld IOB %ld FST %ld CNT %ld DEC %ld\n", 2174 config2&0x3, (config2>>8)&0xF, 2175 (config2>>16)&0x7, (config2>>20)&0xF, 2176 (config2>>24)&1, (config2>>25)&1, 2177 (config2>>26)&1, (config2>>27)&1, 2178 (config2>>28)&1); 2179 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PRE %ld RVD %ld SDAC %ld\n", 2180 (config2>>29)&1, (config2>>30)&1, (config2>>31)&1); 2181 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SGRAM 0x%08lx\n", sgram); 2182 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SOFT_SW 0x%08lx\n", soft_sw); 2183 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDC 0x%08lx\n", ddc); 2184 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VGA_CTL 0x%08lx\n", vga_ctl); 2185 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MEMMUX %ld VGADEC %ld VIDMUX %ld ENA %ld BUFSEL %ld STR %ld\n", 2186 vga_ctl&1, (vga_ctl>>1)&1, 2187 (vga_ctl>>2)&1, (vga_ctl>>3)&1, 2188 (vga_ctl>>4)&1, (vga_ctl>>5)&1); 2189 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " 3C2 %ld DACDEC %ld MSK 0x%02lx\n", 2190 (vga_ctl>>6)&1, 2191 (vga_ctl>>7)&1, 2192 (vga_ctl>>8)&0xff); 2193 2194 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT Registers\n"); 2195 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_VCNT 0x%08lx (%ld)\n", 2196 vrbg[0x20/4]&0x000000FFUL, vrbg[0x20/4]&0x000000FFUL); 2197 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_HCNT 0x%08lx (%ld)\n", 2198 vrbg[0x24/4]&0x00000FFFUL, vrbg[0x24/4]&0x00000FFFUL); 2199 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_ADR 0x%08lx (%ld)\n", 2200 vrbg[0x28/4]&0x01FFFFF0UL, vrbg[0x28/4]&0x01FFFFF0UL); 2201 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_PTCH 0x%08lx (%ld)\n", 2202 vrbg[0x2C/4]&0x0000FFF0UL, vrbg[0x2C/4]&0x0000FFF0UL); 2203 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HAC 0x%08lx (%ld)\n", 2204 vrbg[0x30/4]&0x00003FFFUL, vrbg[0x30/4]&0x00003FFFUL); 2205 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HBL 0x%08lx (%ld)\n", 2206 vrbg[0x34/4]&0x00003FFFUL, vrbg[0x34/4]&0x00003FFFUL); 2207 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HFP 0x%08lx (%ld)\n", 2208 vrbg[0x38/4]&0x00003FFFUL, vrbg[0x38/4]&0x00003FFFUL); 2209 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HS 0x%08lx (%ld)\n", 2210 vrbg[0x3C/4]&0x00003FFFUL, vrbg[0x3C/4]&0x00003FFFUL); 2211 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VAC 0x%08lx (%ld)\n", 2212 vrbg[0x40/4]&0x00000FFFUL, vrbg[0x40/4]&0x00000FFFUL); 2213 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VBL 0x%08lx (%ld)\n", 2214 vrbg[0x44/4]&0x00000FFFUL, vrbg[0x44/4]&0x00000FFFUL); 2215 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VFP 0x%08lx (%ld)\n", 2216 vrbg[0x48/4]&0x00000FFFUL, vrbg[0x48/4]&0x00000FFFUL); 2217 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VS 0x%08lx (%ld)\n", 2218 vrbg[0x4C/4]&0x00000FFFUL, vrbg[0x4C/4]&0x00000FFFUL); 2219 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_LCNT 0x%08lx\n", 2220 vrbg[0x50/4]&0x00000FFFUL); 2221 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_ZOOM 0x%08lx\n", 2222 vrbg[0x54/4]&0x0000000FUL); 2223 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_1CON 0x%08lx PH %ld PV %ld CS %ld INL %ld H/VSE %ld/%ld VE %ld BTS %ld\n", 2224 (unsigned long)vrbg[0x58/4], 2225 vrbg[0x58/4]&1UL, (vrbg[0x58/4]>>1)&1UL, (vrbg[0x58/4]>>2)&1UL, 2226 (vrbg[0x58/4]>>3)&1UL, (vrbg[0x58/4]>>4)&1UL, (vrbg[0x58/4]>>5)&1UL, 2227 (vrbg[0x58/4]>>6)&1UL, (vrbg[0x58/4]>>8)&1UL); 2228 2229 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_2CON 0x%08lx MEM %ld RFR %ld TRD %ld SPL %ld\n", 2230 (unsigned long)vrbg[0x5C/4], 2231 vrbg[0x5C/4]&7UL, (vrbg[0x5C/4]>>8)&1UL, 2232 (vrbg[0x5C/4]>>16)&7UL, (vrbg[0x5C/4]>>24)&1UL); 2233 2234 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory Windows Registers\n"); 2235 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_CTRL 0x%08lx\n", 2236 (unsigned long)vrbw[0x00]); 2237 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 2238 (vrbw[0x00]>>1)&1UL, (vrbw[0x00]>>2)&1UL, (vrbw[0x00]>>3)&1UL, 2239 (vrbw[0x00]>>4)&3UL, (vrbw[0x00]>>8)&1UL, (vrbw[0x00]>>21)&3UL, 2240 (vrbw[0x00]>>24)&3UL, (vrbw[0x00]>>26)&3UL); 2241 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 2242 (vrbw[0x00]>>28)&1UL, (vrbw[0x00]>>29)&1UL, (vrbw[0x00]>>30)&1UL); 2243 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_AD 0x%08lx MW0_SZ 0x%08lx MW0_PGE 0x%08lx\n", 2244 vrbw[0x04/4]&0xFFFFF000UL, vrbw[0x08/4]&0x0000000FUL, 2245 vrbw[0x0C/4]&0x000F001FUL); 2246 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_ORG10 0x%08lx MW0_ORG14 0x%08lx MW0_MSRC 0x%08lx\n", 2247 vrbw[0x10/4]&0x01FFF000UL, vrbw[0x14/4]&0x01FFF000UL, 2248 vrbw[0x18/4]&0x00FFFF00UL); 2249 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_WKEY 0x%08lx MW0_KYDAT 0x%08lx MW0_MASK 0x%08lx\n", 2250 (unsigned long)vrbw[0x1C/4], vrbw[0x20/4]&0x000F000FUL, 2251 (unsigned long)vrbw[0x24/4]); 2252 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_CTRL 0x%08lx\n", 2253 (unsigned long)vrbw[0x28/4]); 2254 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 2255 (vrbw[0x28/4]>>1)&1UL, (vrbw[0x28/4]>>2)&1UL, (vrbw[0x28/4]>>3)&1UL, 2256 (vrbw[0x28/4]>>4)&3UL, (vrbw[0x28/4]>>8)&1UL, (vrbw[0x28/4]>>21)&3UL, 2257 (vrbw[0x28/4]>>24)&3UL, (vrbw[0x28/4]>>26)&3UL); 2258 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 2259 (vrbw[0x28/4]>>28)&1UL, (vrbw[0x28/4]>>29)&1UL, (vrbw[0x28/4]>>30)&1UL); 2260 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_AD 0x%08lx MW1_SZ 0x%08lx MW1_PGE 0x%08lx\n", 2261 vrbw[0x2C/4]&0xFFFFF000UL, vrbw[0x30/4]&0x0000000FUL, 2262 vrbw[0x34/4]&0x000F001FUL); 2263 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_ORG10 0x%08lx MW1_ORG14 0x%08lx MW1_MSRC 0x%08lx\n", 2264 vrbw[0x38/4]&0x01FFF000UL, vrbw[0x3c/4]&0x01FFF000UL, 2265 vrbw[0x40/4]&0x00FFFF00UL); 2266 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_WKEY 0x%08lx MW1_KYDAT 0x%08lx MW1_MASK 0x%08lx\n", 2267 (unsigned long)vrbw[0x44/4], vrbw[0x48/4]&0x000F000FUL, 2268 (unsigned long)vrbw[0x4C/4]); 2269 2270 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Engine A Registers\n"); 2271 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTP 0x%08lx\n", 2272 vrba[0x00/4]&0x03UL); 2273 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTM 0x%08lx\n", 2274 vrba[0x04/4]&0x03UL); 2275 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FLOW 0x%08lx\n", 2276 vrba[0x08/4]&0x0FUL); 2277 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUSY 0x%08lx\n", 2278 vrba[0x0C/4]&0x01UL); 2279 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XYW_AD 0x%08lx SIZE 0x%lx ADDR 0x%lx\n", 2280 vrba[0x10/4]&0xFFFFFF00UL, (vrba[0x10/4]>>8)&0x0000000FUL, 2281 vrba[0x10/4]&0xFFFFF000UL); 2282 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ZCTL 0x%08lx\n", 2283 (unsigned long)vrba[0x18/4]); 2284 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUF_CTRL 0x%08lx\n", 2285 (unsigned long)vrba[0x20/4]); 2286 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld DEN %ld DSE %ld VSE %ld MSE %ld\n", 2287 (vrba[0x20/4]>>1)&1UL, (vrba[0x20/4]>>2)&1UL, (vrba[0x20/4]>>3)&1UL, 2288 (vrba[0x20/4]>>8)&3UL, (vrba[0x20/4]>>10)&3UL, (vrba[0x20/4]>>12)&1UL, 2289 (vrba[0x20/4]>>13)&1UL, (vrba[0x20/4]>>14)&1UL); 2290 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PS %ld MDM %ld PSIZE %ld CRCO %ld\n", 2291 (vrba[0x20/4]>>16)&0x1FUL, 2292 (vrba[0x20/4]>>21)&3UL, (vrba[0x20/4]>>24)&3UL, (vrba[0x20/4]>>30)&3UL); 2293 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_PGE 0x%08lx DVPGE 0x%lx MPGE 0x%lx\n", 2294 vrba[0x24/4]&0x000F001FUL, (vrba[0x24/4]>>8)&0x01FUL, 2295 (vrba[0x24/4]&0x000F0000UL)>>16); 2296 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SORG 0x%08lx\n", 2297 vrba[0x28/4]&0x0FFFFFFFUL); 2298 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DORG 0x%08lx\n", 2299 vrba[0x2C/4]&0x0FFFFFFFUL); 2300 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_MSRC 0x%08lx\n", 2301 vrba[0x30/4]&0x03FFFFF0UL); 2302 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_WKEY 0x%08lx\n", 2303 (unsigned long)vrba[0x38/4]); 2304 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_ZPTCH 0x%08lx\n", 2305 vrba[0x3C/4]&0x000FFFF0UL); 2306 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SPTCH 0x%08lx\n", 2307 vrba[0x40/4]&0x0000FFF0UL); 2308 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DPTCH 0x%08lx\n", 2309 vrba[0x44/4]&0x0000FFF0UL); 2310 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD 0x%08lx\n", 2311 vrba[0x48/4]&0x7FFFFFFFUL); 2312 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " OPC 0x%02lx ROP 0x%02lx STYLE 0x%02lx CLP 0x%lx PATRN 0x%lx HDF %ld\n", 2313 vrba[0x48/4]&0x00FFUL, (vrba[0x48/4]>>8)&0x00FFUL, (vrba[0x48/4]>>16)&0x001FUL, 2314 (vrba[0x48/4]>>21)&7UL, (vrba[0x48/4]>>24)&0x0FUL, (vrba[0x48/4]>>28)&7UL); 2315 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_SHADE 0x%02lx\n", 2316 vrba[0x4C/4]&0x00FFUL); 2317 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_OPC 0x%02lx\n", 2318 vrba[0x50/4]&0x00FFUL); 2319 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_ROP 0x%02lx\n", 2320 vrba[0x54/4]&0x00FFUL); 2321 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_STYLE 0x%02lx\n", 2322 vrba[0x58/4]&0x001FUL); 2323 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_PATRN 0x%02lx\n", 2324 vrba[0x5C/4]&0x000FUL); 2325 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_CLP 0x%02lx\n", 2326 vrba[0x60/4]&0x0007UL); 2327 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_HDF 0x%02lx\n", 2328 vrba[0x64/4]&0x0007UL); 2329 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FORE 0x%08lx\n", 2330 (unsigned long)vrba[0x68/4]); 2331 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BACK 0x%08lx\n", 2332 (unsigned long)vrba[0x6C/4]); 2333 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MASK 0x%08lx\n", 2334 (unsigned long)vrba[0x70/4]); 2335 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " RMSK 0x%08lx\n", 2336 (unsigned long)vrba[0x74/4]); 2337 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " LPAT 0x%08lx\n", 2338 (unsigned long)vrba[0x78/4]); 2339 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PCTRL 0x%08lx\n", 2340 (unsigned long)vrba[0x7C/4]); 2341 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PLEN 0x%02ld PSCL 0x%02ld SPTR 0x%02ld SSCL 0x%lx STATE 0x%04lx\n", 2342 vrba[0x7C/4]&0x1FUL, (vrba[0x7C/4]>>5)&7UL, (vrba[0x7C/4]>>8)&0x1FUL, 2343 (vrba[0x7C/4]>>13)&7UL, (vrba[0x7C/4]>>16)&0xFFFFUL); 2344 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPTL 0x%08lx CLPTLY 0x%04lx CLPTLX 0x%04lx\n", 2345 (unsigned long)vrba[0x80/4], vrba[0x80/4]&0x00FFFFUL, (vrba[0x80/4]>>16)&0x00FFFFUL); 2346 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPBR 0x%08lx CLPBRY 0x%04lx CLPBRX 0x%04lx\n", 2347 (unsigned long)vrba[0x84/4], 2348 vrba[0x84/4]&0x00FFFFUL, (vrba[0x84/4]>>16)&0x00FFFFUL); 2349 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY0 0x%08lx\n", 2350 (unsigned long)vrba[0x88/4]); 2351 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY1 0x%08lx\n", 2352 (unsigned long)vrba[0x8C/4]); 2353 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY2 0x%08lx\n", 2354 (unsigned long)vrba[0x90/4]); 2355 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY3 0x%08lx\n", 2356 (unsigned long)vrba[0x94/4]); 2357 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY4 0x%08lx\n", 2358 (unsigned long)vrba[0x98/4]); 2359 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY5 0x%08lx\n", 2360 (unsigned long)vrba[0x9C/4]); 2361 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY6 0x%08lx\n", 2362 (unsigned long)vrba[0xA0/4]); 2363 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY7 0x%08lx\n", 2364 (unsigned long)vrba[0xA4/4]); 2365 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY8 0x%08lx\n", 2366 (unsigned long)vrba[0xA8/4]); 2367 if (pI128->RamdacType != TI3025_DAC) 2368 I128DumpIBMDACRegisters(pScrn, vrbg); 2369} 2370 2371static const unsigned char ibm52Xmask[0xA0] = { 23720xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 00-07 */ 23730xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 08-0F */ 23740xFF, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, /* 10-17 */ 23750x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 18-1F */ 23760xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, /* 20-27 */ 23770x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 28-2F */ 23780xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 30-37 */ 23790x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 38-3F */ 23800xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 40-47 */ 23810xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48-4F */ 23820x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 23830x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 23840xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60-67 */ 23850x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 68-6F */ 23860xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 70-77 */ 23870x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 78-7F */ 23880x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, /* 80-87 */ 23890xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, /* 88-8F */ 23900xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 90-97 */ 23910x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 98-9F */ 2392}; 2393 2394static void 2395I128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg) 2396{ 2397 unsigned char ibmr[0x100]; 2398 char buf[128], tbuf[10]; 2399 int i; 2400 2401 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IBM52X Registers\n"); 2402 2403 vrbg[IDXH_I] = 0x00; 2404 vrbg[IDXH_I] = 0x00; 2405 vrbg[IDXCTL_I] = 0x01; 2406 buf[0] = '\0'; 2407 2408 for (i=0; i<0xA0; i++) { 2409 if ((i%16 == 0) && (i != 0)) { 2410 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 2411 buf[0] = '\0'; 2412 } 2413 if (ibm52Xmask[i] == 0x00) { 2414 strcat(buf, " .."); 2415 } else { 2416 vrbg[IDXL_I] = i; 2417 ibmr[i] = vrbg[DATA_I] & 0xFF; 2418 ibmr[i] &= ibm52Xmask[i]; 2419 sprintf(tbuf, " %02x", ibmr[i]); 2420 strcat(buf, tbuf); 2421 } 2422 } 2423 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 2424} 2425 2426