i128_driver.c revision af1a9c97
1/* 2 * Copyright 1995-2000 by Robin Cutshaw <robin@XFree86.Org> 3 * Copyright 1998 by Number Nine Visual Technology, Inc. 4 * 5 * Permission to use, copy, modify, distribute, and sell this software and its 6 * documentation for any purpose is hereby granted without fee, provided that 7 * the above copyright notice appear in all copies and that both that 8 * copyright notice and this permission notice appear in supporting 9 * documentation, and that the name of Robin Cutshaw not be used in 10 * advertising or publicity pertaining to distribution of the software without 11 * specific, written prior permission. Robin Cutshaw and Number Nine make no 12 * representations about the suitability of this software for any purpose. It 13 * is provided "as is" without express or implied warranty. 14 * 15 * ROBIN CUTSHAW AND NUMBER NINE DISCLAIM ALL WARRANTIES WITH REGARD TO THIS 16 * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND 17 * FITNESS, IN NO EVENT SHALL ROBIN CUTSHAW OR NUMBER NINE BE LIABLE FOR 18 * ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 19 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN 20 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING 21 * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 * 23 */ 24 25#ifdef HAVE_CONFIG_H 26#include "config.h" 27#endif 28 29 30 31/* All drivers should typically include these */ 32#include "xf86.h" 33#include "xf86_OSproc.h" 34#include "xf86Resources.h" 35 36#include "compiler.h" 37 38/* Drivers for PCI hardware need this */ 39#include "xf86PciInfo.h" 40 41/* Drivers that need to access the PCI config space directly need this */ 42#include "xf86Pci.h" 43 44/* vgaHW module is only used to save/restore fonts by this driver */ 45#include "vgaHW.h" 46 47/* All drivers initialising the SW cursor need this */ 48#include "mipointer.h" 49 50/* All drivers implementing backing store need this */ 51#include "mibstore.h" 52#include "micmap.h" 53 54#include "xf86DDC.h" 55#include "xf86RAC.h" 56#include "vbe.h" 57 58#include "xaa.h" 59#include "xf86cmap.h" 60#include "fb.h" 61 62#include "xf86xv.h" 63#include <X11/extensions/Xv.h> 64 65/* driver specific includes */ 66#include "i128.h" 67#include "i128reg.h" 68 69#include <unistd.h> 70 71/* 72 * Forward definitions for the functions that make up the driver. 73 */ 74 75/* Mandatory functions */ 76static const OptionInfoRec * I128AvailableOptions(int chipid, int busid); 77static void I128Identify(int flags); 78static Bool I128Probe(DriverPtr drv, int flags); 79static Bool I128PreInit(ScrnInfoPtr pScrn, int flags); 80static Bool I128ScreenInit(int Index, ScreenPtr pScreen, int argc, 81 char **argv); 82static Bool I128EnterVT(int scrnIndex, int flags); 83static void I128LeaveVT(int scrnIndex, int flags); 84static Bool I128CloseScreen(int scrnIndex, ScreenPtr pScreen); 85static Bool I128SaveScreen(ScreenPtr pScreen, int mode); 86 87static void I128DumpBaseRegisters(ScrnInfoPtr pScrn); 88static void I128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg); 89 90/* Optional functions */ 91static void I128FreeScreen(int scrnIndex, int flags); 92static ModeStatus I128ValidMode(int scrnIndex, DisplayModePtr mode, 93 Bool verbose, int flags); 94static void I128DisplayPowerManagementSet(ScrnInfoPtr pScrn, 95 int PowerManagementMode, 96 int flags); 97 98/* Internally used functions */ 99static Bool I128GetRec(ScrnInfoPtr pScrn); 100static void I128FreeRec(ScrnInfoPtr pScrn); 101static Bool I128MapMem(ScrnInfoPtr pScrn); 102static Bool I128UnmapMem(ScrnInfoPtr pScrn); 103static void I128Save(ScrnInfoPtr pScrn); 104static void I128Restore(ScrnInfoPtr pScrn); 105static Bool I128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 106static int I128CountRam(ScrnInfoPtr pScrn); 107static void I128SoftReset(ScrnInfoPtr pScrn); 108static Bool I128I2CInit(ScrnInfoPtr pScrn); 109static xf86MonPtr I128getDDC(ScrnInfoPtr pScrn); 110#if 0 111static unsigned int I128DDC1Read(ScrnInfoPtr pScrn); 112#endif 113 114#define I128_VERSION 4000 115#define I128_NAME "I128" 116#define I128_DRIVER_NAME "i128" 117#define I128_MAJOR_VERSION PACKAGE_VERSION_MAJOR 118#define I128_MINOR_VERSION PACKAGE_VERSION_MINOR 119#define I128_PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 120 121/* 122 * This contains the functions needed by the server after loading the 123 * driver module. It must be supplied, and gets added the driver list by 124 * the Module Setup funtion in the dynamic case. In the static case a 125 * reference to this is compiled in, and this requires that the name of 126 * this DriverRec be an upper-case version of the driver name. 127 */ 128 129_X_EXPORT DriverRec I128 = { 130 I128_VERSION, 131 I128_DRIVER_NAME, 132 I128Identify, 133 I128Probe, 134 I128AvailableOptions, 135 NULL, 136 0 137}; 138 139#ifdef XFree86LOADER 140 141static MODULESETUPPROTO(i128Setup); 142 143static XF86ModuleVersionInfo i128VersRec = 144{ 145 "i128", 146 MODULEVENDORSTRING, 147 MODINFOSTRING1, 148 MODINFOSTRING2, 149 XORG_VERSION_CURRENT, 150 I128_MAJOR_VERSION, I128_MINOR_VERSION, I128_PATCHLEVEL, 151 ABI_CLASS_VIDEODRV, /* This is a video driver */ 152 ABI_VIDEODRV_VERSION, 153 MOD_CLASS_VIDEODRV, 154 {0,0,0,0} 155}; 156 157/* 158 * XF86ModuleData structure is the first part of the driver that is used 159 * by the module loader. It provides the XF86ModuleVersionInfo structure 160 * used to verify that the module version is compatable with the loader 161 * version. It also provides a pointer to the module specific 162 * ModuleSetupProc() and ModuleTearDownProc() functions. 163 */ 164 165_X_EXPORT XF86ModuleData i128ModuleData = { &i128VersRec, i128Setup, NULL }; 166 167#endif 168 169#ifdef XFree86LOADER 170 171/* Mandatory 172 * 173 * The Setup() function is the first entry point called once that the 174 * module has been linked into the server. It adds this driver to 175 * the driver list and lets the server know which symbols it might use. 176 * This is only called once, not called with each server generation. 177 * 178 * Arguments: 179 * pointer module - module being loaded, passed to xf86AddDriver() 180 * pointer opts - unused but contains options from config file 181 * int *errmaj - if function error returns major error value 182 * int *errmin - if function error returns minor error value 183 * Returns: 184 * pointer to TearDownData which is passed to TearDownProc() 185 * or NULL for failure. 186 */ 187 188static pointer 189i128Setup(pointer module, pointer opts, int *errmaj, int *errmin) 190{ 191 static Bool setupDone = FALSE; 192 193 /* This module should be loaded only once, but check to be sure. */ 194 195 if (!setupDone) { 196 setupDone = TRUE; 197 xf86AddDriver(&I128, module, 0); 198 199 /* 200 * Modules that this driver always requires may be loaded here 201 * by calling LoadSubModule(). 202 */ 203 204 /* 205 * The return value must be non-NULL on success even though there 206 * is no TearDownProc. 207 */ 208 return (pointer)1; 209 } else { 210 if (errmaj) *errmaj = LDR_ONCEONLY; 211 return NULL; 212 } 213} 214 215#endif /* XFree86LOADER */ 216 217 218/* Define supported chipsets. Used by Probe(). */ 219 220static SymTabRec I128Chipsets[] = { 221 { PCI_CHIP_I128, "i128" }, 222 { PCI_CHIP_I128_2, "i128v2" }, 223 { PCI_CHIP_I128_T2R, "i128t2r" }, 224 { PCI_CHIP_I128_T2R4, "i128t2r4" }, 225 {-1, NULL } 226}; 227 228static PciChipsets I128PciChipsets[] = { 229 { PCI_CHIP_I128, PCI_CHIP_I128, NULL }, 230 { PCI_CHIP_I128_2, PCI_CHIP_I128_2, NULL }, 231 { PCI_CHIP_I128_T2R, PCI_CHIP_I128_T2R, NULL }, 232 { PCI_CHIP_I128_T2R4, PCI_CHIP_I128_T2R4, NULL }, 233 { -1, -1, RES_UNDEFINED } 234}; 235 236/* Mandatory 237 * 238 * The Probe() function is the second entry point called once that the 239 * module has been linked into the server. This function finds all 240 * instances of hardware that it supports and allocates a ScrnInfoRec 241 * using xf86ConfigPciEntity() for each unclaimed slot. This should be 242 * a minimal probe and under no circumstances should it leave the hardware 243 * state changed. No initialisations other than the required ScrnInfoRec 244 * should be done and no data structures should be allocated. 245 * 246 * Arguments: 247 * DriverPtr drv - pointer to the driver structure 248 * int flags - PROBE_DEFAULT for normal function 249 * PROBE_DETECT for use with "-config" and "-probe" 250 * Returns: 251 * Bool TRUE if a screen was allocated, FALSE otherwise 252 */ 253 254static Bool 255I128Probe(DriverPtr drv, int flags) 256{ 257 int i; 258 GDevPtr *devSections; 259 int *usedChips; 260 int numDevSections; 261 int numUsed; 262 Bool foundScreen = FALSE; 263 264 /* 265 * Check if there has been a chipset override in the config file. 266 * For this we must find out if there is an active device section which 267 * is relevant, i.e., which has no driver specified or has THIS driver 268 * specified. 269 */ 270 271 if ((numDevSections = xf86MatchDevice(I128_DRIVER_NAME, 272 &devSections)) <= 0) { 273 /* 274 * There's no matching device section in the config file, so quit 275 * now. 276 */ 277 return FALSE; 278 } 279 280 /* 281 * We need to probe the hardware first. We then need to see how this 282 * fits in with what is given in the config file, and allow the config 283 * file info to override any contradictions. 284 */ 285 286 /* 287 * All of the cards this driver supports are PCI, so the "probing" just 288 * amounts to checking the PCI data that the server has already collected. 289 */ 290#ifndef XSERVER_LIBPCIACCESS 291 if (xf86GetPciVideoInfo() == NULL) { 292 /* 293 * We won't let anything in the config file override finding no 294 * PCI video cards at all. This seems reasonable now, but we'll see. 295 */ 296 return FALSE; 297 } 298#endif 299 300 numUsed = xf86MatchPciInstances(I128_NAME, PCI_VENDOR_NUMNINE, 301 I128Chipsets, I128PciChipsets, devSections, 302 numDevSections, drv, &usedChips); 303 304 /* Free it since we don't need that list after this */ 305 xfree(devSections); 306 307 if (numUsed <= 0) 308 return FALSE; 309 310 if (flags & PROBE_DETECT) { 311 xfree(usedChips); 312 return FALSE; 313 } 314 315 for (i = 0; i < numUsed; i++) { 316 ScrnInfoPtr pScrn = NULL; 317 318 /* Allocate a ScrnInfoRec and claim the slot */ 319 if ((pScrn = xf86ConfigPciEntity(pScrn, 0,usedChips[i], 320 I128PciChipsets, NULL, NULL, 321 NULL, NULL, NULL)) == NULL) 322 continue; 323 324 325 /* Fill in what we can of the ScrnInfoRec */ 326 pScrn->driverVersion = I128_VERSION; 327 pScrn->driverName = I128_DRIVER_NAME; 328 pScrn->name = I128_NAME; 329 pScrn->Probe = I128Probe; 330 pScrn->PreInit = I128PreInit; 331 pScrn->ScreenInit = I128ScreenInit; 332 pScrn->SwitchMode = I128SwitchMode; 333 pScrn->AdjustFrame = I128AdjustFrame; 334 pScrn->EnterVT = I128EnterVT; 335 pScrn->LeaveVT = I128LeaveVT; 336 pScrn->FreeScreen = I128FreeScreen; 337 pScrn->ValidMode = I128ValidMode; 338 foundScreen = TRUE; 339 } 340 341 xfree(usedChips); 342 343 return foundScreen; 344} 345 346 347/* Mandatory 348 * 349 * The Identify() function is the third entry point called once that the 350 * module has been linked into the server. This function prints driver 351 * identity information. 352 * 353 * Arguments: 354 * int flags - currently unused 355 * Returns: 356 * no return 357 */ 358 359static void 360I128Identify(int flags) 361{ 362 xf86PrintChipsets(I128_NAME, "driver for Number Nine I128 chipsets", 363 I128Chipsets); 364} 365 366 367/* 368 * Define options that this driver will accept. Used by AvailableOptions(). 369 */ 370 371typedef enum { 372 OPTION_FLATPANEL, 373 OPTION_SW_CURSOR, 374 OPTION_HW_CURSOR, 375 OPTION_SYNC_ON_GREEN, 376 OPTION_NOACCEL, 377 OPTION_SHOWCACHE, 378 OPTION_DAC6BIT, 379 OPTION_DEBUG, 380 OPTION_ACCELMETHOD 381} I128Opts; 382 383static const OptionInfoRec I128Options[] = { 384 { OPTION_FLATPANEL, "FlatPanel", OPTV_BOOLEAN, {0}, FALSE }, 385 { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, 386 { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, 387 { OPTION_SYNC_ON_GREEN, "SyncOnGreen", OPTV_BOOLEAN, {0}, FALSE }, 388 { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, 389 { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE }, 390 { OPTION_DAC6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE }, 391 { OPTION_DEBUG, "Debug", OPTV_BOOLEAN, {0}, FALSE }, 392 { OPTION_ACCELMETHOD, "AccelMethod", OPTV_STRING, {0}, FALSE }, 393 { -1, NULL, OPTV_NONE, {0}, FALSE } 394}; 395 396 397/* Mandatory 398 * 399 * The AvailableOptions() function is called to provide the options that 400 * this driver will accept. This is used with the "-configure" server option. 401 * 402 * Arguments: 403 * int chipid - currently unused 404 * int busid - currently unused 405 * Returns: 406 * const OptionInfoRec * - all accepted options 407 */ 408 409static const OptionInfoRec * 410I128AvailableOptions(int chipid, int busid) 411{ 412 return I128Options; 413} 414 415 416/* Mandatory 417 * 418 * The PreInit() function called after the Probe() function once at 419 * server startup and not at each server generation. Only things that 420 * are persistent across server generations can be initialized here. 421 * This function determines if the configuration is usable and, if so, 422 * initializes those parts of the ScrnInfoRec that can be set at the 423 * beginning of the first server generation. This should be done in 424 * the least intrusive way possible. Note that although the ScrnInfoRec 425 * has been allocated, the ScreenRec has not. 426 * 427 * Use xf86AllocateScrnInfoPrivateIndex() for persistent data across 428 * screen generations and AllocateScreenprivateIndex() in ScreenInit() 429 * for per-generation data. 430 * 431 * Arguments: 432 * ScrnInfoPtr pScrn - 433 * int flags - PROBE_DEFAULT for normal function 434 * PROBE_DETECT for use with "-config" and "-probe" 435 * Returns: 436 * Bool TRUE if ScrnInfoRec was initialized, FALSE otherwise 437 */ 438 439static Bool 440I128PreInit(ScrnInfoPtr pScrn, int flags) 441{ 442 I128Ptr pI128; 443 vgaHWPtr hwp; 444 int i; 445 ClockRangePtr clockRanges; 446 MessageType from; 447 IOADDRESS iobase; 448 char *ramdac = NULL; 449 CARD32 tmpl, tmph, tmp; 450 unsigned char n, m, p, mdc, df; 451 float mclk; 452 xf86MonPtr mon; 453 454 /* Check the number of entities, and fail if it isn't one. */ 455 if (pScrn->numEntities != 1) 456 return FALSE; 457 458 /* Allocate the I128Rec driverPrivate */ 459 I128GetRec(pScrn); 460 461 pI128 = I128PTR(pScrn); 462 463 /* Get the entity, and make sure it is PCI. */ 464 pI128->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); 465 if (pI128->pEnt->location.type != BUS_PCI) 466 return FALSE; 467 468 if (flags & PROBE_DETECT) { 469 /* I128ProbeDDC(pScrn, pI128->pEnt->index); */ 470 return TRUE; 471 } 472 473 /* Find the PCI info for this screen */ 474 pI128->PciInfo = xf86GetPciInfoForEntity(pI128->pEnt->index); 475#ifndef XSERVER_LIBPCIACCESS 476 pI128->PciTag = pciTag(pI128->PciInfo->bus, pI128->PciInfo->device, 477 pI128->PciInfo->func); 478#endif 479 480 pI128->Primary = xf86IsPrimaryPci(pI128->PciInfo); 481 482 /* The vgahw module should be allocated here when needed */ 483 if (!xf86LoadSubModule(pScrn, "vgahw")) 484 return FALSE; 485 486 /* 487 * Allocate a vgaHWRec 488 */ 489 if (!vgaHWGetHWRec(pScrn)) 490 return FALSE; 491 492 hwp = VGAHWPTR(pScrn); 493 vgaHWGetIOBase(hwp); 494 495 /* Set pScrn->monitor */ 496 pScrn->monitor = pScrn->confScreen->monitor; 497 498 /* 499 * The first thing we should figure out is the depth, bpp, etc. 500 * Our default depth is 8, so pass it to the helper function. 501 * We support both 24bpp and 32bpp layouts, so indicate that. 502 */ 503 504 if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) { 505 return FALSE; 506 } else { 507 /* Check that the returned depth is one we support */ 508 switch (pScrn->depth) { 509 case 8: 510 case 15: 511 case 16: 512 case 24: 513 /* OK */ 514 break; 515 default: 516 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 517 "Given depth (%d) is not supported by this driver\n", 518 pScrn->depth); 519 return FALSE; 520 } 521 } 522 xf86PrintDepthBpp(pScrn); 523 524 /* 525 * This must happen after pScrn->display has been set because 526 * xf86SetWeight references it. 527 */ 528 if (pScrn->depth > 8) { 529 /* The defaults are OK for us */ 530 rgb zeros = {0, 0, 0}; 531 532 if (!xf86SetWeight(pScrn, zeros, zeros)) { 533 return FALSE; 534 } else { 535 /* XXX check that weight returned is supported */ 536 ; 537 } 538 } 539 540 if (!xf86SetDefaultVisual(pScrn, -1)) { 541 return FALSE; 542 } else { 543 /* We don't currently support DirectColor at > 8bpp */ 544 if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { 545 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual" 546 " (%s) is not supported at depth %d\n", 547 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); 548 return FALSE; 549 } 550 } 551 552 /* We use a programmable clock */ 553 pScrn->progClock = TRUE; 554 555 /* Collect all of the relevant option flags (fill in pScrn->options) */ 556 xf86CollectOptions(pScrn, NULL); 557 558 /* Process the options */ 559 if (!(pI128->Options = xalloc(sizeof(I128Options)))) 560 return FALSE; 561 memcpy(pI128->Options, I128Options, sizeof(I128Options)); 562 xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI128->Options); 563 564 if (pScrn->depth == 8) 565 pScrn->rgbBits = 8; 566 567 /* 568 * The preferred method is to use the "hw cursor" option as a tri-state 569 * option, with the default set above. 570 */ 571 from = X_DEFAULT; 572 pI128->HWCursor = TRUE; 573 if (xf86GetOptValBool(pI128->Options, OPTION_HW_CURSOR, &pI128->HWCursor)) { 574 from = X_CONFIG; 575 } 576 /* For compatibility, accept this too (as an override) */ 577 if (xf86ReturnOptValBool(pI128->Options, OPTION_SW_CURSOR, FALSE)) { 578 from = X_CONFIG; 579 pI128->HWCursor = FALSE; 580 } 581 xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", 582 pI128->HWCursor ? "HW" : "SW"); 583 if (xf86ReturnOptValBool(pI128->Options, OPTION_NOACCEL, FALSE)) { 584 pI128->NoAccel = TRUE; 585 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n"); 586 } else { 587 int from = X_DEFAULT; 588 char *s = xf86GetOptValString(pI128->Options, OPTION_ACCELMETHOD); 589 pI128->NoAccel = FALSE; 590 if (!xf86NameCmp(s, "EXA")) { 591 pI128->exa = TRUE; 592 from = X_CONFIG; 593 } 594 xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration\n", 595 pI128->exa ? "EXA" : "XAA"); 596 } 597 if (xf86ReturnOptValBool(pI128->Options, OPTION_SYNC_ON_GREEN, FALSE)) { 598 pI128->DACSyncOnGreen = TRUE; 599 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Sync-on-Green enabled\n"); 600 } else pI128->DACSyncOnGreen = FALSE; 601 if (xf86ReturnOptValBool(pI128->Options, OPTION_SHOWCACHE, FALSE)) { 602 pI128->ShowCache = TRUE; 603 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ShowCache enabled\n"); 604 } else pI128->ShowCache = FALSE; 605 if (xf86ReturnOptValBool(pI128->Options, OPTION_DAC6BIT, FALSE)) { 606 pI128->DAC8Bit = FALSE; 607 pScrn->rgbBits = 6; 608 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Dac6Bit enabled\n"); 609 } else pI128->DAC8Bit = TRUE; 610 if (xf86ReturnOptValBool(pI128->Options, OPTION_DEBUG, FALSE)) { 611 pI128->Debug = TRUE; 612 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Debug enabled\n"); 613 } else pI128->Debug = FALSE; 614 if (xf86ReturnOptValBool(pI128->Options, OPTION_FLATPANEL, FALSE)) { 615 pI128->FlatPanel = TRUE; 616 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "FlatPanel forced\n"); 617 } else pI128->FlatPanel = FALSE; 618 619 /* 620 * Set the Chipset and ChipRev. 621 */ 622 from = X_PROBED; 623 pI128->Chipset = PCI_DEV_DEVICE_ID(pI128->PciInfo); 624 pScrn->chipset = (char *)xf86TokenToString(I128Chipsets, pI128->Chipset); 625 pI128->ChipRev = PCI_DEV_REVISION(pI128->PciInfo); 626 627 /* 628 * This shouldn't happen because such problems should be caught in 629 * I128Probe(), but check it just in case. 630 */ 631 if (pScrn->chipset == NULL) { 632 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 633 "ChipID 0x%04X is not recognised\n", pI128->Chipset); 634 return FALSE; 635 } 636 if (pI128->Chipset < 0) { 637 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 638 "Chipset \"%s\" is not recognised\n", pScrn->chipset); 639 return FALSE; 640 } 641 642 xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset); 643 if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x105D) 644 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Number Nine\"\n"); 645 else if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x10F0) 646 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Peritek\"\n"); 647 else 648 xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"%x\"\n", 649 PCI_SUB_VENDOR_ID(pI128->PciInfo)); 650 651 iobase = (PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00) + hwp->PIOOffset; 652 pI128->RegRec.iobase = iobase; 653 654 pI128->io.rbase_g = inl(iobase) & 0xFFFFFF00; 655 pI128->io.rbase_w = inl(iobase + 0x04) & 0xFFFFFF00; 656 pI128->io.rbase_a = inl(iobase + 0x08) & 0xFFFFFF00; 657 pI128->io.rbase_b = inl(iobase + 0x0C) & 0xFFFFFF00; 658 pI128->io.rbase_i = inl(iobase + 0x10) & 0xFFFFFF00; 659 pI128->io.rbase_e = inl(iobase + 0x14) & 0xFFFF8003; 660 pI128->io.id = inl(iobase + 0x18) & /* 0x7FFFFFFF */ 0xFFFFFFFF; 661 pI128->io.config1 = inl(iobase + 0x1C) & /* 0xF3333F1F */ 0xFF133706; 662 pI128->io.config2 = inl(iobase + 0x20) & 0xC1F70FFF; 663 pI128->io.sgram = inl(iobase + 0x24) & 0xFFFFFFFF; 664 pI128->io.soft_sw = inl(iobase + 0x28) & 0x0000FFFF; 665 pI128->io.vga_ctl = inl(iobase + 0x30) & 0x0000FFFF; 666 667 if (pI128->Debug) 668 I128DumpBaseRegisters(pScrn); 669 670 pI128->RegRec.config1 = pI128->io.config1; 671 pI128->RegRec.config2 = pI128->io.config2; 672 pI128->RegRec.sgram = pI128->io.sgram; 673 if (pI128->Chipset == PCI_CHIP_I128_T2R4) 674 pI128->io.sgram = 0x211BF030; 675 else 676 pI128->io.sgram = 0x21089030; 677 /* vga_ctl is saved later */ 678 679 /* enable all of the memory mapped windows */ 680 681 pI128->io.config1 &= 0x3300001F; 682 pI128->io.config1 |= 0x00331F10; 683 outl(iobase + 0x1C, pI128->io.config1); 684 685 pI128->MemoryType = I128_MEMORY_UNKNOWN; 686 687 if (pI128->Chipset == PCI_CHIP_I128_T2R4) 688 pI128->MemoryType = I128_MEMORY_SGRAM; 689 else if (pI128->Chipset == PCI_CHIP_I128_T2R) { 690 if ((pI128->io.config2&6) == 2) 691 pI128->MemoryType = I128_MEMORY_SGRAM; 692 else 693 pI128->MemoryType = I128_MEMORY_WRAM; 694 } else if (pI128->Chipset == PCI_CHIP_I128_2) { 695#ifndef XSERVER_LIBPCIACCESS 696 if (((((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command & 0x03) 697 == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 698 pI128->MemoryType = I128_MEMORY_DRAM; 699#else 700 { 701 unsigned short temp; 702 pci_device_cfg_read_u16(pI128->PciInfo, &temp, 0x4); 703 if (((temp & 0x03) == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08)) 704 pI128->MemoryType = I128_MEMORY_DRAM; 705 } 706#endif 707 } 708 709 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory type %s\n", 710 pI128->MemoryType == I128_MEMORY_SGRAM ? "SGRAM" : 711 pI128->MemoryType == I128_MEMORY_DRAM ? "DRAM" : 712 pI128->MemoryType == I128_MEMORY_WRAM ? "WRAM" : "UNKNOWN"); 713 714 pI128->io.config2 &= 0xFF0FFF7F; 715 pI128->io.config2 |= 0x00100000; 716 if (pI128->MemoryType != I128_MEMORY_SGRAM) 717 pI128->io.config2 |= 0x00400000; 718 outl(pI128->RegRec.iobase + 0x20, pI128->io.config2); 719 720 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n", 721 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM)); 722 723 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "MMIO registers at 0x%lX\n", 724 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO)); 725 726 if (xf86RegisterResources(pI128->pEnt->index, NULL, ResExclusive)) { 727 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 728 "xf86RegisterResources() found resource conflicts\n"); 729 I128FreeRec(pScrn); 730 return FALSE; 731 } 732 733 /* HW bpp matches reported bpp */ 734 pI128->bitsPerPixel = pScrn->bitsPerPixel; 735 pI128->depth = pScrn->depth; 736 pI128->weight.red = pScrn->weight.red; 737 pI128->weight.green = pScrn->weight.green; 738 pI128->weight.blue = pScrn->weight.blue; 739 pI128->mode = pScrn->modes; 740 741 pScrn->videoRam = I128CountRam(pScrn); 742 pI128->MemorySize = pScrn->videoRam; 743 744 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "VideoRAM: %d kByte\n", 745 pScrn->videoRam); 746 747 748 /* 749 * If the driver can do gamma correction, it should call xf86SetGamma() 750 * here. 751 */ 752 753 { 754 Gamma zeros = {0.0, 0.0, 0.0}; 755 756 if (!xf86SetGamma(pScrn, zeros)) { 757 return FALSE; 758 } 759 } 760 761 if (!I128MapMem(pScrn)) 762 return FALSE; 763 764 /* 765 * Reset card if it isn't primary one (must be done after config1 is set) 766 */ 767 if (!pI128->Primary) 768 I128SoftReset(pScrn); 769 770 if (pI128->Chipset != PCI_CHIP_I128) { 771 pI128->ddc1Read = NULL /*I128DDC1Read*/; 772 pI128->i2cInit = I128I2CInit; 773 } 774 775 /* Load DDC if we have the code to use it */ 776 /* This gives us DDC1 */ 777 if (pI128->ddc1Read || pI128->i2cInit) { 778 if (!xf86LoadSubModule(pScrn, "ddc")) { 779 /* ddc module not found, we can do without it */ 780 pI128->ddc1Read = NULL; 781 782 /* Without DDC, we have no use for the I2C bus */ 783 pI128->i2cInit = NULL; 784 } 785 } 786 /* - DDC can use I2C bus */ 787 /* Load I2C if we have the code to use it */ 788 if (pI128->i2cInit) { 789 if (!xf86LoadSubModule(pScrn, "i2c")) { 790 /* i2c module not found, we can do without it */ 791 pI128->i2cInit = NULL; 792 pI128->I2C = NULL; 793 } 794 } 795 796 /* Read and print the Monitor DDC info */ 797 mon = I128getDDC(pScrn); 798 799 /* see if we can find a flatpanel */ 800 if (!pI128->FlatPanel && mon) { 801 for (i=0; i<4; i++) 802 if (mon->det_mon[i].type == DS_NAME) { 803 if (strncmp((char *)mon->det_mon[i].section.name, 804 "SGI 1600SW FP", 13) == 0) { 805 pI128->FlatPanel = TRUE; 806 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 807 "Found FlatPanel via DDC2\n"); 808 } 809 break; 810 } 811 } 812 813 pI128->maxClock = 175000; 814 815 switch (pI128->Chipset) { 816 case PCI_CHIP_I128: 817 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 818 pI128->RamdacType = IBM528_DAC; 819 else 820 pI128->RamdacType = TI3025_DAC; 821 break; 822 case PCI_CHIP_I128_2: 823 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 824 pI128->RamdacType = IBM528_DAC; 825 else 826 pI128->RamdacType = IBM526_DAC; 827 pI128->maxClock = 220000; 828 break; 829 case PCI_CHIP_I128_T2R: 830 pI128->RamdacType = IBM526_DAC; 831 pI128->maxClock = 220000; 832 break; 833 case PCI_CHIP_I128_T2R4: 834 pI128->RamdacType = SILVER_HAMMER_DAC; 835 pI128->maxClock = 270000; 836 break; 837 default: 838 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 839 "Unknown I128 chipset: %d\n", 840 pI128->Chipset); 841 return(FALSE); 842 } 843 844 if ((pI128->maxClock == 175000) && (pI128->MemorySize == 8192)) 845 pI128->maxClock = 220000; 846 847 switch(pI128->RamdacType) { 848 case TI3025_DAC: 849 /* verify that the ramdac is a TVP3025 */ 850 851 pI128->mem.rbase_g[INDEX_TI] = TI_ID; MB; 852 if ((pI128->mem.rbase_g[DATA_TI]&0xFF) != TI_VIEWPOINT25_ID) { 853 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 854 "Ti3025 Ramdac not found\n"); 855 return(FALSE); 856 } 857 ramdac = "TI3025"; 858 859 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 860 pI128->mem.rbase_g[DATA_TI] = 0x00; MB; 861 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 862 n = pI128->mem.rbase_g[DATA_TI]&0x7f; 863 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 864 pI128->mem.rbase_g[DATA_TI] = 0x01; MB; 865 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 866 m = pI128->mem.rbase_g[DATA_TI]&0x7f; 867 pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL; MB; 868 pI128->mem.rbase_g[DATA_TI] = 0x02; MB; 869 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA; MB; 870 p = pI128->mem.rbase_g[DATA_TI]&0x03; 871 pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_DCLK_CONTROL; MB; 872 mdc = pI128->mem.rbase_g[DATA_TI]&0xFF; 873 if (mdc&0x08) 874 mdc = (mdc&0x07)*2 + 2; 875 else 876 mdc = 1; 877 mclk = ((1431818 * ((m+2) * 8)) / (n+2) / (1 << p) / mdc + 50) / 100; 878 879 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 880 "Using TI 3025 programmable clock (MCLK %1.3f MHz)\n", 881 mclk / 1000.0); 882 pI128->minClock = 20000; 883 pI128->ProgramDAC = I128ProgramTi3025; 884 break; 885 886 case IBM524_DAC: 887 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 888 "IBM524 Ramdac not supported\n"); 889 return(FALSE); 890 891 case IBM526_DAC: 892 /* verify that the ramdac is an IBM526 */ 893 894 ramdac = "IBM526"; 895 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 896 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 897 pI128->mem.rbase_g[IDXH_I] = 0; MB; 898 pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 899 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 900 901 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 902 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 903 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 904 m = pI128->mem.rbase_g[DATA_I]; 905 df = m>>6; 906 m &= 0x3f; 907 if (n == 0) { m=0; n=1; } 908 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 909 910 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 911 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 912 if (tmp != 2) { 913 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 914 "IBM526 Ramdac not found\n"); 915 return(FALSE); 916 } 917 918 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 919 "Using IBM 526 programmable clock (MCLK %1.3f MHz)\n", 920 mclk / 1000.0); 921 pI128->minClock = 25000; 922 pI128->ProgramDAC = I128ProgramIBMRGB; 923 break; 924 925 case IBM528_DAC: 926 /* verify that the ramdac is an IBM528 */ 927 928 ramdac = "IBM528"; 929 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 930 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 931 pI128->mem.rbase_g[IDXH_I] = 0; MB; 932 pI128->mem.rbase_g[IDXL_I] = IBMRGB_id; MB; 933 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 934 935 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 936 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 937 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 938 m = pI128->mem.rbase_g[DATA_I] & 0xFF; 939 df = m>>6; 940 m &= 0x3f; 941 if (n == 0) { m=0; n=1; } 942 mclk = ((2517500 * (m+65)) / n / (8>>df) + 50) / 100; 943 944 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 945 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 946 if (tmp != 2) { 947 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 948 "IBM528 Ramdac not found\n"); 949 return(FALSE); 950 } 951 952 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 953 "Using IBM 528 programmable clock (MCLK %1.3f MHz)\n", 954 mclk / 1000.0); 955 pI128->minClock = 25000; 956 pI128->ProgramDAC = I128ProgramIBMRGB; 957 break; 958 959 case SILVER_HAMMER_DAC: 960 /* verify that the ramdac is a Silver Hammer */ 961 962 ramdac = "SilverHammer"; 963 tmph = pI128->mem.rbase_g[IDXH_I] & 0xFF; 964 tmpl = pI128->mem.rbase_g[IDXL_I] & 0xFF; 965 tmp = pI128->mem.rbase_g[DATA_I] & 0xFF; 966 967 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_ref_div; MB; 968 n = pI128->mem.rbase_g[DATA_I] & 0x1f; 969 pI128->mem.rbase_g[IDXL_I] = IBMRGB_sysclk_vco_div; MB; 970 m = pI128->mem.rbase_g[DATA_I]; 971 df = m>>6; 972 m &= 0x3f; 973 if (n == 0) { m=0; n=1; } 974 mclk = ((3750000 * (m+65)) / n / (8>>df) + 50) / 100; 975 976 pI128->mem.rbase_g[IDXL_I] = tmpl; MB; 977 pI128->mem.rbase_g[IDXH_I] = tmph; MB; 978 if (pI128->Chipset != PCI_CHIP_I128_T2R4) { 979 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 980 "SilverHammer Ramdac not found\n"); 981 return(FALSE); 982 } 983 984 if (pI128->mem.rbase_g[CRT_1CON] & 0x00000100) { 985 pI128->FlatPanel = TRUE; 986 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 987 "Digital flat panel detected\n"); 988 } else if (pI128->FlatPanel) 989 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, 990 "Digital flat panel forced\n"); 991 992 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 993 "Using SilverHammer programmable clock (MCLK %1.3f MHz)\n", 994 mclk / 1000.0); 995 pI128->minClock = 25000; 996 pI128->ProgramDAC = I128ProgramSilverHammer; 997 break; 998 999 default: 1000 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 1001 "Ramdac Unknown\n"); 1002 return(FALSE); 1003 } 1004 1005 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 1006 "Ramdac Type min/max speed: %s %d/%d MHz\n", 1007 ramdac, pI128->minClock/1000, pI128->maxClock/1000); 1008 1009 /* 1010 * Setup the ClockRanges, which describe what clock ranges are available, 1011 * and what sort of modes they can be used for. 1012 */ 1013 clockRanges = xnfcalloc(sizeof(ClockRange),1); 1014 clockRanges->next = NULL; 1015 clockRanges->minClock = pI128->minClock; 1016 clockRanges->maxClock = pI128->maxClock; 1017 clockRanges->clockIndex = -1; /* programmable */ 1018 clockRanges->interlaceAllowed = TRUE; 1019 clockRanges->doubleScanAllowed = TRUE; 1020 clockRanges->ClockMulFactor = 1; 1021 clockRanges->ClockDivFactor = 1; 1022 1023 /* 1024 * xf86ValidateModes will check that the mode HTotal and VTotal values 1025 * don't exceed the chipset's limit if pScrn->maxHValue and 1026 * pScrn->maxVValue are set. Since our I128ValidMode() already takes 1027 * care of this, we don't worry about setting them here. 1028 */ 1029 { 1030 int *linePitches = NULL; 1031 int minPitch = 256; 1032 int maxPitch = 2048; 1033 int pitchAlignment = 256; 1034 1035 if (pI128->MemoryType == I128_MEMORY_WRAM) 1036 pitchAlignment = (128 * 8); 1037 pitchAlignment /= pI128->bitsPerPixel; 1038 1039 i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, 1040 pScrn->display->modes, clockRanges, 1041 linePitches, minPitch, maxPitch, 1042 pitchAlignment * pI128->bitsPerPixel, 1043 128, 2048, 1044 pScrn->display->virtualX, 1045 pScrn->display->virtualY, 1046 pI128->MemorySize, 1047 LOOKUP_BEST_REFRESH); 1048 1049 pI128->displayWidth = pScrn->virtualX; 1050 1051 if ((pScrn->virtualX % pitchAlignment) != 0) 1052 pI128->displayWidth += pitchAlignment - 1053 (pScrn->virtualX % pitchAlignment); 1054 } 1055 1056 if (i == -1) { 1057 I128FreeRec(pScrn); 1058 return FALSE; 1059 } 1060 1061 /* Prune the modes marked as invalid */ 1062 xf86PruneDriverModes(pScrn); 1063 1064 if (i == 0 || pScrn->modes == NULL) { 1065 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); 1066 I128FreeRec(pScrn); 1067 return FALSE; 1068 } 1069 1070 if ((pI128->MemorySize > 4096) && 1071 (pI128->MemoryType != I128_MEMORY_DRAM) && 1072 (pI128->MemoryType != I128_MEMORY_SGRAM)) 1073 pI128->displayOffset = 0x400000L % 1074 (pI128->displayWidth * (pI128->bitsPerPixel/8)); 1075 else 1076 pI128->displayOffset = 0; 1077 1078 pI128->MemoryPtr = 1079 (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 1080 1081 /* Set the current mode to the first in the list */ 1082 pScrn->currentMode = pScrn->modes; 1083 1084 /* Print the list of modes being used */ 1085 xf86PrintModes(pScrn); 1086 1087 /* Set display resolution */ 1088 xf86SetDpi(pScrn, 0, 0); 1089 1090 if (!xf86LoadSubModule(pScrn, "fb")) { 1091 I128FreeRec(pScrn); 1092 return FALSE; 1093 } 1094 1095 /* Load the acceleration engine */ 1096 if (!pI128->NoAccel) { 1097 if (pI128->exa) { 1098 XF86ModReqInfo req; 1099 int errmaj, errmin; 1100 1101 memset(&req, 0, sizeof(req)); 1102 req.majorversion = 2; 1103 req.minorversion = 0; 1104 if (!LoadSubModule(pScrn->module, "exa", NULL, NULL, NULL, &req, 1105 &errmaj, &errmin)) 1106 { 1107 LoaderErrorMsg(NULL, "exa", errmaj, errmin); 1108 I128FreeRec(pScrn); 1109 return FALSE; 1110 } 1111 } else { 1112 if (!xf86LoadSubModule(pScrn, "xaa")) { 1113 I128FreeRec(pScrn); 1114 return FALSE; 1115 } 1116 } 1117 } 1118 1119 /* Load ramdac if needed */ 1120 if (pI128->HWCursor) { 1121 if (!xf86LoadSubModule(pScrn, "ramdac")) { 1122 I128FreeRec(pScrn); 1123 return FALSE; 1124 } 1125 } 1126 1127 I128UnmapMem(pScrn); 1128 1129 if (pI128->Debug) 1130 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "PreInit complete\n"); 1131 return TRUE; 1132} 1133 1134 1135static Bool 1136I128GetRec(ScrnInfoPtr pScrn) 1137{ 1138 /* 1139 * Allocate an I128Rec, and hook it into pScrn->driverPrivate. 1140 * pScrn->driverPrivate is initialised to NULL, so we can check if 1141 * the allocation has already been done. 1142 */ 1143 if (pScrn->driverPrivate != NULL) 1144 return TRUE; 1145 1146 pScrn->driverPrivate = xnfcalloc(sizeof(I128Rec), 1); 1147 1148 return TRUE; 1149} 1150 1151static void 1152I128FreeRec(ScrnInfoPtr pScrn) 1153{ 1154 if (pScrn->driverPrivate == NULL) 1155 return; 1156 xfree(pScrn->driverPrivate); 1157 pScrn->driverPrivate = NULL; 1158} 1159 1160 1161 1162/* 1163 * I128SoftReset -- 1164 * 1165 * Resets drawing engine 1166 */ 1167static void 1168I128SoftReset(ScrnInfoPtr pScrn) 1169{ 1170 I128Ptr pI128 = I128PTR(pScrn); 1171 1172 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Performing soft reset\n"); 1173 pI128->io.config1 |= 0x00000002; 1174 outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 1175 usleep(10000); 1176 pI128->io.config1 &= 0xFFFFFFFD; 1177 outl(pI128->RegRec.iobase + 0x1C, pI128->io.config1); 1178} 1179 1180/* 1181 * I128CountRAM -- 1182 * 1183 * Counts amount of installed RAM 1184 */ 1185static int 1186I128CountRam(ScrnInfoPtr pScrn) 1187{ 1188 I128Ptr pI128 = I128PTR(pScrn); 1189 int SizeFound = 0; 1190 1191 SizeFound = 0; 1192 1193 switch(pI128->Chipset) { 1194 case PCI_CHIP_I128_T2R4: 1195 /* Use the subsystem ID to determine the memory size */ 1196 switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0x0007) { 1197 case 0x00: /* 4MB card */ 1198 SizeFound = 4 * 1024; break; 1199 case 0x01: /* 8MB card */ 1200 SizeFound = 8 * 1024; break; 1201 case 0x02: /* 12MB card */ 1202 SizeFound = 12 * 1024; break; 1203 case 0x03: /* 16MB card */ 1204 SizeFound = 16 * 1024; break; 1205 case 0x04: /* 20MB card */ 1206 SizeFound = 20 * 1024; break; 1207 case 0x05: /* 24MB card */ 1208 SizeFound = 24 * 1024; break; 1209 case 0x06: /* 28MB card */ 1210 SizeFound = 28 * 1024; break; 1211 case 0x07: /* 32MB card */ 1212 SizeFound = 32 * 1024; break; 1213 default: /* Unknown board... */ 1214 break; 1215 } 1216 break; 1217 case PCI_CHIP_I128_T2R: 1218 switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0xFFF7) { 1219 case 0x00: /* 4MB card, no daughtercard */ 1220 SizeFound = 4 * 1024; break; 1221 case 0x01: /* 4MB card, 4MB daughtercard */ 1222 case 0x04: /* 8MB card, no daughtercard */ 1223 SizeFound = 8 * 1024; break; 1224 case 0x02: /* 4MB card, 8MB daughtercard */ 1225 case 0x05: /* 8MB card, 4MB daughtercard */ 1226 SizeFound = 12 * 1024; break; 1227 case 0x06: /* 8MB card, 8MB daughtercard */ 1228 SizeFound = 16 * 1024; break; 1229 case 0x03: /* 4MB card, 16 daughtercard */ 1230 SizeFound = 20 * 1024; break; 1231 case 0x07: /* 8MB card, 16MB daughtercard */ 1232 SizeFound = 24 * 1024; break; 1233 default: 1234 break; 1235 } 1236 } 1237 1238 if (SizeFound == 0) { 1239 SizeFound = 2048; /* default to 2MB */ 1240 if (pI128->io.config1 & 0x04) /* 128 bit mode */ 1241 SizeFound <<= 1; 1242 if (pI128->io.id & 0x0400) /* 2 banks VRAM */ 1243 SizeFound <<= 1; 1244 } 1245 return SizeFound; 1246} 1247 1248 1249/* 1250 * Map the framebuffer and MMIO memory. 1251 */ 1252 1253static Bool 1254I128MapMem(ScrnInfoPtr pScrn) 1255{ 1256 I128Ptr pI128; 1257 1258 pI128 = I128PTR(pScrn); 1259 1260 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Mapping memory\n"); 1261 1262 if (pI128->mem.rbase_g != NULL) 1263 return TRUE; 1264 1265 /* 1266 * Map IO registers to virtual address space 1267 */ 1268#ifndef XSERVER_LIBPCIACCESS 1269 pI128->mem.mw0_ad = (unsigned char *)xf86MapPciMem(pScrn->scrnIndex, 1270 VIDMEM_FRAMEBUFFER, 1271 pI128->PciTag, 1272 pI128->PciInfo->memBase[0] & 0xFFC00000, 1273 pI128->MemorySize*1024); 1274#else 1275 { 1276 void** result = (void**)&pI128->mem.mw0_ad; 1277 int err = pci_device_map_range(pI128->PciInfo, 1278 PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xffc00000, 1279 pI128->MemorySize * 1024, 1280 PCI_DEV_MAP_FLAG_WRITABLE | 1281 PCI_DEV_MAP_FLAG_WRITE_COMBINE, 1282 result); 1283 if (err) 1284 return FALSE; 1285 } 1286#endif 1287 1288 if (pI128->mem.mw0_ad == NULL) 1289 return FALSE; 1290 1291 pI128->MemoryPtr = pI128->mem.mw0_ad; 1292 1293#ifndef XSERVER_LIBPCIACCESS 1294 pI128->mem.rbase_g = (CARD32 *)xf86MapPciMem(pScrn->scrnIndex, 1295 VIDMEM_MMIO | VIDMEM_MMIO_32BIT, 1296 pI128->PciTag, 1297 pI128->PciInfo->memBase[4] & 0xFFFF0000, 1298 64*1024); 1299#else 1300 { 1301 void** result = (void**)&pI128->mem.rbase_g; 1302 int err = pci_device_map_range(pI128->PciInfo, 1303 PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xffff0000, 1304 64 * 1024, 1305 PCI_DEV_MAP_FLAG_WRITABLE, 1306 result); 1307 if (err) 1308 return FALSE; 1309 } 1310#endif 1311 if (pI128->mem.rbase_g == NULL) 1312 return FALSE; 1313 1314 pI128->mem.rbase_w = pI128->mem.rbase_g + ( 8 * 1024)/4; 1315 pI128->mem.rbase_a = pI128->mem.rbase_g + (16 * 1024)/4; 1316 pI128->mem.rbase_b = pI128->mem.rbase_g + (24 * 1024)/4; 1317 pI128->mem.rbase_i = pI128->mem.rbase_g + (32 * 1024)/4; 1318 1319 return TRUE; 1320} 1321 1322 1323/* 1324 * Unmap the framebuffer and MMIO memory. 1325 */ 1326 1327static Bool 1328I128UnmapMem(ScrnInfoPtr pScrn) 1329{ 1330 I128Ptr pI128 = I128PTR(pScrn); 1331 1332 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Unmapping memory\n"); 1333 1334 if (pI128->mem.rbase_g == NULL) 1335 return TRUE; 1336 1337 /* 1338 * Unmap IO registers to virtual address space 1339 */ 1340#ifndef XSERVER_LIBPCIACCESS 1341 xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.mw0_ad, 1342 pI128->MemorySize*1024); 1343#else 1344 pci_device_unmap_range(pI128->PciInfo, pI128->mem.mw0_ad, 1345 pI128->MemorySize*1024); 1346#endif 1347 pI128->mem.mw0_ad = NULL; 1348 pI128->MemoryPtr = NULL; 1349 1350#ifndef XSERVER_LIBPCIACCESS 1351 xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pI128->mem.rbase_g, 64*1024); 1352#else 1353 pci_device_unmap_range(pI128->PciInfo, pI128->mem.rbase_g, 64*1024); 1354#endif 1355 pI128->mem.rbase_g = NULL; 1356 pI128->mem.rbase_w = NULL; 1357 pI128->mem.rbase_a = NULL; 1358 pI128->mem.rbase_b = NULL; 1359 pI128->mem.rbase_i = NULL; 1360 1361 return TRUE; 1362} 1363 1364 1365/* 1366 * This function saves the video state. 1367 */ 1368static void 1369I128Save(ScrnInfoPtr pScrn) 1370{ 1371 I128Ptr pI128 = I128PTR(pScrn); 1372 vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 1373 1374 if (pI128->Primary) 1375 vgaHWSave(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 1376 1377 I128SaveState(pScrn); 1378} 1379 1380/* 1381 * Restore the initial (text) mode. 1382 */ 1383static void 1384I128Restore(ScrnInfoPtr pScrn) 1385{ 1386 I128Ptr pI128 = I128PTR(pScrn); 1387 vgaHWPtr vgaHWP = VGAHWPTR(pScrn); 1388 1389 I128RestoreState(pScrn); 1390 1391 if (pI128->Primary) { 1392 vgaHWProtect(pScrn, TRUE); 1393 vgaHWRestore(pScrn, &vgaHWP->SavedReg, VGA_SR_ALL); 1394 vgaHWProtect(pScrn, FALSE); 1395 } 1396} 1397 1398/* Usually mandatory */ 1399Bool 1400I128SwitchMode(int scrnIndex, DisplayModePtr mode, int flags) 1401{ 1402 return I128ModeInit(xf86Screens[scrnIndex], mode); 1403} 1404 1405 1406static Bool 1407I128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) 1408{ 1409 I128Ptr pI128 = I128PTR(pScrn); 1410 1411 if (pI128->Debug) 1412 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit start\n"); 1413 1414 /* Initialise the ModeReg values */ 1415 pScrn->vtSema = TRUE; 1416 1417 if (!I128Init(pScrn, mode)) 1418 return FALSE; 1419 1420 pI128->ModeSwitched = TRUE; 1421 1422 pI128->mode = mode; 1423 1424 if (pI128->Debug) 1425 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ModeInit complete\n"); 1426 1427 return TRUE; 1428} 1429 1430 1431/* Mandatory */ 1432 1433/* This gets called at the start of each server generation */ 1434 1435static Bool 1436I128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) 1437{ 1438 ScrnInfoPtr pScrn; 1439 I128Ptr pI128; 1440 int ret; 1441 VisualPtr visual; 1442 unsigned char *FBStart; 1443 int width, height, displayWidth; 1444 1445 /* 1446 * First get the ScrnInfoRec 1447 */ 1448 pScrn = xf86Screens[pScreen->myNum]; 1449 1450 pI128 = I128PTR(pScrn); 1451 1452 if (pI128->Debug) 1453 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit start\n"); 1454 1455 /* Map the I128 memory and MMIO areas */ 1456 if (!I128MapMem(pScrn)) 1457 return FALSE; 1458 1459 pI128->MemoryPtr = 1460 (pointer)&((char *)pI128->MemoryPtr)[pI128->displayOffset]; 1461 1462 /* Save the current state */ 1463 I128Save(pScrn); 1464 1465 /* Initialise the first mode */ 1466 if (!I128ModeInit(pScrn, pScrn->currentMode)) 1467 return FALSE; 1468 1469 /* Darken the screen for aesthetic reasons and set the viewport */ 1470 I128SaveScreen(pScreen, SCREEN_SAVER_ON); 1471 pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); 1472 1473 /* 1474 * The next step is to setup the screen's visuals, and initialise the 1475 * framebuffer code. In cases where the framebuffer's default 1476 * choices for things like visual layouts and bits per RGB are OK, 1477 * this may be as simple as calling the framebuffer's ScreenInit() 1478 * function. If not, the visuals will need to be setup before calling 1479 * a fb ScreenInit() function and fixed up after. 1480 * 1481 * For most PC hardware at depths >= 8, the defaults that fb uses 1482 * are not appropriate. In this driver, we fixup the visuals after. 1483 */ 1484 1485 /* 1486 * Reset the visual list. 1487 */ 1488 miClearVisualTypes(); 1489 1490 /* Setup the visuals we support. */ 1491 1492 if (!miSetVisualTypes(pScrn->depth, 1493 miGetDefaultVisualMask(pScrn->depth), 1494 pScrn->rgbBits, pScrn->defaultVisual)) 1495 return FALSE; 1496 1497 if (!miSetPixmapDepths()) 1498 return FALSE; 1499 1500 1501 /* 1502 * Call the framebuffer layer's ScreenInit function, and fill in other 1503 * pScreen fields. 1504 */ 1505 1506 width = pScrn->virtualX; 1507 height = pScrn->virtualY; 1508 displayWidth = pScrn->displayWidth; 1509 1510 FBStart = pI128->MemoryPtr; 1511 1512 ret = fbScreenInit(pScreen, FBStart, 1513 width, height, 1514 pScrn->xDpi, pScrn->yDpi, 1515 displayWidth, pScrn->bitsPerPixel); 1516 if (!ret) 1517 return FALSE; 1518 1519 fbPictureInit(pScreen, 0, 0); 1520 1521 if (pScrn->bitsPerPixel > 8) { 1522 /* Fixup RGB ordering */ 1523 visual = pScreen->visuals + pScreen->numVisuals; 1524 while (--visual >= pScreen->visuals) { 1525 if ((visual->class | DynamicClass) == DirectColor) { 1526 visual->offsetRed = pScrn->offset.red; 1527 visual->offsetGreen = pScrn->offset.green; 1528 visual->offsetBlue = pScrn->offset.blue; 1529 visual->redMask = pScrn->mask.red; 1530 visual->greenMask = pScrn->mask.green; 1531 visual->blueMask = pScrn->mask.blue; 1532 } 1533 } 1534 } 1535 1536 xf86SetBlackWhitePixels(pScreen); 1537 1538 if (!pI128->NoAccel) { 1539 if (pI128->exa) 1540 ret = I128ExaInit(pScreen); 1541 else { 1542 I128DGAInit(pScreen); 1543 ret = I128XaaInit(pScreen); 1544 } 1545 } 1546 1547 if (!ret) { 1548 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Acceleration setup failed\n"); 1549 return FALSE; 1550 } 1551 1552 miInitializeBackingStore(pScreen); 1553 xf86SetBackingStore(pScreen); 1554 xf86SetSilkenMouse(pScreen); 1555 1556 /* Initialize software cursor. 1557 Must precede creation of the default colormap */ 1558 miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); 1559 1560 /* Initialize HW cursor layer. 1561 Must follow software cursor initialization*/ 1562 if (pI128->HWCursor) { 1563 ret = TRUE; 1564 switch(pI128->RamdacType) { 1565 case TI3025_DAC: 1566 ret = I128TIHWCursorInit(pScrn); break; 1567 case IBM524_DAC: 1568 case IBM526_DAC: 1569 case IBM528_DAC: 1570 ret = I128IBMHWCursorInit(pScrn); break; 1571 case SILVER_HAMMER_DAC: 1572 ret = I128IBMHWCursorInit(pScrn); break; 1573 default: 1574 break; 1575 } 1576 if(!ret) 1577 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 1578 "Hardware cursor initialization failed\n"); 1579 } 1580 1581 /* Initialise default colourmap */ 1582 if (!miCreateDefColormap(pScreen)) 1583 return FALSE; 1584 1585 /* Initialize colormap layer. 1586 Must follow initialization of the default colormap */ 1587 if(!xf86HandleColormaps(pScreen, 256, 8, 1588 I128LoadPalette, NULL, 1589 CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) 1590 return FALSE; 1591 1592 xf86DPMSInit(pScreen, I128DisplayPowerManagementSet, 0); 1593 1594 pScrn->memPhysBase = (unsigned long)pI128->MemoryPtr; 1595 pScrn->fbOffset = 0; 1596 1597 pScreen->SaveScreen = I128SaveScreen; 1598 1599 /* Wrap the current CloseScreen function */ 1600 pI128->CloseScreen = pScreen->CloseScreen; 1601 pScreen->CloseScreen = I128CloseScreen; 1602 1603 /* Report any unused options (only for the first generation) */ 1604 if (serverGeneration == 1) { 1605 xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); 1606 } 1607 1608 if (pI128->Debug) 1609 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "ScreenInit complete\n"); 1610 1611 /* Done */ 1612 return TRUE; 1613} 1614 1615 1616/* 1617 * This function is used to initialize the Start Address - the first 1618 * displayed location in the video memory. 1619 */ 1620/* Usually mandatory */ 1621void 1622I128AdjustFrame(int scrnIndex, int x, int y, int flags) 1623{ 1624 ScrnInfoPtr pScrn; 1625 int Base; 1626 I128Ptr pI128; 1627#define I128_PAN_MASK 0x01FFFFE0 1628 1629 pScrn = xf86Screens[scrnIndex]; 1630 pI128 = I128PTR(pScrn); 1631 1632 if (pI128->ShowCache && y && pScrn->vtSema) 1633 y += pScrn->virtualY - 1; 1634 1635 if (x > (pI128->displayWidth - pI128->mode->HDisplay)) 1636 x = pI128->displayWidth - pI128->mode->HDisplay; 1637 1638 Base = ((y*pI128->displayWidth + x) * (pI128->bitsPerPixel/8)); 1639 pI128->mem.rbase_g[DB_ADR] = 1640 (Base & I128_PAN_MASK) + pI128->displayOffset; MB; 1641 1642 /* now warp the cursor after the screen move */ 1643 pI128->AdjustCursorXPos = (Base - (Base & I128_PAN_MASK)) 1644 / (pI128->bitsPerPixel/8); 1645} 1646 1647/* 1648 * This is called when VT switching back to the X server. Its job is 1649 * to reinitialise the video mode. 1650 * 1651 */ 1652 1653/* Mandatory */ 1654static Bool 1655I128EnterVT(int scrnIndex, int flags) 1656{ 1657 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1658 1659 if (!I128ModeInit(pScrn, pScrn->currentMode)) 1660 return FALSE; 1661 I128AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); 1662 return TRUE; 1663} 1664 1665/* 1666 * This is called when VT switching away from the X server. Its job is 1667 * to restore the previous (text) mode. 1668 * 1669 */ 1670 1671/* Mandatory */ 1672static void 1673I128LeaveVT(int scrnIndex, int flags) 1674{ 1675 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1676 1677 I128Restore(pScrn); 1678} 1679 1680 1681/* 1682 * This is called at the end of each server generation. It restores the 1683 * original (text) mode. It should also unmap the video memory, and free 1684 * any per-generation data allocated by the driver. It should finish 1685 * by unwrapping and calling the saved CloseScreen function. 1686 */ 1687 1688/* Mandatory */ 1689static Bool 1690I128CloseScreen(int scrnIndex, ScreenPtr pScreen) 1691{ 1692 ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; 1693 I128Ptr pI128 = I128PTR(pScrn); 1694 1695 if (pScrn->vtSema) { 1696 I128Restore(pScrn); 1697 I128UnmapMem(pScrn); 1698 } 1699 if (pI128->XaaInfoRec) 1700 XAADestroyInfoRec(pI128->XaaInfoRec); 1701 if (pI128->ExaDriver) { 1702 exaDriverFini(pScreen); 1703 xfree(pI128->ExaDriver); 1704 } 1705 if (pI128->CursorInfoRec) 1706 xf86DestroyCursorInfoRec(pI128->CursorInfoRec); 1707 if (pI128->DGAModes) 1708 xfree(pI128->DGAModes); 1709 pScrn->vtSema = FALSE; 1710 1711 pScreen->CloseScreen = pI128->CloseScreen; 1712 return (*pScreen->CloseScreen)(scrnIndex, pScreen); 1713} 1714 1715 1716/* Free up any persistent data structures */ 1717 1718/* Optional */ 1719static void 1720I128FreeScreen(int scrnIndex, int flags) 1721{ 1722 /* 1723 * This only gets called when a screen is being deleted. It does not 1724 * get called routinely at the end of a server generation. 1725 */ 1726 if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) 1727 vgaHWFreeHWRec(xf86Screens[scrnIndex]); 1728 1729 I128FreeRec(xf86Screens[scrnIndex]); 1730} 1731 1732 1733/* Checks if a mode is suitable for the selected chipset. */ 1734 1735/* Optional */ 1736static ModeStatus 1737I128ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) 1738{ 1739 int lace; 1740 1741 lace = 1 + ((mode->Flags & V_INTERLACE) != 0); 1742 1743 if ((mode->CrtcHDisplay <= 2048) && 1744 (mode->CrtcHSyncStart <= 4096) && 1745 (mode->CrtcHSyncEnd <= 4096) && 1746 (mode->CrtcHTotal <= 4096) && 1747 (mode->CrtcVDisplay <= 2048 * lace) && 1748 (mode->CrtcVSyncStart <= 4096 * lace) && 1749 (mode->CrtcVSyncEnd <= 4096 * lace) && 1750 (mode->CrtcVTotal <= 4096 * lace)) { 1751 return(MODE_OK); 1752 } else { 1753 return(MODE_BAD); 1754 } 1755} 1756 1757 1758/* Do screen blanking */ 1759 1760/* Mandatory */ 1761static Bool 1762I128SaveScreen(ScreenPtr pScreen, int mode) 1763{ 1764 ScrnInfoPtr pScrn = NULL; 1765 I128Ptr pI128; 1766 Bool on; 1767 1768 if (pScreen != NULL) 1769 pScrn = xf86Screens[pScreen->myNum]; 1770 1771 on = xf86IsUnblank(mode); 1772 1773 if ((pScrn != NULL) && pScrn->vtSema) { 1774 pI128 = I128PTR(pScrn); 1775 if (on) { 1776 pI128->mem.rbase_g[CRT_1CON] |= 0x40; MB; 1777 } else { 1778 pI128->mem.rbase_g[CRT_1CON] &= ~0x40; MB; 1779 } 1780 } 1781 return TRUE; 1782} 1783 1784 1785static const int DDC_SDA_IN_MASK = 1 << 1; 1786static const int DDC_SDA_OUT_MASK = 1 << 2; 1787static const int DDC_SCL_IN_MASK = 1 << 3; 1788static const int DDC_SCL_OUT_MASK = 1 << 0; 1789 1790static const int DDC_MODE_MASK = 3 << 8; 1791#if 0 1792static const int DDC_MODE_DDC1 = 1 << 8; 1793#endif 1794static const int DDC_MODE_DDC2 = 2 << 8; 1795 1796#if 0 1797static unsigned int 1798I128DDC1Read(ScrnInfoPtr pScrn) 1799{ 1800 I128Ptr pI128 = I128PTR(pScrn); 1801 unsigned char val; 1802 unsigned long tmp, ddc; 1803 IOADDRESS iobase; 1804 1805 iobase = pI128->RegRec.iobase; 1806 ddc = inl(iobase + 0x2C); 1807 if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 1808 outl(iobase + 0x2C, DDC_MODE_DDC1); 1809 usleep(40); 1810 } 1811 1812 /* wait for Vsync */ 1813 do { 1814 tmp = inl(iobase + 0x2C); 1815 } while (tmp & 1); 1816 do { 1817 tmp = inl(iobase + 0x2C); 1818 } while (!(tmp & 1)); 1819 1820 /* Get the result */ 1821 tmp = inl(iobase + 0x2C); 1822 val = tmp & DDC_SDA_IN_MASK; 1823 1824 if ((ddc & DDC_MODE_MASK) != DDC_MODE_DDC1) { 1825 outl(iobase + 0x2C, ~DDC_MODE_MASK & ddc); 1826 usleep(40); 1827 } 1828 1829 return val; 1830} 1831#endif 1832 1833static void 1834I128I2CGetBits(I2CBusPtr b, int *clock, int *data) 1835{ 1836 I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 1837 unsigned long ddc; 1838 IOADDRESS iobase; 1839#if 0 1840 static int lastclock = -1, lastdata = -1; 1841#endif 1842 1843 /* Get the result. */ 1844 iobase = pI128->RegRec.iobase; 1845 ddc = inl(iobase + 0x2C); 1846 1847 *clock = (ddc & DDC_SCL_IN_MASK) != 0; 1848 *data = (ddc & DDC_SDA_IN_MASK) != 0; 1849 1850#if 0 1851 if (pI128->Debug && ((lastclock != *clock) || (lastdata != *data))) { 1852 xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> c %d d %d\n", *clock, *data); 1853 lastclock = *clock; 1854 lastdata = *data; 1855 } 1856#endif 1857} 1858 1859static void 1860I128I2CPutBits(I2CBusPtr b, int clock, int data) 1861{ 1862 I128Ptr pI128 = I128PTR(xf86Screens[b->scrnIndex]); 1863 unsigned char drv, val; 1864 unsigned long ddc; 1865 unsigned long tmp; 1866 IOADDRESS iobase; 1867 1868 iobase = pI128->RegRec.iobase; 1869 ddc = inl(iobase + 0x2C); 1870 1871 val = (clock ? DDC_SCL_IN_MASK : 0) | (data ? DDC_SDA_IN_MASK : 0); 1872 drv = ((clock) ? DDC_SCL_OUT_MASK : 0) | ((data) ? DDC_SDA_OUT_MASK : 0); 1873 1874 tmp = (DDC_MODE_MASK & ddc) | val | drv; 1875 outl(iobase + 0x2C, tmp); 1876#if 0 1877 if (pI128->Debug) 1878 xf86DrvMsg(b->scrnIndex, X_INFO, "i2c> 0x%x\n", tmp); 1879#endif 1880} 1881 1882 1883static Bool 1884I128I2CInit(ScrnInfoPtr pScrn) 1885{ 1886 I128Ptr pI128 = I128PTR(pScrn); 1887 I2CBusPtr I2CPtr; 1888 IOADDRESS iobase; 1889 unsigned long soft_sw, ddc; 1890 1891 I2CPtr = xf86CreateI2CBusRec(); 1892 if(!I2CPtr) return FALSE; 1893 1894 pI128->I2C = I2CPtr; 1895 1896 I2CPtr->BusName = "DDC"; 1897 I2CPtr->scrnIndex = pScrn->scrnIndex; 1898 I2CPtr->I2CPutBits = I128I2CPutBits; 1899 I2CPtr->I2CGetBits = I128I2CGetBits; 1900 I2CPtr->BitTimeout = 4; 1901 I2CPtr->ByteTimeout = 4; 1902 I2CPtr->AcknTimeout = 4; 1903 I2CPtr->StartTimeout = 4; 1904 1905 /* soft switch register bits 1,0 control I2C channel */ 1906 iobase = pI128->RegRec.iobase; 1907 soft_sw = inl(iobase + 0x28); 1908 soft_sw &= 0xfffffffc; 1909 soft_sw |= 0x00000001; 1910 outl(iobase + 0x28, soft_sw); 1911 usleep(1000); 1912 1913 /* set default as ddc2 mode */ 1914 ddc = inl(iobase + 0x2C); 1915 ddc &= ~DDC_MODE_MASK; 1916 ddc |= DDC_MODE_DDC2; 1917 outl(iobase + 0x2C, ddc); 1918 usleep(40); 1919 1920 if (!xf86I2CBusInit(I2CPtr)) { 1921 return FALSE; 1922 } 1923 return TRUE; 1924} 1925 1926 1927static xf86MonPtr 1928I128getDDC(ScrnInfoPtr pScrn) 1929{ 1930 I128Ptr pI128 = I128PTR(pScrn); 1931 xf86MonPtr MonInfo = NULL; 1932 1933 /* Initialize I2C bus - used by DDC if available */ 1934 if (pI128->i2cInit) { 1935 pI128->i2cInit(pScrn); 1936 } 1937 /* Read and output monitor info using DDC2 over I2C bus */ 1938 if (pI128->I2C) { 1939 MonInfo = xf86DoEDID_DDC2(pScrn->scrnIndex, pI128->I2C); 1940 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I2C Monitor info: %p\n", 1941 (void *)MonInfo); 1942 xf86PrintEDID(MonInfo); 1943 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of I2C Monitor info\n"); 1944 } 1945 if (!MonInfo) { 1946 /* Read and output monitor info using DDC1 */ 1947 if (pI128->ddc1Read) { 1948 MonInfo = xf86DoEDID_DDC1(pScrn->scrnIndex, NULL, pI128->ddc1Read ) ; 1949 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DDC Monitor info: %p\n", 1950 (void *)MonInfo); 1951 xf86PrintEDID(MonInfo); 1952 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "end of DDC Monitor info\n"); 1953 } 1954 } 1955 1956 if (MonInfo) 1957 xf86SetDDCproperties(pScrn, MonInfo); 1958 1959 return MonInfo; 1960} 1961 1962 1963/* 1964 * I128DisplayPowerManagementSet -- 1965 * 1966 * Sets VESA Display Power Management Signaling (DPMS) Mode. 1967 */ 1968void 1969I128DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, 1970 int flags) 1971{ 1972 I128Ptr pI128 = I128PTR(pScrn); 1973 CARD32 snc; 1974 1975 if (pI128->Debug) 1976 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "I128DisplayPowerManagementSet: %d\n", PowerManagementMode); 1977 1978 if (pI128->RamdacType == TI3025_DAC) return; 1979 1980 snc = pI128->mem.rbase_g[CRT_1CON]; 1981 1982 switch (PowerManagementMode) 1983 { 1984 case DPMSModeOn: 1985 /* HSync: On, VSync: On */ 1986 snc |= 0x30; 1987 break; 1988 case DPMSModeStandby: 1989 /* HSync: Off, VSync: On */ 1990 snc = (snc & ~0x10) | 0x20; 1991 break; 1992 case DPMSModeSuspend: 1993 /* HSync: On, VSync: Off */ 1994 snc = (snc & ~0x20) | 0x10; 1995 break; 1996 case DPMSModeOff: 1997 /* HSync: Off, VSync: Off */ 1998 snc &= ~0x30; 1999 break; 2000 } 2001 pI128->mem.rbase_g[CRT_1CON] = snc; MB; 2002} 2003 2004static void 2005I128DumpBaseRegisters(ScrnInfoPtr pScrn) 2006{ 2007 I128Ptr pI128 = I128PTR(pScrn); 2008 2009 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2010 " PCI Registers\n"); 2011 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2012 " MW0_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 2013 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM), 2014 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xFFC00000), 2015 PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0x8 ? "" : "not-"); 2016 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2017 " MW1_AD 0x%08lx addr 0x%08lx %spre-fetchable\n", 2018 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM), 2019 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0xFFC00000), 2020 PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0x8 ? "" : "not-"); 2021 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2022 " XYW_AD(A) 0x%08lx addr 0x%08lx\n", 2023 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM), 2024 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM) & 0xFFC00000)); 2025 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2026 " XYW_AD(B) 0x%08lx addr 0x%08lx\n", 2027 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM), 2028 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM) & 0xFFC00000)); 2029 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2030 " RBASE_G 0x%08lx addr 0x%08lx\n", 2031 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM), 2032 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xFFFF0000)); 2033 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2034 " IO 0x%08lx addr 0x%08lx\n", 2035 (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO), 2036 (unsigned long)(PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00)); 2037 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2038 " SSC 0x%08x addr 0x%08x\n", 2039 (unsigned int)PCI_SUB_DEVICE_ID(pI128->PciInfo), 2040 (unsigned int)(PCI_SUB_DEVICE_ID(pI128->PciInfo) & 0xFFFFFF00)); 2041 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2042 " SSV 0x%08x addr 0x%08x\n", 2043 (unsigned int)PCI_SUB_VENDOR_ID(pI128->PciInfo), 2044 (unsigned int)(PCI_SUB_VENDOR_ID(pI128->PciInfo) & 0xFFFFFF00)); 2045#ifndef XSERVER_LIBPCIACCESS 2046 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2047 " RBASE_E 0x%08lx addr 0x%08lx %sdecode-enabled\n\n", 2048 pI128->PciInfo->biosBase, 2049 pI128->PciInfo->biosBase & 0xFFFF8000, 2050 pI128->PciInfo->biosBase & 0x1 ? "" : "not-"); 2051 2052 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2053 " PCICMDST 0x%08x 0x%08x\n", 2054 ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command, 2055 ((pciConfigPtr)pI128->PciInfo->thisCard)->pci_status); 2056#endif 2057 2058 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2059 " IO Mapped Registers\n"); 2060 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2061 " RBASE_G 0x%08lx addr 0x%08lx\n", 2062 (unsigned long)pI128->io.rbase_g, pI128->io.rbase_g & 0xFFFFFF00UL); 2063 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2064 " RBASE_W 0x%08lx addr 0x%08lx\n", 2065 (unsigned long)pI128->io.rbase_w, pI128->io.rbase_w & 0xFFFFFF00UL); 2066 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2067 " RBASE_A 0x%08lx addr 0x%08lx\n", 2068 (unsigned long)pI128->io.rbase_a, pI128->io.rbase_a & 0xFFFFFF00UL); 2069 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2070 " RBASE_B 0x%08lx addr 0x%08lx\n", 2071 (unsigned long)pI128->io.rbase_b, pI128->io.rbase_b & 0xFFFFFF00UL); 2072 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2073 " RBASE_I 0x%08lx addr 0x%08lx\n", 2074 (unsigned long)pI128->io.rbase_i, pI128->io.rbase_i & 0xFFFFFF00UL); 2075 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2076 " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n\n", 2077 (unsigned long)pI128->io.rbase_e, pI128->io.rbase_e & 0xFFFF8000UL, 2078 pI128->io.rbase_e & 0x7UL); 2079 2080 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2081 " Miscellaneous IO Registers\n"); 2082 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2083 " ID 0x%08lx\n", (unsigned long)pI128->io.id); 2084 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2085 " CONFIG1 0x%08lx\n", (unsigned long)pI128->io.config1); 2086 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2087 " CONFIG2 0x%08lx\n", (unsigned long)pI128->io.config2); 2088 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2089 " SGRAM 0x%08lx\n", (unsigned long)pI128->io.sgram); 2090 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2091 " SOFT_SW 0x%08lx\n", (unsigned long)pI128->io.soft_sw); 2092 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2093 " VGA_CTL 0x%08lx\n", (unsigned long)pI128->io.vga_ctl); 2094} 2095 2096 2097void 2098I128DumpActiveRegisters(ScrnInfoPtr pScrn) 2099{ 2100 I128Ptr pI128 = I128PTR(pScrn); 2101 IOADDRESS iobase; 2102 unsigned long rbase_g, rbase_w, rbase_a, rbase_b, rbase_i, rbase_e; 2103 unsigned long id, config1, config2, sgram, soft_sw, ddc, vga_ctl; 2104 volatile CARD32 *vrba, *vrbg, *vrbw; 2105 2106 vrba = pI128->mem.rbase_a; 2107 vrbg = pI128->mem.rbase_g; 2108 vrbw = pI128->mem.rbase_w; 2109 2110 iobase = pI128->RegRec.iobase; 2111 rbase_g = inl(iobase); 2112 rbase_w = inl(iobase + 0x04); 2113 rbase_a = inl(iobase + 0x08); 2114 rbase_b = inl(iobase + 0x0C); 2115 rbase_i = inl(iobase + 0x10); 2116 rbase_e = inl(iobase + 0x14); 2117 id = inl(iobase + 0x18); 2118 config1 = inl(iobase + 0x1C); 2119 config2 = inl(iobase + 0x20); 2120 sgram = inl(iobase + 0x24); 2121 soft_sw = inl(iobase + 0x28); 2122 ddc = inl(iobase + 0x2C); 2123 vga_ctl = inl(iobase + 0x30); 2124 2125 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IO Mapped Registers\n"); 2126 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2127 " RBASE_G 0x%08lx addr 0x%08lx\n", 2128 rbase_g, rbase_g & 0xFFFFFF00); 2129 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2130 " RBASE_W 0x%08lx addr 0x%08lx\n", 2131 rbase_w, rbase_w & 0xFFFFFF00); 2132 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2133 " RBASE_A 0x%08lx addr 0x%08lx\n", 2134 rbase_a, rbase_a & 0xFFFFFF00); 2135 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2136 " RBASE_B 0x%08lx addr 0x%08lx\n", 2137 rbase_b, rbase_b & 0xFFFFFF00); 2138 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2139 " RBASE_I 0x%08lx addr 0x%08lx\n", 2140 rbase_i, rbase_i & 0xFFFFFF00); 2141 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, 2142 " RBASE_E 0x%08lx addr 0x%08lx size 0x%lx\n", 2143 rbase_e, rbase_e & 0xFFFF8000, rbase_e & 0x7); 2144 2145 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Miscellaneous IO Registers\n"); 2146 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ID 0x%08lx\n", id); 2147 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " REV %ld HBT %ld BASE0 %ld VDEN %ld VB %ld BASE1 %ld BASE2 %ld DS %ld\n", 2148 id&7, (id>>3)&3, (id>>6)&3, (id>>8)&3, (id>>10)&1, 2149 (id>>11)&3, (id>>13)&3, (id>>15)&1); 2150 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDEN %ld DB %ld BASE3 %ld BASER %ld MDEN %ld TR %ld VS %ld\n", 2151 (id>>16)&3, (id>>18)&1, (id>>19)&3, (id>>21)&7, (id>>24)&3, 2152 (id>>26)&1, (id>>27)&1); 2153 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLASS %ld EE %ld\n", 2154 (id>>28)&3, (id>>30)&1); 2155 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG1 0x%08lx\n", config1); 2156 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VE %ld SFT_RST %ld ONE28 %ld VS %ld\n", 2157 config1&1, (config1>>1)&1, 2158 (config1>>2)&1, (config1>>3)&1); 2159 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " G %ld W %ld A %ld B %ld I %ld E %ld W0 %ld W1 %ld XA %ld XB %ld\n", 2160 (config1>>8)&1, (config1>>9)&1, 2161 (config1>>10)&1, (config1>>11)&1, 2162 (config1>>12)&1, (config1>>13)&1, 2163 (config1>>16)&1, (config1>>17)&1, 2164 (config1>>20)&1, (config1>>21)&1); 2165 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " HBPRI %ld VBPRI %ld DE1PRI %ld ISAPRI %ld\n", 2166 (config1>>24)&3, (config1>>26)&3, 2167 (config1>>28)&3, (config1>>30)&3); 2168 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CONFIG2 0x%08lx\n", config2); 2169 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DWT %lx EWS %lx DWS %lx MC %lx FBB %ld IOB %ld FST %ld CNT %ld DEC %ld\n", 2170 config2&0x3, (config2>>8)&0xF, 2171 (config2>>16)&0x7, (config2>>20)&0xF, 2172 (config2>>24)&1, (config2>>25)&1, 2173 (config2>>26)&1, (config2>>27)&1, 2174 (config2>>28)&1); 2175 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PRE %ld RVD %ld SDAC %ld\n", 2176 (config2>>29)&1, (config2>>30)&1, (config2>>31)&1); 2177 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SGRAM 0x%08lx\n", sgram); 2178 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " SOFT_SW 0x%08lx\n", soft_sw); 2179 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DDC 0x%08lx\n", ddc); 2180 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " VGA_CTL 0x%08lx\n", vga_ctl); 2181 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MEMMUX %ld VGADEC %ld VIDMUX %ld ENA %ld BUFSEL %ld STR %ld\n", 2182 vga_ctl&1, (vga_ctl>>1)&1, 2183 (vga_ctl>>2)&1, (vga_ctl>>3)&1, 2184 (vga_ctl>>4)&1, (vga_ctl>>5)&1); 2185 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " 3C2 %ld DACDEC %ld MSK 0x%02lx\n", 2186 (vga_ctl>>6)&1, 2187 (vga_ctl>>7)&1, 2188 (vga_ctl>>8)&0xff); 2189 2190 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT Registers\n"); 2191 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_VCNT 0x%08lx (%ld)\n", 2192 vrbg[0x20/4]&0x000000FFUL, vrbg[0x20/4]&0x000000FFUL); 2193 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INT_HCNT 0x%08lx (%ld)\n", 2194 vrbg[0x24/4]&0x00000FFFUL, vrbg[0x24/4]&0x00000FFFUL); 2195 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_ADR 0x%08lx (%ld)\n", 2196 vrbg[0x28/4]&0x01FFFFF0UL, vrbg[0x28/4]&0x01FFFFF0UL); 2197 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DB_PTCH 0x%08lx (%ld)\n", 2198 vrbg[0x2C/4]&0x0000FFF0UL, vrbg[0x2C/4]&0x0000FFF0UL); 2199 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HAC 0x%08lx (%ld)\n", 2200 vrbg[0x30/4]&0x00003FFFUL, vrbg[0x30/4]&0x00003FFFUL); 2201 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HBL 0x%08lx (%ld)\n", 2202 vrbg[0x34/4]&0x00003FFFUL, vrbg[0x34/4]&0x00003FFFUL); 2203 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HFP 0x%08lx (%ld)\n", 2204 vrbg[0x38/4]&0x00003FFFUL, vrbg[0x38/4]&0x00003FFFUL); 2205 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_HS 0x%08lx (%ld)\n", 2206 vrbg[0x3C/4]&0x00003FFFUL, vrbg[0x3C/4]&0x00003FFFUL); 2207 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VAC 0x%08lx (%ld)\n", 2208 vrbg[0x40/4]&0x00000FFFUL, vrbg[0x40/4]&0x00000FFFUL); 2209 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VBL 0x%08lx (%ld)\n", 2210 vrbg[0x44/4]&0x00000FFFUL, vrbg[0x44/4]&0x00000FFFUL); 2211 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VFP 0x%08lx (%ld)\n", 2212 vrbg[0x48/4]&0x00000FFFUL, vrbg[0x48/4]&0x00000FFFUL); 2213 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_VS 0x%08lx (%ld)\n", 2214 vrbg[0x4C/4]&0x00000FFFUL, vrbg[0x4C/4]&0x00000FFFUL); 2215 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_LCNT 0x%08lx\n", 2216 vrbg[0x50/4]&0x00000FFFUL); 2217 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_ZOOM 0x%08lx\n", 2218 vrbg[0x54/4]&0x0000000FUL); 2219 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_1CON 0x%08lx PH %ld PV %ld CS %ld INL %ld H/VSE %ld/%ld VE %ld BTS %ld\n", 2220 (unsigned long)vrbg[0x58/4], 2221 vrbg[0x58/4]&1UL, (vrbg[0x58/4]>>1)&1UL, (vrbg[0x58/4]>>2)&1UL, 2222 (vrbg[0x58/4]>>3)&1UL, (vrbg[0x58/4]>>4)&1UL, (vrbg[0x58/4]>>5)&1UL, 2223 (vrbg[0x58/4]>>6)&1UL, (vrbg[0x58/4]>>8)&1UL); 2224 2225 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CRT_2CON 0x%08lx MEM %ld RFR %ld TRD %ld SPL %ld\n", 2226 (unsigned long)vrbg[0x5C/4], 2227 vrbg[0x5C/4]&7UL, (vrbg[0x5C/4]>>8)&1UL, 2228 (vrbg[0x5C/4]>>16)&7UL, (vrbg[0x5C/4]>>24)&1UL); 2229 2230 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory Windows Registers\n"); 2231 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_CTRL 0x%08lx\n", 2232 (unsigned long)vrbw[0x00]); 2233 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 2234 (vrbw[0x00]>>1)&1UL, (vrbw[0x00]>>2)&1UL, (vrbw[0x00]>>3)&1UL, 2235 (vrbw[0x00]>>4)&3UL, (vrbw[0x00]>>8)&1UL, (vrbw[0x00]>>21)&3UL, 2236 (vrbw[0x00]>>24)&3UL, (vrbw[0x00]>>26)&3UL); 2237 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 2238 (vrbw[0x00]>>28)&1UL, (vrbw[0x00]>>29)&1UL, (vrbw[0x00]>>30)&1UL); 2239 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_AD 0x%08lx MW0_SZ 0x%08lx MW0_PGE 0x%08lx\n", 2240 vrbw[0x04/4]&0xFFFFF000UL, vrbw[0x08/4]&0x0000000FUL, 2241 vrbw[0x0C/4]&0x000F001FUL); 2242 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_ORG10 0x%08lx MW0_ORG14 0x%08lx MW0_MSRC 0x%08lx\n", 2243 vrbw[0x10/4]&0x01FFF000UL, vrbw[0x14/4]&0x01FFF000UL, 2244 vrbw[0x18/4]&0x00FFFF00UL); 2245 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW0_WKEY 0x%08lx MW0_KYDAT 0x%08lx MW0_MASK 0x%08lx\n", 2246 (unsigned long)vrbw[0x1C/4], vrbw[0x20/4]&0x000F000FUL, 2247 (unsigned long)vrbw[0x24/4]); 2248 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_CTRL 0x%08lx\n", 2249 (unsigned long)vrbw[0x28/4]); 2250 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld BSY %ld MDM %ld DEN %ld PSZ %ld\n", 2251 (vrbw[0x28/4]>>1)&1UL, (vrbw[0x28/4]>>2)&1UL, (vrbw[0x28/4]>>3)&1UL, 2252 (vrbw[0x28/4]>>4)&3UL, (vrbw[0x28/4]>>8)&1UL, (vrbw[0x28/4]>>21)&3UL, 2253 (vrbw[0x28/4]>>24)&3UL, (vrbw[0x28/4]>>26)&3UL); 2254 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "M/V/DSE %ld/%ld/%ld\n", 2255 (vrbw[0x28/4]>>28)&1UL, (vrbw[0x28/4]>>29)&1UL, (vrbw[0x28/4]>>30)&1UL); 2256 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_AD 0x%08lx MW1_SZ 0x%08lx MW1_PGE 0x%08lx\n", 2257 vrbw[0x2C/4]&0xFFFFF000UL, vrbw[0x30/4]&0x0000000FUL, 2258 vrbw[0x34/4]&0x000F001FUL); 2259 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_ORG10 0x%08lx MW1_ORG14 0x%08lx MW1_MSRC 0x%08lx\n", 2260 vrbw[0x38/4]&0x01FFF000UL, vrbw[0x3c/4]&0x01FFF000UL, 2261 vrbw[0x40/4]&0x00FFFF00UL); 2262 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MW1_WKEY 0x%08lx MW1_KYDAT 0x%08lx MW1_MASK 0x%08lx\n", 2263 (unsigned long)vrbw[0x44/4], vrbw[0x48/4]&0x000F000FUL, 2264 (unsigned long)vrbw[0x4C/4]); 2265 2266 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Engine A Registers\n"); 2267 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTP 0x%08lx\n", 2268 vrba[0x00/4]&0x03UL); 2269 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " INTM 0x%08lx\n", 2270 vrba[0x04/4]&0x03UL); 2271 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FLOW 0x%08lx\n", 2272 vrba[0x08/4]&0x0FUL); 2273 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUSY 0x%08lx\n", 2274 vrba[0x0C/4]&0x01UL); 2275 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XYW_AD 0x%08lx SIZE 0x%lx ADDR 0x%lx\n", 2276 vrba[0x10/4]&0xFFFFFF00UL, (vrba[0x10/4]>>8)&0x0000000FUL, 2277 vrba[0x10/4]&0xFFFFF000UL); 2278 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " ZCTL 0x%08lx\n", 2279 (unsigned long)vrba[0x18/4]); 2280 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BUF_CTRL 0x%08lx\n", 2281 (unsigned long)vrba[0x20/4]); 2282 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " AMV %ld MP %ld AMD %ld SEN %ld DEN %ld DSE %ld VSE %ld MSE %ld\n", 2283 (vrba[0x20/4]>>1)&1UL, (vrba[0x20/4]>>2)&1UL, (vrba[0x20/4]>>3)&1UL, 2284 (vrba[0x20/4]>>8)&3UL, (vrba[0x20/4]>>10)&3UL, (vrba[0x20/4]>>12)&1UL, 2285 (vrba[0x20/4]>>13)&1UL, (vrba[0x20/4]>>14)&1UL); 2286 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PS %ld MDM %ld PSIZE %ld CRCO %ld\n", 2287 (vrba[0x20/4]>>16)&0x1FUL, 2288 (vrba[0x20/4]>>21)&3UL, (vrba[0x20/4]>>24)&3UL, (vrba[0x20/4]>>30)&3UL); 2289 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_PGE 0x%08lx DVPGE 0x%lx MPGE 0x%lx\n", 2290 vrba[0x24/4]&0x000F001FUL, (vrba[0x24/4]>>8)&0x01FUL, 2291 (vrba[0x24/4]&0x000F0000UL)>>16); 2292 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SORG 0x%08lx\n", 2293 vrba[0x28/4]&0x0FFFFFFFUL); 2294 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DORG 0x%08lx\n", 2295 vrba[0x2C/4]&0x0FFFFFFFUL); 2296 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_MSRC 0x%08lx\n", 2297 vrba[0x30/4]&0x03FFFFF0UL); 2298 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_WKEY 0x%08lx\n", 2299 (unsigned long)vrba[0x38/4]); 2300 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_ZPTCH 0x%08lx\n", 2301 vrba[0x3C/4]&0x000FFFF0UL); 2302 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_SPTCH 0x%08lx\n", 2303 vrba[0x40/4]&0x0000FFF0UL); 2304 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " DE_DPTCH 0x%08lx\n", 2305 vrba[0x44/4]&0x0000FFF0UL); 2306 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD 0x%08lx\n", 2307 vrba[0x48/4]&0x7FFFFFFFUL); 2308 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " OPC 0x%02lx ROP 0x%02lx STYLE 0x%02lx CLP 0x%lx PATRN 0x%lx HDF %ld\n", 2309 vrba[0x48/4]&0x00FFUL, (vrba[0x48/4]>>8)&0x00FFUL, (vrba[0x48/4]>>16)&0x001FUL, 2310 (vrba[0x48/4]>>21)&7UL, (vrba[0x48/4]>>24)&0x0FUL, (vrba[0x48/4]>>28)&7UL); 2311 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_SHADE 0x%02lx\n", 2312 vrba[0x4C/4]&0x00FFUL); 2313 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_OPC 0x%02lx\n", 2314 vrba[0x50/4]&0x00FFUL); 2315 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_ROP 0x%02lx\n", 2316 vrba[0x54/4]&0x00FFUL); 2317 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_STYLE 0x%02lx\n", 2318 vrba[0x58/4]&0x001FUL); 2319 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_PATRN 0x%02lx\n", 2320 vrba[0x5C/4]&0x000FUL); 2321 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_CLP 0x%02lx\n", 2322 vrba[0x60/4]&0x0007UL); 2323 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CMD_HDF 0x%02lx\n", 2324 vrba[0x64/4]&0x0007UL); 2325 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " FORE 0x%08lx\n", 2326 (unsigned long)vrba[0x68/4]); 2327 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " BACK 0x%08lx\n", 2328 (unsigned long)vrba[0x6C/4]); 2329 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " MASK 0x%08lx\n", 2330 (unsigned long)vrba[0x70/4]); 2331 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " RMSK 0x%08lx\n", 2332 (unsigned long)vrba[0x74/4]); 2333 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " LPAT 0x%08lx\n", 2334 (unsigned long)vrba[0x78/4]); 2335 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PCTRL 0x%08lx\n", 2336 (unsigned long)vrba[0x7C/4]); 2337 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " PLEN 0x%02ld PSCL 0x%02ld SPTR 0x%02ld SSCL 0x%lx STATE 0x%04lx\n", 2338 vrba[0x7C/4]&0x1FUL, (vrba[0x7C/4]>>5)&7UL, (vrba[0x7C/4]>>8)&0x1FUL, 2339 (vrba[0x7C/4]>>13)&7UL, (vrba[0x7C/4]>>16)&0xFFFFUL); 2340 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPTL 0x%08lx CLPTLY 0x%04lx CLPTLX 0x%04lx\n", 2341 (unsigned long)vrba[0x80/4], vrba[0x80/4]&0x00FFFFUL, (vrba[0x80/4]>>16)&0x00FFFFUL); 2342 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " CLPBR 0x%08lx CLPBRY 0x%04lx CLPBRX 0x%04lx\n", 2343 (unsigned long)vrba[0x84/4], 2344 vrba[0x84/4]&0x00FFFFUL, (vrba[0x84/4]>>16)&0x00FFFFUL); 2345 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY0 0x%08lx\n", 2346 (unsigned long)vrba[0x88/4]); 2347 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY1 0x%08lx\n", 2348 (unsigned long)vrba[0x8C/4]); 2349 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY2 0x%08lx\n", 2350 (unsigned long)vrba[0x90/4]); 2351 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY3 0x%08lx\n", 2352 (unsigned long)vrba[0x94/4]); 2353 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY4 0x%08lx\n", 2354 (unsigned long)vrba[0x98/4]); 2355 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY5 0x%08lx\n", 2356 (unsigned long)vrba[0x9C/4]); 2357 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY6 0x%08lx\n", 2358 (unsigned long)vrba[0xA0/4]); 2359 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY7 0x%08lx\n", 2360 (unsigned long)vrba[0xA4/4]); 2361 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, " XY8 0x%08lx\n", 2362 (unsigned long)vrba[0xA8/4]); 2363 if (pI128->RamdacType != TI3025_DAC) 2364 I128DumpIBMDACRegisters(pScrn, vrbg); 2365} 2366 2367static const unsigned char ibm52Xmask[0xA0] = { 23680xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 00-07 */ 23690xFF, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 08-0F */ 23700xFF, 0xFF, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0x00, /* 10-17 */ 23710x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 18-1F */ 23720xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, /* 20-27 */ 23730x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 28-2F */ 23740xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, /* 30-37 */ 23750x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 38-3F */ 23760xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, /* 40-47 */ 23770xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48-4F */ 23780x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 23790x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 58-5F */ 23800xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60-67 */ 23810x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 68-6F */ 23820xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 70-77 */ 23830x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 78-7F */ 23840x00, 0x00, 0xFF, 0x00, 0xFF, 0x00, 0xFF, 0x00, /* 80-87 */ 23850xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, /* 88-8F */ 23860xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, /* 90-97 */ 23870x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 98-9F */ 2388}; 2389 2390static void 2391I128DumpIBMDACRegisters(ScrnInfoPtr pScrn, volatile CARD32 *vrbg) 2392{ 2393 unsigned char ibmr[0x100]; 2394 char buf[128], tbuf[10]; 2395 int i; 2396 2397 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "IBM52X Registers\n"); 2398 2399 vrbg[IDXH_I] = 0x00; 2400 vrbg[IDXH_I] = 0x00; 2401 vrbg[IDXCTL_I] = 0x01; 2402 buf[0] = '\0'; 2403 2404 for (i=0; i<0xA0; i++) { 2405 if ((i%16 == 0) && (i != 0)) { 2406 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 2407 buf[0] = '\0'; 2408 } 2409 if (ibm52Xmask[i] == 0x00) { 2410 strcat(buf, " .."); 2411 } else { 2412 vrbg[IDXL_I] = i; 2413 ibmr[i] = vrbg[DATA_I] & 0xFF; 2414 ibmr[i] &= ibm52Xmask[i]; 2415 sprintf(tbuf, " %02x", ibmr[i]); 2416 strcat(buf, tbuf); 2417 } 2418 } 2419 xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s\n", buf); 2420} 2421 2422