i128exa.c revision 7965d9ac 
1/*
2 * Copyright 1997-2000 by Robin Cutshaw <robin@XFree86.Org>
3 * Copyright 2005 Adam Jackson <ajax@nwnk.net>
4 *
5 * Permission to use, copy, modify, distribute, and sell this software and its
6 * documentation for any purpose is hereby granted without fee, provided that
7 * the above copyright notice appear in all copies and that both that
8 * copyright notice and this permission notice appear in supporting
9 * documentation, and that the names of the authors not be used in
10 * advertising or publicity pertaining to distribution of the software without
11 * specific, written prior permission.  The authors make no representations
12 * about the suitability of this software for any purpose.  It is provided
13 * "as is" without express or implied warranty.
14 *
15 * THE AUTHORS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
16 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
17 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
18 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
19 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
20 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
21 * PERFORMANCE OF THIS SOFTWARE.
22 */
23
24/* Solid and Copy support derived from the i128 XAA code */
25
26#ifdef HAVE_CONFIG_H
27#include "config.h"
28#endif
29
30#include "exa.h"
31#include "miline.h"
32#include "servermd.h"
33#include "picture.h"
34
35#include "xf86.h"
36#include "xf86_OSproc.h"
37#include "xf86Pci.h"
38#include "xf86PciInfo.h"
39
40#include "i128.h"
41#include "i128reg.h"
42
43#define PI128_FROM_PIXMAP(x) \
44    I128Ptr pI128 = I128PTR(xf86Screens[x->drawable.pScreen->myNum])
45#define PI128_FROM_SCREEN(x) \
46    I128Ptr pI128 = I128PTR(xf86Screens[x->myNum])
47#define PI128_FROM_PICTURE(x) \
48    I128Ptr pI128 = I128PTR(xf86Screens[x->pDrawable->pScreen->myNum])
49
50/* we might be able to do something smarter than this */
51#define ENG_PIPELINE_READY() \
52    while (pI128->mem.rbase_a[BUSY] & BUSY_BUSY)
53#define ENG_DONE() \
54    while (pI128->mem.rbase_a[FLOW] & (FLOW_DEB | FLOW_MCB | FLOW_PRV))
55
56#if 1
57#define I128_EXA_DEBUG(x)
58#else
59#define I128_EXA_DEBUG(x) ErrorF x
60#endif
61
62/* technically we should set the caches to bogus things during init... */
63#define CACHE_DEBUG 0
64
65#define CACHED_UPDATE(val, reg) \
66    do if (pI128->val != val) { \
67        if (CACHE_DEBUG) I128_EXA_DEBUG(("Updated cache for " #reg "\n")); \
68        pI128->mem.rbase_a[reg] = pI128->val = val; \
69    } while (0)
70
71static void
72i128SetBufCtrl(I128Ptr pI128, int dest_bpp)
73{
74    unsigned int buf_ctrl;
75
76    switch (dest_bpp) {
77        case 8:  buf_ctrl = BC_PSIZ_8B;  break;
78        case 16: buf_ctrl = BC_PSIZ_16B; break;
79        case 24:
80        case 32: buf_ctrl = BC_PSIZ_32B; break;
81        default: buf_ctrl = 0;           break; /* error */
82    }
83    if (pI128->Chipset == PCI_CHIP_I128_T2R) {
84        if (pI128->MemoryType == I128_MEMORY_SGRAM)
85            buf_ctrl |= BC_MDM_PLN;
86        else
87            buf_ctrl |= BC_BLK_ENA;
88    }
89
90    CACHED_UPDATE(buf_ctrl, BUF_CTRL);
91}
92
93static const CARD32 i128alu[16] =
94{
95    CR_CLEAR << 8,
96    CR_AND << 8,
97    CR_AND_REV << 8,
98    CR_COPY << 8,
99    CR_AND_INV << 8,
100    CR_NOOP << 8,
101    CR_XOR << 8,
102    CR_OR << 8,
103    CR_NOR << 8,
104    CR_EQUIV << 8,
105    CR_INVERT << 8,
106    CR_OR_REV << 8,
107    CR_COPY_INV << 8,
108    CR_OR_INV << 8,
109    CR_NAND << 8,
110    CR_SET << 8
111};
112
113/*                                8bpp   16bpp  32bpp unused */
114static const int min_size[]   = { 0x62,  0x32,  0x1A, 0x00 };
115static const int max_size[]   = { 0x80,  0x40,  0x20, 0x00 };
116static const int split_size[] = { 0x20,  0x10,  0x08, 0x00 };
117
118/*
119 * this is the workhorse for our solid and copy routines.  this works because
120 * when CS_SOLID is set, the color comes from the FORE register regardless of
121 * the source pixmap coords.
122 */
123
124static void
125i128ExaBlit(PixmapPtr dst, int x1, int y1, int x2, int y2, int w, int h)
126{
127    int wh;
128    PI128_FROM_PIXMAP(dst);
129
130    I128_EXA_DEBUG(("Blit: %d %d %d %d %d %d\n", x1, y1, x2, y2, w, h));
131    ENG_PIPELINE_READY();
132
133    /*
134     * this deserves explanation.  XY3_DIR == 0 means left to right, top to
135     * bottom.  setting bit zero (DIR_LR_BT) switches to bottom to top, and
136     * setting bit one (DIR_RL_TB) switches to right to left. XXX rewrite me.
137     */
138    if (pI128->blitdir & DIR_RL_TB) { /* right-to-left */
139        x1 += w; x1--;
140        x2 += w; x2--;
141    }
142    if (pI128->blitdir & DIR_LR_BT) { /* bottom-to-top */
143        y1 += h; y1--;
144        y2 += h; y2--;
145    }
146
147    if (pI128->Chipset == PCI_CHIP_I128) {
148        int bppi;
149
150        /* The I128-1 has a nasty bitblit bug
151         * that occurs when dest is exactly 8 pages wide
152         */
153
154        bppi = (pI128->mem.rbase_a[BUF_CTRL] & BC_PSIZ_MSK) >> 24;
155
156        if ((w >= min_size[bppi]) && (w <= max_size[bppi])) {
157            bppi = split_size[bppi];
158#if 1
159            /* split method */
160
161            wh = (bppi << 16) | h;
162            CACHED_UPDATE(wh, XY2_WH);
163            pI128->mem.rbase_a[XY0_SRC] = (x1 << 16) | y1;    MB;
164            pI128->mem.rbase_a[XY1_DST] = (x2 << 16) | y2;    MB;
165
166            ENG_PIPELINE_READY();
167
168            w -= bppi;
169
170            if (pI128->blitdir & DIR_RL_TB) {
171                /* right to left blit */
172                x1 -= bppi;
173                x2 -= bppi;
174            } else {
175                /* left to right blit */
176                x1 += bppi;
177                x2 += bppi;
178            }
179#else
180            /* clip method */
181            pI128->mem.rbase_a[CLPTL] = (x2 << 16) | y2;
182            pI128->mem.rbase_a[CLPBR] = ((x2 + w) << 16) | (y2 + h);
183            w += bppi;
184#endif
185        }
186    }
187
188    /* this is overkill, but you can never have too much overkill */
189    wh = (w << 16) | h;
190    CACHED_UPDATE(wh, XY2_WH);
191
192    pI128->mem.rbase_a[XY0_SRC] = (x1 << 16) | y1;    MB;
193    pI128->mem.rbase_a[XY1_DST] = (x2 << 16) | y2;    MB;
194}
195
196static void
197i128WaitMarker(ScreenPtr pScreen, int Marker)
198{
199    PI128_FROM_SCREEN(pScreen);
200    ENG_DONE();
201}
202
203static void
204i128SetPlanemask(I128Ptr pI128, Pixel p)
205{
206    Pixel planemask;
207    I128_EXA_DEBUG(("SetPlanemask: %d\n", (int)p));
208    if (p == -1)
209        planemask = -1;
210    else switch (pI128->bitsPerPixel) {
211        case 8:
212            planemask = p * 0x01010101; break;
213        case 16:
214            planemask = p * 0x00010001; break;
215        default:
216            planemask = p; break;
217    }
218
219    CACHED_UPDATE(planemask, MASK);
220}
221
222/* this should be superfluous... */
223static void
224i128SetClip(I128Ptr pI128)
225{
226#if 0
227    pI128->clptl = pI128->mem.rbase_a[CLPTL] = 0x00000000;
228    pI128->clpbr = pI128->mem.rbase_a[CLPBR] = (4095 << 16) | 2047;
229#endif
230}
231
232static void
233i128SetBlitDirection(I128Ptr pI128, int dx, int dy)
234{
235    int blitdir;
236
237    I128_EXA_DEBUG(("SetBlitDirection: %d %d\n", dx, dy));
238
239    if (dx < 0) {
240        if (dy < 0) blitdir = DIR_RL_BT;
241        else blitdir = DIR_RL_TB;
242    } else {
243        if (dy < 0) blitdir = DIR_LR_BT;
244        else blitdir = DIR_LR_TB;
245    }
246
247    CACHED_UPDATE(blitdir, XY3_DIR);
248}
249
250static void
251i128SetRop(I128Ptr pI128, int alu, int solid)
252{
253    int cmd;
254
255    I128_EXA_DEBUG(("SetRop: %d %d\n", alu, solid));
256
257    cmd = i128alu[alu] | CO_BITBLT | (solid ? (CS_SOLID << 16) : 0);
258
259    CACHED_UPDATE(cmd, CMD);
260}
261
262static void
263i128SetSourcePixmap(I128Ptr pI128, PixmapPtr src)
264{
265    unsigned int sorg = exaGetPixmapOffset(src);
266    unsigned int sptch = exaGetPixmapPitch(src);
267
268    I128_EXA_DEBUG(("SetSourcePixmap: %x, %d\n", sorg, sptch));
269
270    CACHED_UPDATE(sorg, DE_SORG);
271    CACHED_UPDATE(sptch, DE_SPTCH);
272}
273
274static void
275i128SetDestPixmap(I128Ptr pI128, PixmapPtr dst)
276{
277    unsigned int dorg = exaGetPixmapOffset(dst);
278    unsigned int dptch = exaGetPixmapPitch(dst);
279
280    I128_EXA_DEBUG(("SetDestPixmap: %x, %d\n", dorg, dptch));
281
282    CACHED_UPDATE(dorg, DE_DORG);
283    CACHED_UPDATE(dptch, DE_DPTCH);
284}
285
286static void
287i128SetTexture(I128Ptr pI128, PixmapPtr tex)
288{
289    unsigned int torg = exaGetPixmapOffset(tex);
290    unsigned int tptch = exaGetPixmapPitch(tex);
291
292    I128_EXA_DEBUG(("SetTexture: %x, %d\n", torg, tptch));
293
294    CACHED_UPDATE(torg, LOD0_ORG);
295    CACHED_UPDATE(tptch, DE_TPTCH);
296}
297
298static const int func_tab[13][2] = {
299        /* source function,         destination function */
300        { ABLEND_SRC_ZERO,          ABLEND_DST_ZERO        }, /* clear */
301        { ABLEND_SRC_ONE,           ABLEND_DST_ZERO        }, /* src */
302        { ABLEND_SRC_ZERO,          ABLEND_DST_ONE         }, /* dst */
303        { ABLEND_SRC_ONE,           ABLEND_DST_OMSRC_ALPHA }, /* over */
304        { ABLEND_SRC_OMDST_ALPHA,   ABLEND_DST_ONE         }, /* overreverse */
305        { ABLEND_SRC_DST_ALPHA,     ABLEND_DST_ZERO        }, /* in */
306        { ABLEND_SRC_ZERO,          ABLEND_DST_SRC_ALPHA   }, /* inreverse */
307        { ABLEND_SRC_OMDST_ALPHA,   ABLEND_DST_ZERO        }, /* out */
308        { ABLEND_SRC_ZERO,          ABLEND_DST_OMSRC_ALPHA }, /* outreverse */
309        { ABLEND_SRC_DST_ALPHA,     ABLEND_DST_OMSRC_ALPHA }, /* atop */
310        { ABLEND_SRC_OMDST_ALPHA,   ABLEND_DST_SRC_ALPHA   }, /* atopreverse */
311        { ABLEND_SRC_OMDST_ALPHA,   ABLEND_DST_OMSRC_ALPHA }, /* xor */
312        { ABLEND_SRC_ONE,           ABLEND_DST_ONE         }  /* add */
313};
314
315static void
316i128SetAlphaForOp(I128Ptr pI128, int op, int enable)
317{
318    int acntrl = 0;
319
320    if (enable) {
321        acntrl |= ACTL_BE;  /* blend enable */
322        acntrl |= func_tab[op][0];  /* source factor */
323        acntrl |= func_tab[op][1];  /* dest_factor */
324        acntrl |= 0; /* ACTL_AMD; / * modulate alpha */
325    } else {
326        acntrl = 0;
327    }
328
329    I128_EXA_DEBUG(("SetAlphaForOp: %d, %d\n", op, enable));
330
331    CACHED_UPDATE(acntrl, ACNTRL);
332}
333
334/* we don't need a finalizer, yet */
335static void
336i128Done(PixmapPtr p) {
337    I128_EXA_DEBUG(("Done\n\n"));
338    return;
339}
340
341/* Solid */
342
343static Bool
344i128PrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
345{
346    PI128_FROM_PIXMAP(pPixmap);
347
348    ENG_PIPELINE_READY();
349
350    i128SetPlanemask(pI128, planemask);
351
352    if (alu != GXclear && alu != GXset)
353        pI128->mem.rbase_a[FORE] = fg;
354
355    i128SetClip(pI128);
356    i128SetBlitDirection(pI128, 1, 1); /* probably unnecessary/ignored */
357
358    i128SetAlphaForOp(pI128, 0, 0);
359    i128SetRop(pI128, alu, 1);
360
361    /* no need to set the source, the chip ignores it */
362    i128SetDestPixmap(pI128, pPixmap);
363
364    return TRUE;
365}
366
367static void
368i128Solid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2)
369{
370    i128ExaBlit(pPixmap, 0, 0, x1, y1, x2 - x1, y2 - y1);
371}
372
373/* Copy */
374
375static Bool
376i128PrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int dx, int dy,
377                int alu, Pixel planemask)
378{
379    PI128_FROM_PIXMAP(pSrcPixmap);
380
381    ENG_PIPELINE_READY();
382
383    i128SetPlanemask(pI128, planemask);
384    i128SetClip(pI128);
385    i128SetBlitDirection(pI128, dx, dy);
386
387    i128SetAlphaForOp(pI128, 0, 0);
388    i128SetRop(pI128, alu, 0);
389
390    i128SetSourcePixmap(pI128, pSrcPixmap);
391    i128SetDestPixmap(pI128, pDstPixmap);
392
393    return TRUE;
394}
395
396static void
397i128Copy(PixmapPtr pDstPixmap, int x1, int y1, int x2, int y2, int w, int h)
398{
399    i128ExaBlit(pDstPixmap, x1, y1, x2, y2, w, h);
400}
401
402/* Composite */
403
404static const struct source_format source_formats[] = {
405    /* 32bpp */
406    { PICT_a8r8g8b8,    0x14,   0,  0 },
407    { PICT_x8r8g8b8,    0x14,   0,  1 },
408#if 0
409    { PICT_a8b8g8r8,    0x14,   0,  0 },
410    { PICT_x8b8g8r8,    0x14,   0,  1 },
411    /* no direct 24bpp formats */
412    /* 16bpp */
413    { PICT_r5g6b5,      0x12,   0,  0 },
414    { PICT_b5g6r5,      0x12,   0,  0 },
415    { PICT_a1r5g5b5,    0x11,   0,  0 },
416    { PICT_x1r5g5b5,    0x11,   0,  1 },
417    { PICT_a1b5g5r5,    0x11,   0,  0 },
418    { PICT_x1b5g5r5,    0x11,   0,  1 },
419    { PICT_a4r4g4b4,    0x10,   0,  0 },
420    { PICT_x4r4g4b4,    0x10,   0,  1 },
421    { PICT_a4b4g4r4,    0x10,   0,  0 },
422    { PICT_x4b4g4r4,    0x10,   0,  1 },
423    /* 8bpp */
424    { PICT_a8,          0x21,   0,  0 },
425    { PICT_r3g3b2,      0x0D,   0,  0 },
426    { PICT_b2g3r3,      0x0D,   0,  0 },
427    { PICT_a2r2g2b2,    0x30,   0,  0 },
428    { PICT_a2b2g2r2,    0x30,   0,  0 },
429    /* 4bpp */
430    { PICT_a4,          0x20,   0,  0 },
431#endif
432    /* terminator */
433    { 0,                0,      0,  0 }
434};
435
436static struct source_format *
437i128MapSourceFormat(int fmt)
438{
439    struct source_format *f;
440    for (f = (struct source_format *)source_formats; f->render_format; f++)
441        if (f->render_format == fmt)
442            return f;
443    return NULL;
444}
445
446struct dest_format {
447    int render_format;
448    int i128_format;
449};
450
451static const struct dest_format dest_formats[] = {
452    { 0, 0 }
453};
454
455#if 0
456static struct dest_format *
457i128MapDestFormat(int fmt)
458{
459    return NULL;
460}
461#endif
462
463/* Composite is probably t2r and t2r4 only */
464static Bool
465i128CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
466                   PicturePtr pDstPicture)
467{
468    PI128_FROM_PICTURE(pDstPicture);
469
470    if (op >= PictOpSaturate) return FALSE;
471
472    /*
473     * no direct alpha mask support.  we only have one TMU, so while we
474     * can emulate it, we should emulate it in the generic EXA layer.
475     */
476    if (pMaskPicture) return FALSE;
477
478    /* when transforms added, be sure to check for linear/nearest */
479    /* if (pSrcPicture->transform) return FALSE; */
480
481    /* no support for external alpha */
482    if (pSrcPicture->alphaMap || pDstPicture->alphaMap) return FALSE;
483
484    pI128->source = i128MapSourceFormat(pSrcPicture->format);
485    if (!pI128->source)
486        return FALSE;
487#if 0
488    if (!i128MapDestFormat(pDstPicture->format)) return FALSE;
489#endif
490
491    return TRUE;
492}
493
494static Bool
495i128PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
496                     PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask,
497                     PixmapPtr pDst)
498{
499    unsigned int cmd;
500    unsigned int tex_ctl = 0;
501    unsigned int threedctl = 0;
502    PI128_FROM_PIXMAP(pDst);
503
504    /* 2D setup */
505    i128SetBufCtrl(pI128, pDst->drawable.bitsPerPixel);
506    i128SetPlanemask(pI128, -1);
507    i128SetSourcePixmap(pI128, pSrc);
508    i128SetDestPixmap(pI128, pDst);
509
510    /* TEX_INV command here? */
511
512    cmd = CO_TRIAN3D;
513    CACHED_UPDATE(cmd, CMD);
514
515    /* 3D setup */
516    i128SetTexture(pI128, pSrc);
517
518    i128SetAlphaForOp(pI128, op, 1);
519
520    /* it looks pointless to cache these, but we'll need it for DRI */
521
522    tex_ctl |= TEX_TM;  /* enable texture mapping */
523    tex_ctl |= TEX_NMG | TEX_NMN;   /* nearest interpolation */
524    tex_ctl |= 0; /* TEX_RM;  / * modulate RGB */
525    CACHED_UPDATE(tex_ctl, TEX_CTL);
526
527    threedctl |= 0; /* COMP_TRUE << TCTL_ZOP_SHIFT;   / * always pass Z check */
528    threedctl |= TCTL_ABS;  /* enable alpha blend */
529    threedctl |= TCTL_TBS;  /* enable texture blend */
530    threedctl |= TCTL_RT;   /* draw textured rectangle */
531    CACHED_UPDATE(threedctl, THREEDCTL);
532
533    return TRUE;
534}
535
536static void
537i128Composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
538              int dstX, int dstY, int width, int height)
539{
540    PI128_FROM_PIXMAP(pDst);
541
542    /*
543     * vertex setup.  vertex layout must be:
544     * V0    V1
545     * V2   (V3 is implicit)
546     */
547
548    pI128->mem.rbase_af[V0_X] = 0.0;
549    pI128->mem.rbase_af[V0_Y] = 0.0;
550    pI128->mem.rbase_af[V0_W] = 1.0;
551    pI128->mem.rbase_af[V0_U] = 0.0;
552    pI128->mem.rbase_af[V0_V] = 0.0;
553    pI128->mem.rbase_af[V1_X] = 300.0;
554    pI128->mem.rbase_af[V1_Y] = 0.0;
555    pI128->mem.rbase_af[V1_W] = 1.0;
556    pI128->mem.rbase_af[V1_U] = 1.0;
557    pI128->mem.rbase_af[V1_V] = 0.0;
558    pI128->mem.rbase_af[V2_X] = 0.0;
559    pI128->mem.rbase_af[V2_Y] = 300.0;
560    pI128->mem.rbase_af[V2_W] = 1.0;
561    pI128->mem.rbase_af[V2_U] = 0.0;
562    pI128->mem.rbase_af[V2_V] = 1.0;
563
564    /* and fire */
565    pI128->mem.rbase_a[TRIGGER3D] = 1; MB;
566
567#if 0
568    static int i = 0;
569    /* test for raster */
570    if (!(i = (i + 1) % 32)) {
571        ErrorF("Composite test: %d %d %d %d %d %d\n", srcX, srcY, dstX, dstY,
572                width, height);
573    }
574    i128SetRop(pI128, GXxor, 0);
575    i128ExaBlit(pDst, srcX, srcY, dstX, dstY, width, height);
576#endif
577}
578
579#if 0
580/*
581 * upload and download will require a DRM.  AGP DMA only works on T2R4, and
582 * then only for upload.  we could probably use memory windows on other chips,
583 * but those have goofy alignment restrictions and need to be disabled when
584 * not in use.
585 */
586static Bool
587i128DownloadFromScreen(PixmapPtr pSrc, int x, int y, int w, int h, char *dst,
588                       int dst_pitch)
589{
590}
591
592static Bool
593i128UploadToScreen(PixmapPtr pDst, int x, int y, int w, int h, char *src,
594                   int src_pitch)
595{
596}
597#endif
598
599Bool
600I128ExaInit(ScreenPtr pScreen)
601{
602    ExaDriverPtr pExa;
603    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
604    I128Ptr pI128 = I128PTR(pScrn);
605
606    if (!(pExa = exaDriverAlloc())) {
607        pI128->NoAccel = TRUE;
608        return FALSE;
609    }
610    pI128->ExaDriver = pExa;
611
612    pExa->flags = EXA_OFFSCREEN_PIXMAPS | EXA_OFFSCREEN_ALIGN_POT;
613    pExa->memoryBase = pI128->MemoryPtr;
614    pExa->memorySize = pI128->MemorySize * 1024;
615    pExa->offScreenBase = (pScrn->virtualX * pScrn->virtualY) *
616                               (pScrn->bitsPerPixel / 8) + 4096;
617    /* these two are probably right */
618    pExa->pixmapOffsetAlign = 16;
619    pExa->pixmapPitchAlign = 16;
620    /* these two are guesses */
621    pExa->maxX = 2048;
622    pExa->maxY = 2048;
623
624    pExa->WaitMarker = i128WaitMarker;
625
626    pExa->PrepareSolid = i128PrepareSolid;
627    pExa->Solid = i128Solid;
628    pExa->DoneSolid = i128Done;
629
630    pExa->PrepareCopy = i128PrepareCopy;
631    pExa->Copy = i128Copy;
632    pExa->DoneCopy = i128Done;
633
634    if (0 && (pI128->Chipset == PCI_CHIP_I128_T2R ||
635        pI128->Chipset == PCI_CHIP_I128_T2R4))
636    {
637#if 0
638        pExa->DownloadFromScreen = i128DownloadFromScreen;
639        pExa->UploadToScreen = i128UploadToScreen;
640#endif
641        pExa->CheckComposite = i128CheckComposite;
642        pExa->PrepareComposite = i128PrepareComposite;
643        pExa->Composite = i128Composite;
644        pExa->DoneComposite = i128Done;
645    }
646
647    /*
648     * XXX much of this is duplicated from the XAA code, but I expect the XAA
649     * support to disappear eventually.
650     */
651    pI128->buf_ctrl = 0; /* force write */
652    i128SetBufCtrl(pI128, pI128->bitsPerPixel);
653
654    /* all of this needs to be properly documented */
655    {
656        pI128->mem.rbase_a[DE_PGE] = 0x00;
657        pI128->mem.rbase_a[DE_SORG] = pI128->displayOffset;
658        pI128->mem.rbase_a[DE_DORG] = pI128->displayOffset;
659        pI128->mem.rbase_a[DE_MSRC] = 0x00;
660        pI128->mem.rbase_a[DE_WKEY] = 0x00;
661        pI128->mem.rbase_a[DE_SPTCH] = pI128->mem.rbase_g[DB_PTCH];
662        pI128->mem.rbase_a[DE_DPTCH] = pI128->mem.rbase_g[DB_PTCH];
663        if (pI128->Chipset == PCI_CHIP_I128_T2R4)
664            pI128->mem.rbase_a[DE_ZPTCH] = pI128->mem.rbase_g[DB_PTCH];
665        pI128->mem.rbase_a[RMSK] = 0x00000000;
666        pI128->mem.rbase_a[XY4_ZM] = ZOOM_NONE;
667        pI128->mem.rbase_a[LPAT] = 0xffffffff;  /* for lines */
668        pI128->mem.rbase_a[PCTRL] = 0x00000000; /* for lines */
669        pI128->mem.rbase_a[CLPTL] = 0x00000000;
670        pI128->mem.rbase_a[CLPBR] = (4095 << 16) | 2047 ;
671        pI128->mem.rbase_a[ACNTRL] = 0x00000000;
672        pI128->mem.rbase_a[INTM] = 0x03;
673    }
674
675    /* need this as a float * for vertex setup */
676    pI128->mem.rbase_af = (float *)pI128->mem.rbase_a;
677
678    if (pI128->Debug) {
679        xf86DrvMsg(pScrn->scrnIndex, X_INFO, "I128ExaInit done\n");
680        I128DumpActiveRegisters(pScrn);
681    }
682
683    return(exaDriverInit(pScreen, pExa));
684}
685