1428d7b3dSmrg/************************************************************************** 2428d7b3dSmrg 3428d7b3dSmrgCopyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. 4428d7b3dSmrgAll Rights Reserved. 5428d7b3dSmrg 6428d7b3dSmrgPermission is hereby granted, free of charge, to any person obtaining a 7428d7b3dSmrgcopy of this software and associated documentation files (the 8428d7b3dSmrg"Software"), to deal in the Software without restriction, including 9428d7b3dSmrgwithout limitation the rights to use, copy, modify, merge, publish, 10428d7b3dSmrgdistribute, sub license, and/or sell copies of the Software, and to 11428d7b3dSmrgpermit persons to whom the Software is furnished to do so, subject to 12428d7b3dSmrgthe following conditions: 13428d7b3dSmrg 14428d7b3dSmrgThe above copyright notice and this permission notice (including the 15428d7b3dSmrgnext paragraph) shall be included in all copies or substantial portions 16428d7b3dSmrgof the Software. 17428d7b3dSmrg 18428d7b3dSmrgTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19428d7b3dSmrgOR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20428d7b3dSmrgMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21428d7b3dSmrgIN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 22428d7b3dSmrgANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23428d7b3dSmrgTORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24428d7b3dSmrgSOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25428d7b3dSmrg 26428d7b3dSmrg**************************************************************************/ 27428d7b3dSmrg 28428d7b3dSmrg/* 29428d7b3dSmrg * Authors: 30428d7b3dSmrg * Keith Whitwell <keith@tungstengraphics.com> 31428d7b3dSmrg */ 32428d7b3dSmrg 33428d7b3dSmrg#ifdef HAVE_CONFIG_H 34428d7b3dSmrg#include "config.h" 35428d7b3dSmrg#endif 36428d7b3dSmrg 37428d7b3dSmrg#include "xorg-server.h" 38428d7b3dSmrg#include "xf86.h" 39428d7b3dSmrg#include "i810.h" 40428d7b3dSmrg 41428d7b3dSmrgstruct wm_info { 42428d7b3dSmrg double freq; 43428d7b3dSmrg unsigned int wm; 44428d7b3dSmrg}; 45428d7b3dSmrg 46428d7b3dSmrgstatic struct wm_info i810_wm_8_100[] = { 47428d7b3dSmrg {0, 0x22003000}, 48428d7b3dSmrg {25.2, 0x22003000}, 49428d7b3dSmrg {28.0, 0x22003000}, 50428d7b3dSmrg {31.5, 0x22003000}, 51428d7b3dSmrg {36.0, 0x22007000}, 52428d7b3dSmrg {40.0, 0x22007000}, 53428d7b3dSmrg {45.0, 0x22007000}, 54428d7b3dSmrg {49.5, 0x22008000}, 55428d7b3dSmrg {50.0, 0x22008000}, 56428d7b3dSmrg {56.3, 0x22008000}, 57428d7b3dSmrg {65.0, 0x22008000}, 58428d7b3dSmrg {75.0, 0x22008000}, 59428d7b3dSmrg {78.8, 0x22008000}, 60428d7b3dSmrg {80.0, 0x22008000}, 61428d7b3dSmrg {94.0, 0x22008000}, 62428d7b3dSmrg {96.0, 0x22107000}, 63428d7b3dSmrg {99.0, 0x22107000}, 64428d7b3dSmrg {108.0, 0x22107000}, 65428d7b3dSmrg {121.0, 0x22107000}, 66428d7b3dSmrg {128.9, 0x22107000}, 67428d7b3dSmrg {132.0, 0x22109000}, 68428d7b3dSmrg {135.0, 0x22109000}, 69428d7b3dSmrg {157.5, 0x2210b000}, 70428d7b3dSmrg {162.0, 0x2210b000}, 71428d7b3dSmrg {175.5, 0x2210b000}, 72428d7b3dSmrg {189.0, 0x2220e000}, 73428d7b3dSmrg {202.5, 0x2220e000} 74428d7b3dSmrg}; 75428d7b3dSmrg 76428d7b3dSmrgstatic struct wm_info i810_wm_16_100[] = { 77428d7b3dSmrg {0, 0x22004000}, 78428d7b3dSmrg {25.2, 0x22006000}, 79428d7b3dSmrg {28.0, 0x22006000}, 80428d7b3dSmrg {31.5, 0x22007000}, 81428d7b3dSmrg {36.0, 0x22007000}, 82428d7b3dSmrg {40.0, 0x22007000}, 83428d7b3dSmrg {45.0, 0x22007000}, 84428d7b3dSmrg {49.5, 0x22009000}, 85428d7b3dSmrg {50.0, 0x22009000}, 86428d7b3dSmrg {56.3, 0x22108000}, 87428d7b3dSmrg {65.0, 0x2210e000}, 88428d7b3dSmrg {75.0, 0x2210e000}, 89428d7b3dSmrg {78.8, 0x2210e000}, 90428d7b3dSmrg {80.0, 0x22210000}, 91428d7b3dSmrg {94.5, 0x22210000}, 92428d7b3dSmrg {96.0, 0x22210000}, 93428d7b3dSmrg {99.0, 0x22210000}, 94428d7b3dSmrg {108.0, 0x22210000}, 95428d7b3dSmrg {121.0, 0x22210000}, 96428d7b3dSmrg {128.9, 0x22210000}, 97428d7b3dSmrg {132.0, 0x22314000}, 98428d7b3dSmrg {135.0, 0x22314000}, 99428d7b3dSmrg {157.5, 0x22415000}, 100428d7b3dSmrg {162.0, 0x22416000}, 101428d7b3dSmrg {175.5, 0x22416000}, 102428d7b3dSmrg {189.0, 0x22416000}, 103428d7b3dSmrg {195.0, 0x22416000}, 104428d7b3dSmrg {202.5, 0x22416000} 105428d7b3dSmrg}; 106428d7b3dSmrg 107428d7b3dSmrgstatic struct wm_info i810_wm_24_100[] = { 108428d7b3dSmrg {0, 0x22006000}, 109428d7b3dSmrg {25.2, 0x22009000}, 110428d7b3dSmrg {28.0, 0x22009000}, 111428d7b3dSmrg {31.5, 0x2200a000}, 112428d7b3dSmrg {36.0, 0x2210c000}, 113428d7b3dSmrg {40.0, 0x2210c000}, 114428d7b3dSmrg {45.0, 0x2210c000}, 115428d7b3dSmrg {49.5, 0x22111000}, 116428d7b3dSmrg {50.0, 0x22111000}, 117428d7b3dSmrg {56.3, 0x22111000}, 118428d7b3dSmrg {65.0, 0x22214000}, 119428d7b3dSmrg {75.0, 0x22214000}, 120428d7b3dSmrg {78.8, 0x22215000}, 121428d7b3dSmrg {80.0, 0x22216000}, 122428d7b3dSmrg {94.5, 0x22218000}, 123428d7b3dSmrg {96.0, 0x22418000}, 124428d7b3dSmrg {99.0, 0x22418000}, 125428d7b3dSmrg {108.0, 0x22418000}, 126428d7b3dSmrg {121.0, 0x22418000}, 127428d7b3dSmrg {128.9, 0x22419000}, 128428d7b3dSmrg {132.0, 0x22519000}, 129428d7b3dSmrg {135.0, 0x4441d000}, 130428d7b3dSmrg {157.5, 0x44419000}, 131428d7b3dSmrg {162.0, 0x44419000}, 132428d7b3dSmrg {175.5, 0x44419000}, 133428d7b3dSmrg {189.0, 0x44419000}, 134428d7b3dSmrg {195.0, 0x44419000}, 135428d7b3dSmrg {202.5, 0x44419000} 136428d7b3dSmrg}; 137428d7b3dSmrg 138428d7b3dSmrg#if 0 139428d7b3dSmrg/* not used */ 140428d7b3dSmrgstatic struct wm_info i810_wm_32_100[] = { 141428d7b3dSmrg {0, 0x2210b000}, 142428d7b3dSmrg {60, 0x22415000}, /* 0x314000 works too */ 143428d7b3dSmrg {80, 0x22419000} /* 0x518000 works too */ 144428d7b3dSmrg}; 145428d7b3dSmrg#endif 146428d7b3dSmrg 147428d7b3dSmrgstatic struct wm_info i810_wm_8_133[] = { 148428d7b3dSmrg {0, 0x22003000}, 149428d7b3dSmrg {25.2, 0x22003000}, 150428d7b3dSmrg {28.0, 0x22003000}, 151428d7b3dSmrg {31.5, 0x22003000}, 152428d7b3dSmrg {36.0, 0x22007000}, 153428d7b3dSmrg {40.0, 0x22007000}, 154428d7b3dSmrg {45.0, 0x22007000}, 155428d7b3dSmrg {49.5, 0x22008000}, 156428d7b3dSmrg {50.0, 0x22008000}, 157428d7b3dSmrg {56.3, 0x22008000}, 158428d7b3dSmrg {65.0, 0x22008000}, 159428d7b3dSmrg {75.0, 0x22008000}, 160428d7b3dSmrg {78.8, 0x22008000}, 161428d7b3dSmrg {80.0, 0x22008000}, 162428d7b3dSmrg {94.0, 0x22008000}, 163428d7b3dSmrg {96.0, 0x22107000}, 164428d7b3dSmrg {99.0, 0x22107000}, 165428d7b3dSmrg {108.0, 0x22107000}, 166428d7b3dSmrg {121.0, 0x22107000}, 167428d7b3dSmrg {128.9, 0x22107000}, 168428d7b3dSmrg {132.0, 0x22109000}, 169428d7b3dSmrg {135.0, 0x22109000}, 170428d7b3dSmrg {157.5, 0x2210b000}, 171428d7b3dSmrg {162.0, 0x2210b000}, 172428d7b3dSmrg {175.5, 0x2210b000}, 173428d7b3dSmrg {189.0, 0x2220e000}, 174428d7b3dSmrg {202.5, 0x2220e000} 175428d7b3dSmrg}; 176428d7b3dSmrg 177428d7b3dSmrgstatic struct wm_info i810_wm_16_133[] = { 178428d7b3dSmrg {0, 0x22004000}, 179428d7b3dSmrg {25.2, 0x22006000}, 180428d7b3dSmrg {28.0, 0x22006000}, 181428d7b3dSmrg {31.5, 0x22007000}, 182428d7b3dSmrg {36.0, 0x22007000}, 183428d7b3dSmrg {40.0, 0x22007000}, 184428d7b3dSmrg {45.0, 0x22007000}, 185428d7b3dSmrg {49.5, 0x22009000}, 186428d7b3dSmrg {50.0, 0x22009000}, 187428d7b3dSmrg {56.3, 0x22108000}, 188428d7b3dSmrg {65.0, 0x2210e000}, 189428d7b3dSmrg {75.0, 0x2210e000}, 190428d7b3dSmrg {78.8, 0x2210e000}, 191428d7b3dSmrg {80.0, 0x22210000}, 192428d7b3dSmrg {94.5, 0x22210000}, 193428d7b3dSmrg {96.0, 0x22210000}, 194428d7b3dSmrg {99.0, 0x22210000}, 195428d7b3dSmrg {108.0, 0x22210000}, 196428d7b3dSmrg {121.0, 0x22210000}, 197428d7b3dSmrg {128.9, 0x22210000}, 198428d7b3dSmrg {132.0, 0x22314000}, 199428d7b3dSmrg {135.0, 0x22314000}, 200428d7b3dSmrg {157.5, 0x22415000}, 201428d7b3dSmrg {162.0, 0x22416000}, 202428d7b3dSmrg {175.5, 0x22416000}, 203428d7b3dSmrg {189.0, 0x22416000}, 204428d7b3dSmrg {195.0, 0x22416000}, 205428d7b3dSmrg {202.5, 0x22416000} 206428d7b3dSmrg}; 207428d7b3dSmrg 208428d7b3dSmrgstatic struct wm_info i810_wm_24_133[] = { 209428d7b3dSmrg {0, 0x22006000}, 210428d7b3dSmrg {25.2, 0x22009000}, 211428d7b3dSmrg {28.0, 0x22009000}, 212428d7b3dSmrg {31.5, 0x2200a000}, 213428d7b3dSmrg {36.0, 0x2210c000}, 214428d7b3dSmrg {40.0, 0x2210c000}, 215428d7b3dSmrg {45.0, 0x2210c000}, 216428d7b3dSmrg {49.5, 0x22111000}, 217428d7b3dSmrg {50.0, 0x22111000}, 218428d7b3dSmrg {56.3, 0x22111000}, 219428d7b3dSmrg {65.0, 0x22214000}, 220428d7b3dSmrg {75.0, 0x22214000}, 221428d7b3dSmrg {78.8, 0x22215000}, 222428d7b3dSmrg {80.0, 0x22216000}, 223428d7b3dSmrg {94.5, 0x22218000}, 224428d7b3dSmrg {96.0, 0x22418000}, 225428d7b3dSmrg {99.0, 0x22418000}, 226428d7b3dSmrg {108.0, 0x22418000}, 227428d7b3dSmrg {121.0, 0x22418000}, 228428d7b3dSmrg {128.9, 0x22419000}, 229428d7b3dSmrg {132.0, 0x22519000}, 230428d7b3dSmrg {135.0, 0x4441d000}, 231428d7b3dSmrg {157.5, 0x44419000}, 232428d7b3dSmrg {162.0, 0x44419000}, 233428d7b3dSmrg {175.5, 0x44419000}, 234428d7b3dSmrg {189.0, 0x44419000}, 235428d7b3dSmrg {195.0, 0x44419000}, 236428d7b3dSmrg {202.5, 0x44419000} 237428d7b3dSmrg}; 238428d7b3dSmrg 239428d7b3dSmrg#define Elements(x) (sizeof(x)/sizeof(*x)) 240428d7b3dSmrg 241428d7b3dSmrg/* 242428d7b3dSmrg * I810CalcFIFO -- 243428d7b3dSmrg * 244428d7b3dSmrg * Calculate burst length and FIFO watermark. 245428d7b3dSmrg */ 246428d7b3dSmrg 247428d7b3dSmrgunsigned int 248428d7b3dSmrgI810CalcWatermark(ScrnInfoPtr pScrn, double freq, Bool dcache) 249428d7b3dSmrg{ 250428d7b3dSmrg I810Ptr pI810 = I810PTR(pScrn); 251428d7b3dSmrg struct wm_info *tab; 252428d7b3dSmrg int nr; 253428d7b3dSmrg int i; 254428d7b3dSmrg 255428d7b3dSmrg if (pI810->LmFreqSel == 100) { 256428d7b3dSmrg switch (pScrn->bitsPerPixel) { 257428d7b3dSmrg case 8: 258428d7b3dSmrg tab = i810_wm_8_100; 259428d7b3dSmrg nr = Elements(i810_wm_8_100); 260428d7b3dSmrg break; 261428d7b3dSmrg case 16: 262428d7b3dSmrg tab = i810_wm_16_100; 263428d7b3dSmrg nr = Elements(i810_wm_16_100); 264428d7b3dSmrg break; 265428d7b3dSmrg case 24: 266428d7b3dSmrg tab = i810_wm_24_100; 267428d7b3dSmrg nr = Elements(i810_wm_24_100); 268428d7b3dSmrg break; 269428d7b3dSmrg default: 270428d7b3dSmrg return 0; 271428d7b3dSmrg } 272428d7b3dSmrg } else { 273428d7b3dSmrg switch (pScrn->bitsPerPixel) { 274428d7b3dSmrg case 8: 275428d7b3dSmrg tab = i810_wm_8_133; 276428d7b3dSmrg nr = Elements(i810_wm_8_133); 277428d7b3dSmrg break; 278428d7b3dSmrg case 16: 279428d7b3dSmrg tab = i810_wm_16_133; 280428d7b3dSmrg nr = Elements(i810_wm_16_133); 281428d7b3dSmrg break; 282428d7b3dSmrg case 24: 283428d7b3dSmrg tab = i810_wm_24_133; 284428d7b3dSmrg nr = Elements(i810_wm_24_133); 285428d7b3dSmrg break; 286428d7b3dSmrg default: 287428d7b3dSmrg return 0; 288428d7b3dSmrg } 289428d7b3dSmrg } 290428d7b3dSmrg 291428d7b3dSmrg for (i = 0; i < nr && tab[i].freq < freq; i++) ; 292428d7b3dSmrg 293428d7b3dSmrg if (i == nr) 294428d7b3dSmrg i--; 295428d7b3dSmrg 296428d7b3dSmrg xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 297428d7b3dSmrg "chose watermark 0x%x: (tab.freq %.1f)\n", 298428d7b3dSmrg tab[i].wm, tab[i].freq); 299428d7b3dSmrg 300428d7b3dSmrg /* None of these values (sourced from intel) have watermarks for 301428d7b3dSmrg * the dcache memory. Fake it for now by using the same watermark 302428d7b3dSmrg * for both... 303428d7b3dSmrg * 304428d7b3dSmrg * Update: this is probably because dcache isn't real useful as 305428d7b3dSmrg * framebuffer memory, so intel's drivers don't need watermarks 306428d7b3dSmrg * for that memory because they never use it to feed the ramdacs. 307428d7b3dSmrg * We do use it in the fallback mode, so keep the watermarks for 308428d7b3dSmrg * now. 309428d7b3dSmrg */ 310428d7b3dSmrg if (dcache) 311428d7b3dSmrg return (tab[i].wm & ~0xffffff) | ((tab[i].wm >> 12) & 0xfff); 312428d7b3dSmrg else 313428d7b3dSmrg return tab[i].wm; 314428d7b3dSmrg} 315