1428d7b3dSmrg/*
2428d7b3dSmrg * Copyright © 2010 Intel Corporation
3428d7b3dSmrg *
4428d7b3dSmrg * Permission is hereby granted, free of charge, to any person obtaining a
5428d7b3dSmrg * copy of this software and associated documentation files (the "Software"),
6428d7b3dSmrg * to deal in the Software without restriction, including without limitation
7428d7b3dSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8428d7b3dSmrg * and/or sell copies of the Software, and to permit persons to whom the
9428d7b3dSmrg * Software is furnished to do so, subject to the following conditions:
10428d7b3dSmrg *
11428d7b3dSmrg * The above copyright notice and this permission notice (including the next
12428d7b3dSmrg * paragraph) shall be included in all copies or substantial portions of the
13428d7b3dSmrg * Software.
14428d7b3dSmrg *
15428d7b3dSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16428d7b3dSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17428d7b3dSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18428d7b3dSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19428d7b3dSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20428d7b3dSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21428d7b3dSmrg * IN THE SOFTWARE.
22428d7b3dSmrg *
23428d7b3dSmrg */
24428d7b3dSmrg
25428d7b3dSmrginclude(`exa_wm.g4i')
26428d7b3dSmrg
27428d7b3dSmrg/*
28428d7b3dSmrg * Prepare data in m2-m3 for Red channel, m4-m5 for Green channel,
29428d7b3dSmrg * m6-m7 for Blue and m8-m9 for Alpha channel
30428d7b3dSmrg */
31428d7b3dSmrgdefine(`slot_r_00',     `m2')
32428d7b3dSmrgdefine(`slot_r_01',     `m3')
33428d7b3dSmrgdefine(`slot_g_00',     `m4')
34428d7b3dSmrgdefine(`slot_g_01',     `m5')
35428d7b3dSmrgdefine(`slot_b_00',     `m6')
36428d7b3dSmrgdefine(`slot_b_01',     `m7')
37428d7b3dSmrgdefine(`slot_a_00',     `m8')
38428d7b3dSmrgdefine(`slot_a_01',     `m9')
39428d7b3dSmrgdefine(`data_port_msg_2_ind',	`2')
40428d7b3dSmrg
41428d7b3dSmrginclude(`exa_wm_write.g6i')
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