1428d7b3dSmrg#ifndef GEN6_RENDER_H 2428d7b3dSmrg#define GEN6_RENDER_H 3428d7b3dSmrg 4428d7b3dSmrg#define GEN6_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) 5428d7b3dSmrg 6428d7b3dSmrg#define GEN6_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ 7428d7b3dSmrg ((Pipeline) << 27) | \ 8428d7b3dSmrg ((Opcode) << 24) | \ 9428d7b3dSmrg ((Subopcode) << 16)) 10428d7b3dSmrg 11428d7b3dSmrg#define GEN6_STATE_BASE_ADDRESS GEN6_3D(0, 1, 1) 12428d7b3dSmrg#define GEN6_STATE_SIP GEN6_3D(0, 1, 2) 13428d7b3dSmrg 14428d7b3dSmrg#define GEN6_PIPELINE_SELECT GEN6_3D(1, 1, 4) 15428d7b3dSmrg 16428d7b3dSmrg#define GEN6_MEDIA_STATE_POINTERS GEN6_3D(2, 0, 0) 17428d7b3dSmrg#define GEN6_MEDIA_OBJECT GEN6_3D(2, 1, 0) 18428d7b3dSmrg 19428d7b3dSmrg#define GEN6_3DSTATE_BINDING_TABLE_POINTERS GEN6_3D(3, 0, 1) 20428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ 21428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ 22428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ 23428d7b3dSmrg 24428d7b3dSmrg#define GEN6_3DSTATE_VERTEX_BUFFERS GEN6_3D(3, 0, 8) 25428d7b3dSmrg#define GEN6_3DSTATE_VERTEX_ELEMENTS GEN6_3D(3, 0, 9) 26428d7b3dSmrg#define GEN6_3DSTATE_INDEX_BUFFER GEN6_3D(3, 0, 0xa) 27428d7b3dSmrg#define GEN6_3DSTATE_VF_STATISTICS GEN6_3D(3, 0, 0xb) 28428d7b3dSmrg 29428d7b3dSmrg#define GEN6_3DSTATE_DRAWING_RECTANGLE GEN6_3D(3, 1, 0) 30428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_COLOR GEN6_3D(3, 1, 1) 31428d7b3dSmrg#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD GEN6_3D(3, 1, 2) 32428d7b3dSmrg#define GEN6_3DSTATE_CHROMA_KEY GEN6_3D(3, 1, 4) 33428d7b3dSmrg#define GEN6_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 1, 5) 34428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 35428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 36428d7b3dSmrg 37428d7b3dSmrg#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 6) 38428d7b3dSmrg#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 7) 39428d7b3dSmrg#define GEN6_3DSTATE_LINE_STIPPLE GEN6_3D(3, 1, 8) 40428d7b3dSmrg#define GEN6_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN6_3D(3, 1, 9) 41428d7b3dSmrg/* These two are BLC and CTG only, not BW or CL */ 42428d7b3dSmrg#define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) 43428d7b3dSmrg#define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) 44428d7b3dSmrg 45428d7b3dSmrg#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) 46428d7b3dSmrg 47428d7b3dSmrg#define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) 48428d7b3dSmrg/* DW1 */ 49428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) 50428d7b3dSmrg 51428d7b3dSmrg#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) 52428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) 53428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) 54428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) 55428d7b3dSmrg 56428d7b3dSmrg#define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) 57428d7b3dSmrg/* DW1 */ 58428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 59428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 60428d7b3dSmrg/* DW2 */ 61428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 62428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 63428d7b3dSmrg 64428d7b3dSmrg#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) 65428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) 66428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) 67428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) 68428d7b3dSmrg 69428d7b3dSmrg#define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) 70428d7b3dSmrg 71428d7b3dSmrg#define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) 72428d7b3dSmrg 73428d7b3dSmrg#define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) 74428d7b3dSmrg/* DW4 */ 75428d7b3dSmrg# define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 76428d7b3dSmrg 77428d7b3dSmrg#define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) 78428d7b3dSmrg 79428d7b3dSmrg#define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) 80428d7b3dSmrg/* DW1 */ 81428d7b3dSmrg# define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 82428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 83428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 84428d7b3dSmrg/* DW2 */ 85428d7b3dSmrg/* DW3 */ 86428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) 87428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) 88428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) 89428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) 90428d7b3dSmrg/* DW4 */ 91428d7b3dSmrg# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 92428d7b3dSmrg# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 93428d7b3dSmrg# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 94428d7b3dSmrg 95428d7b3dSmrg#define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) 96428d7b3dSmrg/* DW2 */ 97428d7b3dSmrg# define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT 27 98428d7b3dSmrg# define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 99428d7b3dSmrg/* DW4 */ 100428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_0_START_GRF_SHIFT 16 101428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_1_START_GRF_SHIFT 8 102428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_2_START_GRF_SHIFT 0 103428d7b3dSmrg/* DW5 */ 104428d7b3dSmrg# define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 105428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) 106428d7b3dSmrg# define GEN6_3DSTATE_WM_32_DISPATCH_ENABLE (1 << 2) 107428d7b3dSmrg# define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) 108428d7b3dSmrg# define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) 109428d7b3dSmrg/* DW6 */ 110428d7b3dSmrg# define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 111428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) 112428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) 113428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) 114428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) 115428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) 116428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) 117428d7b3dSmrg 118428d7b3dSmrg 119428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) 120428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) 121428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) 122428d7b3dSmrg 123428d7b3dSmrg#define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) 124428d7b3dSmrg 125428d7b3dSmrg#define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) 126428d7b3dSmrg/* DW1 */ 127428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) 128428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) 129428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) 130428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) 131428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) 132428d7b3dSmrg 133428d7b3dSmrg#define PIPELINE_SELECT_3D 0 134428d7b3dSmrg#define PIPELINE_SELECT_MEDIA 1 135428d7b3dSmrg 136428d7b3dSmrg/* for GEN6_STATE_BASE_ADDRESS */ 137428d7b3dSmrg#define BASE_ADDRESS_MODIFY (1 << 0) 138428d7b3dSmrg 139428d7b3dSmrg/* VERTEX_BUFFER_STATE Structure */ 140428d7b3dSmrg#define VB0_BUFFER_INDEX_SHIFT 26 141428d7b3dSmrg#define VB0_VERTEXDATA (0 << 20) 142428d7b3dSmrg#define VB0_INSTANCEDATA (1 << 20) 143428d7b3dSmrg#define VB0_BUFFER_PITCH_SHIFT 0 144428d7b3dSmrg 145428d7b3dSmrg/* VERTEX_ELEMENT_STATE Structure */ 146428d7b3dSmrg#define VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ 147428d7b3dSmrg#define VE0_VALID (1 << 25) /* for GEN6 */ 148428d7b3dSmrg#define VE0_FORMAT_SHIFT 16 149428d7b3dSmrg#define VE0_OFFSET_SHIFT 0 150428d7b3dSmrg#define VE1_VFCOMPONENT_0_SHIFT 28 151428d7b3dSmrg#define VE1_VFCOMPONENT_1_SHIFT 24 152428d7b3dSmrg#define VE1_VFCOMPONENT_2_SHIFT 20 153428d7b3dSmrg#define VE1_VFCOMPONENT_3_SHIFT 16 154428d7b3dSmrg#define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 155428d7b3dSmrg 156428d7b3dSmrg/* 3DPRIMITIVE bits */ 157428d7b3dSmrg#define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) 158428d7b3dSmrg#define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) 159428d7b3dSmrg/* Primitive types are in gen6_defines.h */ 160428d7b3dSmrg#define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 161428d7b3dSmrg 162428d7b3dSmrg#define GEN6_SVG_CTL 0x7400 163428d7b3dSmrg 164428d7b3dSmrg#define GEN6_SVG_CTL_GS_BA (0 << 8) 165428d7b3dSmrg#define GEN6_SVG_CTL_SS_BA (1 << 8) 166428d7b3dSmrg#define GEN6_SVG_CTL_IO_BA (2 << 8) 167428d7b3dSmrg#define GEN6_SVG_CTL_GS_AUB (3 << 8) 168428d7b3dSmrg#define GEN6_SVG_CTL_IO_AUB (4 << 8) 169428d7b3dSmrg#define GEN6_SVG_CTL_SIP (5 << 8) 170428d7b3dSmrg 171428d7b3dSmrg#define GEN6_SVG_RDATA 0x7404 172428d7b3dSmrg#define GEN6_SVG_WORK_CTL 0x7408 173428d7b3dSmrg 174428d7b3dSmrg#define GEN6_VF_CTL 0x7500 175428d7b3dSmrg 176428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) 177428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) 178428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) 179428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) 180428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) 181428d7b3dSmrg#define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) 182428d7b3dSmrg#define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) 183428d7b3dSmrg#define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) 184428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) 185428d7b3dSmrg 186428d7b3dSmrg#define GEN6_VF_STRG_VAL 0x7504 187428d7b3dSmrg#define GEN6_VF_STR_VL_OVR 0x7508 188428d7b3dSmrg#define GEN6_VF_VC_OVR 0x750c 189428d7b3dSmrg#define GEN6_VF_STR_PSKIP 0x7510 190428d7b3dSmrg#define GEN6_VF_MAX_PRIM 0x7514 191428d7b3dSmrg#define GEN6_VF_RDATA 0x7518 192428d7b3dSmrg 193428d7b3dSmrg#define GEN6_VS_CTL 0x7600 194428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) 195428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) 196428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) 197428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) 198428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) 199428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 200428d7b3dSmrg#define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 201428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) 202428d7b3dSmrg 203428d7b3dSmrg#define GEN6_VS_STRG_VAL 0x7604 204428d7b3dSmrg#define GEN6_VS_RDATA 0x7608 205428d7b3dSmrg 206428d7b3dSmrg#define GEN6_SF_CTL 0x7b00 207428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) 208428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) 209428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) 210428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) 211428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) 212428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) 213428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) 214428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) 215428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) 216428d7b3dSmrg#define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) 217428d7b3dSmrg#define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) 218428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 219428d7b3dSmrg#define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 220428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) 221428d7b3dSmrg 222428d7b3dSmrg#define GEN6_SF_STRG_VAL 0x7b04 223428d7b3dSmrg#define GEN6_SF_RDATA 0x7b18 224428d7b3dSmrg 225428d7b3dSmrg#define GEN6_WIZ_CTL 0x7c00 226428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) 227428d7b3dSmrg#define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 228428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) 229428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) 230428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) 231428d7b3dSmrg#define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) 232428d7b3dSmrg#define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) 233428d7b3dSmrg#define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) 234428d7b3dSmrg#define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) 235428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 236428d7b3dSmrg#define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 237428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) 238428d7b3dSmrg 239428d7b3dSmrg#define GEN6_WIZ_STRG_VAL 0x7c04 240428d7b3dSmrg#define GEN6_WIZ_RDATA 0x7c18 241428d7b3dSmrg 242428d7b3dSmrg#define GEN6_TS_CTL 0x7e00 243428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) 244428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) 245428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) 246428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) 247428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) 248428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) 249428d7b3dSmrg 250428d7b3dSmrg#define GEN6_TS_STRG_VAL 0x7e04 251428d7b3dSmrg#define GEN6_TS_RDATA 0x7e08 252428d7b3dSmrg 253428d7b3dSmrg#define GEN6_TD_CTL 0x8000 254428d7b3dSmrg#define GEN6_TD_CTL_MUX_SHIFT 8 255428d7b3dSmrg#define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) 256428d7b3dSmrg#define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) 257428d7b3dSmrg#define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) 258428d7b3dSmrg#define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) 259428d7b3dSmrg#define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) 260428d7b3dSmrg#define GEN6_TD_CTL2 0x8004 261428d7b3dSmrg#define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) 262428d7b3dSmrg#define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) 263428d7b3dSmrg#define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) 264428d7b3dSmrg#define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 265428d7b3dSmrg#define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) 266428d7b3dSmrg#define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) 267428d7b3dSmrg#define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) 268428d7b3dSmrg#define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) 269428d7b3dSmrg#define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) 270428d7b3dSmrg#define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) 271428d7b3dSmrg#define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) 272428d7b3dSmrg#define GEN6_TD_VF_VS_EMSK 0x8008 273428d7b3dSmrg#define GEN6_TD_GS_EMSK 0x800c 274428d7b3dSmrg#define GEN6_TD_CLIP_EMSK 0x8010 275428d7b3dSmrg#define GEN6_TD_SF_EMSK 0x8014 276428d7b3dSmrg#define GEN6_TD_WIZ_EMSK 0x8018 277428d7b3dSmrg#define GEN6_TD_0_6_EHTRG_VAL 0x801c 278428d7b3dSmrg#define GEN6_TD_0_7_EHTRG_VAL 0x8020 279428d7b3dSmrg#define GEN6_TD_0_6_EHTRG_MSK 0x8024 280428d7b3dSmrg#define GEN6_TD_0_7_EHTRG_MSK 0x8028 281428d7b3dSmrg#define GEN6_TD_RDATA 0x802c 282428d7b3dSmrg#define GEN6_TD_TS_EMSK 0x8030 283428d7b3dSmrg 284428d7b3dSmrg#define GEN6_EU_CTL 0x8800 285428d7b3dSmrg#define GEN6_EU_CTL_SELECT_SHIFT 16 286428d7b3dSmrg#define GEN6_EU_CTL_DATA_MUX_SHIFT 8 287428d7b3dSmrg#define GEN6_EU_ATT_0 0x8810 288428d7b3dSmrg#define GEN6_EU_ATT_1 0x8814 289428d7b3dSmrg#define GEN6_EU_ATT_DATA_0 0x8820 290428d7b3dSmrg#define GEN6_EU_ATT_DATA_1 0x8824 291428d7b3dSmrg#define GEN6_EU_ATT_CLR_0 0x8830 292428d7b3dSmrg#define GEN6_EU_ATT_CLR_1 0x8834 293428d7b3dSmrg#define GEN6_EU_RDATA 0x8840 294428d7b3dSmrg 295428d7b3dSmrg#define GEN6_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ 296428d7b3dSmrg ((Pipeline) << 27) | \ 297428d7b3dSmrg ((Opcode) << 24) | \ 298428d7b3dSmrg ((Subopcode) << 16)) 299428d7b3dSmrg 300428d7b3dSmrg#define GEN6_STATE_BASE_ADDRESS GEN6_3D(0, 1, 1) 301428d7b3dSmrg#define GEN6_STATE_SIP GEN6_3D(0, 1, 2) 302428d7b3dSmrg 303428d7b3dSmrg#define GEN6_PIPELINE_SELECT GEN6_3D(1, 1, 4) 304428d7b3dSmrg 305428d7b3dSmrg#define GEN6_MEDIA_STATE_POINTERS GEN6_3D(2, 0, 0) 306428d7b3dSmrg#define GEN6_MEDIA_OBJECT GEN6_3D(2, 1, 0) 307428d7b3dSmrg 308428d7b3dSmrg#define GEN6_3DSTATE_BINDING_TABLE_POINTERS GEN6_3D(3, 0, 1) 309428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ 310428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ 311428d7b3dSmrg# define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ 312428d7b3dSmrg 313428d7b3dSmrg#define GEN6_3DSTATE_VERTEX_BUFFERS GEN6_3D(3, 0, 8) 314428d7b3dSmrg#define GEN6_3DSTATE_VERTEX_ELEMENTS GEN6_3D(3, 0, 9) 315428d7b3dSmrg#define GEN6_3DSTATE_INDEX_BUFFER GEN6_3D(3, 0, 0xa) 316428d7b3dSmrg#define GEN6_3DSTATE_VF_STATISTICS GEN6_3D(3, 0, 0xb) 317428d7b3dSmrg 318428d7b3dSmrg#define GEN6_3DSTATE_DRAWING_RECTANGLE GEN6_3D(3, 1, 0) 319428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_COLOR GEN6_3D(3, 1, 1) 320428d7b3dSmrg#define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD GEN6_3D(3, 1, 2) 321428d7b3dSmrg#define GEN6_3DSTATE_CHROMA_KEY GEN6_3D(3, 1, 4) 322428d7b3dSmrg#define GEN6_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 1, 5) 323428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 324428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 325428d7b3dSmrg 326428d7b3dSmrg#define GEN6_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 6) 327428d7b3dSmrg#define GEN6_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 7) 328428d7b3dSmrg#define GEN6_3DSTATE_LINE_STIPPLE GEN6_3D(3, 1, 8) 329428d7b3dSmrg#define GEN6_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN6_3D(3, 1, 9) 330428d7b3dSmrg/* These two are BLC and CTG only, not BW or CL */ 331428d7b3dSmrg#define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) 332428d7b3dSmrg#define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) 333428d7b3dSmrg 334428d7b3dSmrg#define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) 335428d7b3dSmrg 336428d7b3dSmrg#define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) 337428d7b3dSmrg/* DW1 */ 338428d7b3dSmrg# define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) 339428d7b3dSmrg 340428d7b3dSmrg/* for GEN6+ */ 341428d7b3dSmrg#define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) 342428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) 343428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) 344428d7b3dSmrg# define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) 345428d7b3dSmrg 346428d7b3dSmrg#define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) 347428d7b3dSmrg/* DW1 */ 348428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 349428d7b3dSmrg# define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 350428d7b3dSmrg/* DW2 */ 351428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 352428d7b3dSmrg# define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 353428d7b3dSmrg 354428d7b3dSmrg#define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) 355428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) 356428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) 357428d7b3dSmrg# define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) 358428d7b3dSmrg 359428d7b3dSmrg#define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) 360428d7b3dSmrg 361428d7b3dSmrg#define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) 362428d7b3dSmrg 363428d7b3dSmrg#define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) 364428d7b3dSmrg/* DW4 */ 365428d7b3dSmrg# define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 366428d7b3dSmrg 367428d7b3dSmrg#define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) 368428d7b3dSmrg 369428d7b3dSmrg#define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) 370428d7b3dSmrg/* DW1 */ 371428d7b3dSmrg# define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 372428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 373428d7b3dSmrg# define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 374428d7b3dSmrg/* DW2 */ 375428d7b3dSmrg/* DW3 */ 376428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) 377428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) 378428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) 379428d7b3dSmrg# define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) 380428d7b3dSmrg/* DW4 */ 381428d7b3dSmrg# define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 382428d7b3dSmrg# define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 383428d7b3dSmrg# define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 384428d7b3dSmrg 385428d7b3dSmrg 386428d7b3dSmrg#define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) 387428d7b3dSmrg/* DW2 */ 388428d7b3dSmrg# define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 389428d7b3dSmrg# define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 390428d7b3dSmrg/* DW4 */ 391428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 392428d7b3dSmrg/* DW5 */ 393428d7b3dSmrg# define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 394428d7b3dSmrg# define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) 395428d7b3dSmrg# define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) 396428d7b3dSmrg# define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) 397428d7b3dSmrg/* DW6 */ 398428d7b3dSmrg# define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 399428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) 400428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) 401428d7b3dSmrg# define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) 402428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) 403428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) 404428d7b3dSmrg# define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) 405428d7b3dSmrg 406428d7b3dSmrg 407428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) 408428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) 409428d7b3dSmrg#define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) 410428d7b3dSmrg 411428d7b3dSmrg#define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) 412428d7b3dSmrg 413428d7b3dSmrg#define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) 414428d7b3dSmrg/* DW1 */ 415428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) 416428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) 417428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) 418428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) 419428d7b3dSmrg# define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) 420428d7b3dSmrg 421428d7b3dSmrg#define PIPELINE_SELECT_3D 0 422428d7b3dSmrg#define PIPELINE_SELECT_MEDIA 1 423428d7b3dSmrg 424428d7b3dSmrg#define UF0_CS_REALLOC (1 << 13) 425428d7b3dSmrg#define UF0_VFE_REALLOC (1 << 12) 426428d7b3dSmrg#define UF0_SF_REALLOC (1 << 11) 427428d7b3dSmrg#define UF0_CLIP_REALLOC (1 << 10) 428428d7b3dSmrg#define UF0_GS_REALLOC (1 << 9) 429428d7b3dSmrg#define UF0_VS_REALLOC (1 << 8) 430428d7b3dSmrg#define UF1_CLIP_FENCE_SHIFT 20 431428d7b3dSmrg#define UF1_GS_FENCE_SHIFT 10 432428d7b3dSmrg#define UF1_VS_FENCE_SHIFT 0 433428d7b3dSmrg#define UF2_CS_FENCE_SHIFT 20 434428d7b3dSmrg#define UF2_VFE_FENCE_SHIFT 10 435428d7b3dSmrg#define UF2_SF_FENCE_SHIFT 0 436428d7b3dSmrg 437428d7b3dSmrg/* for GEN6_STATE_BASE_ADDRESS */ 438428d7b3dSmrg#define BASE_ADDRESS_MODIFY (1 << 0) 439428d7b3dSmrg 440428d7b3dSmrg/* for GEN6_3DSTATE_PIPELINED_POINTERS */ 441428d7b3dSmrg#define GEN6_GS_DISABLE 0 442428d7b3dSmrg#define GEN6_GS_ENABLE 1 443428d7b3dSmrg#define GEN6_CLIP_DISABLE 0 444428d7b3dSmrg#define GEN6_CLIP_ENABLE 1 445428d7b3dSmrg 446428d7b3dSmrg/* for GEN6_PIPE_CONTROL */ 447428d7b3dSmrg#define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0) 448428d7b3dSmrg#define GEN6_PIPE_CONTROL_CS_STALL (1 << 20) 449428d7b3dSmrg#define GEN6_PIPE_CONTROL_NOWRITE (0 << 14) 450428d7b3dSmrg#define GEN6_PIPE_CONTROL_WRITE_QWORD (1 << 14) 451428d7b3dSmrg#define GEN6_PIPE_CONTROL_WRITE_DEPTH (2 << 14) 452428d7b3dSmrg#define GEN6_PIPE_CONTROL_WRITE_TIME (3 << 14) 453428d7b3dSmrg#define GEN6_PIPE_CONTROL_DEPTH_STALL (1 << 13) 454428d7b3dSmrg#define GEN6_PIPE_CONTROL_WC_FLUSH (1 << 12) 455428d7b3dSmrg#define GEN6_PIPE_CONTROL_IS_FLUSH (1 << 11) 456428d7b3dSmrg#define GEN6_PIPE_CONTROL_TC_FLUSH (1 << 10) 457428d7b3dSmrg#define GEN6_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) 458428d7b3dSmrg#define GEN6_PIPE_CONTROL_GLOBAL_GTT (1 << 2) 459428d7b3dSmrg#define GEN6_PIPE_CONTROL_LOCAL_PGTT (0 << 2) 460428d7b3dSmrg#define GEN6_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) 461428d7b3dSmrg#define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) 462428d7b3dSmrg 463428d7b3dSmrg/* 3DPRIMITIVE bits */ 464428d7b3dSmrg#define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) 465428d7b3dSmrg#define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) 466428d7b3dSmrg/* Primitive types are in gen6_defines.h */ 467428d7b3dSmrg#define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 468428d7b3dSmrg 469428d7b3dSmrg#define GEN6_SVG_CTL 0x7400 470428d7b3dSmrg 471428d7b3dSmrg#define GEN6_SVG_CTL_GS_BA (0 << 8) 472428d7b3dSmrg#define GEN6_SVG_CTL_SS_BA (1 << 8) 473428d7b3dSmrg#define GEN6_SVG_CTL_IO_BA (2 << 8) 474428d7b3dSmrg#define GEN6_SVG_CTL_GS_AUB (3 << 8) 475428d7b3dSmrg#define GEN6_SVG_CTL_IO_AUB (4 << 8) 476428d7b3dSmrg#define GEN6_SVG_CTL_SIP (5 << 8) 477428d7b3dSmrg 478428d7b3dSmrg#define GEN6_SVG_RDATA 0x7404 479428d7b3dSmrg#define GEN6_SVG_WORK_CTL 0x7408 480428d7b3dSmrg 481428d7b3dSmrg#define GEN6_VF_CTL 0x7500 482428d7b3dSmrg 483428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) 484428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) 485428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) 486428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) 487428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) 488428d7b3dSmrg#define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) 489428d7b3dSmrg#define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) 490428d7b3dSmrg#define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) 491428d7b3dSmrg#define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) 492428d7b3dSmrg 493428d7b3dSmrg#define GEN6_VF_STRG_VAL 0x7504 494428d7b3dSmrg#define GEN6_VF_STR_VL_OVR 0x7508 495428d7b3dSmrg#define GEN6_VF_VC_OVR 0x750c 496428d7b3dSmrg#define GEN6_VF_STR_PSKIP 0x7510 497428d7b3dSmrg#define GEN6_VF_MAX_PRIM 0x7514 498428d7b3dSmrg#define GEN6_VF_RDATA 0x7518 499428d7b3dSmrg 500428d7b3dSmrg#define GEN6_VS_CTL 0x7600 501428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) 502428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) 503428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) 504428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) 505428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) 506428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 507428d7b3dSmrg#define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 508428d7b3dSmrg#define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) 509428d7b3dSmrg 510428d7b3dSmrg#define GEN6_VS_STRG_VAL 0x7604 511428d7b3dSmrg#define GEN6_VS_RDATA 0x7608 512428d7b3dSmrg 513428d7b3dSmrg#define GEN6_SF_CTL 0x7b00 514428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) 515428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) 516428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) 517428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) 518428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) 519428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) 520428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) 521428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) 522428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) 523428d7b3dSmrg#define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) 524428d7b3dSmrg#define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) 525428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 526428d7b3dSmrg#define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 527428d7b3dSmrg#define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) 528428d7b3dSmrg 529428d7b3dSmrg#define GEN6_SF_STRG_VAL 0x7b04 530428d7b3dSmrg#define GEN6_SF_RDATA 0x7b18 531428d7b3dSmrg 532428d7b3dSmrg#define GEN6_WIZ_CTL 0x7c00 533428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) 534428d7b3dSmrg#define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 535428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) 536428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) 537428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) 538428d7b3dSmrg#define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) 539428d7b3dSmrg#define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) 540428d7b3dSmrg#define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) 541428d7b3dSmrg#define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) 542428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 543428d7b3dSmrg#define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 544428d7b3dSmrg#define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) 545428d7b3dSmrg 546428d7b3dSmrg#define GEN6_WIZ_STRG_VAL 0x7c04 547428d7b3dSmrg#define GEN6_WIZ_RDATA 0x7c18 548428d7b3dSmrg 549428d7b3dSmrg#define GEN6_TS_CTL 0x7e00 550428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) 551428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) 552428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) 553428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) 554428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) 555428d7b3dSmrg#define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) 556428d7b3dSmrg 557428d7b3dSmrg#define GEN6_TS_STRG_VAL 0x7e04 558428d7b3dSmrg#define GEN6_TS_RDATA 0x7e08 559428d7b3dSmrg 560428d7b3dSmrg#define GEN6_TD_CTL 0x8000 561428d7b3dSmrg#define GEN6_TD_CTL_MUX_SHIFT 8 562428d7b3dSmrg#define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) 563428d7b3dSmrg#define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) 564428d7b3dSmrg#define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) 565428d7b3dSmrg#define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) 566428d7b3dSmrg#define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) 567428d7b3dSmrg#define GEN6_TD_CTL2 0x8004 568428d7b3dSmrg#define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) 569428d7b3dSmrg#define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) 570428d7b3dSmrg#define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) 571428d7b3dSmrg#define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 572428d7b3dSmrg#define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) 573428d7b3dSmrg#define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) 574428d7b3dSmrg#define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) 575428d7b3dSmrg#define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) 576428d7b3dSmrg#define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) 577428d7b3dSmrg#define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) 578428d7b3dSmrg#define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) 579428d7b3dSmrg#define GEN6_TD_VF_VS_EMSK 0x8008 580428d7b3dSmrg#define GEN6_TD_GS_EMSK 0x800c 581428d7b3dSmrg#define GEN6_TD_CLIP_EMSK 0x8010 582428d7b3dSmrg#define GEN6_TD_SF_EMSK 0x8014 583428d7b3dSmrg#define GEN6_TD_WIZ_EMSK 0x8018 584428d7b3dSmrg#define GEN6_TD_0_6_EHTRG_VAL 0x801c 585428d7b3dSmrg#define GEN6_TD_0_7_EHTRG_VAL 0x8020 586428d7b3dSmrg#define GEN6_TD_0_6_EHTRG_MSK 0x8024 587428d7b3dSmrg#define GEN6_TD_0_7_EHTRG_MSK 0x8028 588428d7b3dSmrg#define GEN6_TD_RDATA 0x802c 589428d7b3dSmrg#define GEN6_TD_TS_EMSK 0x8030 590428d7b3dSmrg 591428d7b3dSmrg#define GEN6_EU_CTL 0x8800 592428d7b3dSmrg#define GEN6_EU_CTL_SELECT_SHIFT 16 593428d7b3dSmrg#define GEN6_EU_CTL_DATA_MUX_SHIFT 8 594428d7b3dSmrg#define GEN6_EU_ATT_0 0x8810 595428d7b3dSmrg#define GEN6_EU_ATT_1 0x8814 596428d7b3dSmrg#define GEN6_EU_ATT_DATA_0 0x8820 597428d7b3dSmrg#define GEN6_EU_ATT_DATA_1 0x8824 598428d7b3dSmrg#define GEN6_EU_ATT_CLR_0 0x8830 599428d7b3dSmrg#define GEN6_EU_ATT_CLR_1 0x8834 600428d7b3dSmrg#define GEN6_EU_RDATA 0x8840 601428d7b3dSmrg 602428d7b3dSmrg/* 3D state: 603428d7b3dSmrg */ 604428d7b3dSmrg#define _3DOP_3DSTATE_PIPELINED 0x0 605428d7b3dSmrg#define _3DOP_3DSTATE_NONPIPELINED 0x1 606428d7b3dSmrg#define _3DOP_3DCONTROL 0x2 607428d7b3dSmrg#define _3DOP_3DPRIMITIVE 0x3 608428d7b3dSmrg 609428d7b3dSmrg#define _3DSTATE_PIPELINED_POINTERS 0x00 610428d7b3dSmrg#define _3DSTATE_BINDING_TABLE_POINTERS 0x01 611428d7b3dSmrg#define _3DSTATE_VERTEX_BUFFERS 0x08 612428d7b3dSmrg#define _3DSTATE_VERTEX_ELEMENTS 0x09 613428d7b3dSmrg#define _3DSTATE_INDEX_BUFFER 0x0A 614428d7b3dSmrg#define _3DSTATE_VF_STATISTICS 0x0B 615428d7b3dSmrg#define _3DSTATE_DRAWING_RECTANGLE 0x00 616428d7b3dSmrg#define _3DSTATE_CONSTANT_COLOR 0x01 617428d7b3dSmrg#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 618428d7b3dSmrg#define _3DSTATE_CHROMA_KEY 0x04 619428d7b3dSmrg#define _3DSTATE_DEPTH_BUFFER 0x05 620428d7b3dSmrg#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 621428d7b3dSmrg#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 622428d7b3dSmrg#define _3DSTATE_LINE_STIPPLE 0x08 623428d7b3dSmrg#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 624428d7b3dSmrg#define _3DCONTROL 0x00 625428d7b3dSmrg#define _3DPRIMITIVE 0x00 626428d7b3dSmrg 627428d7b3dSmrg#define _3DPRIM_POINTLIST 0x01 628428d7b3dSmrg#define _3DPRIM_LINELIST 0x02 629428d7b3dSmrg#define _3DPRIM_LINESTRIP 0x03 630428d7b3dSmrg#define _3DPRIM_TRILIST 0x04 631428d7b3dSmrg#define _3DPRIM_TRISTRIP 0x05 632428d7b3dSmrg#define _3DPRIM_TRIFAN 0x06 633428d7b3dSmrg#define _3DPRIM_QUADLIST 0x07 634428d7b3dSmrg#define _3DPRIM_QUADSTRIP 0x08 635428d7b3dSmrg#define _3DPRIM_LINELIST_ADJ 0x09 636428d7b3dSmrg#define _3DPRIM_LINESTRIP_ADJ 0x0A 637428d7b3dSmrg#define _3DPRIM_TRILIST_ADJ 0x0B 638428d7b3dSmrg#define _3DPRIM_TRISTRIP_ADJ 0x0C 639428d7b3dSmrg#define _3DPRIM_TRISTRIP_REVERSE 0x0D 640428d7b3dSmrg#define _3DPRIM_POLYGON 0x0E 641428d7b3dSmrg#define _3DPRIM_RECTLIST 0x0F 642428d7b3dSmrg#define _3DPRIM_LINELOOP 0x10 643428d7b3dSmrg#define _3DPRIM_POINTLIST_BF 0x11 644428d7b3dSmrg#define _3DPRIM_LINESTRIP_CONT 0x12 645428d7b3dSmrg#define _3DPRIM_LINESTRIP_BF 0x13 646428d7b3dSmrg#define _3DPRIM_LINESTRIP_CONT_BF 0x14 647428d7b3dSmrg#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 648428d7b3dSmrg 649428d7b3dSmrg#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 650428d7b3dSmrg#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 651428d7b3dSmrg 652428d7b3dSmrg#define GEN6_ANISORATIO_2 0 653428d7b3dSmrg#define GEN6_ANISORATIO_4 1 654428d7b3dSmrg#define GEN6_ANISORATIO_6 2 655428d7b3dSmrg#define GEN6_ANISORATIO_8 3 656428d7b3dSmrg#define GEN6_ANISORATIO_10 4 657428d7b3dSmrg#define GEN6_ANISORATIO_12 5 658428d7b3dSmrg#define GEN6_ANISORATIO_14 6 659428d7b3dSmrg#define GEN6_ANISORATIO_16 7 660428d7b3dSmrg 661428d7b3dSmrg#define GEN6_BLENDFACTOR_ONE 0x1 662428d7b3dSmrg#define GEN6_BLENDFACTOR_SRC_COLOR 0x2 663428d7b3dSmrg#define GEN6_BLENDFACTOR_SRC_ALPHA 0x3 664428d7b3dSmrg#define GEN6_BLENDFACTOR_DST_ALPHA 0x4 665428d7b3dSmrg#define GEN6_BLENDFACTOR_DST_COLOR 0x5 666428d7b3dSmrg#define GEN6_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 667428d7b3dSmrg#define GEN6_BLENDFACTOR_CONST_COLOR 0x7 668428d7b3dSmrg#define GEN6_BLENDFACTOR_CONST_ALPHA 0x8 669428d7b3dSmrg#define GEN6_BLENDFACTOR_SRC1_COLOR 0x9 670428d7b3dSmrg#define GEN6_BLENDFACTOR_SRC1_ALPHA 0x0A 671428d7b3dSmrg#define GEN6_BLENDFACTOR_ZERO 0x11 672428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_SRC_COLOR 0x12 673428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_SRC_ALPHA 0x13 674428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_DST_ALPHA 0x14 675428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_DST_COLOR 0x15 676428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_CONST_COLOR 0x17 677428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_CONST_ALPHA 0x18 678428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_SRC1_COLOR 0x19 679428d7b3dSmrg#define GEN6_BLENDFACTOR_INV_SRC1_ALPHA 0x1A 680428d7b3dSmrg 681428d7b3dSmrg#define GEN6_BLENDFUNCTION_ADD 0 682428d7b3dSmrg#define GEN6_BLENDFUNCTION_SUBTRACT 1 683428d7b3dSmrg#define GEN6_BLENDFUNCTION_REVERSE_SUBTRACT 2 684428d7b3dSmrg#define GEN6_BLENDFUNCTION_MIN 3 685428d7b3dSmrg#define GEN6_BLENDFUNCTION_MAX 4 686428d7b3dSmrg 687428d7b3dSmrg#define GEN6_ALPHATEST_FORMAT_UNORM8 0 688428d7b3dSmrg#define GEN6_ALPHATEST_FORMAT_FLOAT32 1 689428d7b3dSmrg 690428d7b3dSmrg#define GEN6_CHROMAKEY_KILL_ON_ANY_MATCH 0 691428d7b3dSmrg#define GEN6_CHROMAKEY_REPLACE_BLACK 1 692428d7b3dSmrg 693428d7b3dSmrg#define GEN6_CLIP_API_OGL 0 694428d7b3dSmrg#define GEN6_CLIP_API_DX 1 695428d7b3dSmrg 696428d7b3dSmrg#define GEN6_CLIPMODE_NORMAL 0 697428d7b3dSmrg#define GEN6_CLIPMODE_CLIP_ALL 1 698428d7b3dSmrg#define GEN6_CLIPMODE_CLIP_NON_REJECTED 2 699428d7b3dSmrg#define GEN6_CLIPMODE_REJECT_ALL 3 700428d7b3dSmrg#define GEN6_CLIPMODE_ACCEPT_ALL 4 701428d7b3dSmrg 702428d7b3dSmrg#define GEN6_CLIP_NDCSPACE 0 703428d7b3dSmrg#define GEN6_CLIP_SCREENSPACE 1 704428d7b3dSmrg 705428d7b3dSmrg#define GEN6_COMPAREFUNCTION_ALWAYS 0 706428d7b3dSmrg#define GEN6_COMPAREFUNCTION_NEVER 1 707428d7b3dSmrg#define GEN6_COMPAREFUNCTION_LESS 2 708428d7b3dSmrg#define GEN6_COMPAREFUNCTION_EQUAL 3 709428d7b3dSmrg#define GEN6_COMPAREFUNCTION_LEQUAL 4 710428d7b3dSmrg#define GEN6_COMPAREFUNCTION_GREATER 5 711428d7b3dSmrg#define GEN6_COMPAREFUNCTION_NOTEQUAL 6 712428d7b3dSmrg#define GEN6_COMPAREFUNCTION_GEQUAL 7 713428d7b3dSmrg 714428d7b3dSmrg#define GEN6_COVERAGE_PIXELS_HALF 0 715428d7b3dSmrg#define GEN6_COVERAGE_PIXELS_1 1 716428d7b3dSmrg#define GEN6_COVERAGE_PIXELS_2 2 717428d7b3dSmrg#define GEN6_COVERAGE_PIXELS_4 3 718428d7b3dSmrg 719428d7b3dSmrg#define GEN6_CULLMODE_BOTH 0 720428d7b3dSmrg#define GEN6_CULLMODE_NONE 1 721428d7b3dSmrg#define GEN6_CULLMODE_FRONT 2 722428d7b3dSmrg#define GEN6_CULLMODE_BACK 3 723428d7b3dSmrg 724428d7b3dSmrg#define GEN6_DEFAULTCOLOR_R8G8B8A8_UNORM 0 725428d7b3dSmrg#define GEN6_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 726428d7b3dSmrg 727428d7b3dSmrg#define GEN6_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 728428d7b3dSmrg#define GEN6_DEPTHFORMAT_D32_FLOAT 1 729428d7b3dSmrg#define GEN6_DEPTHFORMAT_D24_UNORM_S8_UINT 2 730428d7b3dSmrg#define GEN6_DEPTHFORMAT_D16_UNORM 5 731428d7b3dSmrg 732428d7b3dSmrg#define GEN6_FLOATING_POINT_IEEE_754 0 733428d7b3dSmrg#define GEN6_FLOATING_POINT_NON_IEEE_754 1 734428d7b3dSmrg 735428d7b3dSmrg#define GEN6_FRONTWINDING_CW 0 736428d7b3dSmrg#define GEN6_FRONTWINDING_CCW 1 737428d7b3dSmrg 738428d7b3dSmrg#define GEN6_INDEX_BYTE 0 739428d7b3dSmrg#define GEN6_INDEX_WORD 1 740428d7b3dSmrg#define GEN6_INDEX_DWORD 2 741428d7b3dSmrg 742428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_CLEAR 0 743428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_NOR 1 744428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_AND_INVERTED 2 745428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_COPY_INVERTED 3 746428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_AND_REVERSE 4 747428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_INVERT 5 748428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_XOR 6 749428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_NAND 7 750428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_AND 8 751428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_EQUIV 9 752428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_NOOP 10 753428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_OR_INVERTED 11 754428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_COPY 12 755428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_OR_REVERSE 13 756428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_OR 14 757428d7b3dSmrg#define GEN6_LOGICOPFUNCTION_SET 15 758428d7b3dSmrg 759428d7b3dSmrg#define GEN6_MAPFILTER_NEAREST 0x0 760428d7b3dSmrg#define GEN6_MAPFILTER_LINEAR 0x1 761428d7b3dSmrg#define GEN6_MAPFILTER_ANISOTROPIC 0x2 762428d7b3dSmrg 763428d7b3dSmrg#define GEN6_MIPFILTER_NONE 0 764428d7b3dSmrg#define GEN6_MIPFILTER_NEAREST 1 765428d7b3dSmrg#define GEN6_MIPFILTER_LINEAR 3 766428d7b3dSmrg 767428d7b3dSmrg#define GEN6_POLYGON_FRONT_FACING 0 768428d7b3dSmrg#define GEN6_POLYGON_BACK_FACING 1 769428d7b3dSmrg 770428d7b3dSmrg#define GEN6_PREFILTER_ALWAYS 0x0 771428d7b3dSmrg#define GEN6_PREFILTER_NEVER 0x1 772428d7b3dSmrg#define GEN6_PREFILTER_LESS 0x2 773428d7b3dSmrg#define GEN6_PREFILTER_EQUAL 0x3 774428d7b3dSmrg#define GEN6_PREFILTER_LEQUAL 0x4 775428d7b3dSmrg#define GEN6_PREFILTER_GREATER 0x5 776428d7b3dSmrg#define GEN6_PREFILTER_NOTEQUAL 0x6 777428d7b3dSmrg#define GEN6_PREFILTER_GEQUAL 0x7 778428d7b3dSmrg 779428d7b3dSmrg#define GEN6_PROVOKING_VERTEX_0 0 780428d7b3dSmrg#define GEN6_PROVOKING_VERTEX_1 1 781428d7b3dSmrg#define GEN6_PROVOKING_VERTEX_2 2 782428d7b3dSmrg 783428d7b3dSmrg#define GEN6_RASTRULE_UPPER_LEFT 0 784428d7b3dSmrg#define GEN6_RASTRULE_UPPER_RIGHT 1 785428d7b3dSmrg 786428d7b3dSmrg#define GEN6_RENDERTARGET_CLAMPRANGE_UNORM 0 787428d7b3dSmrg#define GEN6_RENDERTARGET_CLAMPRANGE_SNORM 1 788428d7b3dSmrg#define GEN6_RENDERTARGET_CLAMPRANGE_FORMAT 2 789428d7b3dSmrg 790428d7b3dSmrg#define GEN6_STENCILOP_KEEP 0 791428d7b3dSmrg#define GEN6_STENCILOP_ZERO 1 792428d7b3dSmrg#define GEN6_STENCILOP_REPLACE 2 793428d7b3dSmrg#define GEN6_STENCILOP_INCRSAT 3 794428d7b3dSmrg#define GEN6_STENCILOP_DECRSAT 4 795428d7b3dSmrg#define GEN6_STENCILOP_INCR 5 796428d7b3dSmrg#define GEN6_STENCILOP_DECR 6 797428d7b3dSmrg#define GEN6_STENCILOP_INVERT 7 798428d7b3dSmrg 799428d7b3dSmrg#define GEN6_SURFACE_MIPMAPLAYOUT_BELOW 0 800428d7b3dSmrg#define GEN6_SURFACE_MIPMAPLAYOUT_RIGHT 1 801428d7b3dSmrg 802428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 803428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_SINT 0x001 804428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_UINT 0x002 805428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 806428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 807428d7b3dSmrg#define GEN6_SURFACEFORMAT_R64G64_FLOAT 0x005 808428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 809428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 810428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 811428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_FLOAT 0x040 812428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_SINT 0x041 813428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_UINT 0x042 814428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_UNORM 0x043 815428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_SNORM 0x044 816428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_SSCALED 0x045 817428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32B32_USCALED 0x046 818428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 819428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 820428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_SINT 0x082 821428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_UINT 0x083 822428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 823428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_FLOAT 0x085 824428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_SINT 0x086 825428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_UINT 0x087 826428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 827428d7b3dSmrg#define GEN6_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 828428d7b3dSmrg#define GEN6_SURFACEFORMAT_L32A32_FLOAT 0x08A 829428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_UNORM 0x08B 830428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_SNORM 0x08C 831428d7b3dSmrg#define GEN6_SURFACEFORMAT_R64_FLOAT 0x08D 832428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E 833428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F 834428d7b3dSmrg#define GEN6_SURFACEFORMAT_A32X32_FLOAT 0x090 835428d7b3dSmrg#define GEN6_SURFACEFORMAT_L32X32_FLOAT 0x091 836428d7b3dSmrg#define GEN6_SURFACEFORMAT_I32X32_FLOAT 0x092 837428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 838428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 839428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_SSCALED 0x095 840428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32G32_USCALED 0x096 841428d7b3dSmrg#define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 842428d7b3dSmrg#define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 843428d7b3dSmrg#define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 844428d7b3dSmrg#define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 845428d7b3dSmrg#define GEN6_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 846428d7b3dSmrg#define GEN6_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 847428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 848428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 849428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 850428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA 851428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB 852428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_UNORM 0x0CC 853428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_SNORM 0x0CD 854428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_SINT 0x0CE 855428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_UINT 0x0CF 856428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_FLOAT 0x0D0 857428d7b3dSmrg#define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 858428d7b3dSmrg#define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 859428d7b3dSmrg#define GEN6_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 860428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_SINT 0x0D6 861428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_UINT 0x0D7 862428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_FLOAT 0x0D8 863428d7b3dSmrg#define GEN6_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 864428d7b3dSmrg#define GEN6_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA 865428d7b3dSmrg#define GEN6_SURFACEFORMAT_L16A16_UNORM 0x0DF 866428d7b3dSmrg#define GEN6_SURFACEFORMAT_I24X8_UNORM 0x0E0 867428d7b3dSmrg#define GEN6_SURFACEFORMAT_L24X8_UNORM 0x0E1 868428d7b3dSmrg#define GEN6_SURFACEFORMAT_A24X8_UNORM 0x0E2 869428d7b3dSmrg#define GEN6_SURFACEFORMAT_I32_FLOAT 0x0E3 870428d7b3dSmrg#define GEN6_SURFACEFORMAT_L32_FLOAT 0x0E4 871428d7b3dSmrg#define GEN6_SURFACEFORMAT_A32_FLOAT 0x0E5 872428d7b3dSmrg#define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 873428d7b3dSmrg#define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA 874428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB 875428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC 876428d7b3dSmrg#define GEN6_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED 877428d7b3dSmrg#define GEN6_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE 878428d7b3dSmrg#define GEN6_SURFACEFORMAT_L16A16_FLOAT 0x0F0 879428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_UNORM 0x0F1 880428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_SNORM 0x0F2 881428d7b3dSmrg#define GEN6_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 882428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 883428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 884428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_SSCALED 0x0F6 885428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16_USCALED 0x0F7 886428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_SSCALED 0x0F8 887428d7b3dSmrg#define GEN6_SURFACEFORMAT_R32_USCALED 0x0F9 888428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G6R5_UNORM 0x100 889428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 890428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 891428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 892428d7b3dSmrg#define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 893428d7b3dSmrg#define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 894428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_UNORM 0x106 895428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_SNORM 0x107 896428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_SINT 0x108 897428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_UINT 0x109 898428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_UNORM 0x10A 899428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_SNORM 0x10B 900428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_SINT 0x10C 901428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_UINT 0x10D 902428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_FLOAT 0x10E 903428d7b3dSmrg#define GEN6_SURFACEFORMAT_I16_UNORM 0x111 904428d7b3dSmrg#define GEN6_SURFACEFORMAT_L16_UNORM 0x112 905428d7b3dSmrg#define GEN6_SURFACEFORMAT_A16_UNORM 0x113 906428d7b3dSmrg#define GEN6_SURFACEFORMAT_L8A8_UNORM 0x114 907428d7b3dSmrg#define GEN6_SURFACEFORMAT_I16_FLOAT 0x115 908428d7b3dSmrg#define GEN6_SURFACEFORMAT_L16_FLOAT 0x116 909428d7b3dSmrg#define GEN6_SURFACEFORMAT_A16_FLOAT 0x117 910428d7b3dSmrg#define GEN6_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 911428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A 912428d7b3dSmrg#define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B 913428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_SSCALED 0x11C 914428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8_USCALED 0x11D 915428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_SSCALED 0x11E 916428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16_USCALED 0x11F 917428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_UNORM 0x140 918428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_SNORM 0x141 919428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_SINT 0x142 920428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_UINT 0x143 921428d7b3dSmrg#define GEN6_SURFACEFORMAT_A8_UNORM 0x144 922428d7b3dSmrg#define GEN6_SURFACEFORMAT_I8_UNORM 0x145 923428d7b3dSmrg#define GEN6_SURFACEFORMAT_L8_UNORM 0x146 924428d7b3dSmrg#define GEN6_SURFACEFORMAT_P4A4_UNORM 0x147 925428d7b3dSmrg#define GEN6_SURFACEFORMAT_A4P4_UNORM 0x148 926428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_SSCALED 0x149 927428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8_USCALED 0x14A 928428d7b3dSmrg#define GEN6_SURFACEFORMAT_R1_UINT 0x181 929428d7b3dSmrg#define GEN6_SURFACEFORMAT_YCRCB_NORMAL 0x182 930428d7b3dSmrg#define GEN6_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 931428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC1_UNORM 0x186 932428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC2_UNORM 0x187 933428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC3_UNORM 0x188 934428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC4_UNORM 0x189 935428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC5_UNORM 0x18A 936428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B 937428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C 938428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D 939428d7b3dSmrg#define GEN6_SURFACEFORMAT_MONO8 0x18E 940428d7b3dSmrg#define GEN6_SURFACEFORMAT_YCRCB_SWAPUV 0x18F 941428d7b3dSmrg#define GEN6_SURFACEFORMAT_YCRCB_SWAPY 0x190 942428d7b3dSmrg#define GEN6_SURFACEFORMAT_DXT1_RGB 0x191 943428d7b3dSmrg#define GEN6_SURFACEFORMAT_FXT1 0x192 944428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8_UNORM 0x193 945428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8_SNORM 0x194 946428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8_SSCALED 0x195 947428d7b3dSmrg#define GEN6_SURFACEFORMAT_R8G8B8_USCALED 0x196 948428d7b3dSmrg#define GEN6_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 949428d7b3dSmrg#define GEN6_SURFACEFORMAT_R64G64B64_FLOAT 0x198 950428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC4_SNORM 0x199 951428d7b3dSmrg#define GEN6_SURFACEFORMAT_BC5_SNORM 0x19A 952428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16_UNORM 0x19C 953428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16_SNORM 0x19D 954428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16_SSCALED 0x19E 955428d7b3dSmrg#define GEN6_SURFACEFORMAT_R16G16B16_USCALED 0x19F 956428d7b3dSmrg 957428d7b3dSmrg#define GEN6_SURFACERETURNFORMAT_FLOAT32 0 958428d7b3dSmrg#define GEN6_SURFACERETURNFORMAT_S1 1 959428d7b3dSmrg 960428d7b3dSmrg#define GEN6_SURFACE_1D 0 961428d7b3dSmrg#define GEN6_SURFACE_2D 1 962428d7b3dSmrg#define GEN6_SURFACE_3D 2 963428d7b3dSmrg#define GEN6_SURFACE_CUBE 3 964428d7b3dSmrg#define GEN6_SURFACE_BUFFER 4 965428d7b3dSmrg#define GEN6_SURFACE_NULL 7 966428d7b3dSmrg 967428d7b3dSmrg#define GEN6_BORDER_COLOR_MODE_DEFAULT 0 968428d7b3dSmrg#define GEN6_BORDER_COLOR_MODE_LEGACY 1 969428d7b3dSmrg 970428d7b3dSmrg#define GEN6_TEXCOORDMODE_WRAP 0 971428d7b3dSmrg#define GEN6_TEXCOORDMODE_MIRROR 1 972428d7b3dSmrg#define GEN6_TEXCOORDMODE_CLAMP 2 973428d7b3dSmrg#define GEN6_TEXCOORDMODE_CUBE 3 974428d7b3dSmrg#define GEN6_TEXCOORDMODE_CLAMP_BORDER 4 975428d7b3dSmrg#define GEN6_TEXCOORDMODE_MIRROR_ONCE 5 976428d7b3dSmrg 977428d7b3dSmrg#define GEN6_THREAD_PRIORITY_NORMAL 0 978428d7b3dSmrg#define GEN6_THREAD_PRIORITY_HIGH 1 979428d7b3dSmrg 980428d7b3dSmrg#define GEN6_TILEWALK_XMAJOR 0 981428d7b3dSmrg#define GEN6_TILEWALK_YMAJOR 1 982428d7b3dSmrg 983428d7b3dSmrg#define GEN6_VERTEX_SUBPIXEL_PRECISION_8BITS 0 984428d7b3dSmrg#define GEN6_VERTEX_SUBPIXEL_PRECISION_4BITS 1 985428d7b3dSmrg 986428d7b3dSmrg#define GEN6_VERTEXBUFFER_ACCESS_VERTEXDATA 0 987428d7b3dSmrg#define GEN6_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 988428d7b3dSmrg 989428d7b3dSmrg#define GEN6_VFCOMPONENT_NOSTORE 0 990428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_SRC 1 991428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_0 2 992428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_1_FLT 3 993428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_1_INT 4 994428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_VID 5 995428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_IID 6 996428d7b3dSmrg#define GEN6_VFCOMPONENT_STORE_PID 7 997428d7b3dSmrg 998428d7b3dSmrg 999428d7b3dSmrg 1000428d7b3dSmrg/* Execution Unit (EU) defines 1001428d7b3dSmrg */ 1002428d7b3dSmrg 1003428d7b3dSmrg#define GEN6_ALIGN_1 0 1004428d7b3dSmrg#define GEN6_ALIGN_16 1 1005428d7b3dSmrg 1006428d7b3dSmrg#define GEN6_ADDRESS_DIRECT 0 1007428d7b3dSmrg#define GEN6_ADDRESS_REGISTER_INDIRECT_REGISTER 1 1008428d7b3dSmrg 1009428d7b3dSmrg#define GEN6_CHANNEL_X 0 1010428d7b3dSmrg#define GEN6_CHANNEL_Y 1 1011428d7b3dSmrg#define GEN6_CHANNEL_Z 2 1012428d7b3dSmrg#define GEN6_CHANNEL_W 3 1013428d7b3dSmrg 1014428d7b3dSmrg#define GEN6_COMPRESSION_NONE 0 1015428d7b3dSmrg#define GEN6_COMPRESSION_2NDHALF 1 1016428d7b3dSmrg#define GEN6_COMPRESSION_COMPRESSED 2 1017428d7b3dSmrg 1018428d7b3dSmrg#define GEN6_CONDITIONAL_NONE 0 1019428d7b3dSmrg#define GEN6_CONDITIONAL_Z 1 1020428d7b3dSmrg#define GEN6_CONDITIONAL_NZ 2 1021428d7b3dSmrg#define GEN6_CONDITIONAL_EQ 1 /* Z */ 1022428d7b3dSmrg#define GEN6_CONDITIONAL_NEQ 2 /* NZ */ 1023428d7b3dSmrg#define GEN6_CONDITIONAL_G 3 1024428d7b3dSmrg#define GEN6_CONDITIONAL_GE 4 1025428d7b3dSmrg#define GEN6_CONDITIONAL_L 5 1026428d7b3dSmrg#define GEN6_CONDITIONAL_LE 6 1027428d7b3dSmrg#define GEN6_CONDITIONAL_C 7 1028428d7b3dSmrg#define GEN6_CONDITIONAL_O 8 1029428d7b3dSmrg 1030428d7b3dSmrg#define GEN6_DEBUG_NONE 0 1031428d7b3dSmrg#define GEN6_DEBUG_BREAKPOINT 1 1032428d7b3dSmrg 1033428d7b3dSmrg#define GEN6_DEPENDENCY_NORMAL 0 1034428d7b3dSmrg#define GEN6_DEPENDENCY_NOTCLEARED 1 1035428d7b3dSmrg#define GEN6_DEPENDENCY_NOTCHECKED 2 1036428d7b3dSmrg#define GEN6_DEPENDENCY_DISABLE 3 1037428d7b3dSmrg 1038428d7b3dSmrg#define GEN6_EXECUTE_1 0 1039428d7b3dSmrg#define GEN6_EXECUTE_2 1 1040428d7b3dSmrg#define GEN6_EXECUTE_4 2 1041428d7b3dSmrg#define GEN6_EXECUTE_8 3 1042428d7b3dSmrg#define GEN6_EXECUTE_16 4 1043428d7b3dSmrg#define GEN6_EXECUTE_32 5 1044428d7b3dSmrg 1045428d7b3dSmrg#define GEN6_HORIZONTAL_STRIDE_0 0 1046428d7b3dSmrg#define GEN6_HORIZONTAL_STRIDE_1 1 1047428d7b3dSmrg#define GEN6_HORIZONTAL_STRIDE_2 2 1048428d7b3dSmrg#define GEN6_HORIZONTAL_STRIDE_4 3 1049428d7b3dSmrg 1050428d7b3dSmrg#define GEN6_INSTRUCTION_NORMAL 0 1051428d7b3dSmrg#define GEN6_INSTRUCTION_SATURATE 1 1052428d7b3dSmrg 1053428d7b3dSmrg#define GEN6_MASK_ENABLE 0 1054428d7b3dSmrg#define GEN6_MASK_DISABLE 1 1055428d7b3dSmrg 1056428d7b3dSmrg#define GEN6_OPCODE_MOV 1 1057428d7b3dSmrg#define GEN6_OPCODE_SEL 2 1058428d7b3dSmrg#define GEN6_OPCODE_NOT 4 1059428d7b3dSmrg#define GEN6_OPCODE_AND 5 1060428d7b3dSmrg#define GEN6_OPCODE_OR 6 1061428d7b3dSmrg#define GEN6_OPCODE_XOR 7 1062428d7b3dSmrg#define GEN6_OPCODE_SHR 8 1063428d7b3dSmrg#define GEN6_OPCODE_SHL 9 1064428d7b3dSmrg#define GEN6_OPCODE_RSR 10 1065428d7b3dSmrg#define GEN6_OPCODE_RSL 11 1066428d7b3dSmrg#define GEN6_OPCODE_ASR 12 1067428d7b3dSmrg#define GEN6_OPCODE_CMP 16 1068428d7b3dSmrg#define GEN6_OPCODE_JMPI 32 1069428d7b3dSmrg#define GEN6_OPCODE_IF 34 1070428d7b3dSmrg#define GEN6_OPCODE_IFF 35 1071428d7b3dSmrg#define GEN6_OPCODE_ELSE 36 1072428d7b3dSmrg#define GEN6_OPCODE_ENDIF 37 1073428d7b3dSmrg#define GEN6_OPCODE_DO 38 1074428d7b3dSmrg#define GEN6_OPCODE_WHILE 39 1075428d7b3dSmrg#define GEN6_OPCODE_BREAK 40 1076428d7b3dSmrg#define GEN6_OPCODE_CONTINUE 41 1077428d7b3dSmrg#define GEN6_OPCODE_HALT 42 1078428d7b3dSmrg#define GEN6_OPCODE_MSAVE 44 1079428d7b3dSmrg#define GEN6_OPCODE_MRESTORE 45 1080428d7b3dSmrg#define GEN6_OPCODE_PUSH 46 1081428d7b3dSmrg#define GEN6_OPCODE_POP 47 1082428d7b3dSmrg#define GEN6_OPCODE_WAIT 48 1083428d7b3dSmrg#define GEN6_OPCODE_SEND 49 1084428d7b3dSmrg#define GEN6_OPCODE_ADD 64 1085428d7b3dSmrg#define GEN6_OPCODE_MUL 65 1086428d7b3dSmrg#define GEN6_OPCODE_AVG 66 1087428d7b3dSmrg#define GEN6_OPCODE_FRC 67 1088428d7b3dSmrg#define GEN6_OPCODE_RNDU 68 1089428d7b3dSmrg#define GEN6_OPCODE_RNDD 69 1090428d7b3dSmrg#define GEN6_OPCODE_RNDE 70 1091428d7b3dSmrg#define GEN6_OPCODE_RNDZ 71 1092428d7b3dSmrg#define GEN6_OPCODE_MAC 72 1093428d7b3dSmrg#define GEN6_OPCODE_MACH 73 1094428d7b3dSmrg#define GEN6_OPCODE_LZD 74 1095428d7b3dSmrg#define GEN6_OPCODE_SAD2 80 1096428d7b3dSmrg#define GEN6_OPCODE_SADA2 81 1097428d7b3dSmrg#define GEN6_OPCODE_DP4 84 1098428d7b3dSmrg#define GEN6_OPCODE_DPH 85 1099428d7b3dSmrg#define GEN6_OPCODE_DP3 86 1100428d7b3dSmrg#define GEN6_OPCODE_DP2 87 1101428d7b3dSmrg#define GEN6_OPCODE_DPA2 88 1102428d7b3dSmrg#define GEN6_OPCODE_LINE 89 1103428d7b3dSmrg#define GEN6_OPCODE_NOP 126 1104428d7b3dSmrg 1105428d7b3dSmrg#define GEN6_PREDICATE_NONE 0 1106428d7b3dSmrg#define GEN6_PREDICATE_NORMAL 1 1107428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ANYV 2 1108428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ALLV 3 1109428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ANY2H 4 1110428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ALL2H 5 1111428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ANY4H 6 1112428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ALL4H 7 1113428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ANY8H 8 1114428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ALL8H 9 1115428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ANY16H 10 1116428d7b3dSmrg#define GEN6_PREDICATE_ALIGN1_ALL16H 11 1117428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_REPLICATE_X 2 1118428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_REPLICATE_Y 3 1119428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_REPLICATE_Z 4 1120428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_REPLICATE_W 5 1121428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_ANY4H 6 1122428d7b3dSmrg#define GEN6_PREDICATE_ALIGN16_ALL4H 7 1123428d7b3dSmrg 1124428d7b3dSmrg#define GEN6_ARCHITECTURE_REGISTER_FILE 0 1125428d7b3dSmrg#define GEN6_GENERAL_REGISTER_FILE 1 1126428d7b3dSmrg#define GEN6_MESSAGE_REGISTER_FILE 2 1127428d7b3dSmrg#define GEN6_IMMEDIATE_VALUE 3 1128428d7b3dSmrg 1129428d7b3dSmrg#define GEN6_REGISTER_TYPE_UD 0 1130428d7b3dSmrg#define GEN6_REGISTER_TYPE_D 1 1131428d7b3dSmrg#define GEN6_REGISTER_TYPE_UW 2 1132428d7b3dSmrg#define GEN6_REGISTER_TYPE_W 3 1133428d7b3dSmrg#define GEN6_REGISTER_TYPE_UB 4 1134428d7b3dSmrg#define GEN6_REGISTER_TYPE_B 5 1135428d7b3dSmrg#define GEN6_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ 1136428d7b3dSmrg#define GEN6_REGISTER_TYPE_HF 6 1137428d7b3dSmrg#define GEN6_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ 1138428d7b3dSmrg#define GEN6_REGISTER_TYPE_F 7 1139428d7b3dSmrg 1140428d7b3dSmrg#define GEN6_ARF_NULL 0x00 1141428d7b3dSmrg#define GEN6_ARF_ADDRESS 0x10 1142428d7b3dSmrg#define GEN6_ARF_ACCUMULATOR 0x20 1143428d7b3dSmrg#define GEN6_ARF_FLAG 0x30 1144428d7b3dSmrg#define GEN6_ARF_MASK 0x40 1145428d7b3dSmrg#define GEN6_ARF_MASK_STACK 0x50 1146428d7b3dSmrg#define GEN6_ARF_MASK_STACK_DEPTH 0x60 1147428d7b3dSmrg#define GEN6_ARF_STATE 0x70 1148428d7b3dSmrg#define GEN6_ARF_CONTROL 0x80 1149428d7b3dSmrg#define GEN6_ARF_NOTIFICATION_COUNT 0x90 1150428d7b3dSmrg#define GEN6_ARF_IP 0xA0 1151428d7b3dSmrg 1152428d7b3dSmrg#define GEN6_AMASK 0 1153428d7b3dSmrg#define GEN6_IMASK 1 1154428d7b3dSmrg#define GEN6_LMASK 2 1155428d7b3dSmrg#define GEN6_CMASK 3 1156428d7b3dSmrg 1157428d7b3dSmrg 1158428d7b3dSmrg 1159428d7b3dSmrg#define GEN6_THREAD_NORMAL 0 1160428d7b3dSmrg#define GEN6_THREAD_ATOMIC 1 1161428d7b3dSmrg#define GEN6_THREAD_SWITCH 2 1162428d7b3dSmrg 1163428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_0 0 1164428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_1 1 1165428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_2 2 1166428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_4 3 1167428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_8 4 1168428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_16 5 1169428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_32 6 1170428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_64 7 1171428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_128 8 1172428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_256 9 1173428d7b3dSmrg#define GEN6_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF 1174428d7b3dSmrg 1175428d7b3dSmrg#define GEN6_WIDTH_1 0 1176428d7b3dSmrg#define GEN6_WIDTH_2 1 1177428d7b3dSmrg#define GEN6_WIDTH_4 2 1178428d7b3dSmrg#define GEN6_WIDTH_8 3 1179428d7b3dSmrg#define GEN6_WIDTH_16 4 1180428d7b3dSmrg 1181428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_1K 0 1182428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_2K 1 1183428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_4K 2 1184428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_8K 3 1185428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_16K 4 1186428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_32K 5 1187428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_64K 6 1188428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_128K 7 1189428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_256K 8 1190428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_512K 9 1191428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_1M 10 1192428d7b3dSmrg#define GEN6_STATELESS_BUFFER_BOUNDARY_2M 11 1193428d7b3dSmrg 1194428d7b3dSmrg#define GEN6_POLYGON_FACING_FRONT 0 1195428d7b3dSmrg#define GEN6_POLYGON_FACING_BACK 1 1196428d7b3dSmrg 1197428d7b3dSmrg#define GEN6_MESSAGE_TARGET_NULL 0 1198428d7b3dSmrg#define GEN6_MESSAGE_TARGET_MATH 1 1199428d7b3dSmrg#define GEN6_MESSAGE_TARGET_SAMPLER 2 1200428d7b3dSmrg#define GEN6_MESSAGE_TARGET_GATEWAY 3 1201428d7b3dSmrg#define GEN6_MESSAGE_TARGET_DATAPORT_READ 4 1202428d7b3dSmrg#define GEN6_MESSAGE_TARGET_DATAPORT_WRITE 5 1203428d7b3dSmrg#define GEN6_MESSAGE_TARGET_URB 6 1204428d7b3dSmrg#define GEN6_MESSAGE_TARGET_THREAD_SPAWNER 7 1205428d7b3dSmrg 1206428d7b3dSmrg#define GEN6_SAMPLER_RETURN_FORMAT_FLOAT32 0 1207428d7b3dSmrg#define GEN6_SAMPLER_RETURN_FORMAT_UINT32 2 1208428d7b3dSmrg#define GEN6_SAMPLER_RETURN_FORMAT_SINT32 3 1209428d7b3dSmrg 1210428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 1211428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 1212428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 1213428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 1214428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 1215428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 1216428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 1217428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 1218428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 1219428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 1220428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 1221428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD8_RESINFO 2 1222428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_RESINFO 2 1223428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD4X2_LD 3 1224428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD8_LD 3 1225428d7b3dSmrg#define GEN6_SAMPLER_MESSAGE_SIMD16_LD 3 1226428d7b3dSmrg 1227428d7b3dSmrg#define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 1228428d7b3dSmrg#define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 1229428d7b3dSmrg#define GEN6_DATAPORT_OWORD_BLOCK_2_OWORDS 2 1230428d7b3dSmrg#define GEN6_DATAPORT_OWORD_BLOCK_4_OWORDS 3 1231428d7b3dSmrg#define GEN6_DATAPORT_OWORD_BLOCK_8_OWORDS 4 1232428d7b3dSmrg 1233428d7b3dSmrg#define GEN6_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 1234428d7b3dSmrg#define GEN6_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 1235428d7b3dSmrg 1236428d7b3dSmrg#define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 1237428d7b3dSmrg#define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 1238428d7b3dSmrg 1239428d7b3dSmrg#define GEN6_DATAPORT_READ_TARGET_DATA_CACHE 0 1240428d7b3dSmrg#define GEN6_DATAPORT_READ_TARGET_RENDER_CACHE 1 1241428d7b3dSmrg#define GEN6_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 1242428d7b3dSmrg 1243428d7b3dSmrg#define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 1244428d7b3dSmrg#define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 1245428d7b3dSmrg#define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 1246428d7b3dSmrg#define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 1247428d7b3dSmrg#define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 1248428d7b3dSmrg 1249428d7b3dSmrg#define GEN6_MATH_INTEGER_UNSIGNED 0 1250428d7b3dSmrg#define GEN6_MATH_INTEGER_SIGNED 1 1251428d7b3dSmrg 1252428d7b3dSmrg#define GEN6_MATH_PRECISION_FULL 0 1253428d7b3dSmrg#define GEN6_MATH_PRECISION_PARTIAL 1 1254428d7b3dSmrg 1255428d7b3dSmrg#define GEN6_MATH_SATURATE_NONE 0 1256428d7b3dSmrg#define GEN6_MATH_SATURATE_SATURATE 1 1257428d7b3dSmrg 1258428d7b3dSmrg#define GEN6_MATH_DATA_VECTOR 0 1259428d7b3dSmrg#define GEN6_MATH_DATA_SCALAR 1 1260428d7b3dSmrg 1261428d7b3dSmrg#define GEN6_URB_OPCODE_WRITE 0 1262428d7b3dSmrg 1263428d7b3dSmrg#define GEN6_URB_SWIZZLE_NONE 0 1264428d7b3dSmrg#define GEN6_URB_SWIZZLE_INTERLEAVE 1 1265428d7b3dSmrg#define GEN6_URB_SWIZZLE_TRANSPOSE 2 1266428d7b3dSmrg 1267428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_1K 0 1268428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_2K 1 1269428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_4K 2 1270428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_8K 3 1271428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_16K 4 1272428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_32K 5 1273428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_64K 6 1274428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_128K 7 1275428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_256K 8 1276428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_512K 9 1277428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_1M 10 1278428d7b3dSmrg#define GEN6_SCRATCH_SPACE_SIZE_2M 11 1279428d7b3dSmrg 1280428d7b3dSmrg/* The hardware supports two different modes for border color. The 1281428d7b3dSmrg * default (OpenGL) mode uses floating-point color channels, while the 1282428d7b3dSmrg * legacy mode uses 4 bytes. 1283428d7b3dSmrg * 1284428d7b3dSmrg * More significantly, the legacy mode respects the components of the 1285428d7b3dSmrg * border color for channels not present in the source, (whereas the 1286428d7b3dSmrg * default mode will ignore the border color's alpha channel and use 1287428d7b3dSmrg * alpha==1 for an RGB source, for example). 1288428d7b3dSmrg * 1289428d7b3dSmrg * The legacy mode matches the semantics specified by the Render 1290428d7b3dSmrg * extension. 1291428d7b3dSmrg */ 1292428d7b3dSmrgstruct gen6_sampler_default_border_color { 1293428d7b3dSmrg float color[4]; 1294428d7b3dSmrg}; 1295428d7b3dSmrg 1296428d7b3dSmrgstruct gen6_sampler_legacy_border_color { 1297428d7b3dSmrg uint8_t color[4]; 1298428d7b3dSmrg}; 1299428d7b3dSmrg 1300428d7b3dSmrgstruct gen6_sampler_state { 1301428d7b3dSmrg struct { 1302428d7b3dSmrg uint32_t shadow_function:3; 1303428d7b3dSmrg uint32_t lod_bias:11; 1304428d7b3dSmrg uint32_t min_filter:3; 1305428d7b3dSmrg uint32_t mag_filter:3; 1306428d7b3dSmrg uint32_t mip_filter:2; 1307428d7b3dSmrg uint32_t base_level:5; 1308428d7b3dSmrg uint32_t pad:1; 1309428d7b3dSmrg uint32_t lod_preclamp:1; 1310428d7b3dSmrg uint32_t border_color_mode:1; 1311428d7b3dSmrg uint32_t pad0:1; 1312428d7b3dSmrg uint32_t disable:1; 1313428d7b3dSmrg } ss0; 1314428d7b3dSmrg 1315428d7b3dSmrg struct { 1316428d7b3dSmrg uint32_t r_wrap_mode:3; 1317428d7b3dSmrg uint32_t t_wrap_mode:3; 1318428d7b3dSmrg uint32_t s_wrap_mode:3; 1319428d7b3dSmrg uint32_t pad:3; 1320428d7b3dSmrg uint32_t max_lod:10; 1321428d7b3dSmrg uint32_t min_lod:10; 1322428d7b3dSmrg } ss1; 1323428d7b3dSmrg 1324428d7b3dSmrg struct { 1325428d7b3dSmrg uint32_t border_color; 1326428d7b3dSmrg } ss2; 1327428d7b3dSmrg 1328428d7b3dSmrg struct { 1329428d7b3dSmrg uint32_t non_normalized_coord:1; 1330428d7b3dSmrg uint32_t pad:12; 1331428d7b3dSmrg uint32_t address_round:6; 1332428d7b3dSmrg uint32_t max_aniso:3; 1333428d7b3dSmrg uint32_t chroma_key_mode:1; 1334428d7b3dSmrg uint32_t chroma_key_index:2; 1335428d7b3dSmrg uint32_t chroma_key_enable:1; 1336428d7b3dSmrg uint32_t monochrome_filter_width:3; 1337428d7b3dSmrg uint32_t monochrome_filter_height:3; 1338428d7b3dSmrg } ss3; 1339428d7b3dSmrg}; 1340428d7b3dSmrg 1341428d7b3dSmrgstruct gen6_blend_state { 1342428d7b3dSmrg struct { 1343428d7b3dSmrg uint32_t dest_blend_factor:5; 1344428d7b3dSmrg uint32_t source_blend_factor:5; 1345428d7b3dSmrg uint32_t pad3:1; 1346428d7b3dSmrg uint32_t blend_func:3; 1347428d7b3dSmrg uint32_t pad2:1; 1348428d7b3dSmrg uint32_t ia_dest_blend_factor:5; 1349428d7b3dSmrg uint32_t ia_source_blend_factor:5; 1350428d7b3dSmrg uint32_t pad1:1; 1351428d7b3dSmrg uint32_t ia_blend_func:3; 1352428d7b3dSmrg uint32_t pad0:1; 1353428d7b3dSmrg uint32_t ia_blend_enable:1; 1354428d7b3dSmrg uint32_t blend_enable:1; 1355428d7b3dSmrg } blend0; 1356428d7b3dSmrg 1357428d7b3dSmrg struct { 1358428d7b3dSmrg uint32_t post_blend_clamp_enable:1; 1359428d7b3dSmrg uint32_t pre_blend_clamp_enable:1; 1360428d7b3dSmrg uint32_t clamp_range:2; 1361428d7b3dSmrg uint32_t pad0:4; 1362428d7b3dSmrg uint32_t x_dither_offset:2; 1363428d7b3dSmrg uint32_t y_dither_offset:2; 1364428d7b3dSmrg uint32_t dither_enable:1; 1365428d7b3dSmrg uint32_t alpha_test_func:3; 1366428d7b3dSmrg uint32_t alpha_test_enable:1; 1367428d7b3dSmrg uint32_t pad1:1; 1368428d7b3dSmrg uint32_t logic_op_func:4; 1369428d7b3dSmrg uint32_t logic_op_enable:1; 1370428d7b3dSmrg uint32_t pad2:1; 1371428d7b3dSmrg uint32_t write_disable_b:1; 1372428d7b3dSmrg uint32_t write_disable_g:1; 1373428d7b3dSmrg uint32_t write_disable_r:1; 1374428d7b3dSmrg uint32_t write_disable_a:1; 1375428d7b3dSmrg uint32_t pad3:1; 1376428d7b3dSmrg uint32_t alpha_to_coverage_dither:1; 1377428d7b3dSmrg uint32_t alpha_to_one:1; 1378428d7b3dSmrg uint32_t alpha_to_coverage:1; 1379428d7b3dSmrg } blend1; 1380428d7b3dSmrg}; 1381428d7b3dSmrg 1382428d7b3dSmrgstruct gen6_color_calc_state { 1383428d7b3dSmrg struct { 1384428d7b3dSmrg uint32_t alpha_test_format:1; 1385428d7b3dSmrg uint32_t pad0:14; 1386428d7b3dSmrg uint32_t round_disable:1; 1387428d7b3dSmrg uint32_t bf_stencil_ref:8; 1388428d7b3dSmrg uint32_t stencil_ref:8; 1389428d7b3dSmrg } cc0; 1390428d7b3dSmrg 1391428d7b3dSmrg union { 1392428d7b3dSmrg float alpha_ref_f; 1393428d7b3dSmrg struct { 1394428d7b3dSmrg uint32_t ui:8; 1395428d7b3dSmrg uint32_t pad0:24; 1396428d7b3dSmrg } alpha_ref_fi; 1397428d7b3dSmrg } cc1; 1398428d7b3dSmrg 1399428d7b3dSmrg float constant_r; 1400428d7b3dSmrg float constant_g; 1401428d7b3dSmrg float constant_b; 1402428d7b3dSmrg float constant_a; 1403428d7b3dSmrg}; 1404428d7b3dSmrg 1405428d7b3dSmrgstruct gen6_depth_stencil_state { 1406428d7b3dSmrg struct { 1407428d7b3dSmrg uint32_t pad0:3; 1408428d7b3dSmrg uint32_t bf_stencil_pass_depth_pass_op:3; 1409428d7b3dSmrg uint32_t bf_stencil_pass_depth_fail_op:3; 1410428d7b3dSmrg uint32_t bf_stencil_fail_op:3; 1411428d7b3dSmrg uint32_t bf_stencil_func:3; 1412428d7b3dSmrg uint32_t bf_stencil_enable:1; 1413428d7b3dSmrg uint32_t pad1:2; 1414428d7b3dSmrg uint32_t stencil_write_enable:1; 1415428d7b3dSmrg uint32_t stencil_pass_depth_pass_op:3; 1416428d7b3dSmrg uint32_t stencil_pass_depth_fail_op:3; 1417428d7b3dSmrg uint32_t stencil_fail_op:3; 1418428d7b3dSmrg uint32_t stencil_func:3; 1419428d7b3dSmrg uint32_t stencil_enable:1; 1420428d7b3dSmrg } ds0; 1421428d7b3dSmrg 1422428d7b3dSmrg struct { 1423428d7b3dSmrg uint32_t bf_stencil_write_mask:8; 1424428d7b3dSmrg uint32_t bf_stencil_test_mask:8; 1425428d7b3dSmrg uint32_t stencil_write_mask:8; 1426428d7b3dSmrg uint32_t stencil_test_mask:8; 1427428d7b3dSmrg } ds1; 1428428d7b3dSmrg 1429428d7b3dSmrg struct { 1430428d7b3dSmrg uint32_t pad0:26; 1431428d7b3dSmrg uint32_t depth_write_enable:1; 1432428d7b3dSmrg uint32_t depth_test_func:3; 1433428d7b3dSmrg uint32_t pad1:1; 1434428d7b3dSmrg uint32_t depth_test_enable:1; 1435428d7b3dSmrg } ds2; 1436428d7b3dSmrg}; 1437428d7b3dSmrg 1438428d7b3dSmrgstruct gen6_surface_state { 1439428d7b3dSmrg struct { 1440428d7b3dSmrg uint32_t cube_pos_z:1; 1441428d7b3dSmrg uint32_t cube_neg_z:1; 1442428d7b3dSmrg uint32_t cube_pos_y:1; 1443428d7b3dSmrg uint32_t cube_neg_y:1; 1444428d7b3dSmrg uint32_t cube_pos_x:1; 1445428d7b3dSmrg uint32_t cube_neg_x:1; 1446428d7b3dSmrg uint32_t pad:3; 1447428d7b3dSmrg uint32_t render_cache_read_mode:1; 1448428d7b3dSmrg uint32_t mipmap_layout_mode:1; 1449428d7b3dSmrg uint32_t vert_line_stride_ofs:1; 1450428d7b3dSmrg uint32_t vert_line_stride:1; 1451428d7b3dSmrg uint32_t color_blend:1; 1452428d7b3dSmrg uint32_t writedisable_blue:1; 1453428d7b3dSmrg uint32_t writedisable_green:1; 1454428d7b3dSmrg uint32_t writedisable_red:1; 1455428d7b3dSmrg uint32_t writedisable_alpha:1; 1456428d7b3dSmrg uint32_t surface_format:9; 1457428d7b3dSmrg uint32_t data_return_format:1; 1458428d7b3dSmrg uint32_t pad0:1; 1459428d7b3dSmrg uint32_t surface_type:3; 1460428d7b3dSmrg } ss0; 1461428d7b3dSmrg 1462428d7b3dSmrg struct { 1463428d7b3dSmrg uint32_t base_addr; 1464428d7b3dSmrg } ss1; 1465428d7b3dSmrg 1466428d7b3dSmrg struct { 1467428d7b3dSmrg uint32_t render_target_rotation:2; 1468428d7b3dSmrg uint32_t mip_count:4; 1469428d7b3dSmrg uint32_t width:13; 1470428d7b3dSmrg uint32_t height:13; 1471428d7b3dSmrg } ss2; 1472428d7b3dSmrg 1473428d7b3dSmrg struct { 1474428d7b3dSmrg uint32_t tile_walk:1; 1475428d7b3dSmrg uint32_t tiled_surface:1; 1476428d7b3dSmrg uint32_t pad:1; 1477428d7b3dSmrg uint32_t pitch:18; 1478428d7b3dSmrg uint32_t depth:11; 1479428d7b3dSmrg } ss3; 1480428d7b3dSmrg 1481428d7b3dSmrg struct { 1482428d7b3dSmrg uint32_t pad:19; 1483428d7b3dSmrg uint32_t min_array_elt:9; 1484428d7b3dSmrg uint32_t min_lod:4; 1485428d7b3dSmrg } ss4; 1486428d7b3dSmrg 1487428d7b3dSmrg struct { 1488428d7b3dSmrg uint32_t pad:20; 1489428d7b3dSmrg uint32_t y_offset:4; 1490428d7b3dSmrg uint32_t pad2:1; 1491428d7b3dSmrg uint32_t x_offset:7; 1492428d7b3dSmrg } ss5; 1493428d7b3dSmrg}; 1494428d7b3dSmrg 1495428d7b3dSmrg/* Surface state DW0 */ 1496428d7b3dSmrg#define GEN6_SURFACE_RC_READ_WRITE (1 << 8) 1497428d7b3dSmrg#define GEN6_SURFACE_MIPLAYOUT_SHIFT 10 1498428d7b3dSmrg#define GEN6_SURFACE_MIPMAPLAYOUT_BELOW 0 1499428d7b3dSmrg#define GEN6_SURFACE_MIPMAPLAYOUT_RIGHT 1 1500428d7b3dSmrg#define GEN6_SURFACE_CUBEFACE_ENABLES 0x3f 1501428d7b3dSmrg#define GEN6_SURFACE_BLEND_ENABLED (1 << 13) 1502428d7b3dSmrg#define GEN6_SURFACE_WRITEDISABLE_B_SHIFT 14 1503428d7b3dSmrg#define GEN6_SURFACE_WRITEDISABLE_G_SHIFT 15 1504428d7b3dSmrg#define GEN6_SURFACE_WRITEDISABLE_R_SHIFT 16 1505428d7b3dSmrg#define GEN6_SURFACE_WRITEDISABLE_A_SHIFT 17 1506428d7b3dSmrg#define GEN6_SURFACE_FORMAT_SHIFT 18 1507428d7b3dSmrg#define GEN6_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) 1508428d7b3dSmrg 1509428d7b3dSmrg#define GEN6_SURFACE_TYPE_SHIFT 29 1510428d7b3dSmrg#define GEN6_SURFACE_TYPE_MASK GEN6_MASK(31, 29) 1511428d7b3dSmrg#define GEN6_SURFACE_1D 0 1512428d7b3dSmrg#define GEN6_SURFACE_2D 1 1513428d7b3dSmrg#define GEN6_SURFACE_3D 2 1514428d7b3dSmrg#define GEN6_SURFACE_CUBE 3 1515428d7b3dSmrg#define GEN6_SURFACE_BUFFER 4 1516428d7b3dSmrg#define GEN6_SURFACE_NULL 7 1517428d7b3dSmrg 1518428d7b3dSmrg/* Surface state DW2 */ 1519428d7b3dSmrg#define GEN6_SURFACE_HEIGHT_SHIFT 19 1520428d7b3dSmrg#define GEN6_SURFACE_HEIGHT_MASK GEN6_MASK(31, 19) 1521428d7b3dSmrg#define GEN6_SURFACE_WIDTH_SHIFT 6 1522428d7b3dSmrg#define GEN6_SURFACE_WIDTH_MASK GEN6_MASK(18, 6) 1523428d7b3dSmrg#define GEN6_SURFACE_LOD_SHIFT 2 1524428d7b3dSmrg#define GEN6_SURFACE_LOD_MASK GEN6_MASK(5, 2) 1525428d7b3dSmrg 1526428d7b3dSmrg/* Surface state DW3 */ 1527428d7b3dSmrg#define GEN6_SURFACE_DEPTH_SHIFT 21 1528428d7b3dSmrg#define GEN6_SURFACE_DEPTH_MASK GEN6_MASK(31, 21) 1529428d7b3dSmrg#define GEN6_SURFACE_PITCH_SHIFT 3 1530428d7b3dSmrg#define GEN6_SURFACE_PITCH_MASK GEN6_MASK(19, 3) 1531428d7b3dSmrg#define GEN6_SURFACE_TILED (1 << 1) 1532428d7b3dSmrg#define GEN6_SURFACE_TILED_Y (1 << 0) 1533428d7b3dSmrg 1534428d7b3dSmrg/* Surface state DW4 */ 1535428d7b3dSmrg#define GEN6_SURFACE_MIN_LOD_SHIFT 28 1536428d7b3dSmrg#define GEN6_SURFACE_MIN_LOD_MASK GEN6_MASK(31, 28) 1537428d7b3dSmrg 1538428d7b3dSmrg/* Surface state DW5 */ 1539428d7b3dSmrg#define GEN6_SURFACE_X_OFFSET_SHIFT 25 1540428d7b3dSmrg#define GEN6_SURFACE_X_OFFSET_MASK GEN6_MASK(31, 25) 1541428d7b3dSmrg#define GEN6_SURFACE_Y_OFFSET_SHIFT 20 1542428d7b3dSmrg#define GEN6_SURFACE_Y_OFFSET_MASK GEN6_MASK(23, 20) 1543428d7b3dSmrg 1544428d7b3dSmrgstruct gen6_cc_viewport { 1545428d7b3dSmrg float min_depth; 1546428d7b3dSmrg float max_depth; 1547428d7b3dSmrg}; 1548428d7b3dSmrg 1549428d7b3dSmrgtypedef enum { 1550428d7b3dSmrg SAMPLER_FILTER_NEAREST = 0, 1551428d7b3dSmrg SAMPLER_FILTER_BILINEAR, 1552428d7b3dSmrg FILTER_COUNT 1553428d7b3dSmrg} sampler_filter_t; 1554428d7b3dSmrg 1555428d7b3dSmrgtypedef enum { 1556428d7b3dSmrg SAMPLER_EXTEND_NONE = 0, 1557428d7b3dSmrg SAMPLER_EXTEND_REPEAT, 1558428d7b3dSmrg SAMPLER_EXTEND_PAD, 1559428d7b3dSmrg SAMPLER_EXTEND_REFLECT, 1560428d7b3dSmrg EXTEND_COUNT 1561428d7b3dSmrg} sampler_extend_t; 1562428d7b3dSmrg 1563428d7b3dSmrg#endif 1564