1428d7b3dSmrg#ifndef GEN7_RENDER_H 2428d7b3dSmrg#define GEN7_RENDER_H 3428d7b3dSmrg 4428d7b3dSmrg#define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) 5428d7b3dSmrg 6428d7b3dSmrg#define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ 7428d7b3dSmrg ((Pipeline) << 27) | \ 8428d7b3dSmrg ((Opcode) << 24) | \ 9428d7b3dSmrg ((Subopcode) << 16)) 10428d7b3dSmrg 11428d7b3dSmrg#define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1) 12428d7b3dSmrg#define GEN7_STATE_SIP GEN7_3D(0, 1, 2) 13428d7b3dSmrg 14428d7b3dSmrg#define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4) 15428d7b3dSmrg 16428d7b3dSmrg#define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0) 17428d7b3dSmrg#define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0) 18428d7b3dSmrg 19428d7b3dSmrg#define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8) 20428d7b3dSmrg#define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9) 21428d7b3dSmrg#define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa) 22428d7b3dSmrg#define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb) 23428d7b3dSmrg 24428d7b3dSmrg#define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0) 25428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1) 26428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2) 27428d7b3dSmrg#define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4) 28428d7b3dSmrg 29428d7b3dSmrg#define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6) 30428d7b3dSmrg#define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7) 31428d7b3dSmrg#define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8) 32428d7b3dSmrg#define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9) 33428d7b3dSmrg/* These two are BLC and CTG only, not BW or CL */ 34428d7b3dSmrg#define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa) 35428d7b3dSmrg#define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb) 36428d7b3dSmrg 37428d7b3dSmrg#define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0) 38428d7b3dSmrg 39428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02) 40428d7b3dSmrg# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) 41428d7b3dSmrg# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) 42428d7b3dSmrg# define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) 43428d7b3dSmrg 44428d7b3dSmrg#define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05) 45428d7b3dSmrg/* DW1 */ 46428d7b3dSmrg# define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16 47428d7b3dSmrg# define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0 48428d7b3dSmrg/* DW2 */ 49428d7b3dSmrg# define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8 50428d7b3dSmrg# define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0 51428d7b3dSmrg 52428d7b3dSmrg#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d) 53428d7b3dSmrg# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) 54428d7b3dSmrg# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) 55428d7b3dSmrg# define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) 56428d7b3dSmrg 57428d7b3dSmrg#define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e) 58428d7b3dSmrg 59428d7b3dSmrg#define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10) 60428d7b3dSmrg 61428d7b3dSmrg#define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11) 62428d7b3dSmrg/* DW4 */ 63428d7b3dSmrg# define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 64428d7b3dSmrg 65428d7b3dSmrg#define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12) 66428d7b3dSmrg 67428d7b3dSmrg#define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13) 68428d7b3dSmrg/* DW1 */ 69428d7b3dSmrg# define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 70428d7b3dSmrg# define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 71428d7b3dSmrg# define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 72428d7b3dSmrg/* DW2 */ 73428d7b3dSmrg/* DW3 */ 74428d7b3dSmrg# define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29) 75428d7b3dSmrg# define GEN7_3DSTATE_SF_CULL_NONE (1 << 29) 76428d7b3dSmrg# define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29) 77428d7b3dSmrg# define GEN7_3DSTATE_SF_CULL_BACK (3 << 29) 78428d7b3dSmrg/* DW4 */ 79428d7b3dSmrg# define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 80428d7b3dSmrg# define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 81428d7b3dSmrg# define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 82428d7b3dSmrg 83428d7b3dSmrg#define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14) 84428d7b3dSmrg/* DW1 */ 85428d7b3dSmrg# define GEN7_WM_STATISTICS_ENABLE (1 << 31) 86428d7b3dSmrg# define GEN7_WM_DEPTH_CLEAR (1 << 30) 87428d7b3dSmrg# define GEN7_WM_DISPATCH_ENABLE (1 << 29) 88428d7b3dSmrg# define GEN7_WM_DEPTH_RESOLVE (1 << 28) 89428d7b3dSmrg# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) 90428d7b3dSmrg# define GEN7_WM_KILL_ENABLE (1 << 25) 91428d7b3dSmrg# define GEN7_WM_PSCDEPTH_OFF (0 << 23) 92428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON (1 << 23) 93428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) 94428d7b3dSmrg# define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) 95428d7b3dSmrg# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) 96428d7b3dSmrg# define GEN7_WM_USES_SOURCE_W (1 << 19) 97428d7b3dSmrg# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) 98428d7b3dSmrg# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) 99428d7b3dSmrg# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) 100428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) 101428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) 102428d7b3dSmrg# define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) 103428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) 104428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) 105428d7b3dSmrg# define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) 106428d7b3dSmrg# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) 107428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) 108428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) 109428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) 110428d7b3dSmrg# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) 111428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) 112428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) 113428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) 114428d7b3dSmrg# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) 115428d7b3dSmrg# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) 116428d7b3dSmrg# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) 117428d7b3dSmrg# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) 118428d7b3dSmrg# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) 119428d7b3dSmrg# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) 120428d7b3dSmrg# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) 121428d7b3dSmrg# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) 122428d7b3dSmrg/* DW2 */ 123428d7b3dSmrg# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) 124428d7b3dSmrg 125428d7b3dSmrg 126428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15) 127428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16) 128428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17) 129428d7b3dSmrg 130428d7b3dSmrg#define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18) 131428d7b3dSmrg 132428d7b3dSmrg#define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d) 133428d7b3dSmrg/* DW1 */ 134428d7b3dSmrg# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) 135428d7b3dSmrg# define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) 136428d7b3dSmrg# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) 137428d7b3dSmrg# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) 138428d7b3dSmrg# define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) 139428d7b3dSmrg 140428d7b3dSmrg#define PIPELINE_SELECT_3D 0 141428d7b3dSmrg#define PIPELINE_SELECT_MEDIA 1 142428d7b3dSmrg 143428d7b3dSmrg/* for GEN7_STATE_BASE_ADDRESS */ 144428d7b3dSmrg#define BASE_ADDRESS_MODIFY (1 << 0) 145428d7b3dSmrg 146428d7b3dSmrg/* for GEN7_PIPE_CONTROL */ 147428d7b3dSmrg#define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) 148428d7b3dSmrg#define GEN7_PIPE_CONTROL_CS_STALL (1 << 20) 149428d7b3dSmrg#define GEN7_PIPE_CONTROL_NOWRITE (0 << 14) 150428d7b3dSmrg#define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14) 151428d7b3dSmrg#define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14) 152428d7b3dSmrg#define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14) 153428d7b3dSmrg#define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13) 154428d7b3dSmrg#define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12) 155428d7b3dSmrg#define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11) 156428d7b3dSmrg#define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10) 157428d7b3dSmrg#define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) 158428d7b3dSmrg#define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2) 159428d7b3dSmrg#define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2) 160428d7b3dSmrg#define GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) 161428d7b3dSmrg#define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) 162428d7b3dSmrg 163428d7b3dSmrg/* VERTEX_BUFFER_STATE Structure */ 164428d7b3dSmrg#define GEN7_VB0_BUFFER_INDEX_SHIFT 26 165428d7b3dSmrg#define GEN7_VB0_VERTEXDATA (0 << 20) 166428d7b3dSmrg#define GEN7_VB0_INSTANCEDATA (1 << 20) 167428d7b3dSmrg#define GEN7_VB0_BUFFER_PITCH_SHIFT 0 168428d7b3dSmrg#define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 << 14) 169428d7b3dSmrg 170428d7b3dSmrg/* VERTEX_ELEMENT_STATE Structure */ 171428d7b3dSmrg#define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 172428d7b3dSmrg#define GEN7_VE0_VALID (1 << 25) 173428d7b3dSmrg#define GEN7_VE0_FORMAT_SHIFT 16 174428d7b3dSmrg#define GEN7_VE0_OFFSET_SHIFT 0 175428d7b3dSmrg#define GEN7_VE1_VFCOMPONENT_0_SHIFT 28 176428d7b3dSmrg#define GEN7_VE1_VFCOMPONENT_1_SHIFT 24 177428d7b3dSmrg#define GEN7_VE1_VFCOMPONENT_2_SHIFT 20 178428d7b3dSmrg#define GEN7_VE1_VFCOMPONENT_3_SHIFT 16 179428d7b3dSmrg#define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 180428d7b3dSmrg 181428d7b3dSmrg/* 3DPRIMITIVE bits */ 182428d7b3dSmrg#define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) 183428d7b3dSmrg#define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) 184428d7b3dSmrg 185428d7b3dSmrg#define GEN7_SVG_CTL 0x7400 186428d7b3dSmrg 187428d7b3dSmrg#define GEN7_SVG_CTL_GS_BA (0 << 8) 188428d7b3dSmrg#define GEN7_SVG_CTL_SS_BA (1 << 8) 189428d7b3dSmrg#define GEN7_SVG_CTL_IO_BA (2 << 8) 190428d7b3dSmrg#define GEN7_SVG_CTL_GS_AUB (3 << 8) 191428d7b3dSmrg#define GEN7_SVG_CTL_IO_AUB (4 << 8) 192428d7b3dSmrg#define GEN7_SVG_CTL_SIP (5 << 8) 193428d7b3dSmrg 194428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) 195428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) 196428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) 197428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) 198428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) 199428d7b3dSmrg#define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) 200428d7b3dSmrg#define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) 201428d7b3dSmrg#define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) 202428d7b3dSmrg#define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0) 203428d7b3dSmrg 204428d7b3dSmrg#define GEN7_VF_STRG_VAL 0x7504 205428d7b3dSmrg#define GEN7_VF_STR_VL_OVR 0x7508 206428d7b3dSmrg#define GEN7_VF_VC_OVR 0x750c 207428d7b3dSmrg#define GEN7_VF_STR_PSKIP 0x7510 208428d7b3dSmrg#define GEN7_VF_MAX_PRIM 0x7514 209428d7b3dSmrg#define GEN7_VF_RDATA 0x7518 210428d7b3dSmrg 211428d7b3dSmrg#define GEN7_VS_CTL 0x7600 212428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) 213428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) 214428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) 215428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) 216428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) 217428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 218428d7b3dSmrg#define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 219428d7b3dSmrg#define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0) 220428d7b3dSmrg 221428d7b3dSmrg#define GEN7_VS_STRG_VAL 0x7604 222428d7b3dSmrg#define GEN7_VS_RDATA 0x7608 223428d7b3dSmrg 224428d7b3dSmrg#define GEN7_SF_CTL 0x7b00 225428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) 226428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) 227428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) 228428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) 229428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) 230428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) 231428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) 232428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) 233428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) 234428d7b3dSmrg#define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) 235428d7b3dSmrg#define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) 236428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 237428d7b3dSmrg#define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 238428d7b3dSmrg#define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0) 239428d7b3dSmrg 240428d7b3dSmrg#define GEN7_SF_STRG_VAL 0x7b04 241428d7b3dSmrg#define GEN7_SF_RDATA 0x7b18 242428d7b3dSmrg 243428d7b3dSmrg#define GEN7_WIZ_CTL 0x7c00 244428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) 245428d7b3dSmrg#define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 246428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) 247428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) 248428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) 249428d7b3dSmrg#define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) 250428d7b3dSmrg#define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) 251428d7b3dSmrg#define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) 252428d7b3dSmrg#define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) 253428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) 254428d7b3dSmrg#define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) 255428d7b3dSmrg#define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) 256428d7b3dSmrg 257428d7b3dSmrg#define GEN7_WIZ_STRG_VAL 0x7c04 258428d7b3dSmrg#define GEN7_WIZ_RDATA 0x7c18 259428d7b3dSmrg 260428d7b3dSmrg#define GEN7_TS_CTL 0x7e00 261428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) 262428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) 263428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) 264428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) 265428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) 266428d7b3dSmrg#define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0) 267428d7b3dSmrg 268428d7b3dSmrg#define GEN7_TS_STRG_VAL 0x7e04 269428d7b3dSmrg#define GEN7_TS_RDATA 0x7e08 270428d7b3dSmrg 271428d7b3dSmrg#define GEN7_TD_CTL 0x8000 272428d7b3dSmrg#define GEN7_TD_CTL_MUX_SHIFT 8 273428d7b3dSmrg#define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) 274428d7b3dSmrg#define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) 275428d7b3dSmrg#define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) 276428d7b3dSmrg#define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) 277428d7b3dSmrg#define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2) 278428d7b3dSmrg#define GEN7_TD_CTL2 0x8004 279428d7b3dSmrg#define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) 280428d7b3dSmrg#define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) 281428d7b3dSmrg#define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) 282428d7b3dSmrg#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 283428d7b3dSmrg#define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) 284428d7b3dSmrg#define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) 285428d7b3dSmrg#define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) 286428d7b3dSmrg#define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) 287428d7b3dSmrg#define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) 288428d7b3dSmrg#define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) 289428d7b3dSmrg#define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) 290428d7b3dSmrg#define GEN7_TD_VF_VS_EMSK 0x8008 291428d7b3dSmrg#define GEN7_TD_GS_EMSK 0x800c 292428d7b3dSmrg#define GEN7_TD_CLIP_EMSK 0x8010 293428d7b3dSmrg#define GEN7_TD_SF_EMSK 0x8014 294428d7b3dSmrg#define GEN7_TD_WIZ_EMSK 0x8018 295428d7b3dSmrg#define GEN7_TD_0_6_EHTRG_VAL 0x801c 296428d7b3dSmrg#define GEN7_TD_0_7_EHTRG_VAL 0x8020 297428d7b3dSmrg#define GEN7_TD_0_6_EHTRG_MSK 0x8024 298428d7b3dSmrg#define GEN7_TD_0_7_EHTRG_MSK 0x8028 299428d7b3dSmrg#define GEN7_TD_RDATA 0x802c 300428d7b3dSmrg#define GEN7_TD_TS_EMSK 0x8030 301428d7b3dSmrg 302428d7b3dSmrg#define GEN7_EU_CTL 0x8800 303428d7b3dSmrg#define GEN7_EU_CTL_SELECT_SHIFT 16 304428d7b3dSmrg#define GEN7_EU_CTL_DATA_MUX_SHIFT 8 305428d7b3dSmrg#define GEN7_EU_ATT_0 0x8810 306428d7b3dSmrg#define GEN7_EU_ATT_1 0x8814 307428d7b3dSmrg#define GEN7_EU_ATT_DATA_0 0x8820 308428d7b3dSmrg#define GEN7_EU_ATT_DATA_1 0x8824 309428d7b3dSmrg#define GEN7_EU_ATT_CLR_0 0x8830 310428d7b3dSmrg#define GEN7_EU_ATT_CLR_1 0x8834 311428d7b3dSmrg#define GEN7_EU_RDATA 0x8840 312428d7b3dSmrg 313428d7b3dSmrg#define _3DPRIM_POINTLIST 0x01 314428d7b3dSmrg#define _3DPRIM_LINELIST 0x02 315428d7b3dSmrg#define _3DPRIM_LINESTRIP 0x03 316428d7b3dSmrg#define _3DPRIM_TRILIST 0x04 317428d7b3dSmrg#define _3DPRIM_TRISTRIP 0x05 318428d7b3dSmrg#define _3DPRIM_TRIFAN 0x06 319428d7b3dSmrg#define _3DPRIM_QUADLIST 0x07 320428d7b3dSmrg#define _3DPRIM_QUADSTRIP 0x08 321428d7b3dSmrg#define _3DPRIM_LINELIST_ADJ 0x09 322428d7b3dSmrg#define _3DPRIM_LINESTRIP_ADJ 0x0A 323428d7b3dSmrg#define _3DPRIM_TRILIST_ADJ 0x0B 324428d7b3dSmrg#define _3DPRIM_TRISTRIP_ADJ 0x0C 325428d7b3dSmrg#define _3DPRIM_TRISTRIP_REVERSE 0x0D 326428d7b3dSmrg#define _3DPRIM_POLYGON 0x0E 327428d7b3dSmrg#define _3DPRIM_RECTLIST 0x0F 328428d7b3dSmrg#define _3DPRIM_LINELOOP 0x10 329428d7b3dSmrg#define _3DPRIM_POINTLIST_BF 0x11 330428d7b3dSmrg#define _3DPRIM_LINESTRIP_CONT 0x12 331428d7b3dSmrg#define _3DPRIM_LINESTRIP_BF 0x13 332428d7b3dSmrg#define _3DPRIM_LINESTRIP_CONT_BF 0x14 333428d7b3dSmrg#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 334428d7b3dSmrg 335428d7b3dSmrg#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 336428d7b3dSmrg#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 337428d7b3dSmrg 338428d7b3dSmrg#define GEN7_ANISORATIO_2 0 339428d7b3dSmrg#define GEN7_ANISORATIO_4 1 340428d7b3dSmrg#define GEN7_ANISORATIO_6 2 341428d7b3dSmrg#define GEN7_ANISORATIO_8 3 342428d7b3dSmrg#define GEN7_ANISORATIO_10 4 343428d7b3dSmrg#define GEN7_ANISORATIO_12 5 344428d7b3dSmrg#define GEN7_ANISORATIO_14 6 345428d7b3dSmrg#define GEN7_ANISORATIO_16 7 346428d7b3dSmrg 347428d7b3dSmrg#define GEN7_BLENDFACTOR_ONE 0x1 348428d7b3dSmrg#define GEN7_BLENDFACTOR_SRC_COLOR 0x2 349428d7b3dSmrg#define GEN7_BLENDFACTOR_SRC_ALPHA 0x3 350428d7b3dSmrg#define GEN7_BLENDFACTOR_DST_ALPHA 0x4 351428d7b3dSmrg#define GEN7_BLENDFACTOR_DST_COLOR 0x5 352428d7b3dSmrg#define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 353428d7b3dSmrg#define GEN7_BLENDFACTOR_CONST_COLOR 0x7 354428d7b3dSmrg#define GEN7_BLENDFACTOR_CONST_ALPHA 0x8 355428d7b3dSmrg#define GEN7_BLENDFACTOR_SRC1_COLOR 0x9 356428d7b3dSmrg#define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A 357428d7b3dSmrg#define GEN7_BLENDFACTOR_ZERO 0x11 358428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12 359428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13 360428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14 361428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15 362428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17 363428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18 364428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19 365428d7b3dSmrg#define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A 366428d7b3dSmrg 367428d7b3dSmrg#define GEN7_BLENDFUNCTION_ADD 0 368428d7b3dSmrg#define GEN7_BLENDFUNCTION_SUBTRACT 1 369428d7b3dSmrg#define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2 370428d7b3dSmrg#define GEN7_BLENDFUNCTION_MIN 3 371428d7b3dSmrg#define GEN7_BLENDFUNCTION_MAX 4 372428d7b3dSmrg 373428d7b3dSmrg#define GEN7_ALPHATEST_FORMAT_UNORM8 0 374428d7b3dSmrg#define GEN7_ALPHATEST_FORMAT_FLOAT32 1 375428d7b3dSmrg 376428d7b3dSmrg#define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0 377428d7b3dSmrg#define GEN7_CHROMAKEY_REPLACE_BLACK 1 378428d7b3dSmrg 379428d7b3dSmrg#define GEN7_CLIP_API_OGL 0 380428d7b3dSmrg#define GEN7_CLIP_API_DX 1 381428d7b3dSmrg 382428d7b3dSmrg#define GEN7_CLIPMODE_NORMAL 0 383428d7b3dSmrg#define GEN7_CLIPMODE_CLIP_ALL 1 384428d7b3dSmrg#define GEN7_CLIPMODE_CLIP_NON_REJECTED 2 385428d7b3dSmrg#define GEN7_CLIPMODE_REJECT_ALL 3 386428d7b3dSmrg#define GEN7_CLIPMODE_ACCEPT_ALL 4 387428d7b3dSmrg 388428d7b3dSmrg#define GEN7_CLIP_NDCSPACE 0 389428d7b3dSmrg#define GEN7_CLIP_SCREENSPACE 1 390428d7b3dSmrg 391428d7b3dSmrg#define GEN7_COMPAREFUNCTION_ALWAYS 0 392428d7b3dSmrg#define GEN7_COMPAREFUNCTION_NEVER 1 393428d7b3dSmrg#define GEN7_COMPAREFUNCTION_LESS 2 394428d7b3dSmrg#define GEN7_COMPAREFUNCTION_EQUAL 3 395428d7b3dSmrg#define GEN7_COMPAREFUNCTION_LEQUAL 4 396428d7b3dSmrg#define GEN7_COMPAREFUNCTION_GREATER 5 397428d7b3dSmrg#define GEN7_COMPAREFUNCTION_NOTEQUAL 6 398428d7b3dSmrg#define GEN7_COMPAREFUNCTION_GEQUAL 7 399428d7b3dSmrg 400428d7b3dSmrg#define GEN7_COVERAGE_PIXELS_HALF 0 401428d7b3dSmrg#define GEN7_COVERAGE_PIXELS_1 1 402428d7b3dSmrg#define GEN7_COVERAGE_PIXELS_2 2 403428d7b3dSmrg#define GEN7_COVERAGE_PIXELS_4 3 404428d7b3dSmrg 405428d7b3dSmrg#define GEN7_CULLMODE_BOTH 0 406428d7b3dSmrg#define GEN7_CULLMODE_NONE 1 407428d7b3dSmrg#define GEN7_CULLMODE_FRONT 2 408428d7b3dSmrg#define GEN7_CULLMODE_BACK 3 409428d7b3dSmrg 410428d7b3dSmrg#define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0 411428d7b3dSmrg#define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 412428d7b3dSmrg 413428d7b3dSmrg#define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 414428d7b3dSmrg#define GEN7_DEPTHFORMAT_D32_FLOAT 1 415428d7b3dSmrg#define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2 416428d7b3dSmrg#define GEN7_DEPTHFORMAT_D16_UNORM 5 417428d7b3dSmrg 418428d7b3dSmrg#define GEN7_FLOATING_POINT_IEEE_754 0 419428d7b3dSmrg#define GEN7_FLOATING_POINT_NON_IEEE_754 1 420428d7b3dSmrg 421428d7b3dSmrg#define GEN7_FRONTWINDING_CW 0 422428d7b3dSmrg#define GEN7_FRONTWINDING_CCW 1 423428d7b3dSmrg 424428d7b3dSmrg#define GEN7_INDEX_BYTE 0 425428d7b3dSmrg#define GEN7_INDEX_WORD 1 426428d7b3dSmrg#define GEN7_INDEX_DWORD 2 427428d7b3dSmrg 428428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_CLEAR 0 429428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_NOR 1 430428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_AND_INVERTED 2 431428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3 432428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_AND_REVERSE 4 433428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_INVERT 5 434428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_XOR 6 435428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_NAND 7 436428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_AND 8 437428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_EQUIV 9 438428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_NOOP 10 439428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_OR_INVERTED 11 440428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_COPY 12 441428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_OR_REVERSE 13 442428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_OR 14 443428d7b3dSmrg#define GEN7_LOGICOPFUNCTION_SET 15 444428d7b3dSmrg 445428d7b3dSmrg#define GEN7_MAPFILTER_NEAREST 0x0 446428d7b3dSmrg#define GEN7_MAPFILTER_LINEAR 0x1 447428d7b3dSmrg#define GEN7_MAPFILTER_ANISOTROPIC 0x2 448428d7b3dSmrg 449428d7b3dSmrg#define GEN7_MIPFILTER_NONE 0 450428d7b3dSmrg#define GEN7_MIPFILTER_NEAREST 1 451428d7b3dSmrg#define GEN7_MIPFILTER_LINEAR 3 452428d7b3dSmrg 453428d7b3dSmrg#define GEN7_POLYGON_FRONT_FACING 0 454428d7b3dSmrg#define GEN7_POLYGON_BACK_FACING 1 455428d7b3dSmrg 456428d7b3dSmrg#define GEN7_PREFILTER_ALWAYS 0x0 457428d7b3dSmrg#define GEN7_PREFILTER_NEVER 0x1 458428d7b3dSmrg#define GEN7_PREFILTER_LESS 0x2 459428d7b3dSmrg#define GEN7_PREFILTER_EQUAL 0x3 460428d7b3dSmrg#define GEN7_PREFILTER_LEQUAL 0x4 461428d7b3dSmrg#define GEN7_PREFILTER_GREATER 0x5 462428d7b3dSmrg#define GEN7_PREFILTER_NOTEQUAL 0x6 463428d7b3dSmrg#define GEN7_PREFILTER_GEQUAL 0x7 464428d7b3dSmrg 465428d7b3dSmrg#define GEN7_PROVOKING_VERTEX_0 0 466428d7b3dSmrg#define GEN7_PROVOKING_VERTEX_1 1 467428d7b3dSmrg#define GEN7_PROVOKING_VERTEX_2 2 468428d7b3dSmrg 469428d7b3dSmrg#define GEN7_RASTRULE_UPPER_LEFT 0 470428d7b3dSmrg#define GEN7_RASTRULE_UPPER_RIGHT 1 471428d7b3dSmrg 472428d7b3dSmrg#define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0 473428d7b3dSmrg#define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1 474428d7b3dSmrg#define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2 475428d7b3dSmrg 476428d7b3dSmrg#define GEN7_STENCILOP_KEEP 0 477428d7b3dSmrg#define GEN7_STENCILOP_ZERO 1 478428d7b3dSmrg#define GEN7_STENCILOP_REPLACE 2 479428d7b3dSmrg#define GEN7_STENCILOP_INCRSAT 3 480428d7b3dSmrg#define GEN7_STENCILOP_DECRSAT 4 481428d7b3dSmrg#define GEN7_STENCILOP_INCR 5 482428d7b3dSmrg#define GEN7_STENCILOP_DECR 6 483428d7b3dSmrg#define GEN7_STENCILOP_INVERT 7 484428d7b3dSmrg 485428d7b3dSmrg#define GEN7_SURFACE_MIPMAPLAYOUT_BELOW 0 486428d7b3dSmrg#define GEN7_SURFACE_MIPMAPLAYOUT_RIGHT 1 487428d7b3dSmrg 488428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 489428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001 490428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002 491428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 492428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 493428d7b3dSmrg#define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005 494428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 495428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 496428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 497428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040 498428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041 499428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042 500428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043 501428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044 502428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045 503428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046 504428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 505428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 506428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082 507428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083 508428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 509428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085 510428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_SINT 0x086 511428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_UINT 0x087 512428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 513428d7b3dSmrg#define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 514428d7b3dSmrg#define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A 515428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B 516428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C 517428d7b3dSmrg#define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D 518428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E 519428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F 520428d7b3dSmrg#define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090 521428d7b3dSmrg#define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091 522428d7b3dSmrg#define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092 523428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 524428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 525428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095 526428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096 527428d7b3dSmrg#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 528428d7b3dSmrg#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 529428d7b3dSmrg#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 530428d7b3dSmrg#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 531428d7b3dSmrg#define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 532428d7b3dSmrg#define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 533428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 534428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 535428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 536428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA 537428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB 538428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC 539428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD 540428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE 541428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF 542428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0 543428d7b3dSmrg#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 544428d7b3dSmrg#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 545428d7b3dSmrg#define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 546428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_SINT 0x0D6 547428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_UINT 0x0D7 548428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8 549428d7b3dSmrg#define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 550428d7b3dSmrg#define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA 551428d7b3dSmrg#define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF 552428d7b3dSmrg#define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0 553428d7b3dSmrg#define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1 554428d7b3dSmrg#define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2 555428d7b3dSmrg#define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3 556428d7b3dSmrg#define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4 557428d7b3dSmrg#define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5 558428d7b3dSmrg#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 559428d7b3dSmrg#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA 560428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB 561428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC 562428d7b3dSmrg#define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED 563428d7b3dSmrg#define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE 564428d7b3dSmrg#define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0 565428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1 566428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2 567428d7b3dSmrg#define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 568428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 569428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 570428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6 571428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7 572428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8 573428d7b3dSmrg#define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9 574428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100 575428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 576428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 577428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 578428d7b3dSmrg#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 579428d7b3dSmrg#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 580428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106 581428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107 582428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_SINT 0x108 583428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_UINT 0x109 584428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_UNORM 0x10A 585428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_SNORM 0x10B 586428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_SINT 0x10C 587428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_UINT 0x10D 588428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E 589428d7b3dSmrg#define GEN7_SURFACEFORMAT_I16_UNORM 0x111 590428d7b3dSmrg#define GEN7_SURFACEFORMAT_L16_UNORM 0x112 591428d7b3dSmrg#define GEN7_SURFACEFORMAT_A16_UNORM 0x113 592428d7b3dSmrg#define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114 593428d7b3dSmrg#define GEN7_SURFACEFORMAT_I16_FLOAT 0x115 594428d7b3dSmrg#define GEN7_SURFACEFORMAT_L16_FLOAT 0x116 595428d7b3dSmrg#define GEN7_SURFACEFORMAT_A16_FLOAT 0x117 596428d7b3dSmrg#define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 597428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A 598428d7b3dSmrg#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B 599428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C 600428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D 601428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E 602428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16_USCALED 0x11F 603428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_UNORM 0x140 604428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_SNORM 0x141 605428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_SINT 0x142 606428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_UINT 0x143 607428d7b3dSmrg#define GEN7_SURFACEFORMAT_A8_UNORM 0x144 608428d7b3dSmrg#define GEN7_SURFACEFORMAT_I8_UNORM 0x145 609428d7b3dSmrg#define GEN7_SURFACEFORMAT_L8_UNORM 0x146 610428d7b3dSmrg#define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147 611428d7b3dSmrg#define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148 612428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_SSCALED 0x149 613428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8_USCALED 0x14A 614428d7b3dSmrg#define GEN7_SURFACEFORMAT_R1_UINT 0x181 615428d7b3dSmrg#define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182 616428d7b3dSmrg#define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 617428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC1_UNORM 0x186 618428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC2_UNORM 0x187 619428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC3_UNORM 0x188 620428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC4_UNORM 0x189 621428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A 622428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B 623428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C 624428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D 625428d7b3dSmrg#define GEN7_SURFACEFORMAT_MONO8 0x18E 626428d7b3dSmrg#define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F 627428d7b3dSmrg#define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190 628428d7b3dSmrg#define GEN7_SURFACEFORMAT_DXT1_RGB 0x191 629428d7b3dSmrg#define GEN7_SURFACEFORMAT_FXT1 0x192 630428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193 631428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194 632428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195 633428d7b3dSmrg#define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196 634428d7b3dSmrg#define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 635428d7b3dSmrg#define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198 636428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC4_SNORM 0x199 637428d7b3dSmrg#define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A 638428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C 639428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D 640428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E 641428d7b3dSmrg#define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F 642428d7b3dSmrg 643428d7b3dSmrg#define GEN7_SURFACERETURNFORMAT_FLOAT32 0 644428d7b3dSmrg#define GEN7_SURFACERETURNFORMAT_S1 1 645428d7b3dSmrg 646428d7b3dSmrg#define GEN7_SURFACE_1D 0 647428d7b3dSmrg#define GEN7_SURFACE_2D 1 648428d7b3dSmrg#define GEN7_SURFACE_3D 2 649428d7b3dSmrg#define GEN7_SURFACE_CUBE 3 650428d7b3dSmrg#define GEN7_SURFACE_BUFFER 4 651428d7b3dSmrg#define GEN7_SURFACE_NULL 7 652428d7b3dSmrg 653428d7b3dSmrg#define GEN7_BORDER_COLOR_MODE_DEFAULT 0 654428d7b3dSmrg#define GEN7_BORDER_COLOR_MODE_LEGACY 1 655428d7b3dSmrg 656428d7b3dSmrg#define GEN7_TEXCOORDMODE_WRAP 0 657428d7b3dSmrg#define GEN7_TEXCOORDMODE_MIRROR 1 658428d7b3dSmrg#define GEN7_TEXCOORDMODE_CLAMP 2 659428d7b3dSmrg#define GEN7_TEXCOORDMODE_CUBE 3 660428d7b3dSmrg#define GEN7_TEXCOORDMODE_CLAMP_BORDER 4 661428d7b3dSmrg#define GEN7_TEXCOORDMODE_MIRROR_ONCE 5 662428d7b3dSmrg 663428d7b3dSmrg#define GEN7_THREAD_PRIORITY_NORMAL 0 664428d7b3dSmrg#define GEN7_THREAD_PRIORITY_HIGH 1 665428d7b3dSmrg 666428d7b3dSmrg#define GEN7_TILEWALK_XMAJOR 0 667428d7b3dSmrg#define GEN7_TILEWALK_YMAJOR 1 668428d7b3dSmrg 669428d7b3dSmrg#define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0 670428d7b3dSmrg#define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1 671428d7b3dSmrg 672428d7b3dSmrg#define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0 673428d7b3dSmrg#define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 674428d7b3dSmrg 675428d7b3dSmrg#define GEN7_VFCOMPONENT_NOSTORE 0 676428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_SRC 1 677428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_0 2 678428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_1_FLT 3 679428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_1_INT 4 680428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_VID 5 681428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_IID 6 682428d7b3dSmrg#define GEN7_VFCOMPONENT_STORE_PID 7 683428d7b3dSmrg 684428d7b3dSmrg 685428d7b3dSmrg/* Execution Unit (EU) defines 686428d7b3dSmrg */ 687428d7b3dSmrg 688428d7b3dSmrg#define GEN7_ALIGN_1 0 689428d7b3dSmrg#define GEN7_ALIGN_16 1 690428d7b3dSmrg 691428d7b3dSmrg#define GEN7_ADDRESS_DIRECT 0 692428d7b3dSmrg#define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1 693428d7b3dSmrg 694428d7b3dSmrg#define GEN7_CHANNEL_X 0 695428d7b3dSmrg#define GEN7_CHANNEL_Y 1 696428d7b3dSmrg#define GEN7_CHANNEL_Z 2 697428d7b3dSmrg#define GEN7_CHANNEL_W 3 698428d7b3dSmrg 699428d7b3dSmrg#define GEN7_COMPRESSION_NONE 0 700428d7b3dSmrg#define GEN7_COMPRESSION_2NDHALF 1 701428d7b3dSmrg#define GEN7_COMPRESSION_COMPRESSED 2 702428d7b3dSmrg 703428d7b3dSmrg#define GEN7_CONDITIONAL_NONE 0 704428d7b3dSmrg#define GEN7_CONDITIONAL_Z 1 705428d7b3dSmrg#define GEN7_CONDITIONAL_NZ 2 706428d7b3dSmrg#define GEN7_CONDITIONAL_EQ 1 /* Z */ 707428d7b3dSmrg#define GEN7_CONDITIONAL_NEQ 2 /* NZ */ 708428d7b3dSmrg#define GEN7_CONDITIONAL_G 3 709428d7b3dSmrg#define GEN7_CONDITIONAL_GE 4 710428d7b3dSmrg#define GEN7_CONDITIONAL_L 5 711428d7b3dSmrg#define GEN7_CONDITIONAL_LE 6 712428d7b3dSmrg#define GEN7_CONDITIONAL_C 7 713428d7b3dSmrg#define GEN7_CONDITIONAL_O 8 714428d7b3dSmrg 715428d7b3dSmrg#define GEN7_DEBUG_NONE 0 716428d7b3dSmrg#define GEN7_DEBUG_BREAKPOINT 1 717428d7b3dSmrg 718428d7b3dSmrg#define GEN7_DEPENDENCY_NORMAL 0 719428d7b3dSmrg#define GEN7_DEPENDENCY_NOTCLEARED 1 720428d7b3dSmrg#define GEN7_DEPENDENCY_NOTCHECKED 2 721428d7b3dSmrg#define GEN7_DEPENDENCY_DISABLE 3 722428d7b3dSmrg 723428d7b3dSmrg#define GEN7_EXECUTE_1 0 724428d7b3dSmrg#define GEN7_EXECUTE_2 1 725428d7b3dSmrg#define GEN7_EXECUTE_4 2 726428d7b3dSmrg#define GEN7_EXECUTE_8 3 727428d7b3dSmrg#define GEN7_EXECUTE_16 4 728428d7b3dSmrg#define GEN7_EXECUTE_32 5 729428d7b3dSmrg 730428d7b3dSmrg#define GEN7_HORIZONTAL_STRIDE_0 0 731428d7b3dSmrg#define GEN7_HORIZONTAL_STRIDE_1 1 732428d7b3dSmrg#define GEN7_HORIZONTAL_STRIDE_2 2 733428d7b3dSmrg#define GEN7_HORIZONTAL_STRIDE_4 3 734428d7b3dSmrg 735428d7b3dSmrg#define GEN7_INSTRUCTION_NORMAL 0 736428d7b3dSmrg#define GEN7_INSTRUCTION_SATURATE 1 737428d7b3dSmrg 738428d7b3dSmrg#define INTEL_MASK_ENABLE 0 739428d7b3dSmrg#define INTEL_MASK_DISABLE 1 740428d7b3dSmrg 741428d7b3dSmrg#define GEN7_OPCODE_MOV 1 742428d7b3dSmrg#define GEN7_OPCODE_SEL 2 743428d7b3dSmrg#define GEN7_OPCODE_NOT 4 744428d7b3dSmrg#define GEN7_OPCODE_AND 5 745428d7b3dSmrg#define GEN7_OPCODE_OR 6 746428d7b3dSmrg#define GEN7_OPCODE_XOR 7 747428d7b3dSmrg#define GEN7_OPCODE_SHR 8 748428d7b3dSmrg#define GEN7_OPCODE_SHL 9 749428d7b3dSmrg#define GEN7_OPCODE_RSR 10 750428d7b3dSmrg#define GEN7_OPCODE_RSL 11 751428d7b3dSmrg#define GEN7_OPCODE_ASR 12 752428d7b3dSmrg#define GEN7_OPCODE_CMP 16 753428d7b3dSmrg#define GEN7_OPCODE_JMPI 32 754428d7b3dSmrg#define GEN7_OPCODE_IF 34 755428d7b3dSmrg#define GEN7_OPCODE_IFF 35 756428d7b3dSmrg#define GEN7_OPCODE_ELSE 36 757428d7b3dSmrg#define GEN7_OPCODE_ENDIF 37 758428d7b3dSmrg#define GEN7_OPCODE_DO 38 759428d7b3dSmrg#define GEN7_OPCODE_WHILE 39 760428d7b3dSmrg#define GEN7_OPCODE_BREAK 40 761428d7b3dSmrg#define GEN7_OPCODE_CONTINUE 41 762428d7b3dSmrg#define GEN7_OPCODE_HALT 42 763428d7b3dSmrg#define GEN7_OPCODE_MSAVE 44 764428d7b3dSmrg#define GEN7_OPCODE_MRESTORE 45 765428d7b3dSmrg#define GEN7_OPCODE_PUSH 46 766428d7b3dSmrg#define GEN7_OPCODE_POP 47 767428d7b3dSmrg#define GEN7_OPCODE_WAIT 48 768428d7b3dSmrg#define GEN7_OPCODE_SEND 49 769428d7b3dSmrg#define GEN7_OPCODE_ADD 64 770428d7b3dSmrg#define GEN7_OPCODE_MUL 65 771428d7b3dSmrg#define GEN7_OPCODE_AVG 66 772428d7b3dSmrg#define GEN7_OPCODE_FRC 67 773428d7b3dSmrg#define GEN7_OPCODE_RNDU 68 774428d7b3dSmrg#define GEN7_OPCODE_RNDD 69 775428d7b3dSmrg#define GEN7_OPCODE_RNDE 70 776428d7b3dSmrg#define GEN7_OPCODE_RNDZ 71 777428d7b3dSmrg#define GEN7_OPCODE_MAC 72 778428d7b3dSmrg#define GEN7_OPCODE_MACH 73 779428d7b3dSmrg#define GEN7_OPCODE_LZD 74 780428d7b3dSmrg#define GEN7_OPCODE_SAD2 80 781428d7b3dSmrg#define GEN7_OPCODE_SADA2 81 782428d7b3dSmrg#define GEN7_OPCODE_DP4 84 783428d7b3dSmrg#define GEN7_OPCODE_DPH 85 784428d7b3dSmrg#define GEN7_OPCODE_DP3 86 785428d7b3dSmrg#define GEN7_OPCODE_DP2 87 786428d7b3dSmrg#define GEN7_OPCODE_DPA2 88 787428d7b3dSmrg#define GEN7_OPCODE_LINE 89 788428d7b3dSmrg#define GEN7_OPCODE_NOP 126 789428d7b3dSmrg 790428d7b3dSmrg#define GEN7_PREDICATE_NONE 0 791428d7b3dSmrg#define GEN7_PREDICATE_NORMAL 1 792428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ANYV 2 793428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ALLV 3 794428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ANY2H 4 795428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ALL2H 5 796428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ANY4H 6 797428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ALL4H 7 798428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ANY8H 8 799428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ALL8H 9 800428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ANY16H 10 801428d7b3dSmrg#define GEN7_PREDICATE_ALIGN1_ALL16H 11 802428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2 803428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3 804428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4 805428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5 806428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_ANY4H 6 807428d7b3dSmrg#define GEN7_PREDICATE_ALIGN16_ALL4H 7 808428d7b3dSmrg 809428d7b3dSmrg#define GEN7_ARCHITECTURE_REGISTER_FILE 0 810428d7b3dSmrg#define GEN7_GENERAL_REGISTER_FILE 1 811428d7b3dSmrg#define GEN7_MESSAGE_REGISTER_FILE 2 812428d7b3dSmrg#define GEN7_IMMEDIATE_VALUE 3 813428d7b3dSmrg 814428d7b3dSmrg#define GEN7_REGISTER_TYPE_UD 0 815428d7b3dSmrg#define GEN7_REGISTER_TYPE_D 1 816428d7b3dSmrg#define GEN7_REGISTER_TYPE_UW 2 817428d7b3dSmrg#define GEN7_REGISTER_TYPE_W 3 818428d7b3dSmrg#define GEN7_REGISTER_TYPE_UB 4 819428d7b3dSmrg#define GEN7_REGISTER_TYPE_B 5 820428d7b3dSmrg#define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ 821428d7b3dSmrg#define GEN7_REGISTER_TYPE_HF 6 822428d7b3dSmrg#define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ 823428d7b3dSmrg#define GEN7_REGISTER_TYPE_F 7 824428d7b3dSmrg 825428d7b3dSmrg#define GEN7_ARF_NULL 0x00 826428d7b3dSmrg#define GEN7_ARF_ADDRESS 0x10 827428d7b3dSmrg#define GEN7_ARF_ACCUMULATOR 0x20 828428d7b3dSmrg#define GEN7_ARF_FLAG 0x30 829428d7b3dSmrg#define GEN7_ARF_MASK 0x40 830428d7b3dSmrg#define GEN7_ARF_MASK_STACK 0x50 831428d7b3dSmrg#define GEN7_ARF_MASK_STACK_DEPTH 0x60 832428d7b3dSmrg#define GEN7_ARF_STATE 0x70 833428d7b3dSmrg#define GEN7_ARF_CONTROL 0x80 834428d7b3dSmrg#define GEN7_ARF_NOTIFICATION_COUNT 0x90 835428d7b3dSmrg#define GEN7_ARF_IP 0xA0 836428d7b3dSmrg 837428d7b3dSmrg#define GEN7_AMASK 0 838428d7b3dSmrg#define GEN7_IMASK 1 839428d7b3dSmrg#define GEN7_LMASK 2 840428d7b3dSmrg#define GEN7_CMASK 3 841428d7b3dSmrg 842428d7b3dSmrg#define GEN7_THREAD_NORMAL 0 843428d7b3dSmrg#define GEN7_THREAD_ATOMIC 1 844428d7b3dSmrg#define GEN7_THREAD_SWITCH 2 845428d7b3dSmrg 846428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_0 0 847428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_1 1 848428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_2 2 849428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_4 3 850428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_8 4 851428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_16 5 852428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_32 6 853428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_64 7 854428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_128 8 855428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_256 9 856428d7b3dSmrg#define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF 857428d7b3dSmrg 858428d7b3dSmrg#define GEN7_WIDTH_1 0 859428d7b3dSmrg#define GEN7_WIDTH_2 1 860428d7b3dSmrg#define GEN7_WIDTH_4 2 861428d7b3dSmrg#define GEN7_WIDTH_8 3 862428d7b3dSmrg#define GEN7_WIDTH_16 4 863428d7b3dSmrg 864428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0 865428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1 866428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2 867428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3 868428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4 869428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5 870428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6 871428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7 872428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8 873428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9 874428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10 875428d7b3dSmrg#define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11 876428d7b3dSmrg 877428d7b3dSmrg#define GEN7_POLYGON_FACING_FRONT 0 878428d7b3dSmrg#define GEN7_POLYGON_FACING_BACK 1 879428d7b3dSmrg 880428d7b3dSmrg#define GEN7_MESSAGE_TARGET_NULL 0 881428d7b3dSmrg#define GEN7_MESSAGE_TARGET_MATH 1 882428d7b3dSmrg#define GEN7_MESSAGE_TARGET_SAMPLER 2 883428d7b3dSmrg#define GEN7_MESSAGE_TARGET_GATEWAY 3 884428d7b3dSmrg#define GEN7_MESSAGE_TARGET_DATAPORT_READ 4 885428d7b3dSmrg#define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5 886428d7b3dSmrg#define GEN7_MESSAGE_TARGET_URB 6 887428d7b3dSmrg#define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7 888428d7b3dSmrg 889428d7b3dSmrg#define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0 890428d7b3dSmrg#define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2 891428d7b3dSmrg#define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3 892428d7b3dSmrg 893428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 894428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 895428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 896428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 897428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 898428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 899428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 900428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 901428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 902428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 903428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 904428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2 905428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2 906428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3 907428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3 908428d7b3dSmrg#define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3 909428d7b3dSmrg 910428d7b3dSmrg#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 911428d7b3dSmrg#define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 912428d7b3dSmrg#define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2 913428d7b3dSmrg#define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3 914428d7b3dSmrg#define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4 915428d7b3dSmrg 916428d7b3dSmrg#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 917428d7b3dSmrg#define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 918428d7b3dSmrg 919428d7b3dSmrg#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 920428d7b3dSmrg#define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 921428d7b3dSmrg 922428d7b3dSmrg#define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 923428d7b3dSmrg#define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 924428d7b3dSmrg#define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 925428d7b3dSmrg#define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 926428d7b3dSmrg 927428d7b3dSmrg#define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0 928428d7b3dSmrg#define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1 929428d7b3dSmrg#define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 930428d7b3dSmrg 931428d7b3dSmrg#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 932428d7b3dSmrg#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 933428d7b3dSmrg#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 934428d7b3dSmrg#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 935428d7b3dSmrg#define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 936428d7b3dSmrg 937428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 938428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 939428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 940428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 941428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 942428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 943428d7b3dSmrg#define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 944428d7b3dSmrg 945428d7b3dSmrg#define GEN7_MATH_FUNCTION_INV 1 946428d7b3dSmrg#define GEN7_MATH_FUNCTION_LOG 2 947428d7b3dSmrg#define GEN7_MATH_FUNCTION_EXP 3 948428d7b3dSmrg#define GEN7_MATH_FUNCTION_SQRT 4 949428d7b3dSmrg#define GEN7_MATH_FUNCTION_RSQ 5 950428d7b3dSmrg#define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */ 951428d7b3dSmrg#define GEN7_MATH_FUNCTION_COS 7 /* was 8 */ 952428d7b3dSmrg#define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */ 953428d7b3dSmrg#define GEN7_MATH_FUNCTION_TAN 9 954428d7b3dSmrg#define GEN7_MATH_FUNCTION_POW 10 955428d7b3dSmrg#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 956428d7b3dSmrg#define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12 957428d7b3dSmrg#define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13 958428d7b3dSmrg 959428d7b3dSmrg#define GEN7_MATH_INTEGER_UNSIGNED 0 960428d7b3dSmrg#define GEN7_MATH_INTEGER_SIGNED 1 961428d7b3dSmrg 962428d7b3dSmrg#define GEN7_MATH_PRECISION_FULL 0 963428d7b3dSmrg#define GEN7_MATH_PRECISION_PARTIAL 1 964428d7b3dSmrg 965428d7b3dSmrg#define GEN7_MATH_SATURATE_NONE 0 966428d7b3dSmrg#define GEN7_MATH_SATURATE_SATURATE 1 967428d7b3dSmrg 968428d7b3dSmrg#define GEN7_MATH_DATA_VECTOR 0 969428d7b3dSmrg#define GEN7_MATH_DATA_SCALAR 1 970428d7b3dSmrg 971428d7b3dSmrg#define GEN7_URB_OPCODE_WRITE 0 972428d7b3dSmrg 973428d7b3dSmrg#define GEN7_URB_SWIZZLE_NONE 0 974428d7b3dSmrg#define GEN7_URB_SWIZZLE_INTERLEAVE 1 975428d7b3dSmrg#define GEN7_URB_SWIZZLE_TRANSPOSE 2 976428d7b3dSmrg 977428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_1K 0 978428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_2K 1 979428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_4K 2 980428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_8K 3 981428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_16K 4 982428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_32K 5 983428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_64K 6 984428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_128K 7 985428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_256K 8 986428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_512K 9 987428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_1M 10 988428d7b3dSmrg#define GEN7_SCRATCH_SPACE_SIZE_2M 11 989428d7b3dSmrg 990428d7b3dSmrg/* The hardware supports two different modes for border color. The 991428d7b3dSmrg * default (OpenGL) mode uses floating-point color channels, while the 992428d7b3dSmrg * legacy mode uses 4 bytes. 993428d7b3dSmrg * 994428d7b3dSmrg * More significantly, the legacy mode respects the components of the 995428d7b3dSmrg * border color for channels not present in the source, (whereas the 996428d7b3dSmrg * default mode will ignore the border color's alpha channel and use 997428d7b3dSmrg * alpha==1 for an RGB source, for example). 998428d7b3dSmrg * 999428d7b3dSmrg * The legacy mode matches the semantics specified by the Render 1000428d7b3dSmrg * extension. 1001428d7b3dSmrg */ 1002428d7b3dSmrgstruct gen7_sampler_default_border_color { 1003428d7b3dSmrg float color[4]; 1004428d7b3dSmrg}; 1005428d7b3dSmrg 1006428d7b3dSmrgstruct gen7_sampler_legacy_border_color { 1007428d7b3dSmrg uint8_t color[4]; 1008428d7b3dSmrg}; 1009428d7b3dSmrg 1010428d7b3dSmrgstruct gen7_blend_state { 1011428d7b3dSmrg struct { 1012428d7b3dSmrg uint32_t dest_blend_factor:5; 1013428d7b3dSmrg uint32_t source_blend_factor:5; 1014428d7b3dSmrg uint32_t pad3:1; 1015428d7b3dSmrg uint32_t blend_func:3; 1016428d7b3dSmrg uint32_t pad2:1; 1017428d7b3dSmrg uint32_t ia_dest_blend_factor:5; 1018428d7b3dSmrg uint32_t ia_source_blend_factor:5; 1019428d7b3dSmrg uint32_t pad1:1; 1020428d7b3dSmrg uint32_t ia_blend_func:3; 1021428d7b3dSmrg uint32_t pad0:1; 1022428d7b3dSmrg uint32_t ia_blend_enable:1; 1023428d7b3dSmrg uint32_t blend_enable:1; 1024428d7b3dSmrg } blend0; 1025428d7b3dSmrg 1026428d7b3dSmrg struct { 1027428d7b3dSmrg uint32_t post_blend_clamp_enable:1; 1028428d7b3dSmrg uint32_t pre_blend_clamp_enable:1; 1029428d7b3dSmrg uint32_t clamp_range:2; 1030428d7b3dSmrg uint32_t pad0:4; 1031428d7b3dSmrg uint32_t x_dither_offset:2; 1032428d7b3dSmrg uint32_t y_dither_offset:2; 1033428d7b3dSmrg uint32_t dither_enable:1; 1034428d7b3dSmrg uint32_t alpha_test_func:3; 1035428d7b3dSmrg uint32_t alpha_test_enable:1; 1036428d7b3dSmrg uint32_t pad1:1; 1037428d7b3dSmrg uint32_t logic_op_func:4; 1038428d7b3dSmrg uint32_t logic_op_enable:1; 1039428d7b3dSmrg uint32_t pad2:1; 1040428d7b3dSmrg uint32_t write_disable_b:1; 1041428d7b3dSmrg uint32_t write_disable_g:1; 1042428d7b3dSmrg uint32_t write_disable_r:1; 1043428d7b3dSmrg uint32_t write_disable_a:1; 1044428d7b3dSmrg uint32_t pad3:1; 1045428d7b3dSmrg uint32_t alpha_to_coverage_dither:1; 1046428d7b3dSmrg uint32_t alpha_to_one:1; 1047428d7b3dSmrg uint32_t alpha_to_coverage:1; 1048428d7b3dSmrg } blend1; 1049428d7b3dSmrg}; 1050428d7b3dSmrg 1051428d7b3dSmrgstruct gen7_color_calc_state { 1052428d7b3dSmrg struct { 1053428d7b3dSmrg uint32_t alpha_test_format:1; 1054428d7b3dSmrg uint32_t pad0:14; 1055428d7b3dSmrg uint32_t round_disable:1; 1056428d7b3dSmrg uint32_t bf_stencil_ref:8; 1057428d7b3dSmrg uint32_t stencil_ref:8; 1058428d7b3dSmrg } cc0; 1059428d7b3dSmrg 1060428d7b3dSmrg union { 1061428d7b3dSmrg float alpha_ref_f; 1062428d7b3dSmrg struct { 1063428d7b3dSmrg uint32_t ui:8; 1064428d7b3dSmrg uint32_t pad0:24; 1065428d7b3dSmrg } alpha_ref_fi; 1066428d7b3dSmrg } cc1; 1067428d7b3dSmrg 1068428d7b3dSmrg float constant_r; 1069428d7b3dSmrg float constant_g; 1070428d7b3dSmrg float constant_b; 1071428d7b3dSmrg float constant_a; 1072428d7b3dSmrg}; 1073428d7b3dSmrg 1074428d7b3dSmrgstruct gen7_depth_stencil_state { 1075428d7b3dSmrg struct { 1076428d7b3dSmrg uint32_t pad0:3; 1077428d7b3dSmrg uint32_t bf_stencil_pass_depth_pass_op:3; 1078428d7b3dSmrg uint32_t bf_stencil_pass_depth_fail_op:3; 1079428d7b3dSmrg uint32_t bf_stencil_fail_op:3; 1080428d7b3dSmrg uint32_t bf_stencil_func:3; 1081428d7b3dSmrg uint32_t bf_stencil_enable:1; 1082428d7b3dSmrg uint32_t pad1:2; 1083428d7b3dSmrg uint32_t stencil_write_enable:1; 1084428d7b3dSmrg uint32_t stencil_pass_depth_pass_op:3; 1085428d7b3dSmrg uint32_t stencil_pass_depth_fail_op:3; 1086428d7b3dSmrg uint32_t stencil_fail_op:3; 1087428d7b3dSmrg uint32_t stencil_func:3; 1088428d7b3dSmrg uint32_t stencil_enable:1; 1089428d7b3dSmrg } ds0; 1090428d7b3dSmrg 1091428d7b3dSmrg struct { 1092428d7b3dSmrg uint32_t bf_stencil_write_mask:8; 1093428d7b3dSmrg uint32_t bf_stencil_test_mask:8; 1094428d7b3dSmrg uint32_t stencil_write_mask:8; 1095428d7b3dSmrg uint32_t stencil_test_mask:8; 1096428d7b3dSmrg } ds1; 1097428d7b3dSmrg 1098428d7b3dSmrg struct { 1099428d7b3dSmrg uint32_t pad0:26; 1100428d7b3dSmrg uint32_t depth_write_enable:1; 1101428d7b3dSmrg uint32_t depth_test_func:3; 1102428d7b3dSmrg uint32_t pad1:1; 1103428d7b3dSmrg uint32_t depth_test_enable:1; 1104428d7b3dSmrg } ds2; 1105428d7b3dSmrg}; 1106428d7b3dSmrg 1107428d7b3dSmrgstruct gen7_surface_state { 1108428d7b3dSmrg struct { 1109428d7b3dSmrg unsigned int cube_pos_z:1; 1110428d7b3dSmrg unsigned int cube_neg_z:1; 1111428d7b3dSmrg unsigned int cube_pos_y:1; 1112428d7b3dSmrg unsigned int cube_neg_y:1; 1113428d7b3dSmrg unsigned int cube_pos_x:1; 1114428d7b3dSmrg unsigned int cube_neg_x:1; 1115428d7b3dSmrg unsigned int pad2:2; 1116428d7b3dSmrg unsigned int render_cache_read_write:1; 1117428d7b3dSmrg unsigned int pad1:1; 1118428d7b3dSmrg unsigned int surface_array_spacing:1; 1119428d7b3dSmrg unsigned int vert_line_stride_ofs:1; 1120428d7b3dSmrg unsigned int vert_line_stride:1; 1121428d7b3dSmrg unsigned int tile_walk:1; 1122428d7b3dSmrg unsigned int tiled_surface:1; 1123428d7b3dSmrg unsigned int horizontal_alignment:1; 1124428d7b3dSmrg unsigned int vertical_alignment:2; 1125428d7b3dSmrg unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ 1126428d7b3dSmrg unsigned int pad0:1; 1127428d7b3dSmrg unsigned int is_array:1; 1128428d7b3dSmrg unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ 1129428d7b3dSmrg } ss0; 1130428d7b3dSmrg 1131428d7b3dSmrg struct { 1132428d7b3dSmrg unsigned int base_addr; 1133428d7b3dSmrg } ss1; 1134428d7b3dSmrg 1135428d7b3dSmrg struct { 1136428d7b3dSmrg unsigned int width:14; 1137428d7b3dSmrg unsigned int pad1:2; 1138428d7b3dSmrg unsigned int height:14; 1139428d7b3dSmrg unsigned int pad0:2; 1140428d7b3dSmrg } ss2; 1141428d7b3dSmrg 1142428d7b3dSmrg struct { 1143428d7b3dSmrg unsigned int pitch:18; 1144428d7b3dSmrg unsigned int pad:3; 1145428d7b3dSmrg unsigned int depth:11; 1146428d7b3dSmrg } ss3; 1147428d7b3dSmrg 1148428d7b3dSmrg struct { 1149428d7b3dSmrg unsigned int multisample_position_palette_index:3; 1150428d7b3dSmrg unsigned int num_multisamples:3; 1151428d7b3dSmrg unsigned int multisampled_surface_storage_format:1; 1152428d7b3dSmrg unsigned int render_target_view_extent:11; 1153428d7b3dSmrg unsigned int min_array_elt:11; 1154428d7b3dSmrg unsigned int rotation:2; 1155428d7b3dSmrg unsigned int pad0:1; 1156428d7b3dSmrg } ss4; 1157428d7b3dSmrg 1158428d7b3dSmrg struct { 1159428d7b3dSmrg unsigned int mip_count:4; 1160428d7b3dSmrg unsigned int min_lod:4; 1161428d7b3dSmrg unsigned int pad1:12; 1162428d7b3dSmrg unsigned int y_offset:4; 1163428d7b3dSmrg unsigned int pad0:1; 1164428d7b3dSmrg unsigned int x_offset:7; 1165428d7b3dSmrg } ss5; 1166428d7b3dSmrg 1167428d7b3dSmrg struct { 1168428d7b3dSmrg unsigned int pad; /* Multisample Control Surface stuff */ 1169428d7b3dSmrg } ss6; 1170428d7b3dSmrg 1171428d7b3dSmrg struct { 1172428d7b3dSmrg unsigned int resource_min_lod:12; 1173428d7b3dSmrg unsigned int pad0:16; 1174428d7b3dSmrg unsigned int alpha_clear_color:1; 1175428d7b3dSmrg unsigned int blue_clear_color:1; 1176428d7b3dSmrg unsigned int green_clear_color:1; 1177428d7b3dSmrg unsigned int red_clear_color:1; 1178428d7b3dSmrg } ss7; 1179428d7b3dSmrg}; 1180428d7b3dSmrg 1181428d7b3dSmrgstruct gen7_sampler_state { 1182428d7b3dSmrg struct { 1183428d7b3dSmrg unsigned int aniso_algorithm:1; 1184428d7b3dSmrg unsigned int lod_bias:13; 1185428d7b3dSmrg unsigned int min_filter:3; 1186428d7b3dSmrg unsigned int mag_filter:3; 1187428d7b3dSmrg unsigned int mip_filter:2; 1188428d7b3dSmrg unsigned int base_level:5; 1189428d7b3dSmrg unsigned int pad1:1; 1190428d7b3dSmrg unsigned int lod_preclamp:1; 1191428d7b3dSmrg unsigned int default_color_mode:1; 1192428d7b3dSmrg unsigned int pad0:1; 1193428d7b3dSmrg unsigned int disable:1; 1194428d7b3dSmrg } ss0; 1195428d7b3dSmrg 1196428d7b3dSmrg struct { 1197428d7b3dSmrg unsigned int cube_control_mode:1; 1198428d7b3dSmrg unsigned int shadow_function:3; 1199428d7b3dSmrg unsigned int pad:4; 1200428d7b3dSmrg unsigned int max_lod:12; 1201428d7b3dSmrg unsigned int min_lod:12; 1202428d7b3dSmrg } ss1; 1203428d7b3dSmrg 1204428d7b3dSmrg struct { 1205428d7b3dSmrg unsigned int pad:5; 1206428d7b3dSmrg unsigned int default_color_pointer:27; 1207428d7b3dSmrg } ss2; 1208428d7b3dSmrg 1209428d7b3dSmrg struct { 1210428d7b3dSmrg unsigned int r_wrap_mode:3; 1211428d7b3dSmrg unsigned int t_wrap_mode:3; 1212428d7b3dSmrg unsigned int s_wrap_mode:3; 1213428d7b3dSmrg unsigned int pad:1; 1214428d7b3dSmrg unsigned int non_normalized_coord:1; 1215428d7b3dSmrg unsigned int trilinear_quality:2; 1216428d7b3dSmrg unsigned int address_round:6; 1217428d7b3dSmrg unsigned int max_aniso:3; 1218428d7b3dSmrg unsigned int chroma_key_mode:1; 1219428d7b3dSmrg unsigned int chroma_key_index:2; 1220428d7b3dSmrg unsigned int chroma_key_enable:1; 1221428d7b3dSmrg unsigned int pad0:6; 1222428d7b3dSmrg } ss3; 1223428d7b3dSmrg}; 1224428d7b3dSmrg 1225428d7b3dSmrg/* Surface state DW0 */ 1226428d7b3dSmrg#define GEN7_SURFACE_RC_READ_WRITE (1 << 8) 1227428d7b3dSmrg#define GEN7_SURFACE_VALIGN_4 (1 << 16) 1228428d7b3dSmrg#define GEN7_SURFACE_HALIGN_8 (1 << 15) 1229428d7b3dSmrg#define GEN7_SURFACE_TILED (1 << 14) 1230428d7b3dSmrg#define GEN7_SURFACE_TILED_Y (1 << 13) 1231428d7b3dSmrg#define GEN7_SURFACE_FORMAT_SHIFT 18 1232428d7b3dSmrg#define GEN7_SURFACE_TYPE_SHIFT 29 1233428d7b3dSmrg 1234428d7b3dSmrg/* Surface state DW2 */ 1235428d7b3dSmrg#define GEN7_SURFACE_HEIGHT_SHIFT 16 1236428d7b3dSmrg#define GEN7_SURFACE_WIDTH_SHIFT 0 1237428d7b3dSmrg 1238428d7b3dSmrg/* Surface state DW3 */ 1239428d7b3dSmrg#define GEN7_SURFACE_DEPTH_SHIFT 21 1240428d7b3dSmrg#define GEN7_SURFACE_PITCH_SHIFT 0 1241428d7b3dSmrg 1242428d7b3dSmrg#define HSW_SWIZZLE_ZERO 0 1243428d7b3dSmrg#define HSW_SWIZZLE_ONE 1 1244428d7b3dSmrg#define HSW_SWIZZLE_RED 4 1245428d7b3dSmrg#define HSW_SWIZZLE_GREEN 5 1246428d7b3dSmrg#define HSW_SWIZZLE_BLUE 6 1247428d7b3dSmrg#define HSW_SWIZZLE_ALPHA 7 1248428d7b3dSmrg#define __HSW_SURFACE_SWIZZLE(r,g,b,a) \ 1249428d7b3dSmrg ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25) 1250428d7b3dSmrg#define HSW_SURFACE_SWIZZLE(r,g,b,a) \ 1251428d7b3dSmrg __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a) 1252428d7b3dSmrg 1253428d7b3dSmrg/* _3DSTATE_VERTEX_BUFFERS on GEN7*/ 1254428d7b3dSmrg/* DW1 */ 1255428d7b3dSmrg#define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) 1256428d7b3dSmrg 1257428d7b3dSmrg/* _3DPRIMITIVE on GEN7 */ 1258428d7b3dSmrg/* DW1 */ 1259428d7b3dSmrg# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) 1260428d7b3dSmrg# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) 1261428d7b3dSmrg 1262428d7b3dSmrg#define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04) 1263428d7b3dSmrg#define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05) 1264428d7b3dSmrg# define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 1265428d7b3dSmrg# define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 1266428d7b3dSmrg/* DW1 */ 1267428d7b3dSmrg# define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) 1268428d7b3dSmrg 1269428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19) 1270428d7b3dSmrg#define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a) 1271428d7b3dSmrg 1272428d7b3dSmrg#define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b) 1273428d7b3dSmrg#define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c) 1274428d7b3dSmrg#define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d) 1275428d7b3dSmrg#define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e) 1276428d7b3dSmrg#define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f) 1277428d7b3dSmrg 1278428d7b3dSmrg/* DW1 */ 1279428d7b3dSmrg# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) 1280428d7b3dSmrg# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 1281428d7b3dSmrg# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) 1282428d7b3dSmrg# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) 1283428d7b3dSmrg# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 1284428d7b3dSmrg# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 1285428d7b3dSmrg 1286428d7b3dSmrg#define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20) 1287428d7b3dSmrg/* DW1: kernel pointer */ 1288428d7b3dSmrg/* DW2 */ 1289428d7b3dSmrg# define GEN7_PS_SPF_MODE (1 << 31) 1290428d7b3dSmrg# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) 1291428d7b3dSmrg# define GEN7_PS_SAMPLER_COUNT_SHIFT 27 1292428d7b3dSmrg# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 1293428d7b3dSmrg# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) 1294428d7b3dSmrg# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) 1295428d7b3dSmrg/* DW3: scratch space */ 1296428d7b3dSmrg/* DW4 */ 1297428d7b3dSmrg# define IVB_PS_MAX_THREADS_SHIFT 24 1298428d7b3dSmrg# define HSW_PS_MAX_THREADS_SHIFT 23 1299428d7b3dSmrg# define HSW_PS_SAMPLE_MASK_SHIFT 12 1300428d7b3dSmrg# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) 1301428d7b3dSmrg# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) 1302428d7b3dSmrg# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) 1303428d7b3dSmrg# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) 1304428d7b3dSmrg# define GEN7_PS_POSOFFSET_NONE (0 << 3) 1305428d7b3dSmrg# define GEN7_PS_POSOFFSET_CENTROID (2 << 3) 1306428d7b3dSmrg# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) 1307428d7b3dSmrg# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) 1308428d7b3dSmrg# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) 1309428d7b3dSmrg# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) 1310428d7b3dSmrg/* DW5 */ 1311428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 1312428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 1313428d7b3dSmrg# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 1314428d7b3dSmrg/* DW6: kernel 1 pointer */ 1315428d7b3dSmrg/* DW7: kernel 2 pointer */ 1316428d7b3dSmrg 1317428d7b3dSmrg#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21) 1318428d7b3dSmrg#define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23) 1319428d7b3dSmrg 1320428d7b3dSmrg#define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24) 1321428d7b3dSmrg#define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25) 1322428d7b3dSmrg 1323428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26) 1324428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27) 1325428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28) 1326428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29) 1327428d7b3dSmrg#define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a) 1328428d7b3dSmrg 1329428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b) 1330428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e) 1331428d7b3dSmrg#define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f) 1332428d7b3dSmrg 1333428d7b3dSmrg#define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30) 1334428d7b3dSmrg#define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31) 1335428d7b3dSmrg#define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32) 1336428d7b3dSmrg#define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33) 1337428d7b3dSmrg/* DW1 */ 1338428d7b3dSmrg# define GEN7_URB_ENTRY_NUMBER_SHIFT 0 1339428d7b3dSmrg# define GEN7_URB_ENTRY_SIZE_SHIFT 16 1340428d7b3dSmrg# define GEN7_URB_STARTING_ADDRESS_SHIFT 25 1341428d7b3dSmrg 1342428d7b3dSmrg#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12) 1343428d7b3dSmrg#define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16) 1344428d7b3dSmrg/* DW1 */ 1345428d7b3dSmrg# define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 1346428d7b3dSmrg 1347428d7b3dSmrgstruct gen7_cc_viewport { 1348428d7b3dSmrg float min_depth; 1349428d7b3dSmrg float max_depth; 1350428d7b3dSmrg}; 1351428d7b3dSmrg 1352428d7b3dSmrgtypedef enum { 1353428d7b3dSmrg SAMPLER_FILTER_NEAREST = 0, 1354428d7b3dSmrg SAMPLER_FILTER_BILINEAR, 1355428d7b3dSmrg FILTER_COUNT 1356428d7b3dSmrg} sampler_filter_t; 1357428d7b3dSmrg 1358428d7b3dSmrgtypedef enum { 1359428d7b3dSmrg SAMPLER_EXTEND_NONE = 0, 1360428d7b3dSmrg SAMPLER_EXTEND_REPEAT, 1361428d7b3dSmrg SAMPLER_EXTEND_PAD, 1362428d7b3dSmrg SAMPLER_EXTEND_REFLECT, 1363428d7b3dSmrg EXTEND_COUNT 1364428d7b3dSmrg} sampler_extend_t; 1365428d7b3dSmrg 1366428d7b3dSmrg#endif 1367