1fa225cbcSrjs/*
2fa225cbcSrjs * Copyright � 2006 Intel Corporation
3fa225cbcSrjs *
4fa225cbcSrjs * Permission is hereby granted, free of charge, to any person obtaining a
5fa225cbcSrjs * copy of this software and associated documentation files (the "Software"),
6fa225cbcSrjs * to deal in the Software without restriction, including without limitation
7fa225cbcSrjs * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fa225cbcSrjs * and/or sell copies of the Software, and to permit persons to whom the
9fa225cbcSrjs * Software is furnished to do so, subject to the following conditions:
10fa225cbcSrjs *
11fa225cbcSrjs * The above copyright notice and this permission notice (including the next
12fa225cbcSrjs * paragraph) shall be included in all copies or substantial portions of the
13fa225cbcSrjs * Software.
14fa225cbcSrjs *
15fa225cbcSrjs * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16fa225cbcSrjs * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17fa225cbcSrjs * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18fa225cbcSrjs * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19fa225cbcSrjs * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20fa225cbcSrjs * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21fa225cbcSrjs * SOFTWARE.
22fa225cbcSrjs *
23fa225cbcSrjs * Authors:
24fa225cbcSrjs *    Eric Anholt <eric@anholt.net>
25fa225cbcSrjs *
26fa225cbcSrjs */
27fa225cbcSrjs
28fa225cbcSrjs/**
29fa225cbcSrjs * @file SDVO command definitions and structures.
30fa225cbcSrjs */
31fa225cbcSrjs
32fa225cbcSrjs#define SDVO_OUTPUT_FIRST   (0)
33fa225cbcSrjs#define SDVO_OUTPUT_TMDS0   (1 << 0)
34fa225cbcSrjs#define SDVO_OUTPUT_RGB0    (1 << 1)
35fa225cbcSrjs#define SDVO_OUTPUT_CVBS0   (1 << 2)
36fa225cbcSrjs#define SDVO_OUTPUT_SVID0   (1 << 3)
37fa225cbcSrjs#define SDVO_OUTPUT_YPRPB0  (1 << 4)
38fa225cbcSrjs#define SDVO_OUTPUT_SCART0  (1 << 5)
39fa225cbcSrjs#define SDVO_OUTPUT_LVDS0   (1 << 6)
40fa225cbcSrjs#define SDVO_OUTPUT_TMDS1   (1 << 8)
41fa225cbcSrjs#define SDVO_OUTPUT_RGB1    (1 << 9)
42fa225cbcSrjs#define SDVO_OUTPUT_CVBS1   (1 << 10)
43fa225cbcSrjs#define SDVO_OUTPUT_SVID1   (1 << 11)
44fa225cbcSrjs#define SDVO_OUTPUT_YPRPB1  (1 << 12)
45fa225cbcSrjs#define SDVO_OUTPUT_SCART1  (1 << 13)
46fa225cbcSrjs#define SDVO_OUTPUT_LVDS1   (1 << 14)
47fa225cbcSrjs#define SDVO_OUTPUT_LAST    (14)
48fa225cbcSrjs
49fa225cbcSrjsstruct i830_sdvo_caps {
50fa225cbcSrjs    uint8_t vendor_id;
51fa225cbcSrjs    uint8_t device_id;
52fa225cbcSrjs    uint8_t device_rev_id;
53fa225cbcSrjs    uint8_t sdvo_version_minor;
54fa225cbcSrjs    uint8_t sdvo_version_major;
55fa225cbcSrjs    unsigned int sdvo_input_count:2;
56fa225cbcSrjs    unsigned int smooth_scaling:1;
57fa225cbcSrjs    unsigned int sharp_scaling:1;
58fa225cbcSrjs    unsigned int up_scaling:1;
59fa225cbcSrjs    unsigned int down_scaling:1;
60fa225cbcSrjs    unsigned int stall_support:1;
61fa225cbcSrjs    unsigned int pad:1;
62fa225cbcSrjs    uint16_t output_flags;
63fa225cbcSrjs} __attribute__((packed));
64fa225cbcSrjs
65fa225cbcSrjs/** This matches the EDID DTD structure, more or less */
66fa225cbcSrjsstruct i830_sdvo_dtd {
67fa225cbcSrjs    struct {
68fa225cbcSrjs	uint16_t clock;		/**< pixel clock, in 10kHz units */
69fa225cbcSrjs	uint8_t h_active;	/**< lower 8 bits (pixels) */
70fa225cbcSrjs	uint8_t h_blank;	/**< lower 8 bits (pixels) */
71fa225cbcSrjs	uint8_t h_high;		/**< upper 4 bits each h_active, h_blank */
72fa225cbcSrjs	uint8_t v_active;	/**< lower 8 bits (lines) */
73fa225cbcSrjs	uint8_t v_blank;	/**< lower 8 bits (lines) */
74fa225cbcSrjs	uint8_t v_high;		/**< upper 4 bits each v_active, v_blank */
75fa225cbcSrjs    } part1;
76fa225cbcSrjs
77fa225cbcSrjs    struct {
78fa225cbcSrjs	uint8_t h_sync_off;	/**< lower 8 bits, from hblank start */
79fa225cbcSrjs	uint8_t h_sync_width;	/**< lower 8 bits (pixels) */
80fa225cbcSrjs	/** lower 4 bits each vsync offset, vsync width */
81fa225cbcSrjs	uint8_t v_sync_off_width;
82fa225cbcSrjs	/**
83fa225cbcSrjs	 * 2 high bits of hsync offset, 2 high bits of hsync width,
84fa225cbcSrjs	 * bits 4-5 of vsync offset, and 2 high bits of vsync width.
85fa225cbcSrjs	 */
86fa225cbcSrjs	uint8_t sync_off_width_high;
87fa225cbcSrjs	uint8_t dtd_flags;
88fa225cbcSrjs	uint8_t sdvo_flags;
89fa225cbcSrjs	/** bits 6-7 of vsync offset at bits 6-7 */
90fa225cbcSrjs	uint8_t v_sync_off_high;
91fa225cbcSrjs	uint8_t reserved;
92fa225cbcSrjs    } part2;
93fa225cbcSrjs} __attribute__((packed));
94fa225cbcSrjs
95fa225cbcSrjsstruct i830_sdvo_pixel_clock_range {
96fa225cbcSrjs    uint16_t min;			/**< pixel clock, in 10kHz units */
97fa225cbcSrjs    uint16_t max;			/**< pixel clock, in 10kHz units */
98fa225cbcSrjs} __attribute__((packed));
99fa225cbcSrjs
100fa225cbcSrjsstruct i830_sdvo_preferred_input_timing_args {
101fa225cbcSrjs    uint16_t clock;
102fa225cbcSrjs    uint16_t width;
103fa225cbcSrjs    uint16_t height;
104fa225cbcSrjs    uint8_t interlace:1;
105fa225cbcSrjs    uint8_t scaled:1;
106fa225cbcSrjs    uint8_t pad:6;
107fa225cbcSrjs} __attribute__((packed));
108fa225cbcSrjs
109fa225cbcSrjs/* I2C registers for SDVO */
110fa225cbcSrjs#define SDVO_I2C_ARG_0				0x07
111fa225cbcSrjs#define SDVO_I2C_ARG_1				0x06
112fa225cbcSrjs#define SDVO_I2C_ARG_2				0x05
113fa225cbcSrjs#define SDVO_I2C_ARG_3				0x04
114fa225cbcSrjs#define SDVO_I2C_ARG_4				0x03
115fa225cbcSrjs#define SDVO_I2C_ARG_5				0x02
116fa225cbcSrjs#define SDVO_I2C_ARG_6				0x01
117fa225cbcSrjs#define SDVO_I2C_ARG_7				0x00
118fa225cbcSrjs#define SDVO_I2C_OPCODE				0x08
119fa225cbcSrjs#define SDVO_I2C_CMD_STATUS			0x09
120fa225cbcSrjs#define SDVO_I2C_RETURN_0			0x0a
121fa225cbcSrjs#define SDVO_I2C_RETURN_1			0x0b
122fa225cbcSrjs#define SDVO_I2C_RETURN_2			0x0c
123fa225cbcSrjs#define SDVO_I2C_RETURN_3			0x0d
124fa225cbcSrjs#define SDVO_I2C_RETURN_4			0x0e
125fa225cbcSrjs#define SDVO_I2C_RETURN_5			0x0f
126fa225cbcSrjs#define SDVO_I2C_RETURN_6			0x10
127fa225cbcSrjs#define SDVO_I2C_RETURN_7			0x11
128fa225cbcSrjs#define SDVO_I2C_VENDOR_BEGIN			0x20
129fa225cbcSrjs
130fa225cbcSrjs/* Status results */
131fa225cbcSrjs#define SDVO_CMD_STATUS_POWER_ON		0x0
132fa225cbcSrjs#define SDVO_CMD_STATUS_SUCCESS			0x1
133fa225cbcSrjs#define SDVO_CMD_STATUS_NOTSUPP			0x2
134fa225cbcSrjs#define SDVO_CMD_STATUS_INVALID_ARG		0x3
135fa225cbcSrjs#define SDVO_CMD_STATUS_PENDING			0x4
136fa225cbcSrjs#define SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED	0x5
137fa225cbcSrjs#define SDVO_CMD_STATUS_SCALING_NOT_SUPP	0x6
138fa225cbcSrjs
139fa225cbcSrjs/* SDVO commands, argument/result registers */
140fa225cbcSrjs
141fa225cbcSrjs#define SDVO_CMD_RESET					0x01
142fa225cbcSrjs
143fa225cbcSrjs/** Returns a struct i830_sdvo_caps */
144fa225cbcSrjs#define SDVO_CMD_GET_DEVICE_CAPS			0x02
145fa225cbcSrjs
146fa225cbcSrjs#define SDVO_CMD_GET_FIRMWARE_REV			0x86
147fa225cbcSrjs# define SDVO_DEVICE_FIRMWARE_MINOR			SDVO_I2C_RETURN_0
148fa225cbcSrjs# define SDVO_DEVICE_FIRMWARE_MAJOR			SDVO_I2C_RETURN_1
149fa225cbcSrjs# define SDVO_DEVICE_FIRMWARE_PATCH			SDVO_I2C_RETURN_2
150fa225cbcSrjs
151fa225cbcSrjs/**
152fa225cbcSrjs * Reports which inputs are trained (managed to sync).
153fa225cbcSrjs *
154fa225cbcSrjs * Devices must have trained within 2 vsyncs of a mode change.
155fa225cbcSrjs */
156fa225cbcSrjs#define SDVO_CMD_GET_TRAINED_INPUTS			0x03
157fa225cbcSrjsstruct i830_sdvo_get_trained_inputs_response {
158fa225cbcSrjs    unsigned int input0_trained:1;
159fa225cbcSrjs    unsigned int input1_trained:1;
160fa225cbcSrjs    unsigned int pad:6;
161fa225cbcSrjs} __attribute__((packed));
162fa225cbcSrjs
163fa225cbcSrjs/** Returns a struct i830_sdvo_output_flags of active outputs. */
164fa225cbcSrjs#define SDVO_CMD_GET_ACTIVE_OUTPUTS			0x04
165fa225cbcSrjs
166fa225cbcSrjs/**
167fa225cbcSrjs * Sets the current set of active outputs.
168fa225cbcSrjs *
169fa225cbcSrjs * Takes a struct i830_sdvo_output_flags.  Must be preceded by a SET_IN_OUT_MAP
170fa225cbcSrjs * on multi-output devices.
171fa225cbcSrjs */
172fa225cbcSrjs#define SDVO_CMD_SET_ACTIVE_OUTPUTS			0x05
173fa225cbcSrjs
174fa225cbcSrjs/**
175fa225cbcSrjs * Returns the current mapping of SDVO inputs to outputs on the device.
176fa225cbcSrjs *
177fa225cbcSrjs * Returns two struct i830_sdvo_output_flags structures.
178fa225cbcSrjs */
179fa225cbcSrjs#define SDVO_CMD_GET_IN_OUT_MAP				0x06
180fa225cbcSrjsstruct i830_sdvo_in_out_map {
181fa225cbcSrjs    uint16_t in0, in1;
182fa225cbcSrjs};
183fa225cbcSrjs
184fa225cbcSrjs/**
185fa225cbcSrjs * Sets the current mapping of SDVO inputs to outputs on the device.
186fa225cbcSrjs *
187fa225cbcSrjs * Takes two struct i380_sdvo_output_flags structures.
188fa225cbcSrjs */
189fa225cbcSrjs#define SDVO_CMD_SET_IN_OUT_MAP				0x07
190fa225cbcSrjs
191fa225cbcSrjs/**
192fa225cbcSrjs * Returns a struct i830_sdvo_output_flags of attached displays.
193fa225cbcSrjs */
194fa225cbcSrjs#define SDVO_CMD_GET_ATTACHED_DISPLAYS			0x0b
195fa225cbcSrjs
196fa225cbcSrjs/**
197fa225cbcSrjs * Returns a struct i830_sdvo_ouptut_flags of displays supporting hot plugging.
198fa225cbcSrjs */
199fa225cbcSrjs#define SDVO_CMD_GET_HOT_PLUG_SUPPORT			0x0c
200fa225cbcSrjs
201fa225cbcSrjs/**
202fa225cbcSrjs * Takes a struct i830_sdvo_output_flags.
203fa225cbcSrjs */
204fa225cbcSrjs#define SDVO_CMD_SET_ACTIVE_HOT_PLUG			0x0d
205fa225cbcSrjs
206fa225cbcSrjs/**
207fa225cbcSrjs * Returns a struct i830_sdvo_output_flags of displays with hot plug
208fa225cbcSrjs * interrupts enabled.
209fa225cbcSrjs */
210fa225cbcSrjs#define SDVO_CMD_GET_ACTIVE_HOT_PLUG			0x0e
211fa225cbcSrjs
212fa225cbcSrjs#define SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE		0x0f
213fa225cbcSrjsstruct i830_sdvo_get_interrupt_event_source_response {
214fa225cbcSrjs    uint16_t interrupt_status;
215fa225cbcSrjs    unsigned int ambient_light_interrupt:1;
216fa225cbcSrjs    unsigned int hdmi_audio_encrypt_change:1;
217fa225cbcSrjs    unsigned int pad:6;
218fa225cbcSrjs} __attribute__((packed));
219fa225cbcSrjs
220fa225cbcSrjs/**
221fa225cbcSrjs * Selects which input is affected by future input commands.
222fa225cbcSrjs *
223fa225cbcSrjs * Commands affected include SET_INPUT_TIMINGS_PART[12],
224fa225cbcSrjs * GET_INPUT_TIMINGS_PART[12], GET_PREFERRED_INPUT_TIMINGS_PART[12],
225fa225cbcSrjs * GET_INPUT_PIXEL_CLOCK_RANGE, and CREATE_PREFERRED_INPUT_TIMINGS.
226fa225cbcSrjs */
227fa225cbcSrjs#define SDVO_CMD_SET_TARGET_INPUT			0x10
228fa225cbcSrjsstruct i830_sdvo_set_target_input_args {
229fa225cbcSrjs    unsigned int target_1:1;
230fa225cbcSrjs    unsigned int pad:7;
231fa225cbcSrjs} __attribute__((packed));
232fa225cbcSrjs
233fa225cbcSrjs/**
234fa225cbcSrjs * Takes a struct i830_sdvo_output_flags of which outputs are targetted by
235fa225cbcSrjs * future output commands.
236fa225cbcSrjs *
237fa225cbcSrjs * Affected commands inclue SET_OUTPUT_TIMINGS_PART[12],
238fa225cbcSrjs * GET_OUTPUT_TIMINGS_PART[12], and GET_OUTPUT_PIXEL_CLOCK_RANGE.
239fa225cbcSrjs */
240fa225cbcSrjs#define SDVO_CMD_SET_TARGET_OUTPUT			0x11
241fa225cbcSrjs
242fa225cbcSrjs#define SDVO_CMD_GET_INPUT_TIMINGS_PART1		0x12
243fa225cbcSrjs#define SDVO_CMD_GET_INPUT_TIMINGS_PART2		0x13
244fa225cbcSrjs#define SDVO_CMD_SET_INPUT_TIMINGS_PART1		0x14
245fa225cbcSrjs#define SDVO_CMD_SET_INPUT_TIMINGS_PART2		0x15
246fa225cbcSrjs#define SDVO_CMD_SET_OUTPUT_TIMINGS_PART1		0x16
247fa225cbcSrjs#define SDVO_CMD_SET_OUTPUT_TIMINGS_PART2		0x17
248fa225cbcSrjs#define SDVO_CMD_GET_OUTPUT_TIMINGS_PART1		0x18
249fa225cbcSrjs#define SDVO_CMD_GET_OUTPUT_TIMINGS_PART2		0x19
250fa225cbcSrjs/* Part 1 */
251fa225cbcSrjs# define SDVO_DTD_CLOCK_LOW				SDVO_I2C_ARG_0
252fa225cbcSrjs# define SDVO_DTD_CLOCK_HIGH				SDVO_I2C_ARG_1
253fa225cbcSrjs# define SDVO_DTD_H_ACTIVE				SDVO_I2C_ARG_2
254fa225cbcSrjs# define SDVO_DTD_H_BLANK				SDVO_I2C_ARG_3
255fa225cbcSrjs# define SDVO_DTD_H_HIGH				SDVO_I2C_ARG_4
256fa225cbcSrjs# define SDVO_DTD_V_ACTIVE				SDVO_I2C_ARG_5
257fa225cbcSrjs# define SDVO_DTD_V_BLANK				SDVO_I2C_ARG_6
258fa225cbcSrjs# define SDVO_DTD_V_HIGH				SDVO_I2C_ARG_7
259fa225cbcSrjs/* Part 2 */
260fa225cbcSrjs# define SDVO_DTD_HSYNC_OFF				SDVO_I2C_ARG_0
261fa225cbcSrjs# define SDVO_DTD_HSYNC_WIDTH				SDVO_I2C_ARG_1
262fa225cbcSrjs# define SDVO_DTD_VSYNC_OFF_WIDTH			SDVO_I2C_ARG_2
263fa225cbcSrjs# define SDVO_DTD_SYNC_OFF_WIDTH_HIGH			SDVO_I2C_ARG_3
264fa225cbcSrjs# define SDVO_DTD_DTD_FLAGS				SDVO_I2C_ARG_4
265fa225cbcSrjs# define SDVO_DTD_DTD_FLAG_INTERLACED				(1 << 7)
266fa225cbcSrjs# define SDVO_DTD_DTD_FLAG_STEREO_MASK				(3 << 5)
267fa225cbcSrjs# define SDVO_DTD_DTD_FLAG_INPUT_MASK				(3 << 3)
268fa225cbcSrjs# define SDVO_DTD_DTD_FLAG_SYNC_MASK				(3 << 1)
269fa225cbcSrjs# define SDVO_DTD_SDVO_FLAS				SDVO_I2C_ARG_5
270fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_STALL				(1 << 7)
271fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_CENTERED				(0 << 6)
272fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_UPPER_LEFT				(1 << 6)
273fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_SCALING_MASK			(3 << 4)
274fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_SCALING_NONE			(0 << 4)
275fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_SCALING_SHARP			(1 << 4)
276fa225cbcSrjs# define SDVO_DTD_SDVO_FLAG_SCALING_SMOOTH			(2 << 4)
277fa225cbcSrjs# define SDVO_DTD_VSYNC_OFF_HIGH			SDVO_I2C_ARG_6
278fa225cbcSrjs
279fa225cbcSrjs/**
280fa225cbcSrjs * Generates a DTD based on the given width, height, and flags.
281fa225cbcSrjs *
282fa225cbcSrjs * This will be supported by any device supporting scaling or interlaced
283fa225cbcSrjs * modes.
284fa225cbcSrjs */
285fa225cbcSrjs#define SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING		0x1a
286fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_CLOCK_LOW		SDVO_I2C_ARG_0
287fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_CLOCK_HIGH		SDVO_I2C_ARG_1
288fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_WIDTH_LOW		SDVO_I2C_ARG_2
289fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_WIDTH_HIGH		SDVO_I2C_ARG_3
290fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_HEIGHT_LOW		SDVO_I2C_ARG_4
291fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_HEIGHT_HIGH	SDVO_I2C_ARG_5
292fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_FLAGS		SDVO_I2C_ARG_6
293fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_FLAGS_INTERLACED		(1 << 0)
294fa225cbcSrjs# define SDVO_PREFERRED_INPUT_TIMING_FLAGS_SCALED		(1 << 1)
295fa225cbcSrjs
296fa225cbcSrjs#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1	0x1b
297fa225cbcSrjs#define SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2	0x1c
298fa225cbcSrjs
299fa225cbcSrjs/** Returns a struct i830_sdvo_pixel_clock_range */
300fa225cbcSrjs#define SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE		0x1d
301fa225cbcSrjs/** Returns a struct i830_sdvo_pixel_clock_range */
302fa225cbcSrjs#define SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE		0x1e
303fa225cbcSrjs
304fa225cbcSrjs/** Returns a byte bitfield containing SDVO_CLOCK_RATE_MULT_* flags */
305fa225cbcSrjs#define SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS		0x1f
306fa225cbcSrjs
307fa225cbcSrjs/** Returns a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
308fa225cbcSrjs#define SDVO_CMD_GET_CLOCK_RATE_MULT			0x20
309fa225cbcSrjs/** Takes a byte containing a SDVO_CLOCK_RATE_MULT_* flag */
310fa225cbcSrjs#define SDVO_CMD_SET_CLOCK_RATE_MULT			0x21
311fa225cbcSrjs# define SDVO_CLOCK_RATE_MULT_1X				(1 << 0)
312fa225cbcSrjs# define SDVO_CLOCK_RATE_MULT_2X				(1 << 1)
313fa225cbcSrjs# define SDVO_CLOCK_RATE_MULT_4X				(1 << 3)
314fa225cbcSrjs
315fa225cbcSrjs#define SDVO_CMD_GET_SUPPORTED_TV_FORMATS		0x27
316fa225cbcSrjs/** 5 bytes of bit flags for TV formats shared by all TV format functions */
317fa225cbcSrjsstruct i830_sdvo_tv_format {
318fa225cbcSrjs    unsigned int ntsc_m:1;
319fa225cbcSrjs    unsigned int ntsc_j:1;
320fa225cbcSrjs    unsigned int ntsc_443:1;
321fa225cbcSrjs    unsigned int pal_b:1;
322fa225cbcSrjs    unsigned int pal_d:1;
323fa225cbcSrjs    unsigned int pal_g:1;
324fa225cbcSrjs    unsigned int pal_h:1;
325fa225cbcSrjs    unsigned int pal_i:1;
326fa225cbcSrjs
327fa225cbcSrjs    unsigned int pal_m:1;
328fa225cbcSrjs    unsigned int pal_n:1;
329fa225cbcSrjs    unsigned int pal_nc:1;
330fa225cbcSrjs    unsigned int pal_60:1;
331fa225cbcSrjs    unsigned int secam_b:1;
332fa225cbcSrjs    unsigned int secam_d:1;
333fa225cbcSrjs    unsigned int secam_g:1;
334fa225cbcSrjs    unsigned int secam_k:1;
335fa225cbcSrjs
336fa225cbcSrjs    unsigned int secam_k1:1;
337fa225cbcSrjs    unsigned int secam_l:1;
338fa225cbcSrjs    unsigned int secam_60:1;
339fa225cbcSrjs    unsigned int hdtv_std_smpte_240m_1080i_59:1;
340fa225cbcSrjs    unsigned int hdtv_std_smpte_240m_1080i_60:1;
341fa225cbcSrjs    unsigned int hdtv_std_smpte_260m_1080i_59:1;
342fa225cbcSrjs    unsigned int hdtv_std_smpte_260m_1080i_60:1;
343fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_50:1;
344fa225cbcSrjs
345fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_59:1;
346fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_60:1;
347fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_23:1;
348fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_24:1;
349fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_25:1;
350fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_29:1;
351fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_30:1;
352fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_50:1;
353fa225cbcSrjs
354fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_59:1;
355fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_60:1;
356fa225cbcSrjs    unsigned int hdtv_std_smpte_295m_1080i_50:1;
357fa225cbcSrjs    unsigned int hdtv_std_smpte_295m_1080p_50:1;
358fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_59:1;
359fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_60:1;
360fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_50:1;
361fa225cbcSrjs    unsigned int hdtv_std_smpte_293m_480p_59:1;
362fa225cbcSrjs
363fa225cbcSrjs    unsigned int hdtv_std_smpte_170m_480i_59:1;
364fa225cbcSrjs    unsigned int hdtv_std_iturbt601_576i_50:1;
365fa225cbcSrjs    unsigned int hdtv_std_iturbt601_576p_50:1;
366fa225cbcSrjs    unsigned int hdtv_std_eia_7702a_480i_60:1;
367fa225cbcSrjs    unsigned int hdtv_std_eia_7702a_480p_60:1;
368fa225cbcSrjs    unsigned int pad:3;
369fa225cbcSrjs} __attribute__((packed));
370fa225cbcSrjs
371fa225cbcSrjs#define SDVO_CMD_GET_TV_FORMAT				0x28
372fa225cbcSrjs
373fa225cbcSrjs/** This command should be run before SetOutputTimingsPart[12] */
374fa225cbcSrjs#define SDVO_CMD_SET_TV_FORMAT				0x29
375fa225cbcSrjs
376fa225cbcSrjs/** Returns the resolutiosn that can be used with the given TV format */
377fa225cbcSrjs#define SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT		0x83
378fa225cbcSrjsstruct i830_sdvo_sdtv_resolution_request {
379fa225cbcSrjs    unsigned int ntsc_m:1;
380fa225cbcSrjs    unsigned int ntsc_j:1;
381fa225cbcSrjs    unsigned int ntsc_443:1;
382fa225cbcSrjs    unsigned int pal_b:1;
383fa225cbcSrjs    unsigned int pal_d:1;
384fa225cbcSrjs    unsigned int pal_g:1;
385fa225cbcSrjs    unsigned int pal_h:1;
386fa225cbcSrjs    unsigned int pal_i:1;
387fa225cbcSrjs
388fa225cbcSrjs    unsigned int pal_m:1;
389fa225cbcSrjs    unsigned int pal_n:1;
390fa225cbcSrjs    unsigned int pal_nc:1;
391fa225cbcSrjs    unsigned int pal_60:1;
392fa225cbcSrjs    unsigned int secam_b:1;
393fa225cbcSrjs    unsigned int secam_d:1;
394fa225cbcSrjs    unsigned int secam_g:1;
395fa225cbcSrjs    unsigned int secam_k:1;
396fa225cbcSrjs
397fa225cbcSrjs    unsigned int secam_k1:1;
398fa225cbcSrjs    unsigned int secam_l:1;
399fa225cbcSrjs    unsigned int secam_60:1;
400fa225cbcSrjs    unsigned int pad:5;
401fa225cbcSrjs} __attribute__((packed));
402fa225cbcSrjs
403fa225cbcSrjsstruct i830_sdvo_sdtv_resolution_reply {
404fa225cbcSrjs    unsigned int res_320x200:1;
405fa225cbcSrjs    unsigned int res_320x240:1;
406fa225cbcSrjs    unsigned int res_400x300:1;
407fa225cbcSrjs    unsigned int res_640x350:1;
408fa225cbcSrjs    unsigned int res_640x400:1;
409fa225cbcSrjs    unsigned int res_640x480:1;
410fa225cbcSrjs    unsigned int res_704x480:1;
411fa225cbcSrjs    unsigned int res_704x576:1;
412fa225cbcSrjs
413fa225cbcSrjs    unsigned int res_720x350:1;
414fa225cbcSrjs    unsigned int res_720x400:1;
415fa225cbcSrjs    unsigned int res_720x480:1;
416fa225cbcSrjs    unsigned int res_720x540:1;
417fa225cbcSrjs    unsigned int res_720x576:1;
418fa225cbcSrjs    unsigned int res_768x576:1;
419fa225cbcSrjs    unsigned int res_800x600:1;
420fa225cbcSrjs    unsigned int res_832x624:1;
421fa225cbcSrjs
422fa225cbcSrjs    unsigned int res_920x766:1;
423fa225cbcSrjs    unsigned int res_1024x768:1;
424fa225cbcSrjs    unsigned int res_1280x1024:1;
425fa225cbcSrjs    unsigned int pad:5;
426fa225cbcSrjs} __attribute__((packed));
427fa225cbcSrjs
428fa225cbcSrjs/* Get supported resolution with squire pixel aspect ratio that can be
429fa225cbcSrjs   scaled for the requested HDTV format */
430fa225cbcSrjs#define SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT		0x85
431fa225cbcSrjs
432fa225cbcSrjsstruct i830_sdvo_hdtv_resolution_request {
433fa225cbcSrjs    unsigned int hdtv_std_smpte_240m_1080i_59:1;
434fa225cbcSrjs    unsigned int hdtv_std_smpte_240m_1080i_60:1;
435fa225cbcSrjs    unsigned int hdtv_std_smpte_260m_1080i_59:1;
436fa225cbcSrjs    unsigned int hdtv_std_smpte_260m_1080i_60:1;
437fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_50:1;
438fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_59:1;
439fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080i_60:1;
440fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_23:1;
441fa225cbcSrjs
442fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_24:1;
443fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_25:1;
444fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_29:1;
445fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_30:1;
446fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_50:1;
447fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_59:1;
448fa225cbcSrjs    unsigned int hdtv_std_smpte_274m_1080p_60:1;
449fa225cbcSrjs    unsigned int hdtv_std_smpte_295m_1080i_50:1;
450fa225cbcSrjs
451fa225cbcSrjs    unsigned int hdtv_std_smpte_295m_1080p_50:1;
452fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_59:1;
453fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_60:1;
454fa225cbcSrjs    unsigned int hdtv_std_smpte_296m_720p_50:1;
455fa225cbcSrjs    unsigned int hdtv_std_smpte_293m_480p_59:1;
456fa225cbcSrjs    unsigned int hdtv_std_smpte_170m_480i_59:1;
457fa225cbcSrjs    unsigned int hdtv_std_iturbt601_576i_50:1;
458fa225cbcSrjs    unsigned int hdtv_std_iturbt601_576p_50:1;
459fa225cbcSrjs
460fa225cbcSrjs    unsigned int hdtv_std_eia_7702a_480i_60:1;
461fa225cbcSrjs    unsigned int hdtv_std_eia_7702a_480p_60:1;
462fa225cbcSrjs    unsigned int pad:6;
463fa225cbcSrjs} __attribute__((packed));
464fa225cbcSrjs
465fa225cbcSrjsstruct i830_sdvo_hdtv_resolution_reply {
466fa225cbcSrjs    unsigned int res_640x480:1;
467fa225cbcSrjs    unsigned int res_800x600:1;
468fa225cbcSrjs    unsigned int res_1024x768:1;
469fa225cbcSrjs    unsigned int res_1280x960:1;
470fa225cbcSrjs    unsigned int res_1400x1050:1;
471fa225cbcSrjs    unsigned int res_1600x1200:1;
472fa225cbcSrjs    unsigned int res_1920x1440:1;
473fa225cbcSrjs    unsigned int res_2048x1536:1;
474fa225cbcSrjs
475fa225cbcSrjs    unsigned int res_2560x1920:1;
476fa225cbcSrjs    unsigned int res_3200x2400:1;
477fa225cbcSrjs    unsigned int res_3840x2880:1;
478fa225cbcSrjs    unsigned int pad1:5;
479fa225cbcSrjs
480fa225cbcSrjs    unsigned int res_848x480:1;
481fa225cbcSrjs    unsigned int res_1064x600:1;
482fa225cbcSrjs    unsigned int res_1280x720:1;
483fa225cbcSrjs    unsigned int res_1360x768:1;
484fa225cbcSrjs    unsigned int res_1704x960:1;
485fa225cbcSrjs    unsigned int res_1864x1050:1;
486fa225cbcSrjs    unsigned int res_1920x1080:1;
487fa225cbcSrjs    unsigned int res_2128x1200:1;
488fa225cbcSrjs
489fa225cbcSrjs    unsigned int res_2560x1400:1;
490fa225cbcSrjs    unsigned int res_2728x1536:1;
491fa225cbcSrjs    unsigned int res_3408x1920:1;
492fa225cbcSrjs    unsigned int res_4264x2400:1;
493fa225cbcSrjs    unsigned int res_5120x2880:1;
494fa225cbcSrjs    unsigned int pad2:3;
495fa225cbcSrjs
496fa225cbcSrjs    unsigned int res_768x480:1;
497fa225cbcSrjs    unsigned int res_960x600:1;
498fa225cbcSrjs    unsigned int res_1152x720:1;
499fa225cbcSrjs    unsigned int res_1124x768:1;
500fa225cbcSrjs    unsigned int res_1536x960:1;
501fa225cbcSrjs    unsigned int res_1680x1050:1;
502fa225cbcSrjs    unsigned int res_1728x1080:1;
503fa225cbcSrjs    unsigned int res_1920x1200:1;
504fa225cbcSrjs
505fa225cbcSrjs    unsigned int res_2304x1440:1;
506fa225cbcSrjs    unsigned int res_2456x1536:1;
507fa225cbcSrjs    unsigned int res_3072x1920:1;
508fa225cbcSrjs    unsigned int res_3840x2400:1;
509fa225cbcSrjs    unsigned int res_4608x2880:1;
510fa225cbcSrjs    unsigned int pad3:3;
511fa225cbcSrjs
512fa225cbcSrjs    unsigned int res_1280x1024:1;
513fa225cbcSrjs    unsigned int pad4:7;
514fa225cbcSrjs
515fa225cbcSrjs    unsigned int res_1280x768:1;
516fa225cbcSrjs    unsigned int pad5:7;
517fa225cbcSrjs} __attribute__((packed));
518fa225cbcSrjs
519fa225cbcSrjs/* Get supported power state returns info for encoder and monitor, rely on
520fa225cbcSrjs   last SetTargetInput and SetTargetOutput calls */
521fa225cbcSrjs#define SDVO_CMD_GET_SUPPORTED_POWER_STATES		0x2a
522fa225cbcSrjs/* Get power state returns info for encoder and monitor, rely on last
523fa225cbcSrjs   SetTargetInput and SetTargetOutput calls */
524fa225cbcSrjs#define SDVO_CMD_GET_POWER_STATE			0x2b
525fa225cbcSrjs/* Set encoder power state */
526fa225cbcSrjs#define SDVO_CMD_SET_ENCODER_POWER_STATE		0x2c
527fa225cbcSrjs# define SDVO_ENCODER_STATE_ON					(1 << 0)
528fa225cbcSrjs# define SDVO_ENCODER_STATE_STANDBY				(1 << 1)
529fa225cbcSrjs# define SDVO_ENCODER_STATE_SUSPEND				(1 << 2)
530fa225cbcSrjs# define SDVO_ENCODER_STATE_OFF					(1 << 3)
531fa225cbcSrjs# define SDVO_MONITOR_STATE_ON					(1 << 4)
532fa225cbcSrjs# define SDVO_MONITOR_STATE_STANDBY				(1 << 5)
533fa225cbcSrjs# define SDVO_MONITOR_STATE_SUSPEND				(1 << 6)
534fa225cbcSrjs# define SDVO_MONITOR_STATE_OFF					(1 << 7)
535fa225cbcSrjs
536fa225cbcSrjs#define SDVO_CMD_GET_MAX_PANEL_POWER_SEQUENCING		0x2d
537fa225cbcSrjs#define SDVO_CMD_GET_PANEL_POWER_SEQUENCING		0x2e
538fa225cbcSrjs#define SDVO_CMD_SET_PANEL_POWER_SEQUENCING		0x2f
539fa225cbcSrjs/**
540fa225cbcSrjs * The panel power sequencing parameters are in units of milliseconds.
541fa225cbcSrjs * The high fields are bits 8:9 of the 10-bit values.
542fa225cbcSrjs */
543fa225cbcSrjsstruct sdvo_panel_power_sequencing {
544fa225cbcSrjs    uint8_t t0;
545fa225cbcSrjs    uint8_t t1;
546fa225cbcSrjs    uint8_t t2;
547fa225cbcSrjs    uint8_t t3;
548fa225cbcSrjs    uint8_t t4;
549fa225cbcSrjs
550fa225cbcSrjs    unsigned int t0_high:2;
551fa225cbcSrjs    unsigned int t1_high:2;
552fa225cbcSrjs    unsigned int t2_high:2;
553fa225cbcSrjs    unsigned int t3_high:2;
554fa225cbcSrjs
555fa225cbcSrjs    unsigned int t4_high:2;
556fa225cbcSrjs    unsigned int pad:6;
557fa225cbcSrjs} __attribute__((packed));
558fa225cbcSrjs
559fa225cbcSrjs#define SDVO_CMD_GET_MAX_BACKLIGHT_LEVEL		0x30
560fa225cbcSrjsstruct sdvo_max_backlight_reply {
561fa225cbcSrjs    uint8_t max_value;
562fa225cbcSrjs    uint8_t default_value;
563fa225cbcSrjs} __attribute__((packed));
564fa225cbcSrjs
565fa225cbcSrjs#define SDVO_CMD_GET_BACKLIGHT_LEVEL			0x31
566fa225cbcSrjs#define SDVO_CMD_SET_BACKLIGHT_LEVEL			0x32
567fa225cbcSrjs
568fa225cbcSrjs#define SDVO_CMD_GET_AMBIENT_LIGHT			0x33
569fa225cbcSrjsstruct sdvo_get_ambient_light_reply {
570fa225cbcSrjs    uint16_t trip_low;
571fa225cbcSrjs    uint16_t trip_high;
572fa225cbcSrjs    uint16_t value;
573fa225cbcSrjs} __attribute__((packed));
574fa225cbcSrjs#define SDVO_CMD_SET_AMBIENT_LIGHT			0x34
575fa225cbcSrjsstruct sdvo_set_ambient_light_reply {
576fa225cbcSrjs    uint16_t trip_low;
577fa225cbcSrjs    uint16_t trip_high;
578fa225cbcSrjs    unsigned int enable:1;
579fa225cbcSrjs    unsigned int pad:7;
580fa225cbcSrjs} __attribute__((packed));
581fa225cbcSrjs
582fa225cbcSrjs/* Set display power state */
583fa225cbcSrjs#define SDVO_CMD_SET_DISPLAY_POWER_STATE		0x7d
584fa225cbcSrjs# define SDVO_DISPLAY_STATE_ON				(1 << 0)
585fa225cbcSrjs# define SDVO_DISPLAY_STATE_STANDBY			(1 << 1)
586fa225cbcSrjs# define SDVO_DISPLAY_STATE_SUSPEND			(1 << 2)
587fa225cbcSrjs# define SDVO_DISPLAY_STATE_OFF				(1 << 3)
588fa225cbcSrjs
589fa225cbcSrjs#define SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS		0x84
590fa225cbcSrjsstruct i830_sdvo_enhancements_reply {
591fa225cbcSrjs    unsigned int flicker_filter:1;
592fa225cbcSrjs    unsigned int flicker_filter_adaptive:1;
593fa225cbcSrjs    unsigned int flicker_filter_2d:1;
594fa225cbcSrjs    unsigned int saturation:1;
595fa225cbcSrjs    unsigned int hue:1;
596fa225cbcSrjs    unsigned int brightness:1;
597fa225cbcSrjs    unsigned int contrast:1;
598fa225cbcSrjs    unsigned int overscan_h:1;
599fa225cbcSrjs
600fa225cbcSrjs    unsigned int overscan_v:1;
601fa225cbcSrjs    unsigned int position_h:1;
602fa225cbcSrjs    unsigned int position_v:1;
603fa225cbcSrjs    unsigned int sharpness:1;
604fa225cbcSrjs    unsigned int dot_crawl:1;
605fa225cbcSrjs    unsigned int dither:1;
606fa225cbcSrjs    unsigned int max_tv_chroma_filter:1;
607fa225cbcSrjs    unsigned int max_tv_luma_filter:1;
608fa225cbcSrjs} __attribute__((packed));
609fa225cbcSrjs
610fa225cbcSrjs/* Picture enhancement limits below are dependent on the current TV format,
611fa225cbcSrjs * and thus need to be queried and set after it.
612fa225cbcSrjs */
613fa225cbcSrjs#define SDVO_CMD_GET_MAX_FLICKER_FITER			0x4d
614fa225cbcSrjs#define SDVO_CMD_GET_MAX_ADAPTIVE_FLICKER_FITER		0x7b
615fa225cbcSrjs#define SDVO_CMD_GET_MAX_2D_FLICKER_FITER		0x52
616fa225cbcSrjs#define SDVO_CMD_GET_MAX_SATURATION			0x55
617fa225cbcSrjs#define SDVO_CMD_GET_MAX_HUE				0x58
618fa225cbcSrjs#define SDVO_CMD_GET_MAX_BRIGHTNESS			0x5b
619fa225cbcSrjs#define SDVO_CMD_GET_MAX_CONTRAST			0x5e
620fa225cbcSrjs#define SDVO_CMD_GET_MAX_OVERSCAN_H			0x61
621fa225cbcSrjs#define SDVO_CMD_GET_MAX_OVERSCAN_V			0x64
622fa225cbcSrjs#define SDVO_CMD_GET_MAX_POSITION_H			0x67
623fa225cbcSrjs#define SDVO_CMD_GET_MAX_POSITION_V			0x6a
624fa225cbcSrjs#define SDVO_CMD_GET_MAX_SHARPNESS_V			0x6d
625fa225cbcSrjs#define SDVO_CMD_GET_MAX_TV_CHROMA			0x74
626fa225cbcSrjs#define SDVO_CMD_GET_MAX_TV_LUMA			0x77
627fa225cbcSrjsstruct i830_sdvo_enhancement_limits_reply {
628fa225cbcSrjs    uint16_t max_value;
629fa225cbcSrjs    uint16_t default_value;
630fa225cbcSrjs} __attribute__((packed));
631fa225cbcSrjs
632fa225cbcSrjs#define SDVO_CMD_GET_LVDS_PANEL_INFORMATION		0x7f
633fa225cbcSrjs#define SDVO_CMD_SET_LVDS_PANEL_INFORMATION		0x80
634fa225cbcSrjs# define SDVO_LVDS_COLOR_DEPTH_18			(0 << 0)
635fa225cbcSrjs# define SDVO_LVDS_COLOR_DEPTH_24			(1 << 0)
636fa225cbcSrjs# define SDVO_LVDS_CONNECTOR_SPWG			(0 << 2)
637fa225cbcSrjs# define SDVO_LVDS_CONNECTOR_OPENLDI			(1 << 2)
638fa225cbcSrjs# define SDVO_LVDS_SINGLE_CHANNEL			(0 << 4)
639fa225cbcSrjs# define SDVO_LVDS_DUAL_CHANNEL				(1 << 4)
640fa225cbcSrjs
641fa225cbcSrjs#define SDVO_CMD_GET_FLICKER_FILTER			0x4e
642fa225cbcSrjs#define SDVO_CMD_SET_FLICKER_FILTER			0x4f
643fa225cbcSrjs#define SDVO_CMD_GET_ADAPTIVE_FLICKER_FITER		0x50
644fa225cbcSrjs#define SDVO_CMD_SET_ADAPTIVE_FLICKER_FITER		0x51
645fa225cbcSrjs#define SDVO_CMD_GET_2D_FLICKER_FITER			0x53
646fa225cbcSrjs#define SDVO_CMD_SET_2D_FLICKER_FITER			0x54
647fa225cbcSrjs#define SDVO_CMD_GET_SATURATION				0x56
648fa225cbcSrjs#define SDVO_CMD_SET_SATURATION				0x57
649fa225cbcSrjs#define SDVO_CMD_GET_HUE				0x59
650fa225cbcSrjs#define SDVO_CMD_SET_HUE				0x5a
651fa225cbcSrjs#define SDVO_CMD_GET_BRIGHTNESS				0x5c
652fa225cbcSrjs#define SDVO_CMD_SET_BRIGHTNESS				0x5d
653fa225cbcSrjs#define SDVO_CMD_GET_CONTRAST				0x5f
654fa225cbcSrjs#define SDVO_CMD_SET_CONTRAST				0x60
655fa225cbcSrjs#define SDVO_CMD_GET_OVERSCAN_H				0x62
656fa225cbcSrjs#define SDVO_CMD_SET_OVERSCAN_H				0x63
657fa225cbcSrjs#define SDVO_CMD_GET_OVERSCAN_V				0x65
658fa225cbcSrjs#define SDVO_CMD_SET_OVERSCAN_V				0x66
659fa225cbcSrjs#define SDVO_CMD_GET_POSITION_H				0x68
660fa225cbcSrjs#define SDVO_CMD_SET_POSITION_H				0x69
661fa225cbcSrjs#define SDVO_CMD_GET_POSITION_V				0x6b
662fa225cbcSrjs#define SDVO_CMD_SET_POSITION_V				0x6c
663fa225cbcSrjs#define SDVO_CMD_GET_SHARPNESS				0x6e
664fa225cbcSrjs#define SDVO_CMD_SET_SHARPNESS				0x6f
665fa225cbcSrjs#define SDVO_CMD_GET_TV_CHROMA				0x75
666fa225cbcSrjs#define SDVO_CMD_SET_TV_CHROMA				0x76
667fa225cbcSrjs#define SDVO_CMD_GET_TV_LUMA				0x78
668fa225cbcSrjs#define SDVO_CMD_SET_TV_LUMA				0x79
669fa225cbcSrjsstruct i830_sdvo_enhancements_arg {
670fa225cbcSrjs    uint16_t value;
671fa225cbcSrjs}__attribute__((packed));
672fa225cbcSrjs
673fa225cbcSrjs#define SDVO_CMD_GET_DOT_CRAWL				0x70
674fa225cbcSrjs#define SDVO_CMD_SET_DOT_CRAWL				0x71
675fa225cbcSrjs# define SDVO_DOT_CRAWL_ON					(1 << 0)
676fa225cbcSrjs# define SDVO_DOT_CRAWL_DEFAULT_ON				(1 << 1)
677fa225cbcSrjs
678fa225cbcSrjs#define SDVO_CMD_GET_DITHER				0x72
679fa225cbcSrjs#define SDVO_CMD_SET_DITHER				0x73
680fa225cbcSrjs# define SDVO_DITHER_ON						(1 << 0)
681fa225cbcSrjs# define SDVO_DITHER_DEFAULT_ON					(1 << 1)
682fa225cbcSrjs
683fa225cbcSrjs#define SDVO_CMD_SET_CONTROL_BUS_SWITCH			0x7a
684fa225cbcSrjs# define SDVO_CONTROL_BUS_PROM				(1 << 0)
685fa225cbcSrjs# define SDVO_CONTROL_BUS_DDC1				(1 << 1)
686fa225cbcSrjs# define SDVO_CONTROL_BUS_DDC2				(1 << 2)
687fa225cbcSrjs# define SDVO_CONTROL_BUS_DDC3				(1 << 3)
688fa225cbcSrjs
689fa225cbcSrjs/* HDMI op codes */
690fa225cbcSrjs#define SDVO_CMD_GET_SUPP_ENCODE	0x9d
691fa225cbcSrjs#define SDVO_CMD_GET_ENCODE		0x9e
692fa225cbcSrjs#define SDVO_CMD_SET_ENCODE		0x9f
693fa225cbcSrjs  #define SDVO_ENCODE_DVI	0x0
694fa225cbcSrjs  #define SDVO_ENCODE_HDMI	0x1
695fa225cbcSrjs#define SDVO_CMD_SET_PIXEL_REPLI	0x8b
696fa225cbcSrjs#define SDVO_CMD_GET_PIXEL_REPLI	0x8c
697fa225cbcSrjs#define SDVO_CMD_GET_COLORIMETRY_CAP	0x8d
698fa225cbcSrjs#define SDVO_CMD_SET_COLORIMETRY	0x8e
699fa225cbcSrjs  #define SDVO_COLORIMETRY_RGB256   0x0
700fa225cbcSrjs  #define SDVO_COLORIMETRY_RGB220   0x1
701fa225cbcSrjs  #define SDVO_COLORIMETRY_YCrCb422 0x3
702fa225cbcSrjs  #define SDVO_COLORIMETRY_YCrCb444 0x4
703fa225cbcSrjs#define SDVO_CMD_GET_COLORIMETRY	0x8f
704fa225cbcSrjs#define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
705fa225cbcSrjs#define SDVO_CMD_SET_AUDIO_STAT		0x91
706fa225cbcSrjs#define SDVO_CMD_GET_AUDIO_STAT		0x92
707fa225cbcSrjs#define SDVO_CMD_SET_HBUF_INDEX		0x93
708fa225cbcSrjs#define SDVO_CMD_GET_HBUF_INDEX		0x94
709fa225cbcSrjs#define SDVO_CMD_GET_HBUF_INFO		0x95
710fa225cbcSrjs#define SDVO_CMD_SET_HBUF_AV_SPLIT	0x96
711fa225cbcSrjs#define SDVO_CMD_GET_HBUF_AV_SPLIT	0x97
712fa225cbcSrjs#define SDVO_CMD_SET_HBUF_DATA		0x98
713fa225cbcSrjs#define SDVO_CMD_GET_HBUF_DATA		0x99
714fa225cbcSrjs#define SDVO_CMD_SET_HBUF_TXRATE	0x9a
715fa225cbcSrjs#define SDVO_CMD_GET_HBUF_TXRATE	0x9b
716fa225cbcSrjs  #define SDVO_HBUF_TX_DISABLED	(0 << 6)
717fa225cbcSrjs  #define SDVO_HBUF_TX_ONCE	(2 << 6)
718fa225cbcSrjs  #define SDVO_HBUF_TX_VSYNC	(3 << 6)
719fa225cbcSrjs#define SDVO_CMD_GET_AUDIO_TX_INFO	0x9c
720fa225cbcSrjs
721fa225cbcSrjsstruct i830_sdvo_encode{
722fa225cbcSrjs    uint8_t dvi_rev;
723fa225cbcSrjs    uint8_t hdmi_rev;
724fa225cbcSrjs} __attribute__ ((packed));
725fa225cbcSrjs
726fa225cbcSrjs#define SDVO_STALL_FLAG (1 << 7)
727