103b705cfSriastradh/* i810_common.h -- common header definitions for I810 2D/3D/DRM suite
203b705cfSriastradh *
303b705cfSriastradh * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
403b705cfSriastradh * All Rights Reserved.
503b705cfSriastradh *
603b705cfSriastradh * Permission is hereby granted, free of charge, to any person obtaining a
703b705cfSriastradh * copy of this software and associated documentation files (the "Software"),
803b705cfSriastradh * to deal in the Software without restriction, including without limitation
903b705cfSriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1003b705cfSriastradh * and/or sell copies of the Software, and to permit persons to whom the
1103b705cfSriastradh * Software is furnished to do so, subject to the following conditions:
1203b705cfSriastradh *
1303b705cfSriastradh * The above copyright notice and this permission notice (including the next
1403b705cfSriastradh * paragraph) shall be included in all copies or substantial portions of the
1503b705cfSriastradh * Software.
1603b705cfSriastradh *
1703b705cfSriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1803b705cfSriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1903b705cfSriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
2003b705cfSriastradh * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
2103b705cfSriastradh * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
2203b705cfSriastradh * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
2303b705cfSriastradh * DEALINGS IN THE SOFTWARE.
2403b705cfSriastradh *
2503b705cfSriastradh * Converted to common header format:
2603b705cfSriastradh *   Jens Owen <jens@tungstengraphics.com>
2703b705cfSriastradh *
2803b705cfSriastradh *
2903b705cfSriastradh */
3003b705cfSriastradh
3103b705cfSriastradh/* WARNING: If you change any of these defines, make sure to change
3203b705cfSriastradh * the kernel include file as well (i810_drm.h)
3303b705cfSriastradh */
3403b705cfSriastradh
3503b705cfSriastradh#ifndef _I810_COMMON_H_
3603b705cfSriastradh#define _I810_COMMON_H_
3703b705cfSriastradh
3803b705cfSriastradh/* Provide substitutes for gcc's __FUNCTION__ on other compilers */
3903b705cfSriastradh#if !defined(__GNUC__) && !defined(__FUNCTION__)
4003b705cfSriastradh# if defined(__STDC__) && (__STDC_VERSION__>=199901L) /* C99 */
4103b705cfSriastradh#  define __FUNCTION__ __func__
4203b705cfSriastradh# else
4303b705cfSriastradh#  define __FUNCTION__ ""
4403b705cfSriastradh# endif
4503b705cfSriastradh#endif
4603b705cfSriastradh
4703b705cfSriastradh#define PFX __FILE__,__LINE__,__FUNCTION__
4803b705cfSriastradh#define FUNCTION_NAME __FUNCTION__
4903b705cfSriastradh
5003b705cfSriastradh#define KB(x) ((x) * 1024)
5103b705cfSriastradh#define MB(x) ((x) * KB(1024))
5203b705cfSriastradh
5303b705cfSriastradh#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1))
5403b705cfSriastradh
55fe8aea9eSmrg/* Using usleep() makes things noticeably slow. */
5603b705cfSriastradh#if 0
5703b705cfSriastradh#define DELAY(x) usleep(x)
5803b705cfSriastradh#else
5903b705cfSriastradh#define DELAY(x) do {;} while (0)
6003b705cfSriastradh#endif
6103b705cfSriastradh
6203b705cfSriastradh#define PrintErrorState I810PrintErrorState
6303b705cfSriastradh#define WaitRingFunc I810WaitLpRing
6403b705cfSriastradh#define RecPtr pI810
6503b705cfSriastradh
6603b705cfSriastradhstatic inline void memset_volatile(volatile void *b, int c, size_t len)
6703b705cfSriastradh{
6842542f5fSchristos    unsigned i;
6903b705cfSriastradh
7003b705cfSriastradh    for (i = 0; i < len; i++)
7103b705cfSriastradh	((volatile char *)b)[i] = c;
7203b705cfSriastradh}
7303b705cfSriastradh
7403b705cfSriastradhstatic inline void memcpy_volatile(volatile void *dst, const void *src,
7503b705cfSriastradh				   size_t len)
7603b705cfSriastradh{
7742542f5fSchristos    unsigned i;
7803b705cfSriastradh
7903b705cfSriastradh    for (i = 0; i < len; i++)
8003b705cfSriastradh	((volatile char *)dst)[i] = ((const volatile char *)src)[i];
8103b705cfSriastradh}
8203b705cfSriastradh
8303b705cfSriastradh/* Memory mapped register access macros */
8403b705cfSriastradh#define INREG8(addr)        *(volatile uint8_t *)(RecPtr->MMIOBase + (addr))
8503b705cfSriastradh#define INREG16(addr)       *(volatile uint16_t *)(RecPtr->MMIOBase + (addr))
8603b705cfSriastradh#define INREG(addr)         *(volatile uint32_t *)(RecPtr->MMIOBase + (addr))
8703b705cfSriastradh#define INGTT(addr)         *(volatile uint32_t *)(RecPtr->GTTBase + (addr))
8803b705cfSriastradh#define POSTING_READ(addr)  (void)INREG(addr)
8903b705cfSriastradh
9003b705cfSriastradh#define OUTREG8(addr, val) do {						\
9103b705cfSriastradh   *(volatile uint8_t *)(RecPtr->MMIOBase  + (addr)) = (val);		\
9203b705cfSriastradh   if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) {				\
9303b705cfSriastradh      ErrorF("OUTREG8(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr),	\
9403b705cfSriastradh		(unsigned long)(val), FUNCTION_NAME);			\
9503b705cfSriastradh   }									\
9603b705cfSriastradh} while (0)
9703b705cfSriastradh
9803b705cfSriastradh#define OUTREG16(addr, val) do {					\
9903b705cfSriastradh   *(volatile uint16_t *)(RecPtr->MMIOBase + (addr)) = (val);		\
10003b705cfSriastradh   if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) {				\
10103b705cfSriastradh      ErrorF("OUTREG16(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr),	\
10203b705cfSriastradh		(unsigned long)(val), FUNCTION_NAME);			\
10303b705cfSriastradh   }									\
10403b705cfSriastradh} while (0)
10503b705cfSriastradh
10603b705cfSriastradh#define OUTREG(addr, val) do {						\
10703b705cfSriastradh   *(volatile uint32_t *)(RecPtr->MMIOBase + (addr)) = (val);		\
10803b705cfSriastradh   if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) {				\
10903b705cfSriastradh      ErrorF("OUTREG(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr),	\
11003b705cfSriastradh		(unsigned long)(val), FUNCTION_NAME);			\
11103b705cfSriastradh   }									\
11203b705cfSriastradh} while (0)
11303b705cfSriastradh
11403b705cfSriastradh/* To remove all debugging, make sure I810_DEBUG is defined as a
11503b705cfSriastradh * preprocessor symbol, and equal to zero.
11603b705cfSriastradh */
11703b705cfSriastradh#if 1
11803b705cfSriastradh#define I810_DEBUG 0
11903b705cfSriastradh#endif
12003b705cfSriastradh#ifndef I810_DEBUG
12103b705cfSriastradh#warning "Debugging enabled - expect reduced performance"
12203b705cfSriastradhextern int I810_DEBUG;
12303b705cfSriastradh#endif
12403b705cfSriastradh
12503b705cfSriastradh#define DEBUG_VERBOSE_ACCEL  0x1
12603b705cfSriastradh#define DEBUG_VERBOSE_SYNC   0x2
12703b705cfSriastradh#define DEBUG_VERBOSE_VGA    0x4
12803b705cfSriastradh#define DEBUG_VERBOSE_RING   0x8
12903b705cfSriastradh#define DEBUG_VERBOSE_OUTREG 0x10
13003b705cfSriastradh#define DEBUG_VERBOSE_MEMORY 0x20
13103b705cfSriastradh#define DEBUG_VERBOSE_CURSOR 0x40
13203b705cfSriastradh#define DEBUG_ALWAYS_SYNC    0x80
13303b705cfSriastradh#define DEBUG_VERBOSE_DRI    0x100
13403b705cfSriastradh#define DEBUG_VERBOSE_BIOS   0x200
13503b705cfSriastradh
13603b705cfSriastradh/* Size of the mmio region.
13703b705cfSriastradh */
13803b705cfSriastradh#define I810_REG_SIZE 0x80000
13903b705cfSriastradh
14003b705cfSriastradh#define GTT_PAGE_SIZE			KB(4)
14103b705cfSriastradh#define PRIMARY_RINGBUFFER_SIZE		KB(128)
14203b705cfSriastradh#define MIN_SCRATCH_BUFFER_SIZE		KB(16)
14303b705cfSriastradh#define MAX_SCRATCH_BUFFER_SIZE		KB(64)
14403b705cfSriastradh#define HWCURSOR_SIZE			GTT_PAGE_SIZE
14503b705cfSriastradh#define HWCURSOR_SIZE_ARGB		GTT_PAGE_SIZE * 4
14603b705cfSriastradh
14703b705cfSriastradh/* Use a 64x64 HW cursor */
14803b705cfSriastradh#define I810_CURSOR_X			64
14903b705cfSriastradh#define I810_CURSOR_Y			I810_CURSOR_X
15003b705cfSriastradh
15103b705cfSriastradh#define PIPE_NAME(n)			('A' + (n))
15203b705cfSriastradh
15303b705cfSriastradhextern struct pci_device *
15403b705cfSriastradhintel_host_bridge (void);
15503b705cfSriastradh
15603b705cfSriastradh/**
15703b705cfSriastradh * Hints to CreatePixmap to tell the driver how the pixmap is going to be
15803b705cfSriastradh * used.
15903b705cfSriastradh *
16003b705cfSriastradh * Compare to CREATE_PIXMAP_USAGE_* in the server.
16103b705cfSriastradh */
16203b705cfSriastradhenum {
16303b705cfSriastradh	INTEL_CREATE_PIXMAP_TILING_X = 0x10000000,
16403b705cfSriastradh	INTEL_CREATE_PIXMAP_TILING_Y,
16503b705cfSriastradh	INTEL_CREATE_PIXMAP_TILING_NONE,
16603b705cfSriastradh};
16703b705cfSriastradh
16803b705cfSriastradh#ifndef _I810_DEFINES_
16903b705cfSriastradh#define _I810_DEFINES_
17003b705cfSriastradh#define I810_USE_BATCH 1
17103b705cfSriastradh
17203b705cfSriastradh#define I810_DMA_BUF_ORDER     12
17303b705cfSriastradh#define I810_DMA_BUF_SZ        (1<<I810_DMA_BUF_ORDER)
17403b705cfSriastradh#define I810_DMA_BUF_NR        256
17503b705cfSriastradh
17603b705cfSriastradh#define I810_NR_SAREA_CLIPRECTS 8
17703b705cfSriastradh
17803b705cfSriastradh/* Each region is a minimum of 64k, and there are at most 64 of them.
17903b705cfSriastradh */
18003b705cfSriastradh#define I810_NR_TEX_REGIONS 64
18103b705cfSriastradh#define I810_LOG_MIN_TEX_REGION_SIZE 16
18203b705cfSriastradh
18303b705cfSriastradh/* Destbuffer state
18403b705cfSriastradh *    - backbuffer linear offset and pitch -- invarient in the current dri
18503b705cfSriastradh *    - zbuffer linear offset and pitch -- also invarient
18603b705cfSriastradh *    - drawing origin in back and depth buffers.
18703b705cfSriastradh *
188fe8aea9eSmrg * Keep the depth/back buffer state here to accommodate private buffers
18903b705cfSriastradh * in the future.
19003b705cfSriastradh */
19103b705cfSriastradh#define I810_DESTREG_DI0  0		/* CMD_OP_DESTBUFFER_INFO (2 dwords) */
19203b705cfSriastradh#define I810_DESTREG_DI1  1
19303b705cfSriastradh#define I810_DESTREG_DV0  2		/* GFX_OP_DESTBUFFER_VARS (2 dwords) */
19403b705cfSriastradh#define I810_DESTREG_DV1  3
19503b705cfSriastradh#define I810_DESTREG_DR0  4		/* GFX_OP_DRAWRECT_INFO (4 dwords) */
19603b705cfSriastradh#define I810_DESTREG_DR1  5
19703b705cfSriastradh#define I810_DESTREG_DR2  6
19803b705cfSriastradh#define I810_DESTREG_DR3  7
19903b705cfSriastradh#define I810_DESTREG_DR4  8
20003b705cfSriastradh#define I810_DEST_SETUP_SIZE 10
20103b705cfSriastradh
20203b705cfSriastradh/* Context state
20303b705cfSriastradh */
20403b705cfSriastradh#define I810_CTXREG_CF0   0		/* GFX_OP_COLOR_FACTOR */
20503b705cfSriastradh#define I810_CTXREG_CF1   1
20603b705cfSriastradh#define I810_CTXREG_ST0   2		/* GFX_OP_STIPPLE */
20703b705cfSriastradh#define I810_CTXREG_ST1   3
20803b705cfSriastradh#define I810_CTXREG_VF    4		/* GFX_OP_VERTEX_FMT */
20903b705cfSriastradh#define I810_CTXREG_MT    5		/* GFX_OP_MAP_TEXELS */
21003b705cfSriastradh#define I810_CTXREG_MC0   6		/* GFX_OP_MAP_COLOR_STAGES - stage 0 */
21103b705cfSriastradh#define I810_CTXREG_MC1   7		/* GFX_OP_MAP_COLOR_STAGES - stage 1 */
21203b705cfSriastradh#define I810_CTXREG_MC2   8		/* GFX_OP_MAP_COLOR_STAGES - stage 2 */
21303b705cfSriastradh#define I810_CTXREG_MA0   9		/* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
21403b705cfSriastradh#define I810_CTXREG_MA1   10		/* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
21503b705cfSriastradh#define I810_CTXREG_MA2   11		/* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
21603b705cfSriastradh#define I810_CTXREG_SDM   12		/* GFX_OP_SRC_DEST_MONO */
21703b705cfSriastradh#define I810_CTXREG_FOG   13		/* GFX_OP_FOG_COLOR */
21803b705cfSriastradh#define I810_CTXREG_B1    14		/* GFX_OP_BOOL_1 */
21903b705cfSriastradh#define I810_CTXREG_B2    15		/* GFX_OP_BOOL_2 */
22003b705cfSriastradh#define I810_CTXREG_LCS   16		/* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
22103b705cfSriastradh#define I810_CTXREG_PV    17		/* GFX_OP_PV_RULE -- Invarient! */
22203b705cfSriastradh#define I810_CTXREG_ZA    18		/* GFX_OP_ZBIAS_ALPHAFUNC */
22303b705cfSriastradh#define I810_CTXREG_AA    19		/* GFX_OP_ANTIALIAS */
22403b705cfSriastradh#define I810_CTX_SETUP_SIZE 20
22503b705cfSriastradh
22603b705cfSriastradh/* Texture state (per tex unit)
22703b705cfSriastradh */
22803b705cfSriastradh#define I810_TEXREG_MI0  0		/* GFX_OP_MAP_INFO (4 dwords) */
22903b705cfSriastradh#define I810_TEXREG_MI1  1
23003b705cfSriastradh#define I810_TEXREG_MI2  2
23103b705cfSriastradh#define I810_TEXREG_MI3  3
23203b705cfSriastradh#define I810_TEXREG_MF   4		/* GFX_OP_MAP_FILTER */
23303b705cfSriastradh#define I810_TEXREG_MLC  5		/* GFX_OP_MAP_LOD_CTL */
23403b705cfSriastradh#define I810_TEXREG_MLL  6		/* GFX_OP_MAP_LOD_LIMITS */
23503b705cfSriastradh#define I810_TEXREG_MCS  7		/* GFX_OP_MAP_COORD_SETS ??? */
23603b705cfSriastradh#define I810_TEX_SETUP_SIZE 8
23703b705cfSriastradh
23803b705cfSriastradh/* Driver specific DRM command indices
23903b705cfSriastradh * NOTE: these are not OS specific, but they are driver specific
24003b705cfSriastradh */
24103b705cfSriastradh#define DRM_I810_INIT                     0x00
24203b705cfSriastradh#define DRM_I810_VERTEX                   0x01
24303b705cfSriastradh#define DRM_I810_CLEAR                    0x02
24403b705cfSriastradh#define DRM_I810_FLUSH                    0x03
24503b705cfSriastradh#define DRM_I810_GETAGE                   0x04
24603b705cfSriastradh#define DRM_I810_GETBUF                   0x05
24703b705cfSriastradh#define DRM_I810_SWAP                     0x06
24803b705cfSriastradh#define DRM_I810_COPY                     0x07
24903b705cfSriastradh#define DRM_I810_DOCOPY                   0x08
25003b705cfSriastradh#define DRM_I810_OV0INFO                  0x09
25103b705cfSriastradh#define DRM_I810_FSTATUS                  0x0a
25203b705cfSriastradh#define DRM_I810_OV0FLIP                  0x0b
25303b705cfSriastradh#define DRM_I810_MC                       0x0c
25403b705cfSriastradh#define DRM_I810_RSTATUS                  0x0d
25503b705cfSriastradh#define DRM_I810_FLIP                     0x0e
25603b705cfSriastradh
25703b705cfSriastradh#endif
25803b705cfSriastradh
25903b705cfSriastradhtypedef enum _drmI810Initfunc {
26003b705cfSriastradh	I810_INIT_DMA = 0x01,
26103b705cfSriastradh	I810_CLEANUP_DMA = 0x02,
26203b705cfSriastradh	I810_INIT_DMA_1_4 = 0x03
26303b705cfSriastradh} drmI810Initfunc;
26403b705cfSriastradh
26503b705cfSriastradhtypedef struct {
26603b705cfSriastradh   drmI810Initfunc func;
26703b705cfSriastradh   unsigned int mmio_offset;
26803b705cfSriastradh   unsigned int buffers_offset;
26903b705cfSriastradh   int sarea_priv_offset;
27003b705cfSriastradh   unsigned int ring_start;
27103b705cfSriastradh   unsigned int ring_end;
27203b705cfSriastradh   unsigned int ring_size;
27303b705cfSriastradh   unsigned int front_offset;
27403b705cfSriastradh   unsigned int back_offset;
27503b705cfSriastradh   unsigned int depth_offset;
27603b705cfSriastradh   unsigned int overlay_offset;
27703b705cfSriastradh   unsigned int overlay_physical;
27803b705cfSriastradh   unsigned int w;
27903b705cfSriastradh   unsigned int h;
28003b705cfSriastradh   unsigned int pitch;
28103b705cfSriastradh   unsigned int pitch_bits;
28203b705cfSriastradh} drmI810Init;
28303b705cfSriastradh
28403b705cfSriastradhtypedef struct {
28503b705cfSriastradh   void *virtual;
28603b705cfSriastradh   int request_idx;
28703b705cfSriastradh   int request_size;
28803b705cfSriastradh   int granted;
28903b705cfSriastradh} drmI810DMA;
29003b705cfSriastradh
29103b705cfSriastradh/* Flags for clear ioctl
29203b705cfSriastradh */
29303b705cfSriastradh#define I810_FRONT   0x1
29403b705cfSriastradh#define I810_BACK    0x2
29503b705cfSriastradh#define I810_DEPTH   0x4
29603b705cfSriastradh
29703b705cfSriastradhtypedef struct {
29803b705cfSriastradh   int clear_color;
29903b705cfSriastradh   int clear_depth;
30003b705cfSriastradh   int flags;
30103b705cfSriastradh} drmI810Clear;
30203b705cfSriastradh
30303b705cfSriastradhtypedef struct {
30403b705cfSriastradh   int idx;				/* buffer index */
30503b705cfSriastradh   int used;				/* nr bytes in use */
30603b705cfSriastradh   int discard;				/* client is finished with the buffer? */
30703b705cfSriastradh} drmI810Vertex;
30803b705cfSriastradh
30903b705cfSriastradh/* Flags for vertex ioctl
31003b705cfSriastradh */
31103b705cfSriastradh#define PR_TRIANGLES         (0x0<<18)
31203b705cfSriastradh#define PR_TRISTRIP_0        (0x1<<18)
31303b705cfSriastradh#define PR_TRISTRIP_1        (0x2<<18)
31403b705cfSriastradh#define PR_TRIFAN            (0x3<<18)
31503b705cfSriastradh#define PR_POLYGON           (0x4<<18)
31603b705cfSriastradh#define PR_LINES             (0x5<<18)
31703b705cfSriastradh#define PR_LINESTRIP         (0x6<<18)
31803b705cfSriastradh#define PR_RECTS             (0x7<<18)
31903b705cfSriastradh#define PR_MASK              (0x7<<18)
32003b705cfSriastradh
32103b705cfSriastradh#endif
322