103b705cfSriastradh/* 203b705cfSriastradh * Copyright © 2010 Intel Corporation 303b705cfSriastradh * 403b705cfSriastradh * Permission is hereby granted, free of charge, to any person obtaining a 503b705cfSriastradh * copy of this software and associated documentation files (the "Software"), 603b705cfSriastradh * to deal in the Software without restriction, including without limitation 703b705cfSriastradh * the rights to use, copy, modify, merge, publish, distribute, sublicense, 803b705cfSriastradh * and/or sell copies of the Software, and to permit persons to whom the 903b705cfSriastradh * Software is furnished to do so, subject to the following conditions: 1003b705cfSriastradh * 1103b705cfSriastradh * The above copyright notice and this permission notice (including the next 1203b705cfSriastradh * paragraph) shall be included in all copies or substantial portions of the 1303b705cfSriastradh * Software. 1403b705cfSriastradh * 1503b705cfSriastradh * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1603b705cfSriastradh * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1703b705cfSriastradh * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1803b705cfSriastradh * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 1903b705cfSriastradh * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 2003b705cfSriastradh * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 2103b705cfSriastradh * IN THE SOFTWARE. 2203b705cfSriastradh * 2303b705cfSriastradh */ 2403b705cfSriastradh 2503b705cfSriastradhinclude(`exa_wm.g4i') 2603b705cfSriastradh 2703b705cfSriastradh/* 2803b705cfSriastradh * Prepare data in m2-m3 for Red channel, m4-m5 for Green channel, 2903b705cfSriastradh * m6-m7 for Blue and m8-m9 for Alpha channel 3003b705cfSriastradh */ 3103b705cfSriastradhdefine(`slot_r_00', `m2') 3203b705cfSriastradhdefine(`slot_r_01', `m3') 3303b705cfSriastradhdefine(`slot_g_00', `m4') 3403b705cfSriastradhdefine(`slot_g_01', `m5') 3503b705cfSriastradhdefine(`slot_b_00', `m6') 3603b705cfSriastradhdefine(`slot_b_01', `m7') 3703b705cfSriastradhdefine(`slot_a_00', `m8') 3803b705cfSriastradhdefine(`slot_a_01', `m9') 3903b705cfSriastradhdefine(`data_port_msg_2_ind', `2') 4003b705cfSriastradh 4103b705cfSriastradhinclude(`exa_wm_write.g6i') 42