132b578d3Smrg/* 232b578d3Smrg * Copyright 1997 through 2004 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org 332b578d3Smrg * 432b578d3Smrg * Permission to use, copy, modify, distribute, and sell this software and its 532b578d3Smrg * documentation for any purpose is hereby granted without fee, provided that 632b578d3Smrg * the above copyright notice appear in all copies and that both that copyright 732b578d3Smrg * notice and this permission notice appear in supporting documentation, and 832b578d3Smrg * that the name of Marc Aurele La France not be used in advertising or 932b578d3Smrg * publicity pertaining to distribution of the software without specific, 1032b578d3Smrg * written prior permission. Marc Aurele La France makes no representations 1132b578d3Smrg * about the suitability of this software for any purpose. It is provided 1232b578d3Smrg * "as-is" without express or implied warranty. 1332b578d3Smrg * 1432b578d3Smrg * MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1532b578d3Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO 1632b578d3Smrg * EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1732b578d3Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1832b578d3Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1932b578d3Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 2032b578d3Smrg * PERFORMANCE OF THIS SOFTWARE. 2132b578d3Smrg */ 2232b578d3Smrg 2332b578d3Smrg#ifdef HAVE_CONFIG_H 2432b578d3Smrg#include "config.h" 2532b578d3Smrg#endif 2632b578d3Smrg 2732b578d3Smrg#include <string.h> 2832b578d3Smrg#include <stdio.h> 2932b578d3Smrg#include <stdint.h> 3032b578d3Smrg 3132b578d3Smrg#include "ati.h" 3232b578d3Smrg#include "atibus.h" 3332b578d3Smrg#include "atichip.h" 3432b578d3Smrg#include "atimach64io.h" 3532b578d3Smrg#include "atimach64version.h" 3632b578d3Smrg#include "atiprobe.h" 3732b578d3Smrg#include "atividmem.h" 3832b578d3Smrg#include "atiwonderio.h" 3932b578d3Smrg 4032b578d3Smrg#ifndef AVOID_CPIO 4132b578d3Smrg 4232b578d3Smrg/* 4332b578d3Smrg * ATIVGAWonderProbe -- 4432b578d3Smrg * 4532b578d3Smrg * This function determines if ATI extended VGA registers can be accessed 4632b578d3Smrg * through the I/O port specified by pATI->CPIO_VGAWonder. If not, the 4732b578d3Smrg * function resets pATI->CPIO_VGAWonder to zero. 4832b578d3Smrg */ 4932b578d3Smrgstatic void 5032b578d3SmrgATIVGAWonderProbe 5132b578d3Smrg( 5232b578d3Smrg pciVideoPtr pVideo, 5332b578d3Smrg ATIPtr pATI 5432b578d3Smrg) 5532b578d3Smrg{ 5632b578d3Smrg CARD8 IOValue1, IOValue2, IOValue3, IOValue4, IOValue5, IOValue6; 5732b578d3Smrg 5832b578d3Smrg if (!pATI->OptionProbeSparse) 5932b578d3Smrg { 6032b578d3Smrg xf86Msg(X_WARNING, 6132b578d3Smrg MACH64_NAME ": Expected VGA Wonder capability at I/O port" 6232b578d3Smrg " 0x%04lX will not be probed\n" 6332b578d3Smrg "set option \"probe_sparse\" to force probing.\n", 6432b578d3Smrg pATI->CPIO_VGAWonder); 6532b578d3Smrg 6632b578d3Smrg pATI->CPIO_VGAWonder = 0; 6732b578d3Smrg return; 6832b578d3Smrg } 6932b578d3Smrg 7032b578d3Smrg if (pVideo && !xf86IsPrimaryPci(pVideo) && 7132b578d3Smrg (pATI->Chip <= ATI_CHIP_88800GXD)) 7232b578d3Smrg { 7332b578d3Smrg /* Set up extended VGA register addressing */ 7432b578d3Smrg PutReg(GRAX, 0x50U, GetByte(pATI->CPIO_VGAWonder, 0)); 7532b578d3Smrg PutReg(GRAX, 0x51U, GetByte(pATI->CPIO_VGAWonder, 1) | 0x80U); 7632b578d3Smrg } 7732b578d3Smrg /* 7832b578d3Smrg * Register 0xBB is used by the BIOS to keep track of various 7932b578d3Smrg * things (monitor type, etc.). Except for 18800-x's, register 8032b578d3Smrg * 0xBC must be zero and causes the adapter to enter a test mode 8132b578d3Smrg * when written to with a non-zero value. 8232b578d3Smrg */ 8332b578d3Smrg IOValue1 = inb(pATI->CPIO_VGAWonder); 8432b578d3Smrg IOValue2 = ATIGetExtReg(IOValue1); 8532b578d3Smrg IOValue3 = ATIGetExtReg(0xBBU); 8632b578d3Smrg ATIPutExtReg(0xBBU, IOValue3 ^ 0xAAU); 8732b578d3Smrg IOValue4 = ATIGetExtReg(0xBBU); 8832b578d3Smrg ATIPutExtReg(0xBBU, IOValue3 ^ 0x55U); 8932b578d3Smrg IOValue5 = ATIGetExtReg(0xBBU); 9032b578d3Smrg ATIPutExtReg(0xBBU, IOValue3); 9132b578d3Smrg IOValue6 = ATIGetExtReg(0xBCU); 9232b578d3Smrg ATIPutExtReg(IOValue1, IOValue2); 9332b578d3Smrg 9432b578d3Smrg if ((IOValue4 == (IOValue3 ^ 0xAAU)) && 9532b578d3Smrg (IOValue5 == (IOValue3 ^ 0x55U)) && 9632b578d3Smrg (IOValue6 == 0)) 9732b578d3Smrg { 9832b578d3Smrg xf86MsgVerb(X_INFO, 3, 9932b578d3Smrg MACH64_NAME ": VGA Wonder at I/O port 0x%04lX detected.\n", 10032b578d3Smrg pATI->CPIO_VGAWonder); 10132b578d3Smrg } 10232b578d3Smrg else 10332b578d3Smrg { 10432b578d3Smrg xf86Msg(X_WARNING, 10532b578d3Smrg MACH64_NAME ": Expected VGA Wonder capability at I/O port" 10632b578d3Smrg " 0x%04lX was not detected.\n", pATI->CPIO_VGAWonder); 10732b578d3Smrg pATI->CPIO_VGAWonder = 0; 10832b578d3Smrg } 10932b578d3Smrg} 11032b578d3Smrg 11132b578d3Smrg#endif /* AVOID_CPIO */ 11232b578d3Smrg 11332b578d3Smrg/* 11432b578d3Smrg * ATIMach64Detect -- 11532b578d3Smrg * 11632b578d3Smrg * This function determines if a Mach64 is detectable at a particular base 11732b578d3Smrg * address. 11832b578d3Smrg */ 11932b578d3Smrgstatic Bool 12032b578d3SmrgATIMach64Detect 12132b578d3Smrg( 12232b578d3Smrg ATIPtr pATI, 12332b578d3Smrg const CARD16 ChipType, 12432b578d3Smrg const ATIChipType Chip 12532b578d3Smrg) 12632b578d3Smrg{ 12732b578d3Smrg CARD32 IOValue, bus_cntl, gen_test_cntl; 12832b578d3Smrg Bool DetectSuccess = FALSE; 12932b578d3Smrg 13032b578d3Smrg (void)ATIMapApertures(-1, pATI); /* Ignore errors */ 13132b578d3Smrg 13232b578d3Smrg#ifdef AVOID_CPIO 13332b578d3Smrg 13432b578d3Smrg if (!pATI->pBlock[0]) 13532b578d3Smrg { 13632b578d3Smrg ATIUnmapApertures(-1, pATI); 13732b578d3Smrg return FALSE; 13832b578d3Smrg } 13932b578d3Smrg 14032b578d3Smrg#endif /* AVOID_CPIO */ 14132b578d3Smrg 14232b578d3Smrg /* Make sure any Mach64 is not in some weird state */ 14332b578d3Smrg bus_cntl = inr(BUS_CNTL); 14432b578d3Smrg if (Chip < ATI_CHIP_264VTB) 14532b578d3Smrg outr(BUS_CNTL, 14632b578d3Smrg (bus_cntl & ~(BUS_HOST_ERR_INT_EN | BUS_FIFO_ERR_INT_EN)) | 14732b578d3Smrg (BUS_HOST_ERR_INT | BUS_FIFO_ERR_INT)); 14832b578d3Smrg else if (Chip < ATI_CHIP_264VT4) 14932b578d3Smrg outr(BUS_CNTL, (bus_cntl & ~BUS_HOST_ERR_INT_EN) | BUS_HOST_ERR_INT); 15032b578d3Smrg 15132b578d3Smrg gen_test_cntl = inr(GEN_TEST_CNTL); 15232b578d3Smrg IOValue = gen_test_cntl & 15332b578d3Smrg (GEN_OVR_OUTPUT_EN | GEN_OVR_POLARITY | GEN_CUR_EN | GEN_BLOCK_WR_EN); 15432b578d3Smrg outr(GEN_TEST_CNTL, IOValue | GEN_GUI_EN); 15532b578d3Smrg outr(GEN_TEST_CNTL, IOValue); 15632b578d3Smrg outr(GEN_TEST_CNTL, IOValue | GEN_GUI_EN); 15732b578d3Smrg 15832b578d3Smrg /* See if a Mach64 answers */ 15932b578d3Smrg IOValue = inr(SCRATCH_REG0); 16032b578d3Smrg 16132b578d3Smrg /* Test odd bits */ 16232b578d3Smrg outr(SCRATCH_REG0, 0x55555555U); 16332b578d3Smrg if (inr(SCRATCH_REG0) == 0x55555555U) 16432b578d3Smrg { 16532b578d3Smrg /* Test even bits */ 16632b578d3Smrg outr(SCRATCH_REG0, 0xAAAAAAAAU); 16732b578d3Smrg if (inr(SCRATCH_REG0) == 0xAAAAAAAAU) 16832b578d3Smrg { 16932b578d3Smrg /* 17032b578d3Smrg * *Something* has a R/W 32-bit register at this address. Try to 17132b578d3Smrg * make sure it's a Mach64. The following assumes that ATI will 17232b578d3Smrg * not be producing any more adapters that do not register 17332b578d3Smrg * themselves in PCI configuration space. 17432b578d3Smrg */ 17532b578d3Smrg ATIMach64ChipID(pATI, ChipType); 17632b578d3Smrg if ((pATI->Chip != ATI_CHIP_Mach64) || 17732b578d3Smrg (pATI->CPIODecoding == BLOCK_IO)) 17832b578d3Smrg DetectSuccess = TRUE; 17932b578d3Smrg } 18032b578d3Smrg } 18132b578d3Smrg 18232b578d3Smrg /* Restore clobbered register value */ 18332b578d3Smrg outr(SCRATCH_REG0, IOValue); 18432b578d3Smrg 18532b578d3Smrg /* If no Mach64 was detected, return now */ 18632b578d3Smrg if (!DetectSuccess) 18732b578d3Smrg { 18832b578d3Smrg outr(GEN_TEST_CNTL, gen_test_cntl); 18932b578d3Smrg outr(BUS_CNTL, bus_cntl); 19032b578d3Smrg ATIUnmapApertures(-1, pATI); 19132b578d3Smrg return FALSE; 19232b578d3Smrg } 19332b578d3Smrg 19432b578d3Smrg ATIUnmapApertures(-1, pATI); 19532b578d3Smrg return TRUE; 19632b578d3Smrg} 19732b578d3Smrg 19832b578d3Smrg#ifdef AVOID_CPIO 19932b578d3Smrg 20032b578d3Smrg/* 20132b578d3Smrg * ATIMach64Probe -- 20232b578d3Smrg * 20332b578d3Smrg * This function looks for a Mach64 at a particular MMIO address and returns an 20432b578d3Smrg * ATIRec if one is found. 20532b578d3Smrg */ 20632b578d3Smrgstatic ATIPtr 20732b578d3SmrgATIMach64Probe 20832b578d3Smrg( 20932b578d3Smrg ATIPtr pATI, 21032b578d3Smrg pciVideoPtr pVideo, 21132b578d3Smrg const ATIChipType Chip 21232b578d3Smrg) 21332b578d3Smrg{ 21432b578d3Smrg CARD16 ChipType = PCI_DEV_DEVICE_ID(pVideo); 21532b578d3Smrg 21632b578d3Smrg pATI->MMIOInLinear = FALSE; 21732b578d3Smrg 21832b578d3Smrg /* 21932b578d3Smrg * Probe through auxiliary MMIO aperture if one exists. Because such 22032b578d3Smrg * apertures can be enabled/disabled only through PCI, this probes no 22132b578d3Smrg * further. 22232b578d3Smrg */ 22332b578d3Smrg if ((PCI_REGION_SIZE(pVideo, 2) >= (1 << 12)) && 2247a8c55a4Smacallan (pATI->Block0Base = PCI_REGION_BASE(pVideo, 2, REGION_MEM)) && 2257a8c55a4Smacallan (pATI->Block0Base != 0xfffff000)) 22632b578d3Smrg { 22732b578d3Smrg pATI->Block0Base += 0x00000400U; 22832b578d3Smrg if (ATIMach64Detect(pATI, ChipType, Chip)) 22932b578d3Smrg return pATI; 23032b578d3Smrg 23132b578d3Smrg return NULL; 23232b578d3Smrg } 23332b578d3Smrg 23432b578d3Smrg /* 23532b578d3Smrg * Probe through the primary MMIO aperture that exists at the tail end 23632b578d3Smrg * of the linear aperture. Test for both 8MB and 4MB linear apertures. 23732b578d3Smrg */ 23832b578d3Smrg if ((PCI_REGION_SIZE(pVideo, 0) >= (1 << 22)) && 23932b578d3Smrg (pATI->Block0Base = PCI_REGION_BASE(pVideo, 0, REGION_MEM))) 24032b578d3Smrg { 24132b578d3Smrg pATI->MMIOInLinear = TRUE; 24232b578d3Smrg pATI->Block0Base += 0x007FFC00U; 24332b578d3Smrg if ((PCI_REGION_SIZE(pVideo, 0) >= (1 << 23)) && 24432b578d3Smrg ATIMach64Detect(pATI, ChipType, Chip)) 24532b578d3Smrg return pATI; 24632b578d3Smrg 24732b578d3Smrg pATI->Block0Base -= 0x00400000U; 24832b578d3Smrg if (ATIMach64Detect(pATI, ChipType, Chip)) 24932b578d3Smrg return pATI; 25032b578d3Smrg } 25132b578d3Smrg 25232b578d3Smrg return NULL; 25332b578d3Smrg} 25432b578d3Smrg 25532b578d3Smrg#else /* AVOID_CPIO */ 25632b578d3Smrg 25732b578d3Smrg/* 25832b578d3Smrg * ATIMach64Probe -- 25932b578d3Smrg * 26032b578d3Smrg * This function looks for a Mach64 at a particular PIO address and returns an 26132b578d3Smrg * ATIRec if one is found. 26232b578d3Smrg */ 26332b578d3Smrgstatic ATIPtr 26432b578d3SmrgATIMach64Probe 26532b578d3Smrg( 26632b578d3Smrg ATIPtr pATI, 26732b578d3Smrg pciVideoPtr pVideo, 26832b578d3Smrg const ATIChipType Chip 26932b578d3Smrg) 27032b578d3Smrg{ 27132b578d3Smrg CARD32 IOValue; 27232b578d3Smrg CARD16 ChipType = PCI_DEV_DEVICE_ID(pVideo); 27332b578d3Smrg 27432b578d3Smrg if ((pATI->CPIODecoding == BLOCK_IO) && 27532b578d3Smrg (PCI_REGION_SIZE(pVideo, 1) < (1 << 8))) 27632b578d3Smrg return NULL; 27732b578d3Smrg 27832b578d3Smrg if (!ATIMach64Detect(pATI, ChipType, Chip)) 27932b578d3Smrg { 28032b578d3Smrg return NULL; 28132b578d3Smrg } 28232b578d3Smrg 28332b578d3Smrg /* 28432b578d3Smrg * Determine VGA capability. VGA can always be enabled on integrated 28532b578d3Smrg * controllers. For the GX/CX, it's a board strap. 28632b578d3Smrg */ 28732b578d3Smrg if (pATI->Chip >= ATI_CHIP_264CT) 28832b578d3Smrg { 28932b578d3Smrg pATI->VGAAdapter = TRUE; 29032b578d3Smrg } 29132b578d3Smrg else 29232b578d3Smrg { 29332b578d3Smrg IOValue = inr(CONFIG_STATUS64_0); 29432b578d3Smrg pATI->BusType = GetBits(IOValue, CFG_BUS_TYPE); 29532b578d3Smrg IOValue &= (CFG_VGA_EN | CFG_CHIP_EN); 29632b578d3Smrg if (pATI->Chip == ATI_CHIP_88800CX) 29732b578d3Smrg IOValue |= CFG_VGA_EN; 29832b578d3Smrg if (IOValue == (CFG_VGA_EN | CFG_CHIP_EN)) 29932b578d3Smrg { 30032b578d3Smrg pATI->VGAAdapter = TRUE; 30132b578d3Smrg pATI->CPIO_VGAWonder = 0x01CEU; 30232b578d3Smrg } 30332b578d3Smrg } 30432b578d3Smrg 30532b578d3Smrg return pATI; 30632b578d3Smrg} 30732b578d3Smrg 30832b578d3Smrgstatic void 30932b578d3SmrgATIAssignVGA 31032b578d3Smrg( 31132b578d3Smrg pciVideoPtr pVideo, 31232b578d3Smrg ATIPtr pATI 31332b578d3Smrg) 31432b578d3Smrg{ 31532b578d3Smrg if (pATI->CPIO_VGAWonder) 31632b578d3Smrg { 31732b578d3Smrg ATIVGAWonderProbe(pVideo, pATI); 31832b578d3Smrg if (!pATI->CPIO_VGAWonder) 31932b578d3Smrg { 32032b578d3Smrg /* 32132b578d3Smrg * Some adapters are reputed to append ATI extended VGA registers 32232b578d3Smrg * to the VGA Graphics controller registers. In particular, 0x01CE 32332b578d3Smrg * cannot, in general, be used in a PCI environment due to routing 32432b578d3Smrg * of I/O through the bus tree. 32532b578d3Smrg */ 32632b578d3Smrg pATI->CPIO_VGAWonder = GRAX; 32732b578d3Smrg ATIVGAWonderProbe(pVideo, pATI); 32832b578d3Smrg } 32932b578d3Smrg } 33032b578d3Smrg} 33132b578d3Smrg 33232b578d3Smrg/* 33332b578d3Smrg * ATIFindVGA -- 33432b578d3Smrg * 33532b578d3Smrg * This function determines if a VGA associated with an ATI PCI adapter is 33632b578d3Smrg * shareable. 33732b578d3Smrg */ 33832b578d3Smrgstatic void 33932b578d3SmrgATIFindVGA 34032b578d3Smrg( 34132b578d3Smrg pciVideoPtr pVideo, 34232b578d3Smrg ATIPtr pATI 34332b578d3Smrg) 34432b578d3Smrg{ 34532b578d3Smrg /* 34632b578d3Smrg * An ATI PCI adapter has been detected at this point, and its VGA, if 34732b578d3Smrg * any, is shareable. Ensure the VGA isn't in sleep mode. 34832b578d3Smrg */ 34932b578d3Smrg outb(GENENA, 0x16U); 35032b578d3Smrg outb(GENVS, 0x01U); 35132b578d3Smrg outb(GENENA, 0x0EU); 35232b578d3Smrg 35332b578d3Smrg ATIAssignVGA(pVideo, pATI); 35432b578d3Smrg} 35532b578d3Smrg 35632b578d3Smrg#endif /* AVOID_CPIO */ 35732b578d3Smrg 35832b578d3Smrg/* 35932b578d3Smrg * ATIMach64ProbeIO -- 36032b578d3Smrg * 36132b578d3Smrg * This function determines the IO method and IO base of the ATI PCI adapter. 36232b578d3Smrg */ 36332b578d3SmrgBool 36432b578d3SmrgATIMach64ProbeIO 36532b578d3Smrg( 36632b578d3Smrg pciVideoPtr pVideo, 36732b578d3Smrg ATIPtr pATI 36832b578d3Smrg) 36932b578d3Smrg{ 37032b578d3Smrg /* Next, look for sparse I/O Mach64's */ 37132b578d3Smrg if (!PCI_REGION_SIZE(pVideo, 1)) 37232b578d3Smrg { 37332b578d3Smrg 37432b578d3Smrg#ifndef AVOID_CPIO 37532b578d3Smrg 37684354367Smrg static const unsigned long Mach64SparseIOBases[] = { 37732b578d3Smrg 0x02ECU, 37832b578d3Smrg 0x01CCU, 37932b578d3Smrg 0x01C8U 38032b578d3Smrg }; 38132b578d3Smrg uint32_t PciReg; 38232b578d3Smrg uint32_t j; 38332b578d3Smrg 38432b578d3Smrg#ifndef XSERVER_LIBPCIACCESS 38532b578d3Smrg pciConfigPtr pPCI = pVideo->thisCard; 38632b578d3Smrg 38732b578d3Smrg if (pPCI == NULL) 38832b578d3Smrg return FALSE; 38932b578d3Smrg#endif 39032b578d3Smrg 39132b578d3Smrg PCI_READ_LONG(pVideo, &PciReg, PCI_REG_USERCONFIG); 39232b578d3Smrg j = PciReg & 0x03U; 39332b578d3Smrg 39432b578d3Smrg if (j == 0x03U) 39532b578d3Smrg { 39632b578d3Smrg xf86Msg(X_WARNING, MACH64_NAME ": " 39732b578d3Smrg "PCI Mach64 in slot %d:%d:%d cannot be enabled\n" 39832b578d3Smrg "because it has neither a block, nor a sparse, I/O base.\n", 39932b578d3Smrg PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); 40032b578d3Smrg 40132b578d3Smrg return FALSE; 40232b578d3Smrg } 40332b578d3Smrg 40432b578d3Smrg /* Possibly fix block I/O indicator */ 40532b578d3Smrg if (PciReg & 0x00000004U) 40632b578d3Smrg { 40732b578d3Smrg PciReg &= ~0x00000004U; 40832b578d3Smrg PCI_WRITE_LONG(pVideo, PciReg, PCI_REG_USERCONFIG); 40932b578d3Smrg } 41032b578d3Smrg 41132b578d3Smrg /* FIXME: 41232b578d3Smrg * Should not probe at sparse I/O bases which have been registered to 41332b578d3Smrg * other PCI devices. The old ATIProbe() would scan the PCI space and 41432b578d3Smrg * build a list of registered I/O ports. If there was a conflict 41532b578d3Smrg * between a mach64 sparse I/O base and a registered I/0 port, probing 41632b578d3Smrg * that port was not allowed... 41732b578d3Smrg * 41832b578d3Smrg * We just add an option and let the user decide, this will not work 41932b578d3Smrg * with "X -configure" though... 42032b578d3Smrg */ 42132b578d3Smrg if (!pATI->OptionProbeSparse) 42232b578d3Smrg { 42332b578d3Smrg xf86Msg(X_WARNING, MACH64_NAME ": " 42432b578d3Smrg "PCI Mach64 in slot %d:%d:%d will not be probed\n" 42532b578d3Smrg "set option \"probe_sparse\" to force sparse I/O probing.\n", 42632b578d3Smrg PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); 42732b578d3Smrg 42832b578d3Smrg return FALSE; 42932b578d3Smrg } 43032b578d3Smrg 43132b578d3Smrg pATI->CPIOBase = Mach64SparseIOBases[j]; 43232b578d3Smrg pATI->CPIODecoding = SPARSE_IO; 43332b578d3Smrg pATI->PCIInfo = pVideo; 43432b578d3Smrg 43532b578d3Smrg#else /* AVOID_CPIO */ 43632b578d3Smrg 43732b578d3Smrg /* The adapter's CPIO base is of little concern here */ 43832b578d3Smrg pATI->CPIOBase = 0; 43932b578d3Smrg pATI->CPIODecoding = SPARSE_IO; 44032b578d3Smrg pATI->PCIInfo = pVideo; 44132b578d3Smrg 44232b578d3Smrg#endif /* AVOID_CPIO */ 44332b578d3Smrg 44432b578d3Smrg } 44532b578d3Smrg 44632b578d3Smrg /* Lastly, look for block I/O devices */ 44732b578d3Smrg if (PCI_REGION_SIZE(pVideo, 1)) 44832b578d3Smrg { 44932b578d3Smrg pATI->CPIOBase = PCI_REGION_BASE(pVideo, 1, REGION_IO); 45032b578d3Smrg pATI->CPIODecoding = BLOCK_IO; 45132b578d3Smrg pATI->PCIInfo = pVideo; 45232b578d3Smrg } 45332b578d3Smrg 45432b578d3Smrg if (!ATIMach64Probe(pATI, pVideo, pATI->Chip)) 45532b578d3Smrg { 45632b578d3Smrg xf86Msg(X_WARNING, MACH64_NAME ": " 45732b578d3Smrg "Mach64 in slot %d:%d:%d could not be detected!\n", 45832b578d3Smrg PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); 45932b578d3Smrg 46032b578d3Smrg return FALSE; 46132b578d3Smrg } 46232b578d3Smrg 46332b578d3Smrg xf86Msg(X_INFO, MACH64_NAME ": " 46432b578d3Smrg "Mach64 in slot %d:%d:%d detected.\n", 46532b578d3Smrg PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); 46632b578d3Smrg 46732b578d3Smrg#ifndef AVOID_CPIO 46832b578d3Smrg 46932b578d3Smrg if (pATI->VGAAdapter) 47032b578d3Smrg ATIFindVGA(pVideo, pATI); 47132b578d3Smrg 47232b578d3Smrg#endif /* AVOID_CPIO */ 47332b578d3Smrg 47432b578d3Smrg return TRUE; 47532b578d3Smrg} 476