mga.h revision 643b027f
1fe5e51b7Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.87tsi Exp $ */ 2fe5e51b7Smrg/* 3fe5e51b7Smrg * MGA Millennium (MGA2064W) functions 4fe5e51b7Smrg * 5fe5e51b7Smrg * Copyright 1996 The XFree86 Project, Inc. 6fe5e51b7Smrg * 7fe5e51b7Smrg * Authors 8fe5e51b7Smrg * Dirk Hohndel 9fe5e51b7Smrg * hohndel@XFree86.Org 10fe5e51b7Smrg * David Dawes 11fe5e51b7Smrg * dawes@XFree86.Org 12fe5e51b7Smrg */ 13fe5e51b7Smrg 14fe5e51b7Smrg#ifndef MGA_H 15fe5e51b7Smrg#define MGA_H 16fe5e51b7Smrg 17fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 18fe5e51b7Smrg#include <pciaccess.h> 19fe5e51b7Smrg#endif 20fe5e51b7Smrg#include <string.h> 21fe5e51b7Smrg#include <stdio.h> 22fe5e51b7Smrg 23fe5e51b7Smrg#include "compiler.h" 24fe5e51b7Smrg#include "xaa.h" 25fe5e51b7Smrg#include "exa.h" 26fe5e51b7Smrg#include "xf86Cursor.h" 27fe5e51b7Smrg#include "vgaHW.h" 28fe5e51b7Smrg#include "colormapst.h" 29fe5e51b7Smrg#include "xf86DDC.h" 30fe5e51b7Smrg#include "xf86xv.h" 31fe5e51b7Smrg 32fe5e51b7Smrg#ifdef XF86DRI 33fe5e51b7Smrg#include "xf86drm.h" 34fe5e51b7Smrg 35fe5e51b7Smrg#define _XF86DRI_SERVER_ 36fe5e51b7Smrg#include "mga_dripriv.h" 37fe5e51b7Smrg#include "dri.h" 38fe5e51b7Smrg#include "GL/glxint.h" 39fe5e51b7Smrg 40fe5e51b7Smrg#include "dri.h" 41fe5e51b7Smrg 42fe5e51b7Smrg#include "GL/glxint.h" 43fe5e51b7Smrg#include "mga_dri.h" 44fe5e51b7Smrg#endif 45fe5e51b7Smrg 46fe5e51b7Smrg#ifdef USEMGAHAL 47fe5e51b7Smrg#include "client.h" 48fe5e51b7Smrg#endif 49fe5e51b7Smrg 50fe5e51b7Smrgtypedef enum { 51fe5e51b7Smrg OPTION_SW_CURSOR, 52fe5e51b7Smrg OPTION_HW_CURSOR, 53fe5e51b7Smrg OPTION_PCI_RETRY, 54fe5e51b7Smrg OPTION_SYNC_ON_GREEN, 55fe5e51b7Smrg OPTION_NOACCEL, 56fe5e51b7Smrg OPTION_SHOWCACHE, 57fe5e51b7Smrg OPTION_OVERLAY, 58fe5e51b7Smrg OPTION_MGA_SDRAM, 59fe5e51b7Smrg OPTION_SHADOW_FB, 60fe5e51b7Smrg OPTION_FBDEV, 61fe5e51b7Smrg OPTION_COLOR_KEY, 62fe5e51b7Smrg OPTION_SET_MCLK, 63fe5e51b7Smrg OPTION_OVERCLOCK_MEM, 64fe5e51b7Smrg OPTION_VIDEO_KEY, 65fe5e51b7Smrg OPTION_ROTATE, 66fe5e51b7Smrg OPTION_TEXTURED_VIDEO, 67fe5e51b7Smrg OPTION_CRTC2HALF, 68fe5e51b7Smrg OPTION_CRTC2RAM, 69fe5e51b7Smrg OPTION_INT10, 70fe5e51b7Smrg OPTION_AGP_MODE, 71fe5e51b7Smrg OPTION_AGP_SIZE, 72fe5e51b7Smrg OPTION_DIGITAL1, 73fe5e51b7Smrg OPTION_DIGITAL2, 74fe5e51b7Smrg OPTION_TV, 75fe5e51b7Smrg OPTION_TVSTANDARD, 76fe5e51b7Smrg OPTION_CABLETYPE, 77fe5e51b7Smrg OPTION_USEIRQZERO, 78fe5e51b7Smrg OPTION_NOHAL, 79fe5e51b7Smrg OPTION_SWAPPED_HEAD, 80fe5e51b7Smrg OPTION_DRI, 81fe5e51b7Smrg OPTION_MERGEDFB, 82fe5e51b7Smrg OPTION_HSYNC2, 83fe5e51b7Smrg OPTION_VREFRESH2, 84fe5e51b7Smrg OPTION_MONITOR2POS, 85fe5e51b7Smrg OPTION_METAMODES, 86fe5e51b7Smrg OPTION_OLDDMA, 87fe5e51b7Smrg OPTION_PCIDMA, 88eda3803bSmrg OPTION_ACCELMETHOD, 89eda3803bSmrg OPTION_KVM 90fe5e51b7Smrg} MGAOpts; 91fe5e51b7Smrg 92fe5e51b7Smrg 93fe5e51b7Smrg#if !defined(EXTRADEBUG) 94fe5e51b7Smrg#define INREG8(addr) MMIO_IN8(pMga->IOBase, addr) 95fe5e51b7Smrg#define INREG16(addr) MMIO_IN16(pMga->IOBase, addr) 96fe5e51b7Smrg#define INREG(addr) MMIO_IN32(pMga->IOBase, addr) 97fe5e51b7Smrg#define OUTREG8(addr, val) MMIO_OUT8(pMga->IOBase, addr, val) 98fe5e51b7Smrg#define OUTREG16(addr, val) MMIO_OUT16(pMga->IOBase, addr, val) 99fe5e51b7Smrg#define OUTREG(addr, val) MMIO_OUT32(pMga->IOBase, addr, val) 100fe5e51b7Smrg#else /* !EXTRADEBUG */ 101fe5e51b7SmrgCARD8 MGAdbg_inreg8(ScrnInfoPtr, int, int, char*); 102fe5e51b7SmrgCARD16 MGAdbg_inreg16(ScrnInfoPtr, int, int, char*); 103fe5e51b7SmrgCARD32 MGAdbg_inreg32(ScrnInfoPtr, int, int, char*); 104fe5e51b7Smrgvoid MGAdbg_outreg8(ScrnInfoPtr, int, int, char*); 105fe5e51b7Smrgvoid MGAdbg_outreg16(ScrnInfoPtr, int,int, char*); 106fe5e51b7Smrgvoid MGAdbg_outreg32(ScrnInfoPtr, int,int, char*); 107fe5e51b7Smrg#ifndef __GNUC__ 108fe5e51b7Smrg# define MGA_STRINGIZE(x) #x 109fe5e51b7Smrg# define MGA_STRINGIFY(x) MGA_STRINGIZE(x) 110fe5e51b7Smrg# define __FUNCTION__ MGA_STRINGIFY(__FILE__) ", line " MGA_STRINGIFY(__LINE__) 111fe5e51b7Smrg#endif 112fe5e51b7Smrg#define INREG8(addr) MGAdbg_inreg8(pScrn, addr, 1, __FUNCTION__) 113fe5e51b7Smrg#define INREG16(addr) MGAdbg_inreg16(pScrn, addr, 1, __FUNCTION__) 114fe5e51b7Smrg#define INREG(addr) MGAdbg_inreg32(pScrn, addr, 1, __FUNCTION__) 115fe5e51b7Smrg#define OUTREG8(addr,val) MGAdbg_outreg8(pScrn, addr, val, __FUNCTION__) 116fe5e51b7Smrg#define OUTREG16(addr,val) MGAdbg_outreg16(pScrn, addr, val, __FUNCTION__) 117fe5e51b7Smrg#define OUTREG(addr,val) MGAdbg_outreg32(pScrn, addr, val, __FUNCTION__) 118fe5e51b7Smrg#endif /* EXTRADEBUG */ 119fe5e51b7Smrg 120fe5e51b7Smrg#ifndef PCI_CHIP_MGAG200_SE_A_PCI 121fe5e51b7Smrg#define PCI_CHIP_MGAG200_SE_A_PCI 0x0522 122fe5e51b7Smrg#endif 123fe5e51b7Smrg 124fe5e51b7Smrg#ifndef PCI_CHIP_MGAG200_SE_B_PCI 125fe5e51b7Smrg#define PCI_CHIP_MGAG200_SE_B_PCI 0x0524 126fe5e51b7Smrg#endif 127fe5e51b7Smrg 128eda3803bSmrg#ifndef PCI_CHIP_MGAG200_WINBOND_PCI 129eda3803bSmrg#define PCI_CHIP_MGAG200_WINBOND_PCI 0x0532 130eda3803bSmrg#endif 131eda3803bSmrg 132eda3803bSmrg#ifndef PCI_CHIP_MGAG200_EV_PCI 133eda3803bSmrg#define PCI_CHIP_MGAG200_EV_PCI 0x0530 134eda3803bSmrg#endif 135eda3803bSmrg 136fe5e51b7Smrg/* 137fe5e51b7Smrg * Read/write to the DAC via MMIO 138fe5e51b7Smrg */ 139fe5e51b7Smrg 140fe5e51b7Smrg/* 141fe5e51b7Smrg * These were functions. Use macros instead to avoid the need to 142fe5e51b7Smrg * pass pMga to them. 143fe5e51b7Smrg */ 144fe5e51b7Smrg 145fe5e51b7Smrg#define inMGAdreg(reg) INREG8(RAMDAC_OFFSET + (reg)) 146fe5e51b7Smrg 147fe5e51b7Smrg#define outMGAdreg(reg, val) OUTREG8(RAMDAC_OFFSET + (reg), val) 148fe5e51b7Smrg 149fe5e51b7Smrg#define inMGAdac(reg) \ 150fe5e51b7Smrg (outMGAdreg(MGA1064_INDEX, reg), inMGAdreg(MGA1064_DATA)) 151fe5e51b7Smrg 152fe5e51b7Smrg#define outMGAdac(reg, val) \ 153fe5e51b7Smrg (outMGAdreg(MGA1064_INDEX, reg), outMGAdreg(MGA1064_DATA, val)) 154fe5e51b7Smrg 155fe5e51b7Smrg#define outMGAdacmsk(reg, mask, val) \ 156fe5e51b7Smrg do { /* note: mask and reg may get evaluated twice */ \ 157fe5e51b7Smrg unsigned char tmp = (mask) ? (inMGAdac(reg) & (mask)) : 0; \ 158fe5e51b7Smrg outMGAdreg(MGA1064_INDEX, reg); \ 159fe5e51b7Smrg outMGAdreg(MGA1064_DATA, tmp | (val)); \ 160fe5e51b7Smrg } while (0) 161fe5e51b7Smrg 162fe5e51b7Smrg#define MGAWAITVSYNC() \ 163fe5e51b7Smrg do { \ 164fe5e51b7Smrg unsigned int count = 0; \ 165fe5e51b7Smrg unsigned int status = 0; \ 166fe5e51b7Smrg do { \ 167fe5e51b7Smrg status = INREG( MGAREG_Status ); \ 168fe5e51b7Smrg count++; \ 169fe5e51b7Smrg } while( ( status & 0x08 ) && (count < 250000) );\ 170fe5e51b7Smrg count = 0; \ 171fe5e51b7Smrg status = 0; \ 172fe5e51b7Smrg do { \ 173fe5e51b7Smrg status = INREG( MGAREG_Status ); \ 174fe5e51b7Smrg count++; \ 175fe5e51b7Smrg } while( !( status & 0x08 ) && (count < 250000) );\ 176fe5e51b7Smrg } while (0) 177fe5e51b7Smrg 178fe5e51b7Smrg#define MGAWAITBUSY() \ 179fe5e51b7Smrg do { \ 180fe5e51b7Smrg unsigned int count = 0; \ 181fe5e51b7Smrg unsigned int status = 0; \ 182fe5e51b7Smrg do { \ 183fe5e51b7Smrg status = INREG8( MGAREG_Status + 2 ); \ 184fe5e51b7Smrg count++; \ 185fe5e51b7Smrg } while( ( status & 0x01 ) && (count < 500000) ); \ 186fe5e51b7Smrg } while (0) 187fe5e51b7Smrg 188fe5e51b7Smrg#define PORT_OFFSET (0x1F00 - 0x300) 189fe5e51b7Smrg 190fe5e51b7Smrg#define MGA_VERSION 4000 191fe5e51b7Smrg#define MGA_NAME "MGA" 192fe5e51b7Smrg#define MGA_C_NAME MGA 193fe5e51b7Smrg#define MGA_MODULE_DATA mgaModuleData 194fe5e51b7Smrg#define MGA_DRIVER_NAME "mga" 195fe5e51b7Smrg 196fe5e51b7Smrgtypedef struct { 197fe5e51b7Smrg unsigned char ExtVga[6]; 198fe5e51b7Smrg unsigned char DacClk[6]; 199fe5e51b7Smrg unsigned char * DacRegs; 200fe5e51b7Smrg unsigned long crtc2[0x58]; 201fe5e51b7Smrg unsigned char dac2[0x21]; 202fe5e51b7Smrg CARD32 Option; 203fe5e51b7Smrg CARD32 Option2; 204fe5e51b7Smrg CARD32 Option3; 205fe5e51b7Smrg long Clock; 206fe5e51b7Smrg Bool PIXPLLCSaved; 207eda3803bSmrg unsigned char PllM; 208eda3803bSmrg unsigned char PllN; 209eda3803bSmrg unsigned char PllP; 210fe5e51b7Smrg} MGARegRec, *MGARegPtr; 211fe5e51b7Smrg 212fe5e51b7Smrg/* For programming the second CRTC */ 213fe5e51b7Smrgtypedef struct { 214fe5e51b7Smrg CARD32 ulDispWidth; /* Display Width in pixels*/ 215fe5e51b7Smrg CARD32 ulDispHeight; /* Display Height in pixels*/ 216fe5e51b7Smrg CARD32 ulBpp; /* Bits Per Pixels / input format*/ 217fe5e51b7Smrg CARD32 ulPixClock; /* Pixel Clock in kHz*/ 218fe5e51b7Smrg CARD32 ulHFPorch; /* Horizontal front porch in pixels*/ 219fe5e51b7Smrg CARD32 ulHSync; /* Horizontal Sync in pixels*/ 220fe5e51b7Smrg CARD32 ulHBPorch; /* Horizontal back porch in pixels*/ 221fe5e51b7Smrg CARD32 ulVFPorch; /* Vertical front porch in lines*/ 222fe5e51b7Smrg CARD32 ulVSync; /* Vertical Sync in lines*/ 223fe5e51b7Smrg CARD32 ulVBPorch; /* Vertical back Porch in lines*/ 224fe5e51b7Smrg CARD32 ulFBPitch; /* Pitch*/ 225fe5e51b7Smrg CARD32 flSignalMode; /* Signal Mode*/ 226fe5e51b7Smrg} xMODEINFO; 227fe5e51b7Smrg 228fe5e51b7Smrg 229fe5e51b7Smrgtypedef struct { 230fe5e51b7Smrg int brightness; 231fe5e51b7Smrg int contrast; 232fe5e51b7Smrg Bool doubleBuffer; 233fe5e51b7Smrg unsigned char currentBuffer; 234fe5e51b7Smrg RegionRec clip; 235fe5e51b7Smrg CARD32 colorKey; 236fe5e51b7Smrg CARD32 videoStatus; 237fe5e51b7Smrg Time offTime; 238fe5e51b7Smrg Time freeTime; 239fe5e51b7Smrg int lastPort; 240fe5e51b7Smrg 241fe5e51b7Smrg#ifdef USE_EXA 242fe5e51b7Smrg int size; 243fe5e51b7Smrg ExaOffscreenArea *off_screen; 244fe5e51b7Smrg#endif 245fe5e51b7Smrg 246fe5e51b7Smrg void *video_memory; 247fe5e51b7Smrg int video_offset; 248fe5e51b7Smrg} MGAPortPrivRec, *MGAPortPrivPtr; 249fe5e51b7Smrg 250fe5e51b7Smrgtypedef struct { 251fe5e51b7Smrg Bool isHwCursor; 252fe5e51b7Smrg int CursorMaxWidth; 253fe5e51b7Smrg int CursorMaxHeight; 254fe5e51b7Smrg int CursorFlags; 255fe5e51b7Smrg int CursorOffscreenMemSize; 256fe5e51b7Smrg Bool (*UseHWCursor)(ScreenPtr, CursorPtr); 257fe5e51b7Smrg void (*LoadCursorImage)(ScrnInfoPtr, unsigned char*); 258fe5e51b7Smrg void (*ShowCursor)(ScrnInfoPtr); 259fe5e51b7Smrg void (*HideCursor)(ScrnInfoPtr); 260fe5e51b7Smrg void (*SetCursorPosition)(ScrnInfoPtr, int, int); 261fe5e51b7Smrg void (*SetCursorColors)(ScrnInfoPtr, int, int); 262fe5e51b7Smrg long maxPixelClock; 263fe5e51b7Smrg long MemoryClock; 264fe5e51b7Smrg MessageType ClockFrom; 265fe5e51b7Smrg MessageType MemClkFrom; 266fe5e51b7Smrg Bool SetMemClk; 267fe5e51b7Smrg void (*LoadPalette)(ScrnInfoPtr, int, int*, LOCO*, VisualPtr); 268fe5e51b7Smrg void (*RestorePalette)(ScrnInfoPtr, unsigned char *); 269fe5e51b7Smrg void (*PreInit)(ScrnInfoPtr); 270fe5e51b7Smrg void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 271fe5e51b7Smrg void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 272fe5e51b7Smrg Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); 273fe5e51b7Smrg} MGARamdacRec, *MGARamdacPtr; 274fe5e51b7Smrg 275fe5e51b7Smrg 276fe5e51b7Smrgtypedef struct { 277fe5e51b7Smrg int bitsPerPixel; 278fe5e51b7Smrg int depth; 279fe5e51b7Smrg int displayWidth; 280fe5e51b7Smrg rgb weight; 281fe5e51b7Smrg DisplayModePtr mode; 282fe5e51b7Smrg} MGAFBLayout; 283fe5e51b7Smrg 284fe5e51b7Smrg/* Card-specific driver information */ 285fe5e51b7Smrg 286fe5e51b7Smrgtypedef struct { 287fe5e51b7Smrg Bool update; 288fe5e51b7Smrg unsigned char red; 289fe5e51b7Smrg unsigned char green; 290fe5e51b7Smrg unsigned char blue; 291fe5e51b7Smrg} MGAPaletteInfo; 292fe5e51b7Smrg 293fe5e51b7Smrg#define MGAPTR(p) ((MGAPtr)((p)->driverPrivate)) 294fe5e51b7Smrg 295fe5e51b7Smrg/*avoids segfault by returning false if pMgaHwInfo not defined*/ 296fe5e51b7Smrg#define ISDIGITAL1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) 297fe5e51b7Smrg#define ISDIGITAL2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) 298fe5e51b7Smrg#define ISTV1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_TV)) 299fe5e51b7Smrg#define ISTV2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_TV)) 300fe5e51b7Smrg 301fe5e51b7Smrg#ifdef DISABLE_VGA_IO 302fe5e51b7Smrgtypedef struct mgaSave { 303fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 304fe5e51b7Smrg struct pci_device * pvp; 305fe5e51b7Smrg#else 306fe5e51b7Smrg pciVideoPtr pvp; 307fe5e51b7Smrg#endif 308fe5e51b7Smrg Bool enable; 309fe5e51b7Smrg} MgaSave, *MgaSavePtr; 310fe5e51b7Smrg#endif 311fe5e51b7Smrg 312fe5e51b7Smrg 313fe5e51b7Smrgtypedef enum { 314fe5e51b7Smrg mgaLeftOf, 315fe5e51b7Smrg mgaRightOf, 316fe5e51b7Smrg mgaAbove, 317fe5e51b7Smrg mgaBelow, 318fe5e51b7Smrg mgaClone 319fe5e51b7Smrg} MgaScrn2Rel; 320fe5e51b7Smrg 321fe5e51b7Smrgtypedef struct { 322fe5e51b7Smrg int lastInstance; 323fe5e51b7Smrg#ifdef USEMGAHAL 324fe5e51b7Smrg LPCLIENTDATA pClientStruct; 325fe5e51b7Smrg LPBOARDHANDLE pBoard; 326fe5e51b7Smrg LPMGAHWINFO pMgaHwInfo; 327fe5e51b7Smrg#endif 328fe5e51b7Smrg int refCount; 329fe5e51b7Smrg CARD32 masterFbAddress; 330fe5e51b7Smrg long masterFbMapSize; 331fe5e51b7Smrg CARD32 slaveFbAddress; 332fe5e51b7Smrg long slaveFbMapSize; 333fe5e51b7Smrg int mastervideoRam; 334fe5e51b7Smrg int slavevideoRam; 335fe5e51b7Smrg Bool directRenderingEnabled; 336fe5e51b7Smrg ScrnInfoPtr pScrn_1; 337fe5e51b7Smrg ScrnInfoPtr pScrn_2; 338fe5e51b7Smrg} MGAEntRec, *MGAEntPtr; 339fe5e51b7Smrg 340fe5e51b7Smrg/** 341fe5e51b7Smrg * Track the range of a voltage controlled osciliator (VCO). 342fe5e51b7Smrg */ 343fe5e51b7Smrgstruct mga_VCO { 344fe5e51b7Smrg /** 345fe5e51b7Smrg * Minimum selectable frequency for this VCO, measured in kHz. 346fe5e51b7Smrg */ 347fe5e51b7Smrg unsigned min_freq; 348fe5e51b7Smrg 349fe5e51b7Smrg /** 350fe5e51b7Smrg * Maximum selectable frequency for this VCO, measured in kHz. 351fe5e51b7Smrg * 352fe5e51b7Smrg * If this value is zero, then the VCO is not available. 353fe5e51b7Smrg */ 354fe5e51b7Smrg unsigned max_freq; 355fe5e51b7Smrg}; 356fe5e51b7Smrg 357fe5e51b7Smrg/** 358fe5e51b7Smrg * Host interface types that can be set by the card's BIOS. 359fe5e51b7Smrg */ 360fe5e51b7Smrgtypedef enum { 361fe5e51b7Smrg MGA_HOST_UNKNOWN0 = 0, /**< Meaning unknown. */ 362fe5e51b7Smrg MGA_HOST_UNKNOWN1 = 1, /**< Meaning unknown. */ 363fe5e51b7Smrg MGA_HOST_UNKNOWN2 = 2, /**< Meaning unknown. */ 364fe5e51b7Smrg MGA_HOST_HYBRID = 3, /**< AGP 4x for data xfers only. */ 365fe5e51b7Smrg 366fe5e51b7Smrg /** 367fe5e51b7Smrg * PCI interface. Either native or via a universal PCI-to-PCI bridge 368fe5e51b7Smrg * chip. The PCI G450 and PCI G550 cards are examples. 369fe5e51b7Smrg */ 370fe5e51b7Smrg MGA_HOST_PCI = 4, 371fe5e51b7Smrg 372fe5e51b7Smrg MGA_HOST_AGP_1x = 5, /**< AGP 1x capable. */ 373fe5e51b7Smrg MGA_HOST_AGP_2x = 6, /**< AGP 2x capable. */ 374fe5e51b7Smrg MGA_HOST_AGP_4x = 7 /**< AGP 4x capable. */ 375fe5e51b7Smrg} mga_host_t; 376fe5e51b7Smrg 377fe5e51b7Smrg/** 378fe5e51b7Smrg * Card information derrived from BIOS PInS data. 379fe5e51b7Smrg */ 380fe5e51b7Smrgstruct mga_bios_values { 381fe5e51b7Smrg /** 382fe5e51b7Smrg * \name Voltage Controlled Oscilators 383fe5e51b7Smrg * \brief Track information about the various VCOs. 384fe5e51b7Smrg * 385fe5e51b7Smrg * MGA cards have between one and three VCOs that can be used to drive the 386fe5e51b7Smrg * various clocks. On older cards, only \c mga_bios_values::pixel VCO is 387fe5e51b7Smrg * available. On newer cards, such as the G450 and G550, all three are 388fe5e51b7Smrg * available. If \c mga_VCO::max_freq is zero, the VCO is not available. 389fe5e51b7Smrg */ 390fe5e51b7Smrg /*@{*/ 391fe5e51b7Smrg struct mga_VCO system; /**< System VCO. */ 392fe5e51b7Smrg struct mga_VCO pixel; /**< Pixel VCO. */ 393fe5e51b7Smrg struct mga_VCO video; /**< Video VCO. */ 394fe5e51b7Smrg /*@}*/ 395fe5e51b7Smrg 396fe5e51b7Smrg /** 397fe5e51b7Smrg * Memory clock speed, measured in kHz. 398fe5e51b7Smrg */ 399fe5e51b7Smrg unsigned mem_clock; 400fe5e51b7Smrg 401fe5e51b7Smrg /** 402fe5e51b7Smrg * PLL reference frequency value. On older cards this is ~14MHz, and on 403fe5e51b7Smrg * newer cards it is ~27MHz. 404fe5e51b7Smrg */ 405fe5e51b7Smrg unsigned pll_ref_freq; 406fe5e51b7Smrg 407fe5e51b7Smrg /** 408fe5e51b7Smrg * Some older MGA cards have a "fast bitblt" mode. This is determined 409fe5e51b7Smrg * by a capability bit stored in the PInS data. 410fe5e51b7Smrg */ 411fe5e51b7Smrg Bool fast_bitblt; 412fe5e51b7Smrg 413fe5e51b7Smrg /** 414fe5e51b7Smrg * Type of physical interface used for the card. 415fe5e51b7Smrg */ 416fe5e51b7Smrg mga_host_t host_interface; 417fe5e51b7Smrg}; 418fe5e51b7Smrg 419fe5e51b7Smrg 420fe5e51b7Smrg/** 421fe5e51b7Smrg * Attributes that of an MGA device that can be derrived purely from its 422fe5e51b7Smrg * PCI ID. 423fe5e51b7Smrg */ 424fe5e51b7Smrgstruct mga_device_attributes { 425fe5e51b7Smrg unsigned has_sdram:1; 426fe5e51b7Smrg unsigned probe_for_sdram:1; 427fe5e51b7Smrg unsigned dual_head_possible:1; 428fe5e51b7Smrg unsigned fb_4mb_quirk:1; 429fe5e51b7Smrg unsigned hwcursor_1064:1; 430fe5e51b7Smrg 431fe5e51b7Smrg unsigned dri_capable:1; 432fe5e51b7Smrg unsigned dri_chipset:3; 433fe5e51b7Smrg 434fe5e51b7Smrg unsigned HAL_chipset:1; 435fe5e51b7Smrg 436fe5e51b7Smrg enum { 437fe5e51b7Smrg old_BARs = 0, 438fe5e51b7Smrg probe_BARs, 439fe5e51b7Smrg new_BARs 440fe5e51b7Smrg } BARs:2; 441fe5e51b7Smrg 442fe5e51b7Smrg uint32_t accel_flags; 443eda3803bSmrg 444eda3803bSmrg /** Default BIOS values. */ 445eda3803bSmrg struct mga_bios_values default_bios_values; 446eda3803bSmrg 447eda3803bSmrg /** Default memory probe offset / size values. */ 448eda3803bSmrg unsigned probe_size; 449eda3803bSmrg unsigned probe_offset; 450fe5e51b7Smrg}; 451fe5e51b7Smrg 452fe5e51b7Smrgtypedef struct { 453fe5e51b7Smrg#ifdef USEMGAHAL 454fe5e51b7Smrg LPCLIENTDATA pClientStruct; 455fe5e51b7Smrg LPBOARDHANDLE pBoard; 456fe5e51b7Smrg LPMGAMODEINFO pMgaModeInfo; 457fe5e51b7Smrg LPMGAHWINFO pMgaHwInfo; 458fe5e51b7Smrg#endif 459fe5e51b7Smrg EntityInfoPtr pEnt; 460fe5e51b7Smrg struct mga_bios_values bios; 461fe5e51b7Smrg CARD8 BiosOutputMode; 462fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 463fe5e51b7Smrg struct pci_device * PciInfo; 464fe5e51b7Smrg#else 465fe5e51b7Smrg pciVideoPtr PciInfo; 466fe5e51b7Smrg PCITAG PciTag; 467643b027fSmrg xf86AccessRec Access; 468fe5e51b7Smrg#endif 469fe5e51b7Smrg const struct mga_device_attributes * chip_attribs; 470fe5e51b7Smrg int Chipset; 471fe5e51b7Smrg int ChipRev; 472fe5e51b7Smrg 473fe5e51b7Smrg int is_Gx50:1; 474fe5e51b7Smrg int is_G200SE:1; 475eda3803bSmrg int is_G200WB:1; 476eda3803bSmrg int is_G200EV:1; 477eda3803bSmrg 478eda3803bSmrg int KVM; 479eda3803bSmrg 480eda3803bSmrg CARD32 reg_1e24; /* model revision on g200se */ 481fe5e51b7Smrg 482fe5e51b7Smrg Bool Primary; 483fe5e51b7Smrg Bool Interleave; 484fe5e51b7Smrg int HwBpp; 485fe5e51b7Smrg int Roundings[4]; 486fe5e51b7Smrg int BppShifts[4]; 487fe5e51b7Smrg Bool HasFBitBlt; 488fe5e51b7Smrg Bool OverclockMem; 489fe5e51b7Smrg int YDstOrg; 490fe5e51b7Smrg int DstOrg; 491fe5e51b7Smrg int SrcOrg; 492fe5e51b7Smrg 493fe5e51b7Smrg /** 494fe5e51b7Smrg * Which BAR corresponds to the framebuffer on this chip? 495fe5e51b7Smrg */ 496fe5e51b7Smrg unsigned framebuffer_bar; 497fe5e51b7Smrg 498fe5e51b7Smrg /** 499fe5e51b7Smrg * Which BAR corresponds to IO space on this chip? 500fe5e51b7Smrg */ 501fe5e51b7Smrg unsigned io_bar; 502fe5e51b7Smrg 503fe5e51b7Smrg /** 504fe5e51b7Smrg * Which BAR corresponds to ILOAD space on this chip? If the value is 505fe5e51b7Smrg * -1, then this chip does not have an ILOAD region. 506fe5e51b7Smrg */ 507fe5e51b7Smrg int iload_bar; 508fe5e51b7Smrg 509fe5e51b7Smrg#ifndef XSERVER_LIBPCIACCESS 510fe5e51b7Smrg unsigned long IOAddress; 511fe5e51b7Smrg unsigned long ILOADAddress; 512fe5e51b7Smrg unsigned long BiosAddress; 513fe5e51b7Smrg MessageType BiosFrom; 514fe5e51b7Smrg#endif 515fe5e51b7Smrg unsigned long FbAddress; 516fe5e51b7Smrg unsigned char * IOBase; 517fe5e51b7Smrg unsigned char * FbBase; 518fe5e51b7Smrg unsigned char * ILOADBase; 519fe5e51b7Smrg unsigned char * FbStart; 520fe5e51b7Smrg long FbMapSize; 521fe5e51b7Smrg long FbUsableSize; 522fe5e51b7Smrg long FbCursorOffset; 523fe5e51b7Smrg MGARamdacRec Dac; 524fe5e51b7Smrg Bool HasSDRAM; 525fe5e51b7Smrg Bool NoAccel; 526fe5e51b7Smrg Bool Exa; 527fe5e51b7Smrg ExaDriverPtr ExaDriver; 528fe5e51b7Smrg Bool SyncOnGreen; 529fe5e51b7Smrg Bool HWCursor; 530fe5e51b7Smrg Bool UsePCIRetry; 531fe5e51b7Smrg Bool ShowCache; 532fe5e51b7Smrg Bool ShadowFB; 533fe5e51b7Smrg unsigned char * ShadowPtr; 534fe5e51b7Smrg int ShadowPitch; 535fe5e51b7Smrg int MemClk; 536fe5e51b7Smrg int MinClock; 537fe5e51b7Smrg int MaxClock; 538fe5e51b7Smrg MGARegRec SavedReg; 539fe5e51b7Smrg MGARegRec ModeReg; 540fe5e51b7Smrg int MaxFastBlitY; 541fe5e51b7Smrg CARD32 BltScanDirection; 542fe5e51b7Smrg CARD32 FilledRectCMD; 543fe5e51b7Smrg CARD32 SolidLineCMD; 544fe5e51b7Smrg CARD32 PatternRectCMD; 545fe5e51b7Smrg CARD32 DashCMD; 546fe5e51b7Smrg CARD32 NiceDashCMD; 547fe5e51b7Smrg CARD32 AccelFlags; 548fe5e51b7Smrg CARD32 PlaneMask; 549fe5e51b7Smrg CARD32 FgColor; 550fe5e51b7Smrg CARD32 BgColor; 551fe5e51b7Smrg CARD32 MAccess; 552fe5e51b7Smrg int FifoSize; 553fe5e51b7Smrg int StyleLen; 554fe5e51b7Smrg XAAInfoRecPtr AccelInfoRec; 555fe5e51b7Smrg xf86CursorInfoPtr CursorInfoRec; 556fe5e51b7Smrg DGAModePtr DGAModes; 557fe5e51b7Smrg int numDGAModes; 558fe5e51b7Smrg Bool DGAactive; 559fe5e51b7Smrg int DGAViewportStatus; 560fe5e51b7Smrg CARD32 *Atype; 561fe5e51b7Smrg CARD32 *AtypeNoBLK; 562fe5e51b7Smrg void (*PreInit)(ScrnInfoPtr pScrn); 563fe5e51b7Smrg void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 564fe5e51b7Smrg void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 565fe5e51b7Smrg Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); 566fe5e51b7Smrg void (*PointerMoved)(int index, int x, int y); 567fe5e51b7Smrg CloseScreenProcPtr CloseScreen; 568fe5e51b7Smrg ScreenBlockHandlerProcPtr BlockHandler; 569fe5e51b7Smrg unsigned int (*ddc1Read)(ScrnInfoPtr); 570fe5e51b7Smrg void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed); 571fe5e51b7Smrg Bool (*i2cInit)(ScrnInfoPtr); 572fe5e51b7Smrg I2CBusPtr DDC_Bus1; 573fe5e51b7Smrg I2CBusPtr DDC_Bus2; 574fe5e51b7Smrg I2CBusPtr Maven_Bus; 575fe5e51b7Smrg I2CDevPtr Maven; 576fe5e51b7Smrg char Maven_Version; 577fe5e51b7Smrg Bool UseMaven; 578fe5e51b7Smrg Bool UseMavenPM; 579fe5e51b7Smrg Bool FBDev; 580fe5e51b7Smrg int colorKey; 581fe5e51b7Smrg int videoKey; 582fe5e51b7Smrg int fifoCount; 583fe5e51b7Smrg int Rotate; 584fe5e51b7Smrg MGAFBLayout CurrentLayout; 585fe5e51b7Smrg Bool DrawTransparent; 586fe5e51b7Smrg int MaxBlitDWORDS; 587fe5e51b7Smrg Bool TexturedVideo; 588fe5e51b7Smrg MGAPortPrivPtr portPrivate; 589fe5e51b7Smrg unsigned char *ScratchBuffer; 590fe5e51b7Smrg unsigned char *ColorExpandBase; 591fe5e51b7Smrg int expandRows; 592fe5e51b7Smrg int expandDWORDs; 593fe5e51b7Smrg int expandRemaining; 594fe5e51b7Smrg int expandHeight; 595fe5e51b7Smrg int expandY; 596fe5e51b7Smrg#ifdef XF86DRI 597fe5e51b7Smrg Bool directRenderingEnabled; 598fe5e51b7Smrg DRIInfoPtr pDRIInfo; 599fe5e51b7Smrg int drmFD; 600fe5e51b7Smrg int numVisualConfigs; 601fe5e51b7Smrg __GLXvisualConfig* pVisualConfigs; 602fe5e51b7Smrg MGAConfigPrivPtr pVisualConfigsPriv; 603fe5e51b7Smrg MGADRIServerPrivatePtr DRIServerInfo; 604fe5e51b7Smrg 605fe5e51b7Smrg MGARegRec DRContextRegs; 606fe5e51b7Smrg 607fe5e51b7Smrg Bool haveQuiescense; 608fe5e51b7Smrg void (*GetQuiescence)(ScrnInfoPtr pScrn); 609fe5e51b7Smrg 610fe5e51b7Smrg int agpMode; 611fe5e51b7Smrg int agpSize; 612fe5e51b7Smrg 613fe5e51b7Smrg int irq; 614fe5e51b7Smrg CARD32 reg_ien; 615fe5e51b7Smrg 616fe5e51b7Smrg Bool useOldDmaInit; 617fe5e51b7Smrg Bool forcePciDma; 618fe5e51b7Smrg#endif 619fe5e51b7Smrg XF86VideoAdaptorPtr adaptor; 620fe5e51b7Smrg Bool DualHeadEnabled; 621fe5e51b7Smrg Bool Crtc2IsTV; 622fe5e51b7Smrg Bool SecondCrtc; 623fe5e51b7Smrg Bool SecondOutput; 624fe5e51b7Smrg 625fe5e51b7Smrg GDevPtr device; 626fe5e51b7Smrg /* The hardware's real SrcOrg */ 627fe5e51b7Smrg int realSrcOrg; 628fe5e51b7Smrg MGAEntPtr entityPrivate; 629fe5e51b7Smrg void (*SetupForSolidFill)(ScrnInfoPtr pScrn, int color, 630fe5e51b7Smrg int rop, unsigned int planemask); 631fe5e51b7Smrg void (*SubsequentSolidFillRect)(ScrnInfoPtr pScrn, 632fe5e51b7Smrg int x, int y, int w, int h); 633fe5e51b7Smrg void (*RestoreAccelState)(ScrnInfoPtr pScrn); 634fe5e51b7Smrg int allowedWidth; 635fe5e51b7Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 636fe5e51b7Smrg void (*PaletteLoadCallback)(ScrnInfoPtr); 637fe5e51b7Smrg void (*RenderCallback)(ScrnInfoPtr); 638fe5e51b7Smrg Time RenderTime; 639fe5e51b7Smrg MGAPaletteInfo palinfo[256]; /* G400 hardware bug workaround */ 640fe5e51b7Smrg FBLinearPtr LinearScratch; 641fe5e51b7Smrg Bool softbooted; 642fe5e51b7Smrg#ifdef USEMGAHAL 643fe5e51b7Smrg Bool HALLoaded; 644fe5e51b7Smrg#endif 645fe5e51b7Smrg OptionInfoPtr Options; 646fe5e51b7Smrg 647fe5e51b7Smrg /* Exa */ 648fe5e51b7Smrg PicturePtr currentSrcPicture; 649fe5e51b7Smrg PicturePtr currentMaskPicture; 650fe5e51b7Smrg PixmapPtr currentSrc; 651fe5e51b7Smrg PixmapPtr currentMask; 652fe5e51b7Smrg int src_w2; 653fe5e51b7Smrg int src_h2; 654fe5e51b7Smrg int mask_w2; 655fe5e51b7Smrg int mask_h2; 656fe5e51b7Smrg CARD32 src_pitch; /* FIXME kill me */ 657fe5e51b7Smrg 658fe5e51b7Smrg/* Merged Framebuffer data */ 659fe5e51b7Smrg Bool MergedFB; 660fe5e51b7Smrg 661fe5e51b7Smrg /* Real values specific to monitor1, since the original ones are replaced */ 662fe5e51b7Smrg DisplayModePtr M1modes; /* list of actual modes */ 663fe5e51b7Smrg DisplayModePtr M1currentMode; /* current mode */ 664fe5e51b7Smrg int M1frameX0; /* viewport position */ 665fe5e51b7Smrg int M1frameY0; 666fe5e51b7Smrg int M1frameX1; 667fe5e51b7Smrg int M1frameY1; 668fe5e51b7Smrg 669fe5e51b7Smrg ScrnInfoPtr pScrn2; /*pointer to second CRTC screeninforec, 670fe5e51b7Smrg if in merged mode */ 671fe5e51b7Smrg/* End of Merged Framebuffer Data */ 672fe5e51b7Smrg int HALGranularityOffX, HALGranularityOffY; 673fe5e51b7Smrg} MGARec, *MGAPtr; 674fe5e51b7Smrg 675fe5e51b7Smrgextern CARD32 MGAAtype[16]; 676fe5e51b7Smrgextern CARD32 MGAAtypeNoBLK[16]; 677fe5e51b7Smrg 678fe5e51b7Smrg#define USE_RECTS_FOR_LINES 0x00000001 679fe5e51b7Smrg#define FASTBLT_BUG 0x00000002 680fe5e51b7Smrg#define CLIPPER_ON 0x00000004 681fe5e51b7Smrg#define BLK_OPAQUE_EXPANSION 0x00000008 682fe5e51b7Smrg#define TRANSC_SOLID_FILL 0x00000010 683fe5e51b7Smrg#define NICE_DASH_PATTERN 0x00000020 684fe5e51b7Smrg#define TWO_PASS_COLOR_EXPAND 0x00000040 685fe5e51b7Smrg#define MGA_NO_PLANEMASK 0x00000080 686fe5e51b7Smrg#define USE_LINEAR_EXPANSION 0x00000100 687fe5e51b7Smrg#define LARGE_ADDRESSES 0x00000200 688fe5e51b7Smrg 689fe5e51b7Smrg#define MGAIOMAPSIZE 0x00004000 690fe5e51b7Smrg#define MGAILOADMAPSIZE 0x00400000 691fe5e51b7Smrg 692fe5e51b7Smrg#define TRANSPARENCY_KEY 255 693fe5e51b7Smrg#define KEY_COLOR 0 694fe5e51b7Smrg 695fe5e51b7Smrg 696fe5e51b7Smrg/* Prototypes */ 697fe5e51b7Smrg 698fe5e51b7Smrgvoid MGAAdjustFrame(int scrnIndex, int x, int y, int flags); 699fe5e51b7SmrgBool MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 700fe5e51b7Smrgvoid MGAFillModeInfoStruct(ScrnInfoPtr pScrn, DisplayModePtr mode); 701fe5e51b7SmrgBool MGAGetRec(ScrnInfoPtr pScrn); 702fe5e51b7Smrgvoid MGAProbeDDC(ScrnInfoPtr pScrn, int index); 703fe5e51b7Smrgvoid MGASoftReset(ScrnInfoPtr pScrn); 704fe5e51b7Smrgvoid MGAFreeRec(ScrnInfoPtr pScrn); 705fe5e51b7SmrgBool mga_read_and_process_bios(ScrnInfoPtr pScrn); 706fe5e51b7Smrgvoid MGADisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, 707fe5e51b7Smrg int flags); 708fe5e51b7Smrgvoid MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags); 709fe5e51b7Smrgvoid MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, 710fe5e51b7Smrg int PowerManagementMode, 711fe5e51b7Smrg int flags); 712fe5e51b7Smrgvoid MGAAdjustGranularity(ScrnInfoPtr pScrn, int* x, int* y); 713fe5e51b7Smrg 714fe5e51b7Smrg 715fe5e51b7Smrgvoid MGA2064SetupFuncs(ScrnInfoPtr pScrn); 716fe5e51b7Smrgvoid MGAGSetupFuncs(ScrnInfoPtr pScrn); 717fe5e51b7Smrg 718fe5e51b7Smrg/* #ifdef USE_XAA */ 719fe5e51b7Smrgvoid MGAStormSync(ScrnInfoPtr pScrn); 720fe5e51b7Smrgvoid MGAStormEngineInit(ScrnInfoPtr pScrn); 721fe5e51b7SmrgBool MGAStormAccelInit(ScreenPtr pScreen); 722fe5e51b7SmrgBool mgaAccelInit(ScreenPtr pScreen); 723fe5e51b7Smrg/* #endif */ 724fe5e51b7Smrg 725fe5e51b7Smrg#ifdef USE_EXA 726fe5e51b7SmrgBool mgaExaInit(ScreenPtr pScreen); 727fe5e51b7Smrg#endif 728fe5e51b7Smrg 729fe5e51b7SmrgBool MGAHWCursorInit(ScreenPtr pScreen); 730fe5e51b7Smrg 731fe5e51b7Smrg 732fe5e51b7Smrgvoid MGAPolyArcThinSolid(DrawablePtr, GCPtr, int, xArc*); 733fe5e51b7Smrg 734fe5e51b7SmrgBool MGADGAInit(ScreenPtr pScreen); 735fe5e51b7Smrg 736fe5e51b7Smrgvoid MGARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 737fe5e51b7Smrgvoid MGARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 738fe5e51b7Smrgvoid MGARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 739fe5e51b7Smrgvoid MGARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 740fe5e51b7Smrgvoid MGARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 741fe5e51b7Smrg 742fe5e51b7Smrgvoid mgaDoSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, int xdir, 743fe5e51b7Smrg int ydir, int rop, unsigned int planemask, int trans, unsigned int bpp ); 744fe5e51b7Smrg 745fe5e51b7Smrgvoid mgaDoSetupForSolidFill( ScrnInfoPtr pScrn, int color, int rop, 746fe5e51b7Smrg unsigned int planemask, unsigned int bpp ); 747fe5e51b7Smrg 748fe5e51b7Smrgvoid MGAPointerMoved(int index, int x, int y); 749fe5e51b7Smrg 750fe5e51b7Smrgvoid MGAInitVideo(ScreenPtr pScreen); 751fe5e51b7Smrgvoid MGAResetVideo(ScrnInfoPtr pScrn); 752fe5e51b7Smrg 753fe5e51b7Smrg#ifdef XF86DRI 754fe5e51b7Smrg 755fe5e51b7Smrg#define MGA_FRONT 0x1 756fe5e51b7Smrg#define MGA_BACK 0x2 757fe5e51b7Smrg#define MGA_DEPTH 0x4 758fe5e51b7Smrg 759fe5e51b7SmrgBool MGADRIScreenInit( ScreenPtr pScreen ); 760fe5e51b7Smrgvoid MGADRICloseScreen( ScreenPtr pScreen ); 761fe5e51b7SmrgBool MGADRIFinishScreenInit( ScreenPtr pScreen ); 762fe5e51b7Smrg 763fe5e51b7SmrgBool MGALockUpdate( ScrnInfoPtr pScrn, drmLockFlags flags ); 764fe5e51b7Smrg 765fe5e51b7Smrgvoid MGAGetQuiescence( ScrnInfoPtr pScrn ); 766fe5e51b7Smrgvoid MGAGetQuiescenceShared( ScrnInfoPtr pScrn ); 767fe5e51b7Smrg 768fe5e51b7Smrgvoid MGASelectBuffer(ScrnInfoPtr pScrn, int which); 769fe5e51b7SmrgBool MgaCleanupDma(ScrnInfoPtr pScrn); 770fe5e51b7SmrgBool MgaInitDma(ScrnInfoPtr pScrn, int prim_size); 771fe5e51b7Smrg 772fe5e51b7Smrg#define MGA_AGP_1X_MODE 0x01 773fe5e51b7Smrg#define MGA_AGP_2X_MODE 0x02 774fe5e51b7Smrg#define MGA_AGP_4X_MODE 0x04 775fe5e51b7Smrg#define MGA_AGP_MODE_MASK 0x07 776fe5e51b7Smrg 777fe5e51b7Smrg#endif 778fe5e51b7Smrg 779fe5e51b7SmrgBool MGAMavenRead(ScrnInfoPtr pScrn, I2CByte reg, I2CByte *val); 780fe5e51b7Smrg 781fe5e51b7Smrgvoid MGACRTC2Set(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 782fe5e51b7Smrgvoid MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 783fe5e51b7Smrgvoid MGACRTC2SetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); 784fe5e51b7Smrgvoid MGACRTC2SetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); 785fe5e51b7Smrg 786fe5e51b7Smrgvoid MGACRTC2Get(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 787fe5e51b7Smrgvoid MGACRTC2GetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); 788fe5e51b7Smrgvoid MGACRTC2GetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); 789fe5e51b7Smrg 790fe5e51b7Smrgdouble MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out); 791fe5e51b7Smrg#ifdef DEBUG 792fe5e51b7Smrgvoid MGAG450PrintPLL(ScrnInfoPtr pScrn); 793fe5e51b7Smrg#endif 794fe5e51b7Smrglong MGAG450SavePLLFreq(ScrnInfoPtr pScrn); 795fe5e51b7Smrgvoid MGAprintDac(ScrnInfoPtr pScrn); 796fe5e51b7Smrgvoid MGAG200SESaveFonts(ScrnInfoPtr, vgaRegPtr); 797fe5e51b7Smrgvoid MGAG200SERestoreFonts(ScrnInfoPtr, vgaRegPtr); 798fe5e51b7Smrgvoid MGAG200SESaveMode(ScrnInfoPtr, vgaRegPtr); 799fe5e51b7Smrgvoid MGAG200SERestoreMode(ScrnInfoPtr, vgaRegPtr); 800fe5e51b7Smrgvoid MGAG200SEHWProtect(ScrnInfoPtr, Bool); 801fe5e51b7Smrg 802fe5e51b7Smrg#ifdef USEMGAHAL 803fe5e51b7Smrg/************ ESC Call Definition ***************/ 804fe5e51b7Smrgtypedef struct { 805fe5e51b7Smrg char *function; 806fe5e51b7Smrg void (*funcptr)(ScrnInfoPtr pScrn, unsigned long *param, char *out, DisplayModePtr pMode); 807fe5e51b7Smrg} MGAEscFuncRec, *MGAEscFuncPtr; 808fe5e51b7Smrg 809fe5e51b7Smrgtypedef struct { 810fe5e51b7Smrg char function[32]; 811fe5e51b7Smrg unsigned long parameters[32]; 812fe5e51b7Smrg} EscCmdStruct; 813fe5e51b7Smrg 814fe5e51b7Smrgextern LPMGAMODEINFO pMgaModeInfo[2]; 815fe5e51b7Smrgextern MGAMODEINFO TmpMgaModeInfo[2]; 816fe5e51b7Smrg 817fe5e51b7Smrgextern void MGAExecuteEscCmd(ScrnInfoPtr pScrn, char *cmdline , char *sResult, DisplayModePtr pMode); 818fe5e51b7Smrgvoid MGAFillDisplayModeStruct(DisplayModePtr pMode, LPMGAMODEINFO pModeInfo); 819fe5e51b7Smrg/************************************************/ 820fe5e51b7Smrg#endif 821fe5e51b7Smrg 822fe5e51b7Smrgstatic __inline__ void 823fe5e51b7SmrgMGA_MARK_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) 824fe5e51b7Smrg{ 825fe5e51b7Smrg#ifdef USE_EXA 826fe5e51b7Smrg if (pMga->Exa) 827fe5e51b7Smrg exaMarkSync(pScrn->pScreen); 828fe5e51b7Smrg#endif 829fe5e51b7Smrg#ifdef USE_XAA 830fe5e51b7Smrg if (!pMga->Exa) 831fe5e51b7Smrg SET_SYNC_FLAG(pMga->AccelInfoRec); 832fe5e51b7Smrg#endif 833fe5e51b7Smrg} 834fe5e51b7Smrg 835fe5e51b7Smrgstatic __inline__ void 836fe5e51b7SmrgMGA_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) 837fe5e51b7Smrg{ 838fe5e51b7Smrg#ifdef USE_EXA 839fe5e51b7Smrg if (pMga->Exa) 840fe5e51b7Smrg exaWaitSync(pScrn->pScreen); 841fe5e51b7Smrg#endif 842fe5e51b7Smrg#ifdef USE_XAA 843fe5e51b7Smrg if (!pMga->Exa && pMga->AccelInfoRec && pMga->AccelInfoRec->NeedToSync) 844fe5e51b7Smrg pMga->AccelInfoRec->Sync(pScrn); 845fe5e51b7Smrg#endif 846fe5e51b7Smrg} 847fe5e51b7Smrg 848fe5e51b7Smrg#endif 849