mga.h revision a31a186a
1fe5e51b7Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.87tsi Exp $ */ 2fe5e51b7Smrg/* 3fe5e51b7Smrg * MGA Millennium (MGA2064W) functions 4fe5e51b7Smrg * 5fe5e51b7Smrg * Copyright 1996 The XFree86 Project, Inc. 6fe5e51b7Smrg * 7fe5e51b7Smrg * Authors 8fe5e51b7Smrg * Dirk Hohndel 9fe5e51b7Smrg * hohndel@XFree86.Org 10fe5e51b7Smrg * David Dawes 11fe5e51b7Smrg * dawes@XFree86.Org 12fe5e51b7Smrg */ 13fe5e51b7Smrg 14fe5e51b7Smrg#ifndef MGA_H 15fe5e51b7Smrg#define MGA_H 16fe5e51b7Smrg 17fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 18fe5e51b7Smrg#include <pciaccess.h> 19fe5e51b7Smrg#endif 20fe5e51b7Smrg#include <string.h> 21fe5e51b7Smrg#include <stdio.h> 22fe5e51b7Smrg 23fe5e51b7Smrg#include "compiler.h" 24fe5e51b7Smrg#include "xaa.h" 25fe5e51b7Smrg#include "exa.h" 26fe5e51b7Smrg#include "xf86Cursor.h" 27fe5e51b7Smrg#include "vgaHW.h" 28fe5e51b7Smrg#include "colormapst.h" 29fe5e51b7Smrg#include "xf86DDC.h" 30fe5e51b7Smrg#include "xf86xv.h" 31fe5e51b7Smrg 32fe5e51b7Smrg#ifdef XF86DRI 33fe5e51b7Smrg#include "xf86drm.h" 34fe5e51b7Smrg 35fe5e51b7Smrg#define _XF86DRI_SERVER_ 36fe5e51b7Smrg#include "mga_dripriv.h" 37fe5e51b7Smrg#include "dri.h" 38fe5e51b7Smrg#include "GL/glxint.h" 39fe5e51b7Smrg 40fe5e51b7Smrg#include "dri.h" 41fe5e51b7Smrg 42fe5e51b7Smrg#include "GL/glxint.h" 43fe5e51b7Smrg#include "mga_dri.h" 44fe5e51b7Smrg#endif 45fe5e51b7Smrg 46fe5e51b7Smrg#ifdef USEMGAHAL 47fe5e51b7Smrg#include "client.h" 48fe5e51b7Smrg#endif 49fe5e51b7Smrg 50fe5e51b7Smrgtypedef enum { 51fe5e51b7Smrg OPTION_SW_CURSOR, 52fe5e51b7Smrg OPTION_HW_CURSOR, 53fe5e51b7Smrg OPTION_PCI_RETRY, 54fe5e51b7Smrg OPTION_SYNC_ON_GREEN, 55fe5e51b7Smrg OPTION_NOACCEL, 56fe5e51b7Smrg OPTION_SHOWCACHE, 57fe5e51b7Smrg OPTION_OVERLAY, 58fe5e51b7Smrg OPTION_MGA_SDRAM, 59fe5e51b7Smrg OPTION_SHADOW_FB, 60fe5e51b7Smrg OPTION_FBDEV, 61fe5e51b7Smrg OPTION_COLOR_KEY, 62fe5e51b7Smrg OPTION_SET_MCLK, 63fe5e51b7Smrg OPTION_OVERCLOCK_MEM, 64fe5e51b7Smrg OPTION_VIDEO_KEY, 65fe5e51b7Smrg OPTION_ROTATE, 66fe5e51b7Smrg OPTION_TEXTURED_VIDEO, 67fe5e51b7Smrg OPTION_CRTC2HALF, 68fe5e51b7Smrg OPTION_CRTC2RAM, 69fe5e51b7Smrg OPTION_INT10, 70fe5e51b7Smrg OPTION_AGP_MODE, 71fe5e51b7Smrg OPTION_AGP_SIZE, 72fe5e51b7Smrg OPTION_DIGITAL1, 73fe5e51b7Smrg OPTION_DIGITAL2, 74fe5e51b7Smrg OPTION_TV, 75fe5e51b7Smrg OPTION_TVSTANDARD, 76fe5e51b7Smrg OPTION_CABLETYPE, 77fe5e51b7Smrg OPTION_USEIRQZERO, 78fe5e51b7Smrg OPTION_NOHAL, 79fe5e51b7Smrg OPTION_SWAPPED_HEAD, 80fe5e51b7Smrg OPTION_DRI, 81fe5e51b7Smrg OPTION_MERGEDFB, 82fe5e51b7Smrg OPTION_HSYNC2, 83fe5e51b7Smrg OPTION_VREFRESH2, 84fe5e51b7Smrg OPTION_MONITOR2POS, 85fe5e51b7Smrg OPTION_METAMODES, 86fe5e51b7Smrg OPTION_OLDDMA, 87fe5e51b7Smrg OPTION_PCIDMA, 88eda3803bSmrg OPTION_ACCELMETHOD, 89eda3803bSmrg OPTION_KVM 90fe5e51b7Smrg} MGAOpts; 91fe5e51b7Smrg 92fe5e51b7Smrg 93fe5e51b7Smrg#if !defined(EXTRADEBUG) 94fe5e51b7Smrg#define INREG8(addr) MMIO_IN8(pMga->IOBase, addr) 95fe5e51b7Smrg#define INREG16(addr) MMIO_IN16(pMga->IOBase, addr) 96fe5e51b7Smrg#define INREG(addr) MMIO_IN32(pMga->IOBase, addr) 97fe5e51b7Smrg#define OUTREG8(addr, val) MMIO_OUT8(pMga->IOBase, addr, val) 98fe5e51b7Smrg#define OUTREG16(addr, val) MMIO_OUT16(pMga->IOBase, addr, val) 99fe5e51b7Smrg#define OUTREG(addr, val) MMIO_OUT32(pMga->IOBase, addr, val) 100fe5e51b7Smrg#else /* !EXTRADEBUG */ 101fe5e51b7SmrgCARD8 MGAdbg_inreg8(ScrnInfoPtr, int, int, char*); 102fe5e51b7SmrgCARD16 MGAdbg_inreg16(ScrnInfoPtr, int, int, char*); 103fe5e51b7SmrgCARD32 MGAdbg_inreg32(ScrnInfoPtr, int, int, char*); 104fe5e51b7Smrgvoid MGAdbg_outreg8(ScrnInfoPtr, int, int, char*); 105fe5e51b7Smrgvoid MGAdbg_outreg16(ScrnInfoPtr, int,int, char*); 106fe5e51b7Smrgvoid MGAdbg_outreg32(ScrnInfoPtr, int,int, char*); 107fe5e51b7Smrg#ifndef __GNUC__ 108fe5e51b7Smrg# define MGA_STRINGIZE(x) #x 109fe5e51b7Smrg# define MGA_STRINGIFY(x) MGA_STRINGIZE(x) 110fe5e51b7Smrg# define __FUNCTION__ MGA_STRINGIFY(__FILE__) ", line " MGA_STRINGIFY(__LINE__) 111fe5e51b7Smrg#endif 112fe5e51b7Smrg#define INREG8(addr) MGAdbg_inreg8(pScrn, addr, 1, __FUNCTION__) 113fe5e51b7Smrg#define INREG16(addr) MGAdbg_inreg16(pScrn, addr, 1, __FUNCTION__) 114fe5e51b7Smrg#define INREG(addr) MGAdbg_inreg32(pScrn, addr, 1, __FUNCTION__) 115fe5e51b7Smrg#define OUTREG8(addr,val) MGAdbg_outreg8(pScrn, addr, val, __FUNCTION__) 116fe5e51b7Smrg#define OUTREG16(addr,val) MGAdbg_outreg16(pScrn, addr, val, __FUNCTION__) 117fe5e51b7Smrg#define OUTREG(addr,val) MGAdbg_outreg32(pScrn, addr, val, __FUNCTION__) 118fe5e51b7Smrg#endif /* EXTRADEBUG */ 119fe5e51b7Smrg 120fe5e51b7Smrg#ifndef PCI_CHIP_MGAG200_SE_A_PCI 121fe5e51b7Smrg#define PCI_CHIP_MGAG200_SE_A_PCI 0x0522 122fe5e51b7Smrg#endif 123fe5e51b7Smrg 124fe5e51b7Smrg#ifndef PCI_CHIP_MGAG200_SE_B_PCI 125fe5e51b7Smrg#define PCI_CHIP_MGAG200_SE_B_PCI 0x0524 126fe5e51b7Smrg#endif 127fe5e51b7Smrg 128eda3803bSmrg#ifndef PCI_CHIP_MGAG200_WINBOND_PCI 129eda3803bSmrg#define PCI_CHIP_MGAG200_WINBOND_PCI 0x0532 130eda3803bSmrg#endif 131eda3803bSmrg 132eda3803bSmrg#ifndef PCI_CHIP_MGAG200_EV_PCI 133eda3803bSmrg#define PCI_CHIP_MGAG200_EV_PCI 0x0530 134eda3803bSmrg#endif 135eda3803bSmrg 136a31a186aSmrg#ifndef PCI_CHIP_MGAG200_EH_PCI 137a31a186aSmrg#define PCI_CHIP_MGAG200_EH_PCI 0x0533 138a31a186aSmrg#endif 139a31a186aSmrg 140fe5e51b7Smrg/* 141fe5e51b7Smrg * Read/write to the DAC via MMIO 142fe5e51b7Smrg */ 143fe5e51b7Smrg 144fe5e51b7Smrg/* 145fe5e51b7Smrg * These were functions. Use macros instead to avoid the need to 146fe5e51b7Smrg * pass pMga to them. 147fe5e51b7Smrg */ 148fe5e51b7Smrg 149fe5e51b7Smrg#define inMGAdreg(reg) INREG8(RAMDAC_OFFSET + (reg)) 150fe5e51b7Smrg 151fe5e51b7Smrg#define outMGAdreg(reg, val) OUTREG8(RAMDAC_OFFSET + (reg), val) 152fe5e51b7Smrg 153fe5e51b7Smrg#define inMGAdac(reg) \ 154fe5e51b7Smrg (outMGAdreg(MGA1064_INDEX, reg), inMGAdreg(MGA1064_DATA)) 155fe5e51b7Smrg 156fe5e51b7Smrg#define outMGAdac(reg, val) \ 157fe5e51b7Smrg (outMGAdreg(MGA1064_INDEX, reg), outMGAdreg(MGA1064_DATA, val)) 158fe5e51b7Smrg 159fe5e51b7Smrg#define outMGAdacmsk(reg, mask, val) \ 160fe5e51b7Smrg do { /* note: mask and reg may get evaluated twice */ \ 161fe5e51b7Smrg unsigned char tmp = (mask) ? (inMGAdac(reg) & (mask)) : 0; \ 162fe5e51b7Smrg outMGAdreg(MGA1064_INDEX, reg); \ 163fe5e51b7Smrg outMGAdreg(MGA1064_DATA, tmp | (val)); \ 164fe5e51b7Smrg } while (0) 165fe5e51b7Smrg 166fe5e51b7Smrg#define MGAWAITVSYNC() \ 167fe5e51b7Smrg do { \ 168fe5e51b7Smrg unsigned int count = 0; \ 169fe5e51b7Smrg unsigned int status = 0; \ 170fe5e51b7Smrg do { \ 171fe5e51b7Smrg status = INREG( MGAREG_Status ); \ 172fe5e51b7Smrg count++; \ 173fe5e51b7Smrg } while( ( status & 0x08 ) && (count < 250000) );\ 174fe5e51b7Smrg count = 0; \ 175fe5e51b7Smrg status = 0; \ 176fe5e51b7Smrg do { \ 177fe5e51b7Smrg status = INREG( MGAREG_Status ); \ 178fe5e51b7Smrg count++; \ 179fe5e51b7Smrg } while( !( status & 0x08 ) && (count < 250000) );\ 180fe5e51b7Smrg } while (0) 181fe5e51b7Smrg 182fe5e51b7Smrg#define MGAWAITBUSY() \ 183fe5e51b7Smrg do { \ 184fe5e51b7Smrg unsigned int count = 0; \ 185fe5e51b7Smrg unsigned int status = 0; \ 186fe5e51b7Smrg do { \ 187fe5e51b7Smrg status = INREG8( MGAREG_Status + 2 ); \ 188fe5e51b7Smrg count++; \ 189fe5e51b7Smrg } while( ( status & 0x01 ) && (count < 500000) ); \ 190fe5e51b7Smrg } while (0) 191fe5e51b7Smrg 192fe5e51b7Smrg#define PORT_OFFSET (0x1F00 - 0x300) 193fe5e51b7Smrg 194fe5e51b7Smrg#define MGA_VERSION 4000 195fe5e51b7Smrg#define MGA_NAME "MGA" 196fe5e51b7Smrg#define MGA_C_NAME MGA 197fe5e51b7Smrg#define MGA_MODULE_DATA mgaModuleData 198fe5e51b7Smrg#define MGA_DRIVER_NAME "mga" 199fe5e51b7Smrg 200fe5e51b7Smrgtypedef struct { 201fe5e51b7Smrg unsigned char ExtVga[6]; 202fe5e51b7Smrg unsigned char DacClk[6]; 203fe5e51b7Smrg unsigned char * DacRegs; 204fe5e51b7Smrg unsigned long crtc2[0x58]; 205fe5e51b7Smrg unsigned char dac2[0x21]; 206fe5e51b7Smrg CARD32 Option; 207fe5e51b7Smrg CARD32 Option2; 208fe5e51b7Smrg CARD32 Option3; 209fe5e51b7Smrg long Clock; 210fe5e51b7Smrg Bool PIXPLLCSaved; 211eda3803bSmrg unsigned char PllM; 212eda3803bSmrg unsigned char PllN; 213eda3803bSmrg unsigned char PllP; 214fe5e51b7Smrg} MGARegRec, *MGARegPtr; 215fe5e51b7Smrg 216fe5e51b7Smrg/* For programming the second CRTC */ 217fe5e51b7Smrgtypedef struct { 218fe5e51b7Smrg CARD32 ulDispWidth; /* Display Width in pixels*/ 219fe5e51b7Smrg CARD32 ulDispHeight; /* Display Height in pixels*/ 220fe5e51b7Smrg CARD32 ulBpp; /* Bits Per Pixels / input format*/ 221fe5e51b7Smrg CARD32 ulPixClock; /* Pixel Clock in kHz*/ 222fe5e51b7Smrg CARD32 ulHFPorch; /* Horizontal front porch in pixels*/ 223fe5e51b7Smrg CARD32 ulHSync; /* Horizontal Sync in pixels*/ 224fe5e51b7Smrg CARD32 ulHBPorch; /* Horizontal back porch in pixels*/ 225fe5e51b7Smrg CARD32 ulVFPorch; /* Vertical front porch in lines*/ 226fe5e51b7Smrg CARD32 ulVSync; /* Vertical Sync in lines*/ 227fe5e51b7Smrg CARD32 ulVBPorch; /* Vertical back Porch in lines*/ 228fe5e51b7Smrg CARD32 ulFBPitch; /* Pitch*/ 229fe5e51b7Smrg CARD32 flSignalMode; /* Signal Mode*/ 230fe5e51b7Smrg} xMODEINFO; 231fe5e51b7Smrg 232fe5e51b7Smrg 233fe5e51b7Smrgtypedef struct { 234fe5e51b7Smrg int brightness; 235fe5e51b7Smrg int contrast; 236fe5e51b7Smrg Bool doubleBuffer; 237fe5e51b7Smrg unsigned char currentBuffer; 238fe5e51b7Smrg RegionRec clip; 239fe5e51b7Smrg CARD32 colorKey; 240fe5e51b7Smrg CARD32 videoStatus; 241fe5e51b7Smrg Time offTime; 242fe5e51b7Smrg Time freeTime; 243fe5e51b7Smrg int lastPort; 244fe5e51b7Smrg 245fe5e51b7Smrg#ifdef USE_EXA 246fe5e51b7Smrg int size; 247fe5e51b7Smrg ExaOffscreenArea *off_screen; 248fe5e51b7Smrg#endif 249fe5e51b7Smrg 250fe5e51b7Smrg void *video_memory; 251fe5e51b7Smrg int video_offset; 252fe5e51b7Smrg} MGAPortPrivRec, *MGAPortPrivPtr; 253fe5e51b7Smrg 254fe5e51b7Smrgtypedef struct { 255fe5e51b7Smrg Bool isHwCursor; 256fe5e51b7Smrg int CursorMaxWidth; 257fe5e51b7Smrg int CursorMaxHeight; 258fe5e51b7Smrg int CursorFlags; 259fe5e51b7Smrg int CursorOffscreenMemSize; 260fe5e51b7Smrg Bool (*UseHWCursor)(ScreenPtr, CursorPtr); 261fe5e51b7Smrg void (*LoadCursorImage)(ScrnInfoPtr, unsigned char*); 262fe5e51b7Smrg void (*ShowCursor)(ScrnInfoPtr); 263fe5e51b7Smrg void (*HideCursor)(ScrnInfoPtr); 264fe5e51b7Smrg void (*SetCursorPosition)(ScrnInfoPtr, int, int); 265fe5e51b7Smrg void (*SetCursorColors)(ScrnInfoPtr, int, int); 266fe5e51b7Smrg long maxPixelClock; 267fe5e51b7Smrg long MemoryClock; 268fe5e51b7Smrg MessageType ClockFrom; 269fe5e51b7Smrg MessageType MemClkFrom; 270fe5e51b7Smrg Bool SetMemClk; 271fe5e51b7Smrg void (*LoadPalette)(ScrnInfoPtr, int, int*, LOCO*, VisualPtr); 272fe5e51b7Smrg void (*RestorePalette)(ScrnInfoPtr, unsigned char *); 273fe5e51b7Smrg void (*PreInit)(ScrnInfoPtr); 274fe5e51b7Smrg void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 275fe5e51b7Smrg void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 276fe5e51b7Smrg Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); 277fe5e51b7Smrg} MGARamdacRec, *MGARamdacPtr; 278fe5e51b7Smrg 279fe5e51b7Smrg 280fe5e51b7Smrgtypedef struct { 281fe5e51b7Smrg int bitsPerPixel; 282fe5e51b7Smrg int depth; 283fe5e51b7Smrg int displayWidth; 284fe5e51b7Smrg rgb weight; 285fe5e51b7Smrg DisplayModePtr mode; 286fe5e51b7Smrg} MGAFBLayout; 287fe5e51b7Smrg 288fe5e51b7Smrg/* Card-specific driver information */ 289fe5e51b7Smrg 290fe5e51b7Smrgtypedef struct { 291fe5e51b7Smrg Bool update; 292fe5e51b7Smrg unsigned char red; 293fe5e51b7Smrg unsigned char green; 294fe5e51b7Smrg unsigned char blue; 295fe5e51b7Smrg} MGAPaletteInfo; 296fe5e51b7Smrg 297fe5e51b7Smrg#define MGAPTR(p) ((MGAPtr)((p)->driverPrivate)) 298fe5e51b7Smrg 299fe5e51b7Smrg/*avoids segfault by returning false if pMgaHwInfo not defined*/ 300fe5e51b7Smrg#define ISDIGITAL1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) 301fe5e51b7Smrg#define ISDIGITAL2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_DIGITAL)) 302fe5e51b7Smrg#define ISTV1(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsFirstOutput) & MGAHWINFOCAPS_OUTPUT_TV)) 303fe5e51b7Smrg#define ISTV2(p) (p->pMgaHwInfo && ((p->pMgaHwInfo->ulCapsSecondOutput) & MGAHWINFOCAPS_OUTPUT_TV)) 304fe5e51b7Smrg 305fe5e51b7Smrg#ifdef DISABLE_VGA_IO 306fe5e51b7Smrgtypedef struct mgaSave { 307fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 308fe5e51b7Smrg struct pci_device * pvp; 309fe5e51b7Smrg#else 310fe5e51b7Smrg pciVideoPtr pvp; 311fe5e51b7Smrg#endif 312fe5e51b7Smrg Bool enable; 313fe5e51b7Smrg} MgaSave, *MgaSavePtr; 314fe5e51b7Smrg#endif 315fe5e51b7Smrg 316fe5e51b7Smrg 317fe5e51b7Smrgtypedef enum { 318fe5e51b7Smrg mgaLeftOf, 319fe5e51b7Smrg mgaRightOf, 320fe5e51b7Smrg mgaAbove, 321fe5e51b7Smrg mgaBelow, 322fe5e51b7Smrg mgaClone 323fe5e51b7Smrg} MgaScrn2Rel; 324fe5e51b7Smrg 325fe5e51b7Smrgtypedef struct { 326fe5e51b7Smrg int lastInstance; 327fe5e51b7Smrg#ifdef USEMGAHAL 328fe5e51b7Smrg LPCLIENTDATA pClientStruct; 329fe5e51b7Smrg LPBOARDHANDLE pBoard; 330fe5e51b7Smrg LPMGAHWINFO pMgaHwInfo; 331fe5e51b7Smrg#endif 332fe5e51b7Smrg int refCount; 333fe5e51b7Smrg CARD32 masterFbAddress; 334fe5e51b7Smrg long masterFbMapSize; 335fe5e51b7Smrg CARD32 slaveFbAddress; 336fe5e51b7Smrg long slaveFbMapSize; 337fe5e51b7Smrg int mastervideoRam; 338fe5e51b7Smrg int slavevideoRam; 339fe5e51b7Smrg Bool directRenderingEnabled; 340fe5e51b7Smrg ScrnInfoPtr pScrn_1; 341fe5e51b7Smrg ScrnInfoPtr pScrn_2; 342fe5e51b7Smrg} MGAEntRec, *MGAEntPtr; 343fe5e51b7Smrg 344fe5e51b7Smrg/** 345fe5e51b7Smrg * Track the range of a voltage controlled osciliator (VCO). 346fe5e51b7Smrg */ 347fe5e51b7Smrgstruct mga_VCO { 348fe5e51b7Smrg /** 349fe5e51b7Smrg * Minimum selectable frequency for this VCO, measured in kHz. 350fe5e51b7Smrg */ 351fe5e51b7Smrg unsigned min_freq; 352fe5e51b7Smrg 353fe5e51b7Smrg /** 354fe5e51b7Smrg * Maximum selectable frequency for this VCO, measured in kHz. 355fe5e51b7Smrg * 356fe5e51b7Smrg * If this value is zero, then the VCO is not available. 357fe5e51b7Smrg */ 358fe5e51b7Smrg unsigned max_freq; 359fe5e51b7Smrg}; 360fe5e51b7Smrg 361fe5e51b7Smrg/** 362fe5e51b7Smrg * Host interface types that can be set by the card's BIOS. 363fe5e51b7Smrg */ 364fe5e51b7Smrgtypedef enum { 365fe5e51b7Smrg MGA_HOST_UNKNOWN0 = 0, /**< Meaning unknown. */ 366fe5e51b7Smrg MGA_HOST_UNKNOWN1 = 1, /**< Meaning unknown. */ 367fe5e51b7Smrg MGA_HOST_UNKNOWN2 = 2, /**< Meaning unknown. */ 368fe5e51b7Smrg MGA_HOST_HYBRID = 3, /**< AGP 4x for data xfers only. */ 369fe5e51b7Smrg 370fe5e51b7Smrg /** 371fe5e51b7Smrg * PCI interface. Either native or via a universal PCI-to-PCI bridge 372fe5e51b7Smrg * chip. The PCI G450 and PCI G550 cards are examples. 373fe5e51b7Smrg */ 374fe5e51b7Smrg MGA_HOST_PCI = 4, 375fe5e51b7Smrg 376fe5e51b7Smrg MGA_HOST_AGP_1x = 5, /**< AGP 1x capable. */ 377fe5e51b7Smrg MGA_HOST_AGP_2x = 6, /**< AGP 2x capable. */ 378fe5e51b7Smrg MGA_HOST_AGP_4x = 7 /**< AGP 4x capable. */ 379fe5e51b7Smrg} mga_host_t; 380fe5e51b7Smrg 381fe5e51b7Smrg/** 382fe5e51b7Smrg * Card information derrived from BIOS PInS data. 383fe5e51b7Smrg */ 384fe5e51b7Smrgstruct mga_bios_values { 385fe5e51b7Smrg /** 386fe5e51b7Smrg * \name Voltage Controlled Oscilators 387fe5e51b7Smrg * \brief Track information about the various VCOs. 388fe5e51b7Smrg * 389fe5e51b7Smrg * MGA cards have between one and three VCOs that can be used to drive the 390fe5e51b7Smrg * various clocks. On older cards, only \c mga_bios_values::pixel VCO is 391fe5e51b7Smrg * available. On newer cards, such as the G450 and G550, all three are 392fe5e51b7Smrg * available. If \c mga_VCO::max_freq is zero, the VCO is not available. 393fe5e51b7Smrg */ 394fe5e51b7Smrg /*@{*/ 395fe5e51b7Smrg struct mga_VCO system; /**< System VCO. */ 396fe5e51b7Smrg struct mga_VCO pixel; /**< Pixel VCO. */ 397fe5e51b7Smrg struct mga_VCO video; /**< Video VCO. */ 398fe5e51b7Smrg /*@}*/ 399fe5e51b7Smrg 400fe5e51b7Smrg /** 401fe5e51b7Smrg * Memory clock speed, measured in kHz. 402fe5e51b7Smrg */ 403fe5e51b7Smrg unsigned mem_clock; 404fe5e51b7Smrg 405fe5e51b7Smrg /** 406fe5e51b7Smrg * PLL reference frequency value. On older cards this is ~14MHz, and on 407fe5e51b7Smrg * newer cards it is ~27MHz. 408fe5e51b7Smrg */ 409fe5e51b7Smrg unsigned pll_ref_freq; 410fe5e51b7Smrg 411fe5e51b7Smrg /** 412fe5e51b7Smrg * Some older MGA cards have a "fast bitblt" mode. This is determined 413fe5e51b7Smrg * by a capability bit stored in the PInS data. 414fe5e51b7Smrg */ 415fe5e51b7Smrg Bool fast_bitblt; 416fe5e51b7Smrg 417fe5e51b7Smrg /** 418fe5e51b7Smrg * Type of physical interface used for the card. 419fe5e51b7Smrg */ 420fe5e51b7Smrg mga_host_t host_interface; 421fe5e51b7Smrg}; 422fe5e51b7Smrg 423fe5e51b7Smrg 424fe5e51b7Smrg/** 425fe5e51b7Smrg * Attributes that of an MGA device that can be derrived purely from its 426fe5e51b7Smrg * PCI ID. 427fe5e51b7Smrg */ 428fe5e51b7Smrgstruct mga_device_attributes { 429fe5e51b7Smrg unsigned has_sdram:1; 430fe5e51b7Smrg unsigned probe_for_sdram:1; 431fe5e51b7Smrg unsigned dual_head_possible:1; 432fe5e51b7Smrg unsigned fb_4mb_quirk:1; 433fe5e51b7Smrg unsigned hwcursor_1064:1; 434fe5e51b7Smrg 435fe5e51b7Smrg unsigned dri_capable:1; 436fe5e51b7Smrg unsigned dri_chipset:3; 437fe5e51b7Smrg 438fe5e51b7Smrg unsigned HAL_chipset:1; 439fe5e51b7Smrg 440fe5e51b7Smrg enum { 441fe5e51b7Smrg old_BARs = 0, 442fe5e51b7Smrg probe_BARs, 443fe5e51b7Smrg new_BARs 444fe5e51b7Smrg } BARs:2; 445fe5e51b7Smrg 446fe5e51b7Smrg uint32_t accel_flags; 447eda3803bSmrg 448eda3803bSmrg /** Default BIOS values. */ 449eda3803bSmrg struct mga_bios_values default_bios_values; 450eda3803bSmrg 451eda3803bSmrg /** Default memory probe offset / size values. */ 452eda3803bSmrg unsigned probe_size; 453eda3803bSmrg unsigned probe_offset; 454fe5e51b7Smrg}; 455fe5e51b7Smrg 456fe5e51b7Smrgtypedef struct { 457fe5e51b7Smrg#ifdef USEMGAHAL 458fe5e51b7Smrg LPCLIENTDATA pClientStruct; 459fe5e51b7Smrg LPBOARDHANDLE pBoard; 460fe5e51b7Smrg LPMGAMODEINFO pMgaModeInfo; 461fe5e51b7Smrg LPMGAHWINFO pMgaHwInfo; 462fe5e51b7Smrg#endif 463fe5e51b7Smrg EntityInfoPtr pEnt; 464fe5e51b7Smrg struct mga_bios_values bios; 465fe5e51b7Smrg CARD8 BiosOutputMode; 466fe5e51b7Smrg#ifdef XSERVER_LIBPCIACCESS 467fe5e51b7Smrg struct pci_device * PciInfo; 468fe5e51b7Smrg#else 469fe5e51b7Smrg pciVideoPtr PciInfo; 470fe5e51b7Smrg PCITAG PciTag; 471643b027fSmrg xf86AccessRec Access; 472fe5e51b7Smrg#endif 473fe5e51b7Smrg const struct mga_device_attributes * chip_attribs; 474fe5e51b7Smrg int Chipset; 475fe5e51b7Smrg int ChipRev; 476fe5e51b7Smrg 477fe5e51b7Smrg int is_Gx50:1; 478fe5e51b7Smrg int is_G200SE:1; 479eda3803bSmrg int is_G200WB:1; 480eda3803bSmrg int is_G200EV:1; 481a31a186aSmrg int is_G200EH:1; 482eda3803bSmrg 483eda3803bSmrg int KVM; 484eda3803bSmrg 485eda3803bSmrg CARD32 reg_1e24; /* model revision on g200se */ 486fe5e51b7Smrg 487fe5e51b7Smrg Bool Primary; 488fe5e51b7Smrg Bool Interleave; 489fe5e51b7Smrg int HwBpp; 490fe5e51b7Smrg int Roundings[4]; 491fe5e51b7Smrg int BppShifts[4]; 492fe5e51b7Smrg Bool HasFBitBlt; 493fe5e51b7Smrg Bool OverclockMem; 494fe5e51b7Smrg int YDstOrg; 495fe5e51b7Smrg int DstOrg; 496fe5e51b7Smrg int SrcOrg; 497fe5e51b7Smrg 498fe5e51b7Smrg /** 499fe5e51b7Smrg * Which BAR corresponds to the framebuffer on this chip? 500fe5e51b7Smrg */ 501fe5e51b7Smrg unsigned framebuffer_bar; 502fe5e51b7Smrg 503fe5e51b7Smrg /** 504fe5e51b7Smrg * Which BAR corresponds to IO space on this chip? 505fe5e51b7Smrg */ 506fe5e51b7Smrg unsigned io_bar; 507fe5e51b7Smrg 508fe5e51b7Smrg /** 509fe5e51b7Smrg * Which BAR corresponds to ILOAD space on this chip? If the value is 510fe5e51b7Smrg * -1, then this chip does not have an ILOAD region. 511fe5e51b7Smrg */ 512fe5e51b7Smrg int iload_bar; 513fe5e51b7Smrg 514fe5e51b7Smrg#ifndef XSERVER_LIBPCIACCESS 515fe5e51b7Smrg unsigned long IOAddress; 516fe5e51b7Smrg unsigned long ILOADAddress; 517fe5e51b7Smrg unsigned long BiosAddress; 518fe5e51b7Smrg MessageType BiosFrom; 519fe5e51b7Smrg#endif 520fe5e51b7Smrg unsigned long FbAddress; 521fe5e51b7Smrg unsigned char * IOBase; 522fe5e51b7Smrg unsigned char * FbBase; 523fe5e51b7Smrg unsigned char * ILOADBase; 524fe5e51b7Smrg unsigned char * FbStart; 525fe5e51b7Smrg long FbMapSize; 526fe5e51b7Smrg long FbUsableSize; 527fe5e51b7Smrg long FbCursorOffset; 528fe5e51b7Smrg MGARamdacRec Dac; 529fe5e51b7Smrg Bool HasSDRAM; 530fe5e51b7Smrg Bool NoAccel; 531fe5e51b7Smrg Bool Exa; 532fe5e51b7Smrg ExaDriverPtr ExaDriver; 533fe5e51b7Smrg Bool SyncOnGreen; 534fe5e51b7Smrg Bool HWCursor; 535fe5e51b7Smrg Bool UsePCIRetry; 536fe5e51b7Smrg Bool ShowCache; 537fe5e51b7Smrg Bool ShadowFB; 538fe5e51b7Smrg unsigned char * ShadowPtr; 539fe5e51b7Smrg int ShadowPitch; 540fe5e51b7Smrg int MemClk; 541fe5e51b7Smrg int MinClock; 542fe5e51b7Smrg int MaxClock; 543fe5e51b7Smrg MGARegRec SavedReg; 544fe5e51b7Smrg MGARegRec ModeReg; 545fe5e51b7Smrg int MaxFastBlitY; 546fe5e51b7Smrg CARD32 BltScanDirection; 547fe5e51b7Smrg CARD32 FilledRectCMD; 548fe5e51b7Smrg CARD32 SolidLineCMD; 549fe5e51b7Smrg CARD32 PatternRectCMD; 550fe5e51b7Smrg CARD32 DashCMD; 551fe5e51b7Smrg CARD32 NiceDashCMD; 552fe5e51b7Smrg CARD32 AccelFlags; 553fe5e51b7Smrg CARD32 PlaneMask; 554fe5e51b7Smrg CARD32 FgColor; 555fe5e51b7Smrg CARD32 BgColor; 556fe5e51b7Smrg CARD32 MAccess; 557fe5e51b7Smrg int FifoSize; 558fe5e51b7Smrg int StyleLen; 559fe5e51b7Smrg XAAInfoRecPtr AccelInfoRec; 560fe5e51b7Smrg xf86CursorInfoPtr CursorInfoRec; 561fe5e51b7Smrg DGAModePtr DGAModes; 562fe5e51b7Smrg int numDGAModes; 563fe5e51b7Smrg Bool DGAactive; 564fe5e51b7Smrg int DGAViewportStatus; 565fe5e51b7Smrg CARD32 *Atype; 566fe5e51b7Smrg CARD32 *AtypeNoBLK; 567fe5e51b7Smrg void (*PreInit)(ScrnInfoPtr pScrn); 568fe5e51b7Smrg void (*Save)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 569fe5e51b7Smrg void (*Restore)(ScrnInfoPtr, vgaRegPtr, MGARegPtr, Bool); 570fe5e51b7Smrg Bool (*ModeInit)(ScrnInfoPtr, DisplayModePtr); 571fe5e51b7Smrg void (*PointerMoved)(int index, int x, int y); 572fe5e51b7Smrg CloseScreenProcPtr CloseScreen; 573fe5e51b7Smrg ScreenBlockHandlerProcPtr BlockHandler; 574fe5e51b7Smrg unsigned int (*ddc1Read)(ScrnInfoPtr); 575fe5e51b7Smrg void (*DDC1SetSpeed)(ScrnInfoPtr, xf86ddcSpeed); 576fe5e51b7Smrg Bool (*i2cInit)(ScrnInfoPtr); 577fe5e51b7Smrg I2CBusPtr DDC_Bus1; 578fe5e51b7Smrg I2CBusPtr DDC_Bus2; 579fe5e51b7Smrg I2CBusPtr Maven_Bus; 580fe5e51b7Smrg I2CDevPtr Maven; 581fe5e51b7Smrg char Maven_Version; 582fe5e51b7Smrg Bool UseMaven; 583fe5e51b7Smrg Bool UseMavenPM; 584fe5e51b7Smrg Bool FBDev; 585fe5e51b7Smrg int colorKey; 586fe5e51b7Smrg int videoKey; 587fe5e51b7Smrg int fifoCount; 588fe5e51b7Smrg int Rotate; 589fe5e51b7Smrg MGAFBLayout CurrentLayout; 590fe5e51b7Smrg Bool DrawTransparent; 591fe5e51b7Smrg int MaxBlitDWORDS; 592fe5e51b7Smrg Bool TexturedVideo; 593fe5e51b7Smrg MGAPortPrivPtr portPrivate; 594fe5e51b7Smrg unsigned char *ScratchBuffer; 595fe5e51b7Smrg unsigned char *ColorExpandBase; 596fe5e51b7Smrg int expandRows; 597fe5e51b7Smrg int expandDWORDs; 598fe5e51b7Smrg int expandRemaining; 599fe5e51b7Smrg int expandHeight; 600fe5e51b7Smrg int expandY; 601fe5e51b7Smrg#ifdef XF86DRI 602fe5e51b7Smrg Bool directRenderingEnabled; 603fe5e51b7Smrg DRIInfoPtr pDRIInfo; 604fe5e51b7Smrg int drmFD; 605fe5e51b7Smrg int numVisualConfigs; 606fe5e51b7Smrg __GLXvisualConfig* pVisualConfigs; 607fe5e51b7Smrg MGAConfigPrivPtr pVisualConfigsPriv; 608fe5e51b7Smrg MGADRIServerPrivatePtr DRIServerInfo; 609fe5e51b7Smrg 610fe5e51b7Smrg MGARegRec DRContextRegs; 611fe5e51b7Smrg 612fe5e51b7Smrg Bool haveQuiescense; 613fe5e51b7Smrg void (*GetQuiescence)(ScrnInfoPtr pScrn); 614fe5e51b7Smrg 615fe5e51b7Smrg int agpMode; 616fe5e51b7Smrg int agpSize; 617fe5e51b7Smrg 618fe5e51b7Smrg int irq; 619fe5e51b7Smrg CARD32 reg_ien; 620fe5e51b7Smrg 621fe5e51b7Smrg Bool useOldDmaInit; 622fe5e51b7Smrg Bool forcePciDma; 623fe5e51b7Smrg#endif 624fe5e51b7Smrg XF86VideoAdaptorPtr adaptor; 625fe5e51b7Smrg Bool DualHeadEnabled; 626fe5e51b7Smrg Bool Crtc2IsTV; 627fe5e51b7Smrg Bool SecondCrtc; 628fe5e51b7Smrg Bool SecondOutput; 629fe5e51b7Smrg 630fe5e51b7Smrg GDevPtr device; 631fe5e51b7Smrg /* The hardware's real SrcOrg */ 632fe5e51b7Smrg int realSrcOrg; 633fe5e51b7Smrg MGAEntPtr entityPrivate; 634fe5e51b7Smrg void (*SetupForSolidFill)(ScrnInfoPtr pScrn, int color, 635fe5e51b7Smrg int rop, unsigned int planemask); 636fe5e51b7Smrg void (*SubsequentSolidFillRect)(ScrnInfoPtr pScrn, 637fe5e51b7Smrg int x, int y, int w, int h); 638fe5e51b7Smrg void (*RestoreAccelState)(ScrnInfoPtr pScrn); 639fe5e51b7Smrg int allowedWidth; 640fe5e51b7Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 641fe5e51b7Smrg void (*PaletteLoadCallback)(ScrnInfoPtr); 642fe5e51b7Smrg void (*RenderCallback)(ScrnInfoPtr); 643fe5e51b7Smrg Time RenderTime; 644fe5e51b7Smrg MGAPaletteInfo palinfo[256]; /* G400 hardware bug workaround */ 645fe5e51b7Smrg FBLinearPtr LinearScratch; 646fe5e51b7Smrg Bool softbooted; 647fe5e51b7Smrg#ifdef USEMGAHAL 648fe5e51b7Smrg Bool HALLoaded; 649fe5e51b7Smrg#endif 650fe5e51b7Smrg OptionInfoPtr Options; 651fe5e51b7Smrg 652fe5e51b7Smrg /* Exa */ 653fe5e51b7Smrg PicturePtr currentSrcPicture; 654fe5e51b7Smrg PicturePtr currentMaskPicture; 655fe5e51b7Smrg PixmapPtr currentSrc; 656fe5e51b7Smrg PixmapPtr currentMask; 657fe5e51b7Smrg int src_w2; 658fe5e51b7Smrg int src_h2; 659fe5e51b7Smrg int mask_w2; 660fe5e51b7Smrg int mask_h2; 661fe5e51b7Smrg CARD32 src_pitch; /* FIXME kill me */ 662fe5e51b7Smrg 663fe5e51b7Smrg/* Merged Framebuffer data */ 664fe5e51b7Smrg Bool MergedFB; 665fe5e51b7Smrg 666fe5e51b7Smrg /* Real values specific to monitor1, since the original ones are replaced */ 667fe5e51b7Smrg DisplayModePtr M1modes; /* list of actual modes */ 668fe5e51b7Smrg DisplayModePtr M1currentMode; /* current mode */ 669fe5e51b7Smrg int M1frameX0; /* viewport position */ 670fe5e51b7Smrg int M1frameY0; 671fe5e51b7Smrg int M1frameX1; 672fe5e51b7Smrg int M1frameY1; 673fe5e51b7Smrg 674fe5e51b7Smrg ScrnInfoPtr pScrn2; /*pointer to second CRTC screeninforec, 675fe5e51b7Smrg if in merged mode */ 676fe5e51b7Smrg/* End of Merged Framebuffer Data */ 677fe5e51b7Smrg int HALGranularityOffX, HALGranularityOffY; 678fe5e51b7Smrg} MGARec, *MGAPtr; 679fe5e51b7Smrg 680fe5e51b7Smrgextern CARD32 MGAAtype[16]; 681fe5e51b7Smrgextern CARD32 MGAAtypeNoBLK[16]; 682fe5e51b7Smrg 683fe5e51b7Smrg#define USE_RECTS_FOR_LINES 0x00000001 684fe5e51b7Smrg#define FASTBLT_BUG 0x00000002 685fe5e51b7Smrg#define CLIPPER_ON 0x00000004 686fe5e51b7Smrg#define BLK_OPAQUE_EXPANSION 0x00000008 687fe5e51b7Smrg#define TRANSC_SOLID_FILL 0x00000010 688fe5e51b7Smrg#define NICE_DASH_PATTERN 0x00000020 689fe5e51b7Smrg#define TWO_PASS_COLOR_EXPAND 0x00000040 690fe5e51b7Smrg#define MGA_NO_PLANEMASK 0x00000080 691fe5e51b7Smrg#define USE_LINEAR_EXPANSION 0x00000100 692fe5e51b7Smrg#define LARGE_ADDRESSES 0x00000200 693fe5e51b7Smrg 694fe5e51b7Smrg#define MGAIOMAPSIZE 0x00004000 695fe5e51b7Smrg#define MGAILOADMAPSIZE 0x00400000 696fe5e51b7Smrg 697fe5e51b7Smrg#define TRANSPARENCY_KEY 255 698fe5e51b7Smrg#define KEY_COLOR 0 699fe5e51b7Smrg 700fe5e51b7Smrg 701fe5e51b7Smrg/* Prototypes */ 702fe5e51b7Smrg 703fe5e51b7Smrgvoid MGAAdjustFrame(int scrnIndex, int x, int y, int flags); 704fe5e51b7SmrgBool MGASwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 705fe5e51b7Smrgvoid MGAFillModeInfoStruct(ScrnInfoPtr pScrn, DisplayModePtr mode); 706fe5e51b7SmrgBool MGAGetRec(ScrnInfoPtr pScrn); 707fe5e51b7Smrgvoid MGAProbeDDC(ScrnInfoPtr pScrn, int index); 708fe5e51b7Smrgvoid MGASoftReset(ScrnInfoPtr pScrn); 709fe5e51b7Smrgvoid MGAFreeRec(ScrnInfoPtr pScrn); 710fe5e51b7SmrgBool mga_read_and_process_bios(ScrnInfoPtr pScrn); 711fe5e51b7Smrgvoid MGADisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, 712fe5e51b7Smrg int flags); 713fe5e51b7Smrgvoid MGAAdjustFrameCrtc2(int scrnIndex, int x, int y, int flags); 714fe5e51b7Smrgvoid MGADisplayPowerManagementSetCrtc2(ScrnInfoPtr pScrn, 715fe5e51b7Smrg int PowerManagementMode, 716fe5e51b7Smrg int flags); 717fe5e51b7Smrgvoid MGAAdjustGranularity(ScrnInfoPtr pScrn, int* x, int* y); 718fe5e51b7Smrg 719fe5e51b7Smrg 720fe5e51b7Smrgvoid MGA2064SetupFuncs(ScrnInfoPtr pScrn); 721fe5e51b7Smrgvoid MGAGSetupFuncs(ScrnInfoPtr pScrn); 722fe5e51b7Smrg 723fe5e51b7Smrg/* #ifdef USE_XAA */ 724fe5e51b7Smrgvoid MGAStormSync(ScrnInfoPtr pScrn); 725fe5e51b7Smrgvoid MGAStormEngineInit(ScrnInfoPtr pScrn); 726fe5e51b7SmrgBool MGAStormAccelInit(ScreenPtr pScreen); 727fe5e51b7SmrgBool mgaAccelInit(ScreenPtr pScreen); 728fe5e51b7Smrg/* #endif */ 729fe5e51b7Smrg 730fe5e51b7Smrg#ifdef USE_EXA 731fe5e51b7SmrgBool mgaExaInit(ScreenPtr pScreen); 732fe5e51b7Smrg#endif 733fe5e51b7Smrg 734fe5e51b7SmrgBool MGAHWCursorInit(ScreenPtr pScreen); 735fe5e51b7Smrg 736fe5e51b7Smrg 737fe5e51b7Smrgvoid MGAPolyArcThinSolid(DrawablePtr, GCPtr, int, xArc*); 738fe5e51b7Smrg 739fe5e51b7SmrgBool MGADGAInit(ScreenPtr pScreen); 740fe5e51b7Smrg 741fe5e51b7Smrgvoid MGARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 742fe5e51b7Smrgvoid MGARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 743fe5e51b7Smrgvoid MGARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 744fe5e51b7Smrgvoid MGARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 745fe5e51b7Smrgvoid MGARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 746fe5e51b7Smrg 747fe5e51b7Smrgvoid mgaDoSetupForScreenToScreenCopy( ScrnInfoPtr pScrn, int xdir, 748fe5e51b7Smrg int ydir, int rop, unsigned int planemask, int trans, unsigned int bpp ); 749fe5e51b7Smrg 750fe5e51b7Smrgvoid mgaDoSetupForSolidFill( ScrnInfoPtr pScrn, int color, int rop, 751fe5e51b7Smrg unsigned int planemask, unsigned int bpp ); 752fe5e51b7Smrg 753fe5e51b7Smrgvoid MGAPointerMoved(int index, int x, int y); 754fe5e51b7Smrg 755fe5e51b7Smrgvoid MGAInitVideo(ScreenPtr pScreen); 756fe5e51b7Smrgvoid MGAResetVideo(ScrnInfoPtr pScrn); 757fe5e51b7Smrg 758fe5e51b7Smrg#ifdef XF86DRI 759fe5e51b7Smrg 760fe5e51b7Smrg#define MGA_FRONT 0x1 761fe5e51b7Smrg#define MGA_BACK 0x2 762fe5e51b7Smrg#define MGA_DEPTH 0x4 763fe5e51b7Smrg 764fe5e51b7SmrgBool MGADRIScreenInit( ScreenPtr pScreen ); 765fe5e51b7Smrgvoid MGADRICloseScreen( ScreenPtr pScreen ); 766fe5e51b7SmrgBool MGADRIFinishScreenInit( ScreenPtr pScreen ); 767fe5e51b7Smrg 768fe5e51b7SmrgBool MGALockUpdate( ScrnInfoPtr pScrn, drmLockFlags flags ); 769fe5e51b7Smrg 770fe5e51b7Smrgvoid MGAGetQuiescence( ScrnInfoPtr pScrn ); 771fe5e51b7Smrgvoid MGAGetQuiescenceShared( ScrnInfoPtr pScrn ); 772fe5e51b7Smrg 773fe5e51b7Smrgvoid MGASelectBuffer(ScrnInfoPtr pScrn, int which); 774fe5e51b7SmrgBool MgaCleanupDma(ScrnInfoPtr pScrn); 775fe5e51b7SmrgBool MgaInitDma(ScrnInfoPtr pScrn, int prim_size); 776fe5e51b7Smrg 777fe5e51b7Smrg#define MGA_AGP_1X_MODE 0x01 778fe5e51b7Smrg#define MGA_AGP_2X_MODE 0x02 779fe5e51b7Smrg#define MGA_AGP_4X_MODE 0x04 780fe5e51b7Smrg#define MGA_AGP_MODE_MASK 0x07 781fe5e51b7Smrg 782fe5e51b7Smrg#endif 783fe5e51b7Smrg 784fe5e51b7SmrgBool MGAMavenRead(ScrnInfoPtr pScrn, I2CByte reg, I2CByte *val); 785fe5e51b7Smrg 786fe5e51b7Smrgvoid MGACRTC2Set(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 787fe5e51b7Smrgvoid MGAEnableSecondOutPut(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 788fe5e51b7Smrgvoid MGACRTC2SetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); 789fe5e51b7Smrgvoid MGACRTC2SetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); 790fe5e51b7Smrg 791fe5e51b7Smrgvoid MGACRTC2Get(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo); 792fe5e51b7Smrgvoid MGACRTC2GetPitch(ScrnInfoPtr pSrcn, xMODEINFO *pModeInfo); 793fe5e51b7Smrgvoid MGACRTC2GetDisplayStart(ScrnInfoPtr pScrn, xMODEINFO *pModeInfo, CARD32 base, CARD32 ulX, CARD32 ulY); 794fe5e51b7Smrg 795fe5e51b7Smrgdouble MGAG450SetPLLFreq(ScrnInfoPtr pScrn, long f_out); 796fe5e51b7Smrg#ifdef DEBUG 797fe5e51b7Smrgvoid MGAG450PrintPLL(ScrnInfoPtr pScrn); 798fe5e51b7Smrg#endif 799fe5e51b7Smrglong MGAG450SavePLLFreq(ScrnInfoPtr pScrn); 800fe5e51b7Smrgvoid MGAprintDac(ScrnInfoPtr pScrn); 801fe5e51b7Smrgvoid MGAG200SESaveFonts(ScrnInfoPtr, vgaRegPtr); 802fe5e51b7Smrgvoid MGAG200SERestoreFonts(ScrnInfoPtr, vgaRegPtr); 803fe5e51b7Smrgvoid MGAG200SESaveMode(ScrnInfoPtr, vgaRegPtr); 804fe5e51b7Smrgvoid MGAG200SERestoreMode(ScrnInfoPtr, vgaRegPtr); 805fe5e51b7Smrgvoid MGAG200SEHWProtect(ScrnInfoPtr, Bool); 806fe5e51b7Smrg 807fe5e51b7Smrg#ifdef USEMGAHAL 808fe5e51b7Smrg/************ ESC Call Definition ***************/ 809fe5e51b7Smrgtypedef struct { 810fe5e51b7Smrg char *function; 811fe5e51b7Smrg void (*funcptr)(ScrnInfoPtr pScrn, unsigned long *param, char *out, DisplayModePtr pMode); 812fe5e51b7Smrg} MGAEscFuncRec, *MGAEscFuncPtr; 813fe5e51b7Smrg 814fe5e51b7Smrgtypedef struct { 815fe5e51b7Smrg char function[32]; 816fe5e51b7Smrg unsigned long parameters[32]; 817fe5e51b7Smrg} EscCmdStruct; 818fe5e51b7Smrg 819fe5e51b7Smrgextern LPMGAMODEINFO pMgaModeInfo[2]; 820fe5e51b7Smrgextern MGAMODEINFO TmpMgaModeInfo[2]; 821fe5e51b7Smrg 822fe5e51b7Smrgextern void MGAExecuteEscCmd(ScrnInfoPtr pScrn, char *cmdline , char *sResult, DisplayModePtr pMode); 823fe5e51b7Smrgvoid MGAFillDisplayModeStruct(DisplayModePtr pMode, LPMGAMODEINFO pModeInfo); 824fe5e51b7Smrg/************************************************/ 825fe5e51b7Smrg#endif 826fe5e51b7Smrg 827fe5e51b7Smrgstatic __inline__ void 828fe5e51b7SmrgMGA_MARK_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) 829fe5e51b7Smrg{ 830fe5e51b7Smrg#ifdef USE_EXA 831fe5e51b7Smrg if (pMga->Exa) 832fe5e51b7Smrg exaMarkSync(pScrn->pScreen); 833fe5e51b7Smrg#endif 834fe5e51b7Smrg#ifdef USE_XAA 835fe5e51b7Smrg if (!pMga->Exa) 836fe5e51b7Smrg SET_SYNC_FLAG(pMga->AccelInfoRec); 837fe5e51b7Smrg#endif 838fe5e51b7Smrg} 839fe5e51b7Smrg 840fe5e51b7Smrgstatic __inline__ void 841fe5e51b7SmrgMGA_SYNC(MGAPtr pMga, ScrnInfoPtr pScrn) 842fe5e51b7Smrg{ 843fe5e51b7Smrg#ifdef USE_EXA 844fe5e51b7Smrg if (pMga->Exa) 845fe5e51b7Smrg exaWaitSync(pScrn->pScreen); 846fe5e51b7Smrg#endif 847fe5e51b7Smrg#ifdef USE_XAA 848fe5e51b7Smrg if (!pMga->Exa && pMga->AccelInfoRec && pMga->AccelInfoRec->NeedToSync) 849fe5e51b7Smrg pMga->AccelInfoRec->Sync(pScrn); 850fe5e51b7Smrg#endif 851fe5e51b7Smrg} 852fe5e51b7Smrg 853fe5e51b7Smrg#endif 854