mga_macros.h revision fe5e51b7
1/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h,v 1.21 2001/09/26 12:59:17 alanh Exp $ */
2
3#ifndef _MGA_MACROS_H_
4#define _MGA_MACROS_H_
5
6#ifdef XSERVER_LIBPCIACCESS
7#define MGA_IO_ADDRESS(p) (p)->PciInfo->regions[(p)->io_bar].base_addr
8#define VENDOR_ID(p)      (p)->vendor_id
9#define DEVICE_ID(p)      (p)->device_id
10#define SUBSYS_ID(p)      (p)->subdevice_id
11#define CHIP_REVISION(p)  (p)->revision
12#else
13#define MGA_IO_ADDRESS(p) (p)->IOAddress
14#define VENDOR_ID(p)      (p)->vendor
15#define DEVICE_ID(p)      (p)->chipType
16#define SUBSYS_ID(p)      (p)->subsysCard
17#define CHIP_REVISION(p)  (p)->chipRev
18#endif
19
20#define RGBEQUAL(c) (!((((c) >> 8) ^ (c)) & 0xffff))
21
22#ifdef XF86DRI
23#define MGA_SYNC_XTAG                 0x275f4200
24
25#define MGABUSYWAIT() do { \
26OUTREG(MGAREG_DWGSYNC, MGA_SYNC_XTAG); \
27while(INREG(MGAREG_DWGSYNC) != MGA_SYNC_XTAG) ; \
28}while(0);
29
30#endif
31
32#define MGAISBUSY() (INREG8(MGAREG_Status + 2) & 0x01)
33
34#define WAITFIFO(cnt) \
35   if(!pMga->UsePCIRetry) {\
36	register int n = cnt; \
37	if(n > pMga->FifoSize) n = pMga->FifoSize; \
38	while(pMga->fifoCount < (n))\
39	    pMga->fifoCount = INREG8(MGAREG_FIFOSTATUS);\
40	pMga->fifoCount -= n;\
41   }
42
43#define XYADDRESS(x,y) \
44    ((y) * pMga->CurrentLayout.displayWidth + (x) + pMga->YDstOrg)
45
46#define MAKEDMAINDEX(index)  ((((index) >> 2) & 0x7f) | (((index) >> 6) & 0x80))
47
48#define DMAINDICES(one,two,three,four)	\
49	( MAKEDMAINDEX(one) | \
50	 (MAKEDMAINDEX(two) << 8) | \
51	 (MAKEDMAINDEX(three) << 16) | \
52 	 (MAKEDMAINDEX(four) << 24) )
53
54#define SET_PLANEMASK_REPLICATED(mask, rep_mask, bpp) \
55    do { \
56	if( (bpp != 24) \
57	    && !(pMga->AccelFlags & MGA_NO_PLANEMASK) \
58	    && ((mask) != pMga->PlaneMask)) { \
59	   pMga->PlaneMask = (mask); \
60	   OUTREG(MGAREG_PLNWT,(rep_mask)); \
61	} \
62    } while( 0 )
63
64#define DISABLE_CLIP() { \
65	pMga->AccelFlags &= ~CLIPPER_ON; \
66	WAITFIFO(1); \
67	OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); }
68
69#ifdef XF86DRI
70#define CHECK_DMA_QUIESCENT(pMGA, pScrn) {	\
71   if (!pMGA->haveQuiescense) {			\
72      pMGA->GetQuiescence( pScrn );		\
73   }						\
74}
75#else
76#define CHECK_DMA_QUIESCENT(pMGA, pScrn)
77#endif
78
79#ifdef USEMGAHAL
80#define MGA_HAL(x) { \
81	MGAPtr pMga = MGAPTR(pScrn); \
82	if (pMga->HALLoaded && pMga->chip_attribs->HAL_chipset) { x; } \
83}
84#define MGA_NOT_HAL(x) { \
85	MGAPtr pMga = MGAPTR(pScrn); \
86	if (!pMga->HALLoaded || !pMga->chip_attribs->HAL_chipset) { x; } \
87}
88#else
89#define MGA_NOT_HAL(x) { x; }
90#endif
91
92#define MGAISGx50(x) ((x)->is_Gx50)
93
94#define MGA_DH_NEEDS_HAL(x) (((x)->Chipset == PCI_CHIP_MGAG400) && \
95			     ((x)->ChipRev < 0x80))
96
97#endif /* _MGA_MACROS_H_ */
98