171d7fec4Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/gx2_9211.c,v 1.3 2003/01/14 09:34:35 alanh Exp $ */ 271d7fec4Smrg/* 371d7fec4Smrg * $Workfile: gx2_9211.c $ 471d7fec4Smrg * 571d7fec4Smrg * This header file defines the pneumonics used when calling Durango routines. 671d7fec4Smrg * This file is automatically included by gfx_rtns.h 771d7fec4Smrg * 871d7fec4Smrg * NSC_LIC_ALTERNATIVE_PREAMBLE 971d7fec4Smrg * 1071d7fec4Smrg * Revision 1.0 1171d7fec4Smrg * 1271d7fec4Smrg * National Semiconductor Alternative GPL-BSD License 1371d7fec4Smrg * 1471d7fec4Smrg * National Semiconductor Corporation licenses this software 1571d7fec4Smrg * ("Software"): 1671d7fec4Smrg * 1771d7fec4Smrg * Panel Library 1871d7fec4Smrg * 1971d7fec4Smrg * under one of the two following licenses, depending on how the 2071d7fec4Smrg * Software is received by the Licensee. 2171d7fec4Smrg * 2271d7fec4Smrg * If this Software is received as part of the Linux Framebuffer or 2371d7fec4Smrg * other GPL licensed software, then the GPL license designated 2471d7fec4Smrg * NSC_LIC_GPL applies to this Software; in all other circumstances 2571d7fec4Smrg * then the BSD-style license designated NSC_LIC_BSD shall apply. 2671d7fec4Smrg * 2771d7fec4Smrg * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ 2871d7fec4Smrg 2971d7fec4Smrg/* NSC_LIC_BSD 3071d7fec4Smrg * 3171d7fec4Smrg * National Semiconductor Corporation Open Source License for Durango 3271d7fec4Smrg * 3371d7fec4Smrg * (BSD License with Export Notice) 3471d7fec4Smrg * 3571d7fec4Smrg * Copyright (c) 1999-2001 3671d7fec4Smrg * National Semiconductor Corporation. 3771d7fec4Smrg * All rights reserved. 3871d7fec4Smrg * 3971d7fec4Smrg * Redistribution and use in source and binary forms, with or without 4071d7fec4Smrg * modification, are permitted provided that the following conditions 4171d7fec4Smrg * are met: 4271d7fec4Smrg * 4371d7fec4Smrg * * Redistributions of source code must retain the above copyright 4471d7fec4Smrg * notice, this list of conditions and the following disclaimer. 4571d7fec4Smrg * 4671d7fec4Smrg * * Redistributions in binary form must reproduce the above 4771d7fec4Smrg * copyright notice, this list of conditions and the following 4871d7fec4Smrg * disclaimer in the documentation and/or other materials provided 4971d7fec4Smrg * with the distribution. 5071d7fec4Smrg * 5171d7fec4Smrg * * Neither the name of the National Semiconductor Corporation nor 5271d7fec4Smrg * the names of its contributors may be used to endorse or promote 5371d7fec4Smrg * products derived from this software without specific prior 5471d7fec4Smrg * written permission. 5571d7fec4Smrg * 5671d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 5771d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 5871d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 5971d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 6071d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 6171d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 6271d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 6371d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 6471d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 6571d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 6671d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 6771d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 6871d7fec4Smrg * OF SUCH DAMAGE. 6971d7fec4Smrg * 7071d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 7171d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 7271d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 7371d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 7471d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 7571d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 7671d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 7771d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 7871d7fec4Smrg * has embargoed goods and services. 7971d7fec4Smrg * 8071d7fec4Smrg * END_NSC_LIC_BSD */ 8171d7fec4Smrg 8271d7fec4Smrg/* NSC_LIC_GPL 8371d7fec4Smrg * 8471d7fec4Smrg * National Semiconductor Corporation Gnu General Public License for Durango 8571d7fec4Smrg * 8671d7fec4Smrg * (GPL License with Export Notice) 8771d7fec4Smrg * 8871d7fec4Smrg * Copyright (c) 1999-2001 8971d7fec4Smrg * National Semiconductor Corporation. 9071d7fec4Smrg * All rights reserved. 9171d7fec4Smrg * 9271d7fec4Smrg * Redistribution and use in source and binary forms, with or without 9371d7fec4Smrg * modification, are permitted under the terms of the GNU General 9471d7fec4Smrg * Public License as published by the Free Software Foundation; either 9571d7fec4Smrg * version 2 of the License, or (at your option) any later version 9671d7fec4Smrg * 9771d7fec4Smrg * In addition to the terms of the GNU General Public License, neither 9871d7fec4Smrg * the name of the National Semiconductor Corporation nor the names of 9971d7fec4Smrg * its contributors may be used to endorse or promote products derived 10071d7fec4Smrg * from this software without specific prior written permission. 10171d7fec4Smrg * 10271d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 10371d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 10471d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 10571d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 10671d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 10771d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 10871d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 10971d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 11071d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 11171d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 11271d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 11371d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 11471d7fec4Smrg * OF SUCH DAMAGE. See the GNU General Public License for more details. 11571d7fec4Smrg * 11671d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 11771d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 11871d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 11971d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 12071d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 12171d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 12271d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 12371d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 12471d7fec4Smrg * has embargoed goods and services. 12571d7fec4Smrg * 12671d7fec4Smrg * You should have received a copy of the GNU General Public License 12771d7fec4Smrg * along with this file; if not, write to the Free Software Foundation, 12871d7fec4Smrg * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 12971d7fec4Smrg * 13071d7fec4Smrg * END_NSC_LIC_GPL */ 13171d7fec4Smrg 13271d7fec4Smrg#include "92xx.h" 13371d7fec4Smrg#include "gx2_9211.h" 13471d7fec4Smrg#include "pnl_defs.h" 13571d7fec4Smrg 13671d7fec4Smrg#if defined(_WIN32) /*windows */ 13771d7fec4Smrg#include "gfx_defs.h" 13871d7fec4Smrg 13971d7fec4Smrgextern DEV_STATUS gfx_msr_read(unsigned int device, unsigned int msrRegister, 14071d7fec4Smrg Q_WORD * msrValue); 14171d7fec4Smrgextern DEV_STATUS gfx_msr_write(unsigned int device, unsigned int msrRegister, 14271d7fec4Smrg Q_WORD * msrValue); 14371d7fec4Smrg#endif 14471d7fec4Smrg 14571d7fec4Smrgstatic unsigned long FPBaseAddr; 14671d7fec4Smrg 14771d7fec4Smrgvoid 14871d7fec4SmrgSetFPBaseAddr(unsigned long addr) 14971d7fec4Smrg{ 15071d7fec4Smrg 15171d7fec4Smrg FPBaseAddr = addr; 15271d7fec4Smrg} 15371d7fec4Smrg 15471d7fec4Smrg/**************************************************************************** 15571d7fec4Smrg * protected_mode_access( unsigned long mode, unsigned long width, 15671d7fec4Smrg * unsigned long addr, unsigned char* pdata ) 15771d7fec4Smrg * This function provides access to physical memory at the requested address. 15871d7fec4Smrg * mode is: 15971d7fec4Smrg * GX2_READ or GX2_WRITE (accesses a single byte, word or double 16071d7fec4Smrg * word depending on the value of "width". Only 1, 2 or 4 supported). 16171d7fec4Smrg * READ_BYTES, WRITE_BYTES accesses "width" number of bytes (8 bits) 16271d7fec4Smrg * READ_WORDS, WRITE_WORDS accesses "width" number of words (16 bits) 16371d7fec4Smrg * READ_DWORDS, WRITE_DWORDS accesses "width" number of dwords (32 bits) 16471d7fec4Smrg * width is: The size of the access. For READ or WRITE, only 1, 2 and 4 are 16571d7fec4Smrg * supported. For other modes, width is not limited but will cause 16671d7fec4Smrg * paging if the block traverses page boundaries. 16771d7fec4Smrg * addr is: The physical address being accessed 16871d7fec4Smrg * pdata is: A pointer to the data to be read or written into. 16971d7fec4Smrg * NOTE! WORD or DWORD accesses can only be made on WORD or DWORD boundaries! 17071d7fec4Smrg ****************************************************************************/ 17171d7fec4Smrgvoid 17271d7fec4Smrgprotected_mode_access(unsigned long mode, 17371d7fec4Smrg unsigned long width, unsigned long addr, char *pdata) 17471d7fec4Smrg{ 17571d7fec4Smrg void *ptr = (void *)(FPBaseAddr + addr); 17671d7fec4Smrg 17771d7fec4Smrg /* type specific buffer pointers */ 17871d7fec4Smrg char *byte_data = (char *)pdata; 17971d7fec4Smrg unsigned long *word_data = (unsigned long *)pdata; 18071d7fec4Smrg unsigned long *dword_data = (unsigned long *)pdata; 18171d7fec4Smrg 18271d7fec4Smrg if (mode == GX2_READ) { 18371d7fec4Smrg switch (width) { 18471d7fec4Smrg case FOUR_BYTES: 18571d7fec4Smrg *(dword_data) = (unsigned long)(*(unsigned long *)ptr); 18671d7fec4Smrg break; 18771d7fec4Smrg case TWO_BYTES: 18871d7fec4Smrg *(word_data) = (unsigned long)(*(unsigned long *)ptr); 18971d7fec4Smrg break; 19071d7fec4Smrg default: 19171d7fec4Smrg *(byte_data) = (char)(*(char *)ptr); 19271d7fec4Smrg break; 19371d7fec4Smrg } 19471d7fec4Smrg } /* end GX2_READ */ 19571d7fec4Smrg else if (mode == GX2_WRITE) { 19671d7fec4Smrg switch (width) { 19771d7fec4Smrg case FOUR_BYTES: 19871d7fec4Smrg *(unsigned long *)ptr = *dword_data; 19971d7fec4Smrg break; 20071d7fec4Smrg case TWO_BYTES: 20171d7fec4Smrg *(unsigned long *)ptr = *word_data; 20271d7fec4Smrg break; 20371d7fec4Smrg default: 20471d7fec4Smrg *(char *)ptr = *byte_data; 20571d7fec4Smrg break; 20671d7fec4Smrg } /* end switch(mode) */ 20771d7fec4Smrg } 20871d7fec4Smrg /* end case GX2_WRITE */ 20971d7fec4Smrg return; 21071d7fec4Smrg 21171d7fec4Smrg} /* End of protected_mode_access. */ 21271d7fec4Smrg 21371d7fec4Smrg/************************************************************************* 21471d7fec4Smrg * void write_video_reg64_low( unsigned long offset, unsigned long value ) 21571d7fec4Smrg * Writes value to the low 32 bits of the 64 bit memory mapped video 21671d7fec4Smrg * register indicated by offset. 21771d7fec4Smrg * This function uses Sys_info.video_reg_base as the base address, so 21871d7fec4Smrg * the value of offset should be with respect to this base. 21971d7fec4Smrg *************************************************************************/ 22071d7fec4Smrgvoid 22171d7fec4Smrgwrite_video_reg64_low(unsigned long offset, unsigned long value) 22271d7fec4Smrg{ 22371d7fec4Smrg protected_mode_access(GX2_WRITE, FOUR_BYTES, 22471d7fec4Smrg FPBaseAddr + offset, (char *)&value); 22571d7fec4Smrg} /*end write_video_reg64_low() */ 22671d7fec4Smrg 22771d7fec4Smrg/************************************************************************* 22871d7fec4Smrg * unsigned long read_video_reg64_low( unsigned long offset ) 22971d7fec4Smrg * Returns the contents of the low 32 bits of the 64 bit memory mapped 23071d7fec4Smrg * video register indicated by offset. 23171d7fec4Smrg * This function uses Sys_info.video_reg_base as the base address, so 23271d7fec4Smrg * the value of offset should be with respect to this base. 23371d7fec4Smrg *************************************************************************/ 23471d7fec4Smrgunsigned long 23571d7fec4Smrgread_video_reg64_low(unsigned long offset) 23671d7fec4Smrg{ 23771d7fec4Smrg unsigned long data; 23871d7fec4Smrg 23971d7fec4Smrg protected_mode_access(GX2_READ, FOUR_BYTES, 24071d7fec4Smrg FPBaseAddr + offset, (char *)&data); 24171d7fec4Smrg return (data); 24271d7fec4Smrg} /*end read_video_reg64_low() */ 24371d7fec4Smrg 24471d7fec4Smrg/******************************************************************************* 24571d7fec4Smrg * void Redcloud_fp_reg( int mode, unsigned long address, unsigned long *data ) 24671d7fec4Smrg * 24771d7fec4Smrg * Writes and reads dwords to the Redcloud flat panel registers in the Redcloud 24871d7fec4Smrg * Display Filter. There's no clock control, chip select or timing to deal with. 24971d7fec4Smrg * This routine expects the actual GX2 macro definitions for the address. 25071d7fec4Smrg * 25171d7fec4Smrg * Parameters: 25271d7fec4Smrg * mode: An integer value for a GX2_READ or GX2_WRITE operation 25371d7fec4Smrg * 0 = GX2_Read and 1 = GX2_Write 25471d7fec4Smrg * address: A dword value representing the offset of the register. 25571d7fec4Smrg * data: A pointer to a dword value that is to be written in to 25671d7fec4Smrg * the required register. In case of a Read operation this 25771d7fec4Smrg * will point to the result of the Read operation. 25871d7fec4Smrg * 25971d7fec4Smrg *******************************************************************************/ 26071d7fec4Smrgvoid 26171d7fec4SmrgRedcloud_fp_reg(int mode, unsigned long address, unsigned long *data) 26271d7fec4Smrg{ 26371d7fec4Smrg if (mode == GX2_READ) { 26471d7fec4Smrg *data = read_video_reg64_low(address); 26571d7fec4Smrg } else { 26671d7fec4Smrg write_video_reg64_low(address, *data); 26771d7fec4Smrg } 26871d7fec4Smrg 26971d7fec4Smrg} /* End of Redcloud_fp_reg() */ 27071d7fec4Smrg 27171d7fec4Smrg/*------------------------------------------------------------------- 27271d7fec4Smrg * 27371d7fec4Smrg * SET_92XX_MODE_PARAMS 27471d7fec4Smrg * This routine sets the 9211 mode parameters. 27571d7fec4Smrg * 27671d7fec4Smrg *-------------------------------------------------------------------*/ 27771d7fec4Smrg 27871d7fec4Smrgvoid 27971d7fec4Smrgset_Redcloud_92xx_mode_params(int mode) 28071d7fec4Smrg{ 28171d7fec4Smrg CS92xx_MODE *pMode = &FPModeParams[mode]; 28271d7fec4Smrg unsigned long temp_data = 0; 28371d7fec4Smrg unsigned long base_data; 28471d7fec4Smrg Q_WORD msrValue; 28571d7fec4Smrg 28671d7fec4Smrg /* on a Redcloud, we need to set up the DF pad select MSR */ 28771d7fec4Smrg if (gfx_msr_read(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue) == FOUND) { 28871d7fec4Smrg msrValue.low &= ~GX2_VP_PAD_SELECT_MASK; 28971d7fec4Smrg if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) { 29071d7fec4Smrg msrValue.low = GX2_VP_PAD_SELECT_TFT; 29171d7fec4Smrg } else { 29271d7fec4Smrg msrValue.low = GX2_VP_PAD_SELECT_DSTN; 29371d7fec4Smrg } 29471d7fec4Smrg gfx_msr_write(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue); 29571d7fec4Smrg } 29671d7fec4Smrg 29771d7fec4Smrg /* Turn the 92xx power off before setting any new parameters. */ 29871d7fec4Smrg temp_data = pMode->power_management & ~GX2_FP_PM_PWR_ON; 29971d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, (unsigned long *)&temp_data); 30071d7fec4Smrg 30171d7fec4Smrg /* Set 9211 registers using the desired panel settings */ 30271d7fec4Smrg 30371d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING1, 30471d7fec4Smrg (unsigned long *)&pMode->panel_timing1); 30571d7fec4Smrg 30671d7fec4Smrg /* On Redcloud, bit 31 is now reserved. */ 30771d7fec4Smrg temp_data = pMode->panel_timing2 & 0x7FFFFFFF; 30871d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING2, 30971d7fec4Smrg (unsigned long *)&temp_data); 31071d7fec4Smrg 31171d7fec4Smrg /* On Redcloud TFT parts, set this to 0x70 so all 8 bits per color run 31271d7fec4Smrg * thru fp crc but only non-TFT parts. Otherwise, set it to be 0x50. 31371d7fec4Smrg * (source: Larry G.). 31471d7fec4Smrg */ 31571d7fec4Smrg if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) { 31671d7fec4Smrg temp_data = GX2_FP_CRC_PASS_THRU_MASK; 31771d7fec4Smrg } else { 31871d7fec4Smrg temp_data = pMode->rev_C_dither_frc; 31971d7fec4Smrg } 32071d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_DITH_FR_CNTRL, 32171d7fec4Smrg (unsigned long *)&temp_data); 32271d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_BLFSR, 32371d7fec4Smrg (unsigned long *)&pMode->blue_lsfr_seed); 32471d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_RLFSR, 32571d7fec4Smrg (unsigned long *)&pMode->red_green_lsfr_seed); 32671d7fec4Smrg 32771d7fec4Smrg /* Set the memory information, then the power register last. 32871d7fec4Smrg * This will turn the panel on at the 9211. 32971d7fec4Smrg */ 33071d7fec4Smrg 33171d7fec4Smrg Redcloud_fp_reg(GX2_READ, GX2_FP_FBB, (unsigned long *)&base_data); 33271d7fec4Smrg if (base_data != 0x41780000) { 33371d7fec4Smrg base_data = 0x41780000; 33471d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_FBB, (unsigned long *)&base_data); 33571d7fec4Smrg } 33671d7fec4Smrg 33771d7fec4Smrg Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, 33871d7fec4Smrg (unsigned long *)&pMode->power_management); 33971d7fec4Smrg 34071d7fec4Smrg} /*end set_92xx_mode_params() */ 34171d7fec4Smrg 34271d7fec4Smrg/* ----------------------------------------------------------------------- 34371d7fec4Smrg * 34471d7fec4Smrg * SET_FLAT_PANEL_MODE 34571d7fec4Smrg * 34671d7fec4Smrg * This routine sets the specified flat panel moden parameters in 34771d7fec4Smrg * the 9211. 34871d7fec4Smrg * Returns PASS if successful, FAIL if the mode parameters could 34971d7fec4Smrg * not be set. 35071d7fec4Smrg * 35171d7fec4Smrg *------------------------------------------------------------------------*/ 35271d7fec4Smrg 35371d7fec4Smrgunsigned char 35471d7fec4Smrgset_Redcloud_92xx_mode(Pnl_PanelStat * pstat) 35571d7fec4Smrg{ 35671d7fec4Smrg int mode; 35771d7fec4Smrg 35871d7fec4Smrg /* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */ 35971d7fec4Smrg 36071d7fec4Smrg for (mode = 0; mode < NUM_92XX_MODES; mode++) { 36171d7fec4Smrg if ((FPModeParams[mode].xres == pstat->XRes) && 36271d7fec4Smrg (FPModeParams[mode].yres == pstat->YRes) && 36371d7fec4Smrg (FPModeParams[mode].bpp == pstat->Depth) && 36471d7fec4Smrg (FPModeParams[mode].panel_type == pstat->Type) && 36571d7fec4Smrg (FPModeParams[mode].color_type == pstat->MonoColor)) { 36671d7fec4Smrg 36771d7fec4Smrg /* SET THE 92xx FOR THE SELECTED MODE */ 36871d7fec4Smrg set_Redcloud_92xx_mode_params(mode); 36971d7fec4Smrg return TRUE; 37071d7fec4Smrg } /* end if() */ 37171d7fec4Smrg } /* end for() */ 37271d7fec4Smrg return FALSE; 37371d7fec4Smrg 37471d7fec4Smrg} /* end set_Centaurus_92xx_mode() */ 37571d7fec4Smrg 37671d7fec4Smrgvoid 37771d7fec4SmrgRedcloud_9211init(Pnl_PanelStat * pstat) 37871d7fec4Smrg{ 37971d7fec4Smrg 38071d7fec4Smrg set_Redcloud_92xx_mode(pstat); 38171d7fec4Smrg 38271d7fec4Smrg} 383