171d7fec4Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/panel/pnl_bios.c,v 1.2 2002/12/11 22:51:02 dawes Exp $ */ 271d7fec4Smrg/* 371d7fec4Smrg * $Workfile: pnl_bios.c $ 471d7fec4Smrg * $Revision: 1.1.1.1 $ 571d7fec4Smrg * 671d7fec4Smrg * File Contents: This file panel functions which query for the BIOS for current FP 771d7fec4Smrg * Paramters. 871d7fec4Smrg * 971d7fec4Smrg * SubModule: Geode FlatPanel library 1071d7fec4Smrg * 1171d7fec4Smrg */ 1271d7fec4Smrg 1371d7fec4Smrg/* 1471d7fec4Smrg * NSC_LIC_ALTERNATIVE_PREAMBLE 1571d7fec4Smrg * 1671d7fec4Smrg * Revision 1.0 1771d7fec4Smrg * 1871d7fec4Smrg * National Semiconductor Alternative GPL-BSD License 1971d7fec4Smrg * 2071d7fec4Smrg * National Semiconductor Corporation licenses this software 2171d7fec4Smrg * ("Software"): 2271d7fec4Smrg * 2371d7fec4Smrg * Panel Library 2471d7fec4Smrg * 2571d7fec4Smrg * under one of the two following licenses, depending on how the 2671d7fec4Smrg * Software is received by the Licensee. 2771d7fec4Smrg * 2871d7fec4Smrg * If this Software is received as part of the Linux Framebuffer or 2971d7fec4Smrg * other GPL licensed software, then the GPL license designated 3071d7fec4Smrg * NSC_LIC_GPL applies to this Software; in all other circumstances 3171d7fec4Smrg * then the BSD-style license designated NSC_LIC_BSD shall apply. 3271d7fec4Smrg * 3371d7fec4Smrg * END_NSC_LIC_ALTERNATIVE_PREAMBLE */ 3471d7fec4Smrg 3571d7fec4Smrg/* NSC_LIC_BSD 3671d7fec4Smrg * 3771d7fec4Smrg * National Semiconductor Corporation Open Source License for 3871d7fec4Smrg * 3971d7fec4Smrg * Panel Library 4071d7fec4Smrg * 4171d7fec4Smrg * (BSD License with Export Notice) 4271d7fec4Smrg * 4371d7fec4Smrg * Copyright (c) 1999-2001 4471d7fec4Smrg * National Semiconductor Corporation. 4571d7fec4Smrg * All rights reserved. 4671d7fec4Smrg * 4771d7fec4Smrg * Redistribution and use in source and binary forms, with or without 4871d7fec4Smrg * modification, are permitted provided that the following conditions 4971d7fec4Smrg * are met: 5071d7fec4Smrg * 5171d7fec4Smrg * * Redistributions of source code must retain the above copyright 5271d7fec4Smrg * notice, this list of conditions and the following disclaimer. 5371d7fec4Smrg * 5471d7fec4Smrg * * Redistributions in binary form must reproduce the above 5571d7fec4Smrg * copyright notice, this list of conditions and the following 5671d7fec4Smrg * disclaimer in the documentation and/or other materials provided 5771d7fec4Smrg * with the distribution. 5871d7fec4Smrg * 5971d7fec4Smrg * * Neither the name of the National Semiconductor Corporation nor 6071d7fec4Smrg * the names of its contributors may be used to endorse or promote 6171d7fec4Smrg * products derived from this software without specific prior 6271d7fec4Smrg * written permission. 6371d7fec4Smrg * 6471d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 6571d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 6671d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 6771d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 6871d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 6971d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 7071d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 7171d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 7271d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 7371d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 7471d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 7571d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 7671d7fec4Smrg * OF SUCH DAMAGE. 7771d7fec4Smrg * 7871d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 7971d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 8071d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 8171d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 8271d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 8371d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 8471d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 8571d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 8671d7fec4Smrg * has embargoed goods and services. 8771d7fec4Smrg * 8871d7fec4Smrg * END_NSC_LIC_BSD */ 8971d7fec4Smrg 9071d7fec4Smrg/* NSC_LIC_GPL 9171d7fec4Smrg * 9271d7fec4Smrg * National Semiconductor Corporation Gnu General Public License for 9371d7fec4Smrg * 9471d7fec4Smrg * Panel Library 9571d7fec4Smrg * 9671d7fec4Smrg * (GPL License with Export Notice) 9771d7fec4Smrg * 9871d7fec4Smrg * Copyright (c) 1999-2001 9971d7fec4Smrg * National Semiconductor Corporation. 10071d7fec4Smrg * All rights reserved. 10171d7fec4Smrg * 10271d7fec4Smrg * Redistribution and use in source and binary forms, with or without 10371d7fec4Smrg * modification, are permitted under the terms of the GNU General 10471d7fec4Smrg * Public License as published by the Free Software Foundation; either 10571d7fec4Smrg * version 2 of the License, or (at your option) any later version 10671d7fec4Smrg * 10771d7fec4Smrg * In addition to the terms of the GNU General Public License, neither 10871d7fec4Smrg * the name of the National Semiconductor Corporation nor the names of 10971d7fec4Smrg * its contributors may be used to endorse or promote products derived 11071d7fec4Smrg * from this software without specific prior written permission. 11171d7fec4Smrg * 11271d7fec4Smrg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 11371d7fec4Smrg * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 11471d7fec4Smrg * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 11571d7fec4Smrg * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 11671d7fec4Smrg * NATIONAL SEMICONDUCTOR CORPORATION OR CONTRIBUTORS BE LIABLE FOR ANY 11771d7fec4Smrg * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 11871d7fec4Smrg * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 11971d7fec4Smrg * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 12071d7fec4Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 12171d7fec4Smrg * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE, 12271d7fec4Smrg * INTELLECTUAL PROPERTY INFRINGEMENT, OR OTHERWISE) ARISING IN ANY WAY 12371d7fec4Smrg * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 12471d7fec4Smrg * OF SUCH DAMAGE. See the GNU General Public License for more details. 12571d7fec4Smrg * 12671d7fec4Smrg * EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF 12771d7fec4Smrg * YOUR JURISDICTION. It is licensee's responsibility to comply with 12871d7fec4Smrg * any export regulations applicable in licensee's jurisdiction. Under 12971d7fec4Smrg * CURRENT (2001) U.S. export regulations this software 13071d7fec4Smrg * is eligible for export from the U.S. and can be downloaded by or 13171d7fec4Smrg * otherwise exported or reexported worldwide EXCEPT to U.S. embargoed 13271d7fec4Smrg * destinations which include Cuba, Iraq, Libya, North Korea, Iran, 13371d7fec4Smrg * Syria, Sudan, Afghanistan and any other country to which the U.S. 13471d7fec4Smrg * has embargoed goods and services. 13571d7fec4Smrg * 13671d7fec4Smrg * You should have received a copy of the GNU General Public License 13771d7fec4Smrg * along with this file; if not, write to the Free Software Foundation, 13871d7fec4Smrg * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 13971d7fec4Smrg * 14071d7fec4Smrg * END_NSC_LIC_GPL */ 14171d7fec4Smrg 14271d7fec4Smrg#include "panel.h" 14371d7fec4Smrg 14471d7fec4Smrg#if defined(_WIN32) /* windows */ 14571d7fec4Smrgextern unsigned long gfx_cpu_version; 14671d7fec4Smrgextern void gfx_outw(unsigned short port, unsigned short data); 14771d7fec4Smrgextern unsigned short gfx_inw(unsigned short port); 14871d7fec4Smrg#endif 14971d7fec4Smrg 15071d7fec4Smrg#define SOFTVGA_DISPLAY_ENABLE 0x50 15171d7fec4Smrg#define SOFTVGA_FPRESOLUTION 0x52 15271d7fec4Smrg#define SOFTVGA_FPCLOCKFREQUENCY 0x54 15371d7fec4Smrg 15471d7fec4Smrg/* SOFTVG VIRTUAL REGISTER DEFINITIONS */ 15571d7fec4Smrg 15671d7fec4Smrg#define VR_INDEX 0xAC1C 15771d7fec4Smrg#define VR_DATA 0xAC1E 15871d7fec4Smrg#define VR_UNLOCK 0xFC53 15971d7fec4Smrg#define VRC_VG 0x0002 /* SoftVG Virtual Register Class */ 16071d7fec4Smrg#define VG_MEM_SIZE 0x0000 /* MemSize Virtual Register */ 16171d7fec4Smrg#define FP_DETECT_MASK 0x8000 16271d7fec4Smrg 16371d7fec4Smrg#define VG_FP_TYPE 0x0002 /* Flat Panel Info Virtual Register */ 16471d7fec4Smrg 16571d7fec4Smrg#define FP_DEV_MASK 0x0003 /* Flat Panel type */ 16671d7fec4Smrg#define FP_TYPE_SSTN 0x0000 /* SSTN panel type value */ 16771d7fec4Smrg#define FP_TYPE_DSTN 0x0001 /* DSTN panel type value */ 16871d7fec4Smrg#define FP_TYPE_TFT 0x0002 /* TFT panel type value */ 16971d7fec4Smrg#define FP_TYPE_LVDS 0x0003 /* LVDS panel type value */ 17071d7fec4Smrg 17171d7fec4Smrg#define FP_RESOLUTION_MASK 0x0038 17271d7fec4Smrg#define FP_RES_6X4 0x0000 /* 640x480 resolution value */ 17371d7fec4Smrg#define FP_RES_8X6 0x0008 /* 800x600 resolution value */ 17471d7fec4Smrg#define FP_RES_10X7 0x0010 /* 1024x768 resolution value */ 17571d7fec4Smrg#define FP_RES_12X10 0x0018 /* 1280x1024 resolution value */ 17671d7fec4Smrg#define FP_RES_16X12 0x0020 /* 1600x1200 resolution value */ 17771d7fec4Smrg 17871d7fec4Smrg#define FP_WIDTH_MASK 0x01C0 17971d7fec4Smrg#define FP_WIDTH_8 0x0000 /* 8 bit data bus width */ 18071d7fec4Smrg#define FP_WIDTH_9 0x0040 /* 9 bit data bus width */ 18171d7fec4Smrg#define FP_WIDTH_12 0x0080 /* 12 bit data bus width */ 18271d7fec4Smrg#define FP_WIDTH_18 0x00C0 /* 18 bit data bus width */ 18371d7fec4Smrg#define FP_WIDTH_24 0x0100 /* 24 bit data bus width */ 18471d7fec4Smrg#define FP_WIDTH_16 0x0140 /* 16 bit data bus width - 16 bit Mono DSTN only */ 18571d7fec4Smrg 18671d7fec4Smrg#define FP_COLOR_MASK 0x0200 18771d7fec4Smrg#define FP_COLOR_COLOR 0x0000 /* Color panel */ 18871d7fec4Smrg#define FP_COLOR_MONO 0x0200 /* Mono Panel */ 18971d7fec4Smrg 19071d7fec4Smrg#define FP_PPC_MASK 0x0400 19171d7fec4Smrg#define FP_PPC_1PPC 0x0000 /* One pixel per clock */ 19271d7fec4Smrg#define FP_PPC_2PPC 0x0400 /* Two pixels per clock */ 19371d7fec4Smrg 19471d7fec4Smrg#define FP_HPOL_MASK 0x0800 19571d7fec4Smrg#define FP_H_POL_LGH 0x0000 /* HSync at panel, normally low, active high */ 19671d7fec4Smrg#define FP_H_POL_HGL 0x0800 /* HSync at panel, normally high, active low */ 19771d7fec4Smrg 19871d7fec4Smrg#define FP_VPOL_MASK 0x1000 19971d7fec4Smrg#define FP_V_POL_LGH 0x0000 /* VSync at panel, normally low, active high */ 20071d7fec4Smrg#define FP_V_POL_HGL 0x1000 /* VSync at panel, normally high, active low */ 20171d7fec4Smrg 20271d7fec4Smrg#define FP_REF_MASK 0xD000 20371d7fec4Smrg#define FP_REF_60 0x0000 /* 60Hz refresh rate */ 20471d7fec4Smrg#define FP_REF_65 0x2000 /* 65Hz refresh rate */ 20571d7fec4Smrg#define FP_REF_70 0x4000 /* 70Hz refresh rate */ 20671d7fec4Smrg#define FP_REF_72 0x6000 /* 72Hz refresh rate */ 20771d7fec4Smrg#define FP_REF_75 0x8000 /* 75Hz refresh rate */ 20871d7fec4Smrg#define FP_REF_85 0xA000 /* 85Hz refresh rate */ 20971d7fec4Smrg 21071d7fec4Smrg/*----------------------------------------------------------------- 21171d7fec4Smrg * Pnl_IsPanelEnabledInBIOS 21271d7fec4Smrg * 21371d7fec4Smrg * Description: This function specifies whether the panel is enabled 21471d7fec4Smrg * by the BIOS or not. 21571d7fec4Smrg * parameters: none. 21671d7fec4Smrg * return: 1 - Enabled, 0 - Disabled 21771d7fec4Smrg *-----------------------------------------------------------------*/ 21871d7fec4Smrgint 21971d7fec4SmrgPnl_IsPanelEnabledInBIOS(void) 22071d7fec4Smrg{ 22171d7fec4Smrg unsigned char ret = 0; 22271d7fec4Smrg 22371d7fec4Smrg if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD) { 22471d7fec4Smrg unsigned short data; 22571d7fec4Smrg 22671d7fec4Smrg gfx_outw(VR_INDEX, VR_UNLOCK); 22771d7fec4Smrg gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_MEM_SIZE); 22871d7fec4Smrg data = gfx_inw(VR_DATA); 22971d7fec4Smrg if (data & FP_DETECT_MASK) 23071d7fec4Smrg ret = 1; 23171d7fec4Smrg } else { 23271d7fec4Smrg unsigned short crtcindex, crtcdata; 23371d7fec4Smrg 23471d7fec4Smrg crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4; 23571d7fec4Smrg crtcdata = crtcindex + 1; 23671d7fec4Smrg 23771d7fec4Smrg /* CHECK DisplayEnable Reg in SoftVGA */ 23871d7fec4Smrg 23971d7fec4Smrg gfx_outb(crtcindex, (unsigned char)SOFTVGA_DISPLAY_ENABLE); 24071d7fec4Smrg ret = gfx_inb(crtcdata); 24171d7fec4Smrg } 24271d7fec4Smrg 24371d7fec4Smrg return (ret & 0x1); 24471d7fec4Smrg} 24571d7fec4Smrg 24671d7fec4Smrg/*----------------------------------------------------------------- 24771d7fec4Smrg * Pnl_GetPanelInfoFromBIOS 24871d7fec4Smrg * 24971d7fec4Smrg * Description: This function queries the panel information from 25071d7fec4Smrg * the BIOS. 25171d7fec4Smrg * parameters: 25271d7fec4Smrg * xres: width of the panel configured 25371d7fec4Smrg * yres: height of the panel configured 25471d7fec4Smrg * bpp: depth of the panel configured 25571d7fec4Smrg * hz: vertical frequency of the panel configured 25671d7fec4Smrg * return: none 25771d7fec4Smrg *-----------------------------------------------------------------*/ 25871d7fec4Smrgvoid 25971d7fec4SmrgPnl_GetPanelInfoFromBIOS(int *xres, int *yres, int *bpp, int *hz) 26071d7fec4Smrg{ 26171d7fec4Smrg unsigned short crtcindex, crtcdata; 26271d7fec4Smrg unsigned short ret; 26371d7fec4Smrg 26471d7fec4Smrg if ((gfx_cpu_version & 0xFF) == GFX_CPU_REDCLOUD) { 26571d7fec4Smrg gfx_outw(VR_INDEX, VR_UNLOCK); 26671d7fec4Smrg gfx_outw(VR_INDEX, (VRC_VG << 8) | VG_FP_TYPE); 26771d7fec4Smrg ret = gfx_inw(VR_DATA); 26871d7fec4Smrg switch (ret & FP_RESOLUTION_MASK) { 26971d7fec4Smrg case FP_RES_6X4: 27071d7fec4Smrg *xres = 640; 27171d7fec4Smrg *yres = 480; 27271d7fec4Smrg break; 27371d7fec4Smrg case FP_RES_8X6: 27471d7fec4Smrg *xres = 800; 27571d7fec4Smrg *yres = 600; 27671d7fec4Smrg break; 27771d7fec4Smrg case FP_RES_10X7: 27871d7fec4Smrg *xres = 1024; 27971d7fec4Smrg *yres = 768; 28071d7fec4Smrg break; 28171d7fec4Smrg case FP_RES_12X10: 28271d7fec4Smrg *xres = 1280; 28371d7fec4Smrg *yres = 1024; 28471d7fec4Smrg break; 28571d7fec4Smrg case FP_RES_16X12: 28671d7fec4Smrg *xres = 1600; 28771d7fec4Smrg *yres = 1200; 28871d7fec4Smrg break; 28971d7fec4Smrg } 29071d7fec4Smrg 29171d7fec4Smrg switch (ret & FP_WIDTH_MASK) { 29271d7fec4Smrg case FP_WIDTH_8: 29371d7fec4Smrg *bpp = 8; 29471d7fec4Smrg break; 29571d7fec4Smrg case FP_WIDTH_9: 29671d7fec4Smrg *bpp = 9; 29771d7fec4Smrg break; 29871d7fec4Smrg case FP_WIDTH_12: 29971d7fec4Smrg *bpp = 12; 30071d7fec4Smrg break; 30171d7fec4Smrg case FP_WIDTH_18: 30271d7fec4Smrg *bpp = 18; 30371d7fec4Smrg break; 30471d7fec4Smrg case FP_WIDTH_24: 30571d7fec4Smrg *bpp = 24; 30671d7fec4Smrg break; 30771d7fec4Smrg case FP_WIDTH_16: 30871d7fec4Smrg *bpp = 16; 30971d7fec4Smrg break; 31071d7fec4Smrg } 31171d7fec4Smrg 31271d7fec4Smrg switch (ret & FP_REF_MASK) { 31371d7fec4Smrg case FP_REF_60: 31471d7fec4Smrg *hz = 60; 31571d7fec4Smrg break; 31671d7fec4Smrg case FP_REF_65: 31771d7fec4Smrg *hz = 65; 31871d7fec4Smrg break; 31971d7fec4Smrg case FP_REF_70: 32071d7fec4Smrg *hz = 70; 32171d7fec4Smrg break; 32271d7fec4Smrg case FP_REF_72: 32371d7fec4Smrg *hz = 72; 32471d7fec4Smrg break; 32571d7fec4Smrg case FP_REF_75: 32671d7fec4Smrg *hz = 75; 32771d7fec4Smrg break; 32871d7fec4Smrg case FP_REF_85: 32971d7fec4Smrg *hz = 85; 33071d7fec4Smrg break; 33171d7fec4Smrg } 33271d7fec4Smrg 33371d7fec4Smrg } else { 33471d7fec4Smrg crtcindex = (gfx_inb(0x3CC) & 0x01) ? 0x3D4 : 0x3B4; 33571d7fec4Smrg crtcdata = crtcindex + 1; 33671d7fec4Smrg 33771d7fec4Smrg /* CHECK FPResolution Reg in SoftVGA */ 33871d7fec4Smrg 33971d7fec4Smrg gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPRESOLUTION); 34071d7fec4Smrg ret = gfx_inb(crtcdata); 34171d7fec4Smrg 34271d7fec4Smrg switch (ret & 0x3) { 34371d7fec4Smrg case 0: 34471d7fec4Smrg *xres = 640; 34571d7fec4Smrg *yres = 480; 34671d7fec4Smrg break; 34771d7fec4Smrg case 1: 34871d7fec4Smrg *xres = 800; 34971d7fec4Smrg *yres = 600; 35071d7fec4Smrg break; 35171d7fec4Smrg case 2: 35271d7fec4Smrg *xres = 1024; 35371d7fec4Smrg *yres = 768; 35471d7fec4Smrg break; 35571d7fec4Smrg } 35671d7fec4Smrg 35771d7fec4Smrg switch ((ret >> 4) & 0x3) { 35871d7fec4Smrg case 0: 35971d7fec4Smrg *bpp = 12; 36071d7fec4Smrg break; 36171d7fec4Smrg case 1: 36271d7fec4Smrg *bpp = 18; 36371d7fec4Smrg break; 36471d7fec4Smrg case 2: 36571d7fec4Smrg *bpp = 16; 36671d7fec4Smrg break; 36771d7fec4Smrg case 3: 36871d7fec4Smrg *bpp = 8; 36971d7fec4Smrg break; 37071d7fec4Smrg } 37171d7fec4Smrg 37271d7fec4Smrg /* CHECK FPClockFrequency Reg in SoftVGA */ 37371d7fec4Smrg 37471d7fec4Smrg gfx_outb(crtcindex, (unsigned char)SOFTVGA_FPCLOCKFREQUENCY); 37571d7fec4Smrg *hz = gfx_inb(crtcdata); 37671d7fec4Smrg } 37771d7fec4Smrg} 378