via_regs.h revision 7e6fb56f
1/* 2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. 3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sub license, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the 13 * next paragraph) shall be included in all copies or substantial portions 14 * of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 */ 24 25/************************************************************************* 26 * 27 * File: via_regs.c 28 * Content: The defines of Via registers 29 * 30 ************************************************************************/ 31 32#ifndef _VIA_REGS_H_ 33#define _VIA_REGS_H_ 1 34 35#include "via_driver.h" 36 37#define BIOS_BSIZE 1024 38#define BIOS_BASE 0xc0000 39 40 41#define VIA_MMIO_REGSIZE 0x9000 42#define VIA_MMIO_REGBASE 0x0 43#define VIA_MMIO_VGABASE 0x8000 44#define VIA_MMIO_BLTBASE 0x200000 45#define VIA_MMIO_BLTSIZE 0x200000 46 47 48/* defines for VIA 2D registers */ 49#define VIA_REG_GECMD 0x000 50#define VIA_REG_GEMODE 0x004 51#define VIA_REG_GESTATUS 0x004 /* as same as VIA_REG_GEMODE */ 52#define VIA_REG_SRCPOS 0x008 53#define VIA_REG_DSTPOS 0x00C 54#define VIA_REG_LINE_K1K2 0x008 55#define VIA_REG_LINE_XY 0x00C 56#define VIA_REG_DIMENSION 0x010 /* width and height */ 57#define VIA_REG_PATADDR 0x014 58#define VIA_REG_FGCOLOR 0x018 59#define VIA_REG_DSTCOLORKEY 0x018 /* as same as VIA_REG_FG */ 60#define VIA_REG_BGCOLOR 0x01C 61#define VIA_REG_SRCCOLORKEY 0x01C /* as same as VIA_REG_BG */ 62#define VIA_REG_CLIPTL 0x020 /* top and left of clipping */ 63#define VIA_REG_CLIPBR 0x024 /* bottom and right of clipping */ 64#define VIA_REG_OFFSET 0x028 65#define VIA_REG_LINE_ERROR 0x028 66#define VIA_REG_KEYCONTROL 0x02C /* color key control */ 67#define VIA_REG_SRCBASE 0x030 68#define VIA_REG_DSTBASE 0x034 69#define VIA_REG_PITCH 0x038 /* pitch of src and dst */ 70#define VIA_REG_MONOPAT0 0x03C 71#define VIA_REG_MONOPAT1 0x040 72#define VIA_REG_COLORPAT 0x100 /* from 0x100 to 0x1ff */ 73 74/* defineds vor VIA 2D registers for VT3353 (M1 engine) */ 75#define VIA_REG_GECMD_M1 0x000 76#define VIA_REG_GEMODE_M1 0x004 77#define VIA_REG_GESTATUS_M1 0x004 /* as same as VIA_REG_GEMODE */ 78#define VIA_REG_PITCH_M1 0x008 /* pitch of src and dst */ 79#define VIA_REG_DIMENSION_M1 0x00C /* width and height */ 80#define VIA_REG_DSTPOS_M1 0x010 81#define VIA_REG_LINE_XY_M1 0x010 82#define VIA_REG_DSTBASE_M1 0x014 83#define VIA_REG_SRCPOS_M1 0x018 84#define VIA_REG_LINE_K1K2_M1 0x018 85#define VIA_REG_SRCBASE_M1 0x01C 86#define VIA_REG_PATADDR_M1 0x020 87#define VIA_REG_MONOPAT0_M1 0x024 88#define VIA_REG_MONOPAT1_M1 0x028 89#define VIA_REG_OFFSET_M1 0x02C 90#define VIA_REG_LINE_ERROR_M1 0x02C 91#define VIA_REG_CLIPTL_M1 0x040 /* top and left of clipping */ 92#define VIA_REG_CLIPBR_M1 0x044 /* bottom and right of clipping */ 93#define VIA_REG_KEYCONTROL_M1 0x048 /* color key control */ 94#define VIA_REG_FGCOLOR_M1 0x04C 95#define VIA_REG_DSTCOLORKEY_M1 0x04C /* as same as VIA_REG_FG */ 96#define VIA_REG_BGCOLOR_M1 0x050 97#define VIA_REG_SRCCOLORKEY_M1 0x050 /* as same as VIA_REG_BG */ 98#define VIA_REG_MONOPATFGC_M1 0x058 /* Add foreground color of Pattern */ 99#define VIA_REG_MONOPATBGC_M1 0x05C /* Add background color of Pattern */ 100#define VIA_REG_COLORPAT_M1 0x100 /* from 0x100 to 0x1ff */ 101 102 103/* defines for VIA video registers */ 104#define VIA_REG_INTERRUPT 0x200 105#define VIA_REG_CRTCSTART 0x214 106 107 108/* defines for VIA HW cursor registers */ 109#define VIA_REG_CURSOR_MODE 0x2D0 110#define VIA_REG_CURSOR_POS 0x2D4 111#define VIA_REG_CURSOR_ORG 0x2D8 112#define VIA_REG_CURSOR_BG 0x2DC 113#define VIA_REG_CURSOR_FG 0x2E0 114 115 116/* These regs move about on diffrent hw */ 117#define VIA_REG_HI_CONTROL1 VIA_REG_ALPHA_CONTROL 118#define VIA_REG_HI_BASE1 VIA_REG_ALPHA_BASE 119#define VIA_REG_HI_POS1 VIA_REG_ALPHA_POS 120#define VIA_REG_HI_OFFSET1 VIA_REG_ALPHA_OFFSET 121#define VIA_REG_HI_FIFO1 VIA_REG_ALPHA_FIFO 122#define VIA_REG_HI_TRANSKEY1 VIA_REG_ALPHA_TRANSKEY 123 124/* Note that Hardware Icon and Alpha Window overlap */ 125#define VIA_REG_ALPHA_CONTROL 0x260 126#define VIA_REG_ALPHA_BASE 0x224 127#define VIA_REG_ALPHA_POS 0x208 128#define VIA_REG_ALPHA_OFFSET 0x20C 129#define VIA_REG_ALPHA_PREFIFO 0x268 130#define VIA_REG_ALPHA_FIFO 0x278 131#define VIA_REG_ALPHA_TRANSKEY 0x270 132 133/* secret regs */ 134#define VIA_REG_HI_CONTROL0 0x2F0 135#define VIA_REG_HI_BASE0 0x2F4 136#define VIA_REG_HI_POS0 0x2F8 137#define VIA_REG_HI_OFFSET0 0x2FC 138#define VIA_REG_HI_FIFO0 0x2E8 139#define VIA_REG_HI_TRANSKEY0 0x2EC 140 141/*CN400 and older Hardware Icon engine register*/ 142#define VIA_REG_HI_POSSTART 0x208 143#define VIA_REG_HI_CENTEROFFSET 0x20C 144#define VIA_REG_HI_FBOFFSET 0x224 145#define VIA_REG_HI_CONTROL 0x260 146#define VIA_REG_HI_TRANSPARENT_COLOR 0x270 147#define VIA_REG_HI_INVTCOLOR 0x274 148/* VT3324 primary Hardware Icon engine register */ 149#define VIA_REG_PRIM_HI_POSEND 0x290 150#define VIA_REG_V327_HI_INVTCOLOR 0x2E4 151#define VIA_REG_PRIM_HI_FIFO 0x2E8 152#define VIA_REG_PRIM_HI_TRANSCOLOR 0x2EC 153#define VIA_REG_PRIM_HI_CTRL 0x2F0 154#define VIA_REG_PRIM_HI_FBOFFSET 0x2F4 155#define VIA_REG_PRIM_HI_POSSTART 0x2F8 156#define VIA_REG_PRIM_HI_CENTEROFFSET 0x2FC 157#define VIA_REG_PRIM_HI_INVTCOLOR 0x120C 158 159 160 161/* defines for VIA 3D registers */ 162#define VIA_REG_STATUS 0x400 163#define VIA_REG_TRANSET 0x43C 164#define VIA_REG_TRANSPACE 0x440 165 166/* VIA_REG_STATUS(0x400): Engine Status */ 167#define VIA_CMD_RGTR_BUSY 0x00000080 /* Command Regulator is busy */ 168#define VIA_2D_ENG_BUSY 0x00000002 /* 2D Engine is busy */ 169#define VIA_3D_ENG_BUSY 0x00000001 /* 3D Engine is busy */ 170#define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ 171 172/* VIA_REG_STATUS(0x400): Egine Status */ 173#define VIA_CMD_RGTR_BUSY_H5 0x00000010 /* Command Regulator is busy */ 174#define VIA_2D_ENG_BUSY_H5 0x00000002 /* 2D Engine is busy */ 175#define VIA_3D_ENG_BUSY_H5 0x00001FE1 /* 3D Engine is busy */ 176#define VIA_VR_QUEUE_BUSY_H5 0x00000004 /* Virtual Queue is busy */ 177 178/* VIA_REG_GECMD(0x00): 2D Engine Command */ 179#define VIA_GEC_NOOP 0x00000000 180#define VIA_GEC_BLT 0x00000001 181#define VIA_GEC_LINE 0x00000005 182 183#define VIA_GEC_SRC_XY 0x00000000 184#define VIA_GEC_SRC_LINEAR 0x00000010 185#define VIA_GEC_DST_XY 0x00000000 186#define VIA_GEC_DST_LINRAT 0x00000020 187 188#define VIA_GEC_SRC_FB 0x00000000 189#define VIA_GEC_SRC_SYS 0x00000040 190#define VIA_GEC_DST_FB 0x00000000 191#define VIA_GEC_DST_SYS 0x00000080 192 193#define VIA_GEC_SRC_MONO 0x00000100 /* source is mono */ 194#define VIA_GEC_PAT_MONO 0x00000200 /* pattern is mono */ 195 196#define VIA_GEC_MSRC_OPAQUE 0x00000000 /* mono src is opaque */ 197#define VIA_GEC_MSRC_TRANS 0x00000400 /* mono src is transparent */ 198 199#define VIA_GEC_PAT_FB 0x00000000 /* pattern is in frame buffer */ 200#define VIA_GEC_PAT_REG 0x00000800 /* pattern is from reg setting */ 201 202#define VIA_GEC_CLIP_DISABLE 0x00000000 203#define VIA_GEC_CLIP_ENABLE 0x00001000 204 205#define VIA_GEC_FIXCOLOR_PAT 0x00002000 206 207#define VIA_GEC_INCX 0x00000000 208#define VIA_GEC_DECY 0x00004000 209#define VIA_GEC_INCY 0x00000000 210#define VIA_GEC_DECX 0x00008000 211 212#define VIA_GEC_MPAT_OPAQUE 0x00000000 /* mono pattern is opaque */ 213#define VIA_GEC_MPAT_TRANS 0x00010000 /* mono pattern is transparent */ 214 215#define VIA_GEC_MONO_UNPACK 0x00000000 216#define VIA_GEC_MONO_PACK 0x00020000 217#define VIA_GEC_MONO_DWORD 0x00000000 218#define VIA_GEC_MONO_WORD 0x00040000 219#define VIA_GEC_MONO_BYTE 0x00080000 220 221#define VIA_GEC_LASTPIXEL_ON 0x00000000 222#define VIA_GEC_LASTPIXEL_OFF 0x00100000 223#define VIA_GEC_X_MAJOR 0x00000000 224#define VIA_GEC_Y_MAJOR 0x00200000 225#define VIA_GEC_QUICK_START 0x00800000 226 227 228/* VIA_REG_GEMODE(0x04): GE mode */ 229#define VIA_GEM_8bpp 0x00000000 230#define VIA_GEM_16bpp 0x00000100 231#define VIA_GEM_32bpp 0x00000300 232 233#define VIA_GEM_640 0x00000000 /* 640*480 */ 234#define VIA_GEM_800 0x00000400 /* 800*600 */ 235#define VIA_GEM_1024 0x00000800 /* 1024*768 */ 236#define VIA_GEM_1280 0x00000C00 /* 1280*1024 */ 237#define VIA_GEM_1600 0x00001000 /* 1600*1200 */ 238#define VIA_GEM_2048 0x00001400 /* 2048*1536 */ 239 240/* VIA_REG_PITCH(0x38): Pitch Setting */ 241#define VIA_PITCH_ENABLE 0x80000000 242 243 244/* CN400 HQV offset */ 245#define REG_HQV1_INDEX 0x00001000 246 247 248#define MAXLOOP 0xffffff 249 250#define VIASETREG(addr, data) *(volatile unsigned int *)(pVia->MapBase + (addr)) = (data) 251#define VIAGETREG(addr) *(volatile unsigned int *)(pVia->MapBase + (addr)) 252 253 254#endif /* _VIA_REGS_H_ */ 255