atipcirename.h revision c582b7e3
1c582b7e3Smrg/*
2c582b7e3Smrg * Copyright 2007 George Sapountzis
3c582b7e3Smrg *
4c582b7e3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5c582b7e3Smrg * copy of this software and associated documentation files (the "Software"),
6c582b7e3Smrg * to deal in the Software without restriction, including without limitation
7c582b7e3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c582b7e3Smrg * and/or sell copies of the Software, and to permit persons to whom the
9c582b7e3Smrg * Software is furnished to do so, subject to the following conditions:
10c582b7e3Smrg *
11c582b7e3Smrg * The above copyright notice and this permission notice (including the next
12c582b7e3Smrg * paragraph) shall be included in all copies or substantial portions of the
13c582b7e3Smrg * Software.
14c582b7e3Smrg *
15c582b7e3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16c582b7e3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17c582b7e3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18c582b7e3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19c582b7e3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20c582b7e3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21c582b7e3Smrg * SOFTWARE.
22c582b7e3Smrg */
23c582b7e3Smrg
24c582b7e3Smrg/**
25c582b7e3Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
26c582b7e3Smrg * library. The main purpose being to facilitate source code compatibility.
27c582b7e3Smrg */
28c582b7e3Smrg
29c582b7e3Smrg#ifndef ATIPCIRENAME_H
30c582b7e3Smrg#define ATIPCIRENAME_H
31c582b7e3Smrg
32c582b7e3Smrgenum region_type {
33c582b7e3Smrg    REGION_MEM,
34c582b7e3Smrg    REGION_IO
35c582b7e3Smrg};
36c582b7e3Smrg
37c582b7e3Smrg#ifndef XSERVER_LIBPCIACCESS
38c582b7e3Smrg
39c582b7e3Smrg/* pciVideoPtr */
40c582b7e3Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
41c582b7e3Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
42c582b7e3Smrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
43c582b7e3Smrg
44c582b7e3Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
45c582b7e3Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
46c582b7e3Smrg
47c582b7e3Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
48c582b7e3Smrg                                    (_pcidev)->device, \
49c582b7e3Smrg                                    (_pcidev)->func)
50c582b7e3Smrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
51c582b7e3Smrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
52c582b7e3Smrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
53c582b7e3Smrg
54c582b7e3Smrg/* pciConfigPtr */
55c582b7e3Smrg#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
56c582b7e3Smrg#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
57c582b7e3Smrg#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
58c582b7e3Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
59c582b7e3Smrg
60c582b7e3Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */
61c582b7e3Smrg#define PCI_REGION_BASE(_pcidev, _b, _type)             \
62c582b7e3Smrg    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
63c582b7e3Smrg                             : (_pcidev)->ioBase[(_b)])
64c582b7e3Smrg
65c582b7e3Smrg/* region size: xfree86 uses the log2 of the region size,
66c582b7e3Smrg * but with zero meaning no region, not size of one XXX */
67c582b7e3Smrg#define PCI_REGION_SIZE(_pcidev, _b) \
68c582b7e3Smrg    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
69c582b7e3Smrg
70c582b7e3Smrg/* read/write PCI configuration space */
71c582b7e3Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
72c582b7e3Smrg    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
73c582b7e3Smrg
74c582b7e3Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
75c582b7e3Smrg    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
76c582b7e3Smrg
77c582b7e3Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
78c582b7e3Smrg    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
79c582b7e3Smrg
80c582b7e3Smrg#else /* XSERVER_LIBPCIACCESS */
81c582b7e3Smrg
82c582b7e3Smrgtypedef struct pci_device *pciVideoPtr;
83c582b7e3Smrg
84c582b7e3Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
85c582b7e3Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
86c582b7e3Smrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
87c582b7e3Smrg
88c582b7e3Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
89c582b7e3Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
90c582b7e3Smrg
91c582b7e3Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
92c582b7e3Smrg#define PCI_DEV_TAG(_pcidev)        (_pcidev)
93c582b7e3Smrg
94c582b7e3Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
95c582b7e3Smrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
96c582b7e3Smrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
97c582b7e3Smrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
98c582b7e3Smrg
99c582b7e3Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
100c582b7e3Smrg#define PCI_CFG_TAG(_pcidev)        (_pcidev)
101c582b7e3Smrg
102c582b7e3Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */
103c582b7e3Smrg#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
104c582b7e3Smrg                                    (_pcidev)->bus)
105c582b7e3Smrg#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
106c582b7e3Smrg#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
107c582b7e3Smrg
108c582b7e3Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
109c582b7e3Smrg#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
110c582b7e3Smrg
111c582b7e3Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
112c582b7e3Smrg    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
113c582b7e3Smrg
114c582b7e3Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
115c582b7e3Smrg    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
116c582b7e3Smrg
117c582b7e3Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
118c582b7e3Smrg    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
119c582b7e3Smrg
120c582b7e3Smrg#define ATI_DEVICE_MATCH(d, i) \
121c582b7e3Smrg    { PCI_VENDOR_ATI, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
122c582b7e3Smrg
123c582b7e3Smrg#endif /* XSERVER_LIBPCIACCESS */
124c582b7e3Smrg
125c582b7e3Smrg#endif /* ATIPCIRENAME_H */
126