smi.h revision 7104f784
109885543Smrg/* Header: //Mercury/Projects/archives/XFree86/4.0/smi.h-arc 1.51 29 Nov 2000 17:45:16 Frido $ */ 209885543Smrg 309885543Smrg/* 409885543SmrgCopyright (C) 1994-1999 The XFree86 Project, Inc. All Rights Reserved. 509885543SmrgCopyright (C) 2000 Silicon Motion, Inc. All Rights Reserved. 609885543Smrg 709885543SmrgPermission is hereby granted, free of charge, to any person obtaining a copy of 809885543Smrgthis software and associated documentation files (the "Software"), to deal in 909885543Smrgthe Software without restriction, including without limitation the rights to 1009885543Smrguse, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 1109885543Smrgof the Software, and to permit persons to whom the Software is furnished to do 1209885543Smrgso, subject to the following conditions: 1309885543Smrg 1409885543SmrgThe above copyright notice and this permission notice shall be included in all 1509885543Smrgcopies or substantial portions of the Software. 1609885543Smrg 1709885543SmrgTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1809885543SmrgIMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- 1909885543SmrgNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 2009885543SmrgXFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 2109885543SmrgAN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 2209885543SmrgWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 2309885543Smrg 2409885543SmrgExcept as contained in this notice, the names of the XFree86 Project and 2509885543SmrgSilicon Motion shall not be used in advertising or otherwise to promote the 2609885543Smrgsale, use or other dealings in this Software without prior written 2709885543Smrgauthorization from the XFree86 Project and Silicon Motion. 2809885543Smrg*/ 2909885543Smrg 3009885543Smrg#ifndef _SMI_H 3109885543Smrg#define _SMI_H 3209885543Smrg 337104f784Smrg#include "smi_pcirename.h" 347104f784Smrg 3509885543Smrg#include <string.h> 3609885543Smrg#include <stdio.h> 3709885543Smrg 3809885543Smrg#include "xf86.h" 3909885543Smrg#include "xf86_OSproc.h" 4009885543Smrg#include "xf86PciInfo.h" 4109885543Smrg#include "xf86Pci.h" 4209885543Smrg#include "xf86Cursor.h" 4309885543Smrg#include "vgaHW.h" 4409885543Smrg 4509885543Smrg#include "compiler.h" 4609885543Smrg 4709885543Smrg#include "mipointer.h" 4809885543Smrg#include "micmap.h" 4909885543Smrg 5009885543Smrg#include "fb.h" 5109885543Smrg 5209885543Smrg#include "xaa.h" 5309885543Smrg#include "exa.h" 5409885543Smrg#include "xf86cmap.h" 5509885543Smrg#include "xf86i2c.h" 5609885543Smrg 5709885543Smrg#include "xf86int10.h" 5809885543Smrg#include "vbe.h" 5909885543Smrg 6009885543Smrg#include "xf86xv.h" 6109885543Smrg#include <X11/extensions/Xv.h> 6209885543Smrg 6309885543Smrg/******************************************************************************/ 6409885543Smrg/* D E F I N I T I O N S */ 6509885543Smrg/******************************************************************************/ 6609885543Smrg 6709885543Smrg#ifndef SMI_DEBUG 687104f784Smrg#define SMI_DEBUG 0 6909885543Smrg#endif 7009885543Smrg 7109885543Smrg#define SMI_USE_IMAGE_WRITES 0 7209885543Smrg#define SMI_USE_VIDEO 1 7309885543Smrg#define SMI_USE_CAPTURE 1 747104f784Smrg#define SMI501_CLI_DEBUG 0 757104f784Smrg 767104f784Smrg/* 777104f784Smrg * Leaving attempt implementation of an argb cursor using alpha plane 787104f784Smrg * for the smi 501/502 under this ifdef for now. Maybe it will be fixed 797104f784Smrg * in a subsequent hardware revision. 807104f784Smrg * The problem is that the alpha plane will only work (that is, become 817104f784Smrg * visible) if alpha_plane_tl is set to top:=0 and left:=0. 827104f784Smrg * Also, if alpha_plane_br does not match panel dimensions, the alpha 837104f784Smrg * plane will be displayed tilled in the "first" row, with corruption on 847104f784Smrg * on all odd columns. 857104f784Smrg * Since setting the alpha fb_address works, to implement an argb cursor 867104f784Smrg * using the alpha plane, with the current hardware bugs, it would be 877104f784Smrg * required to: 887104f784Smrg * o allocate an offscreen area of pSmi->lcdWidth * pSmi->lcdHeight * 2 897104f784Smrg * o set statically tl/tr to 0,0,pSmi->lcdWidth-1,pSmi->lcdHeight-1 907104f784Smrg * o use alpha format 3 (argb 4:4:4:4), or alternatively format 1 917104f784Smrg * (rgb 5:6:5), and in the last case, a global 50% alpha is the 927104f784Smrg * best bet, and for the argb cursors being used at the time of this 937104f784Smrg * writing, they look correct, while 100% opaque looks wrong. 947104f784Smrg * o when positioning the pointer, first erase it from the offscreen 957104f784Smrg * area, then repaint it at the proper offset in the alpha offscreen 967104f784Smrg * area. 977104f784Smrg * .... argb software cursor works way better 987104f784Smrg * (There are some other alternatives, like using 8 bits indexed mode, 997104f784Smrg * but when using a global alpha value, instead of per pixel, most argb 1007104f784Smrg * cursors will not look correctly, regardless of the alpha value, that 1017104f784Smrg * should be from 50 to 100% transparency). 1027104f784Smrg * But still there would be the problem of memory requiring a 128 bit 1037104f784Smrg * alignment, what would require either moving the image in the memory, 1047104f784Smrg * and/or some trick with the vsync pixel panning. 1057104f784Smrg * 1067104f784Smrg * Until the alpha layer is corrected in some newer revision (or removed?), 1077104f784Smrg * it could be used as something like an alternate crt, that happens to be 1087104f784Smrg * on top of the panel (and has 16 transparency levels). 1097104f784Smrg */ 1107104f784Smrg#define SMI_CURSOR_ALPHA_PLANE 0 11109885543Smrg 11209885543Smrg/******************************************************************************/ 11309885543Smrg/* S T R U C T U R E S */ 11409885543Smrg/******************************************************************************/ 11509885543Smrg 11609885543Smrg/* Driver data structure; this should contain all needed info for a mode */ 11709885543Smrgtypedef struct 11809885543Smrg{ 1197104f784Smrg CARD16 mode; 1207104f784Smrg 1217104f784Smrg CARD8 SR17, SR18; 1227104f784Smrg CARD8 SR20, SR21, SR22, SR23, SR24; 1237104f784Smrg CARD8 SR30, SR31, SR32, SR34; 1247104f784Smrg CARD8 SR40, SR41, SR42, SR43, SR44, SR45, SR48, SR49, SR4A, SR4B, SR4C; 1257104f784Smrg CARD8 SR50, SR51, SR52, SR53, SR54, SR55, SR56, SR57, SR5A; 1267104f784Smrg CARD8 SR66, SR68, SR69, SR6A, SR6B, SR6C, SR6D, SR6E, SR6F; 1277104f784Smrg CARD8 SR81, SRA0; 1287104f784Smrg 1297104f784Smrg CARD8 CR30, CR33, CR33_2, CR3A; 1307104f784Smrg CARD8 CR40[14], CR40_2[14]; 1317104f784Smrg CARD8 CR90[15], CR9F, CR9F_2; 1327104f784Smrg CARD8 CRA0[14]; 1337104f784Smrg 13409885543Smrg CARD8 smiDACMask, smiDacRegs[256][3]; 13509885543Smrg CARD8 smiFont[8192]; 1367104f784Smrg 13709885543Smrg CARD32 DPR10, DPR1C, DPR20, DPR24, DPR28, DPR2C, DPR30, DPR3C, DPR40, 13809885543Smrg DPR44; 13909885543Smrg CARD32 VPR00, VPR0C, VPR10; 14009885543Smrg CARD32 CPR00; 14109885543Smrg CARD32 FPR00_, FPR0C_, FPR10_; 14209885543Smrg} SMIRegRec, *SMIRegPtr; 14309885543Smrg 14409885543Smrg/* Global PDEV structure. */ 14509885543Smrgtypedef struct 14609885543Smrg{ 1477104f784Smrg int Bpp; /* Bytes per pixel */ 1487104f784Smrg int MCLK; /* Memory Clock */ 1497104f784Smrg int MXCLK; /* MSOC Clock for local sdram */ 1507104f784Smrg ClockRanges clockRange; /* Allowed pixel clock range */ 1517104f784Smrg CloseScreenProcPtr CloseScreen; /* Pointer used to save wrapped 1527104f784Smrg CloseScreen function */ 1537104f784Smrg 1547104f784Smrg I2CBusPtr I2C; /* Pointer into I2C module */ 1557104f784Smrg xf86Int10InfoPtr pInt10; /* Pointer to INT10 module */ 1567104f784Smrg vbeInfoPtr pVbe; /* Pointer to VBE module */ 1577104f784Smrg 1587104f784Smrg pciVideoPtr PciInfo; /* PCI info vars */ 1597104f784Smrg#ifndef XSERVER_LIBPCIACCESS 1607104f784Smrg PCITAG PciTag; 1617104f784Smrg#endif 1627104f784Smrg int Chipset; /* Chip info, set using PCI 1637104f784Smrg above */ 1647104f784Smrg int ChipRev; 1657104f784Smrg 1667104f784Smrg OptionInfoPtr Options; 1677104f784Smrg Bool Dualhead; 1687104f784Smrg 1697104f784Smrg /* Don't attempt to program a video mode. Use kernel framebuffer 1707104f784Smrg * mode instead. */ 1717104f784Smrg Bool UseFBDev; 1727104f784Smrg 1737104f784Smrg /* CSC video uses color space conversion to render video directly to 1747104f784Smrg * the framebuffer, without using an overlay. */ 1757104f784Smrg Bool CSCVideo; 1767104f784Smrg 1777104f784Smrg Bool PCIBurst; /* Enable PCI burst mode for 1787104f784Smrg reads? */ 1797104f784Smrg Bool PCIRetry; /* Enable PCI retries */ 1807104f784Smrg Bool HwCursor; /* hardware cursor enabled */ 1817104f784Smrg 1827104f784Smrg CARD8 DACmask; 1837104f784Smrg int vgaCRIndex, vgaCRReg; 1847104f784Smrg Bool PrimaryVidMapped; /* Flag indicating if 1857104f784Smrg vgaHWMapMem was used 1867104f784Smrg successfully for 1877104f784Smrg this screen */ 1887104f784Smrg Bool ModeStructInit; /* Flag indicating ModeReg has 1897104f784Smrg been duped from console 1907104f784Smrg state */ 1917104f784Smrg 1927104f784Smrg /* Hardware state */ 1937104f784Smrg void (*Save)(ScrnInfoPtr pScrn); /* Function used to save the 1947104f784Smrg current register state */ 19509885543Smrg CARD8 SR18Value; /* PDR#521: original SR18 19609885543Smrg value */ 19709885543Smrg CARD8 SR21Value; /* PDR#521: original SR21 19809885543Smrg value */ 1997104f784Smrg void *save; /* console saved mode 20009885543Smrg registers */ 2017104f784Smrg void *mode; /* XServer video state mode 20209885543Smrg registers */ 20309885543Smrg 2047104f784Smrg /* Memory layout */ 20509885543Smrg int videoRAMBytes; /* In units as noted, set in 20609885543Smrg PreInit */ 20709885543Smrg int videoRAMKBytes; /* In units as noted, set in 20809885543Smrg PreInit */ 20909885543Smrg unsigned char * MapBase; /* Base of mapped memory */ 21009885543Smrg int MapSize; /* Size of mapped memory */ 21109885543Smrg CARD8 * DPRBase; /* Base of DPR registers */ 21209885543Smrg CARD8 * VPRBase; /* Base of VPR registers */ 21309885543Smrg CARD8 * CPRBase; /* Base of CPR registers */ 21409885543Smrg CARD8 * FPRBase; /* Base of FPR registers - for 0730 chipset */ 2157104f784Smrg CARD8 * DCRBase; /* Base of DCR registers - for 0501 chipset */ 2167104f784Smrg CARD8 * SCRBase; /* Base of SCR registers - for 0501 chipset */ 21709885543Smrg CARD8 * DataPortBase; /* Base of data port */ 21809885543Smrg int DataPortSize; /* Size of data port */ 21909885543Smrg CARD8 * IOBase; /* Base of MMIO VGA ports */ 22009885543Smrg IOADDRESS PIOBase; /* Base of I/O ports */ 22109885543Smrg unsigned char * FBBase; /* Base of FB */ 2227104f784Smrg CARD32 fbMapOffset; /* offset for fb mapping */ 22309885543Smrg CARD32 FBOffset; /* Current visual FB starting 22409885543Smrg location */ 22509885543Smrg CARD32 FBCursorOffset; /* Cursor storage location */ 22609885543Smrg CARD32 FBReserved; /* Reserved memory in frame 22709885543Smrg buffer */ 2287104f784Smrg 2297104f784Smrg /* accel additions */ 2307104f784Smrg CARD32 AccelCmd; /* Value for DPR0C */ 2317104f784Smrg Bool NoAccel; /* Disable Acceleration */ 2327104f784Smrg CARD32 ScissorsLeft; /* Left/top of current 2337104f784Smrg scissors */ 2347104f784Smrg CARD32 ScissorsRight; /* Right/bottom of current 2357104f784Smrg scissors */ 2367104f784Smrg Bool ClipTurnedOn; /* Clipping was turned on by 2377104f784Smrg the previous command */ 23809885543Smrg int GEResetCnt; /* Limit the number of errors 23909885543Smrg printed using a counter */ 24009885543Smrg 24109885543Smrg Bool useBIOS; /* Use BIOS for mode sets */ 24209885543Smrg XAAInfoRecPtr XAAInfoRec; /* XAA info Rec */ 24309885543Smrg 24409885543Smrg /* EXA */ 24509885543Smrg ExaDriverPtr EXADriverPtr; 2467104f784Smrg Bool useEXA; /* enable exa acceleration */ 2477104f784Smrg ExaOffscreenArea* fbArea; /* EXA offscreen area used 2487104f784Smrg as framebuffer */ 2497104f784Smrg PictTransformPtr renderTransform; 25009885543Smrg 25109885543Smrg /* DPMS */ 25209885543Smrg int CurrentDPMS; /* Current DPMS state */ 25309885543Smrg 25409885543Smrg /* Panel information */ 25509885543Smrg Bool lcd; /* LCD active, 1=DSTN, 2=TFT */ 25609885543Smrg int lcdWidth; /* LCD width */ 25709885543Smrg int lcdHeight; /* LCD height */ 25809885543Smrg 2597104f784Smrg /* XvExtension */ 26009885543Smrg int videoKey; /* Video chroma key */ 26109885543Smrg Bool ByteSwap; /* Byte swap for ZV port */ 26209885543Smrg Bool interlaced; /* True: Interlaced Video */ 26309885543Smrg XF86VideoAdaptorPtr ptrAdaptor; /* Pointer to VideoAdapter 26409885543Smrg structure */ 26509885543Smrg void (*BlockHandler)(int i, pointer blockData, pointer pTimeout, 26609885543Smrg pointer pReadMask); 2677104f784Smrg#if SMI501_CLI_DEBUG 2687104f784Smrg /* SMI 501/502 Command List Interpreter */ 2697104f784Smrg Bool batch_active; 2707104f784Smrg int64_t *batch_handle; /* Virtual address */ 2717104f784Smrg int batch_offset; /* Physical smi 501 address */ 2727104f784Smrg int batch_length; /* Length in 8 byte units */ 2737104f784Smrg int batch_finish; /* Last finish command offset */ 2747104f784Smrg int batch_index; 2757104f784Smrg#endif 27609885543Smrg} SMIRec, *SMIPtr; 27709885543Smrg 27809885543Smrg#define SMIPTR(p) ((SMIPtr)((p)->driverPrivate)) 27909885543Smrg 28009885543Smrg/******************************************************************************/ 28109885543Smrg/* M A C R O S */ 28209885543Smrg/******************************************************************************/ 28309885543Smrg 28409885543Smrg#if SMI_DEBUG 2857104f784Smrgextern int smi_indent; 2867104f784Smrg# define VERBLEV 1 2877104f784Smrg# define ENTER() xf86ErrorFVerb(VERBLEV, "%*c %s\n",\ 2887104f784Smrg smi_indent++, '>', __FUNCTION__) 2897104f784Smrg# define LEAVE(...) \ 2907104f784Smrg do { \ 2917104f784Smrg xf86ErrorFVerb(VERBLEV, "%*c %s\n", \ 2927104f784Smrg --smi_indent, '<', __FUNCTION__); \ 2937104f784Smrg return __VA_ARGS__; \ 2947104f784Smrg } while (0) 2957104f784Smrg# define DEBUG(...) xf86ErrorFVerb(VERBLEV, __VA_ARGS__) 29609885543Smrg#else 2977104f784Smrg# define VERBLEV 4 2987104f784Smrg# define ENTER() /**/ 2997104f784Smrg# define LEAVE(...) return __VA_ARGS__ 3007104f784Smrg# define DEBUG(...) /**/ 30109885543Smrg#endif 30209885543Smrg 30309885543Smrg/* Some Silicon Motion structs & registers */ 30409885543Smrg#include "regsmi.h" 30509885543Smrg 30609885543Smrg#if !defined (MetroLink) && !defined (VertDebug) 30709885543Smrg#define VerticalRetraceWait() \ 30809885543Smrgdo \ 30909885543Smrg{ \ 31009885543Smrg if (VGAIN8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x17) & 0x80) \ 31109885543Smrg { \ 31209885543Smrg while ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x00); \ 31309885543Smrg while ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x08); \ 31409885543Smrg while ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x00); \ 31509885543Smrg } \ 31609885543Smrg} while (0) 31709885543Smrg#else 31809885543Smrg#define SPIN_LIMIT 1000000 31909885543Smrg#define VerticalRetraceWait() \ 32009885543Smrgdo \ 32109885543Smrg{ \ 32209885543Smrg if (VGAIN8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x17) & 0x80) \ 32309885543Smrg { \ 32409885543Smrg volatile unsigned long _spin_me; \ 32509885543Smrg for (_spin_me = SPIN_LIMIT; \ 32609885543Smrg ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x00) && \ 32709885543Smrg _spin_me; \ 32809885543Smrg _spin_me--); \ 32909885543Smrg if (!_spin_me) \ 33009885543Smrg ErrorF("smi: warning: VerticalRetraceWait timed out.\n"); \ 33109885543Smrg for (_spin_me = SPIN_LIMIT; \ 33209885543Smrg ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x08) && \ 33309885543Smrg _spin_me; \ 33409885543Smrg _spin_me--); \ 33509885543Smrg if (!_spin_me) \ 33609885543Smrg ErrorF("smi: warning: VerticalRetraceWait timed out.\n"); \ 33709885543Smrg for (_spin_me = SPIN_LIMIT; \ 33809885543Smrg ((VGAIN8(pSmi, vgaIOBase + 0x0A) & 0x08) == 0x00) && \ 33909885543Smrg _spin_me; \ 34009885543Smrg _spin_me--); \ 34109885543Smrg if (!_spin_me) \ 34209885543Smrg ErrorF("smi: warning: VerticalRetraceWait timed out.\n"); \ 34309885543Smrg } \ 34409885543Smrg} while (0) 34509885543Smrg#endif 34609885543Smrg 34709885543Smrg/******************************************************************************/ 34809885543Smrg/* F U N C T I O N P R O T O T Y P E S */ 34909885543Smrg/******************************************************************************/ 35009885543Smrg 35109885543Smrg/* smi_dac.c */ 35209885543Smrgvoid SMI_CommonCalcClock(int scrnIndex, long freq, int min_m, int min_n1, 35309885543Smrg int max_n1, int min_n2, int max_n2, long freq_min, 35409885543Smrg long freq_max, unsigned char * mdiv, 35509885543Smrg unsigned char * ndiv); 35609885543Smrg 35709885543Smrg/* smi_i2c */ 35809885543SmrgBool SMI_I2CInit(ScrnInfoPtr pScrn); 35909885543Smrg 36009885543Smrg/* smi_accel.c */ 36109885543Smrgvoid SMI_AccelSync(ScrnInfoPtr pScrn); 36209885543Smrgvoid SMI_GEReset(ScrnInfoPtr pScrn, int from_timeout, int line, char *file); 36309885543Smrgvoid SMI_EngineReset(ScrnInfoPtr); 36409885543Smrgvoid SMI_SetClippingRectangle(ScrnInfoPtr, int, int, int, int); 36509885543Smrgvoid SMI_DisableClipping(ScrnInfoPtr); 3667104f784SmrgCARD32 SMI_DEDataFormat(int bpp); 3677104f784Smrg 3687104f784Smrg/* smi_xaa.c */ 3697104f784SmrgBool SMI_XAAInit(ScreenPtr pScrn); 3707104f784Smrg 3717104f784Smrg/* smi_exa.c */ 3727104f784SmrgBool SMI_EXAInit(ScreenPtr pScrn); 37309885543Smrg 37409885543Smrg/* smi_hwcurs.c */ 37509885543SmrgBool SMI_HWCursorInit(ScreenPtr pScrn); 37609885543Smrg 37709885543Smrg/* smi_driver.c */ 3787104f784SmrgBool SMI_MapMem(ScrnInfoPtr pScrn); 3797104f784Smrgvoid SMI_UnmapMem(ScrnInfoPtr pScrn); 38009885543Smrgvoid SMI_AdjustFrame(int scrnIndex, int x, int y, int flags); 38109885543SmrgBool SMI_SwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 3827104f784Smrgvoid SMI_LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, 3837104f784Smrg LOCO *colors, VisualPtr pVisual); 3847104f784Smrgxf86MonPtr SMI_ddc1(ScrnInfoPtr pScrn); 3857104f784Smrgvoid SMI_PrintRegs(ScrnInfoPtr pScrn); 38609885543Smrg 38709885543Smrg/* smi_video.c */ 38809885543Smrgvoid SMI_InitVideo(ScreenPtr pScreen); 3897104f784SmrgCARD32 SMI_AllocateMemory(ScrnInfoPtr pScrn, void **mem_struct, int size); 3907104f784Smrgvoid SMI_FreeMemory(ScrnInfoPtr pScrn, void *mem_struct); 3917104f784Smrg 39209885543Smrg 39309885543Smrg#endif /*_SMI_H*/ 394