172b676d7Smrg/* 272b676d7Smrg * Main global data and definitions 372b676d7Smrg * 472b676d7Smrg * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 572b676d7Smrg * 672b676d7Smrg * Redistribution and use in source and binary forms, with or without 772b676d7Smrg * modification, are permitted provided that the following conditions 872b676d7Smrg * are met: 972b676d7Smrg * 1) Redistributions of source code must retain the above copyright 1072b676d7Smrg * notice, this list of conditions and the following disclaimer. 1172b676d7Smrg * 2) Redistributions in binary form must reproduce the above copyright 1272b676d7Smrg * notice, this list of conditions and the following disclaimer in the 1372b676d7Smrg * documentation and/or other materials provided with the distribution. 1472b676d7Smrg * 3) The name of the author may not be used to endorse or promote products 1572b676d7Smrg * derived from this software without specific prior written permission. 1672b676d7Smrg * 1772b676d7Smrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1872b676d7Smrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1972b676d7Smrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2072b676d7Smrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2172b676d7Smrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2272b676d7Smrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2372b676d7Smrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2472b676d7Smrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2572b676d7Smrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2672b676d7Smrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2772b676d7Smrg * 2872b676d7Smrg * Authors: Thomas Winischhofer <thomas@winischhofer.net> 2972b676d7Smrg * others (old code base) 3072b676d7Smrg * 3172b676d7Smrg */ 3272b676d7Smrg 3372b676d7Smrg#ifndef _SIS_H_ 3472b676d7Smrg#define _SIS_H_ 3572b676d7Smrg 3672b676d7Smrg#include <stdio.h> 3772b676d7Smrg#include <string.h> 3872b676d7Smrg#include <math.h> 3972b676d7Smrg#include <setjmp.h> 401fd23544Smrg#include <unistd.h> 411fd23544Smrg#include <fcntl.h> 421fd23544Smrg#include <sys/ioctl.h> 431fd23544Smrg 441fd23544Smrg#include <sispcirename.h> 4572b676d7Smrg 4672b676d7Smrg#define SISDRIVERVERSIONYEAR 5 4772b676d7Smrg#define SISDRIVERVERSIONMONTH 9 4872b676d7Smrg#define SISDRIVERVERSIONDAY 20 4972b676d7Smrg#define SISDRIVERREVISION 1 5072b676d7Smrg 5172b676d7Smrg#define SISDRIVERIVERSION ((SISDRIVERVERSIONYEAR << 16) | \ 5272b676d7Smrg (SISDRIVERVERSIONMONTH << 8) | \ 5372b676d7Smrg SISDRIVERVERSIONDAY | \ 5472b676d7Smrg (SISDRIVERREVISION << 24)) 5572b676d7Smrg 5672b676d7Smrg#undef SIS_LINUX /* Try to find out whether platform is Linux */ 5772b676d7Smrg#if defined(__GNUC__) && (__GNUC__ >= 4) 5872b676d7Smrg#ifdef __linux__ 5972b676d7Smrg#define SIS_LINUX 6072b676d7Smrg#endif 6172b676d7Smrg#else 6272b676d7Smrg#ifdef linux 6372b676d7Smrg#define SIS_LINUX 6472b676d7Smrg#endif 6572b676d7Smrg#endif 6672b676d7Smrg 6772b676d7Smrg#if 0 6872b676d7Smrg#define TWDEBUG /* for debugging */ 6972b676d7Smrg#endif 7072b676d7Smrg 7172b676d7Smrg#undef SIS_CP 7272b676d7Smrg#if 0 7372b676d7Smrg#include "siscp.H" 7472b676d7Smrg#endif 7572b676d7Smrg 7672b676d7Smrg#include "compiler.h" 7772b676d7Smrg#include "xf86Pci.h" 7872b676d7Smrg#include "xf86_OSproc.h" 79e47418d9Smrg#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 6 8072b676d7Smrg#include "xf86Resources.h" 81e47418d9Smrg#endif 8272b676d7Smrg#include "xf86.h" 8372b676d7Smrg#include "xf86Cursor.h" 8472b676d7Smrg#include "xf86cmap.h" 8572b676d7Smrg#include "vbe.h" 8672b676d7Smrg 8774c14cd6Smrg#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) < 12 8874c14cd6Smrg#define _swapl(x, n) swapl(x,n) 8974c14cd6Smrg#define _swaps(x, n) swaps(x,n) 9074c14cd6Smrg#else 9174c14cd6Smrg#define _swapl(x, n) swapl(x) 9274c14cd6Smrg#define _swaps(x, n) swaps(x) 9374c14cd6Smrg#endif 9474c14cd6Smrg 9572b676d7Smrg#define SIS_HaveDriverFuncs 0 9672b676d7Smrg 9772b676d7Smrg#undef SISISXORG6899900 9872b676d7Smrg#ifdef XORG_VERSION_CURRENT 9972b676d7Smrg#include "xorgVersion.h" 10072b676d7Smrg#define SISMYSERVERNAME "X.org" 10172b676d7Smrg#ifndef XF86_VERSION_NUMERIC 10272b676d7Smrg#define XF86_VERSION_NUMERIC(major,minor,patch,snap,dummy) \ 10372b676d7Smrg (((major) * 10000000) + ((minor) * 100000) + ((patch) * 1000) + snap) 10472b676d7Smrg#define XF86_VERSION_CURRENT XF86_VERSION_NUMERIC(4,3,99,902,0) 10572b676d7Smrg#endif 1061fd23544Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,900,0) || XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(4,0,0,0,0) 10772b676d7Smrg#define SISISXORG6899900 10872b676d7Smrg#endif 10972b676d7Smrg#if 0 11072b676d7Smrg#ifdef HaveDriverFuncs 11172b676d7Smrg#define SIS_HAVE_DRIVER_FUNC 11272b676d7Smrg#undef SIS_HaveDriverFuncs 11372b676d7Smrg#define SIS_HaveDriverFuncs HaveDriverFuncs 11472b676d7Smrg#endif 11572b676d7Smrg#endif 11672b676d7Smrg#else 11772b676d7Smrg#include "xf86Version.h" 11872b676d7Smrg#define SISMYSERVERNAME "XFree86" 11972b676d7Smrg#endif 12072b676d7Smrg 12172b676d7Smrg#define SIS_NAME "SIS" 12272b676d7Smrg#define SIS_DRIVER_NAME "sis" 1231fd23544Smrg#define SIS_MAJOR_VERSION PACKAGE_VERSION_MAJOR 12472b676d7Smrg#ifdef SISISXORG6899900 1251fd23544Smrg#define SIS_MINOR_VERSION PACKAGE_VERSION_MINOR /* DRI changes */ 1261fd23544Smrg#define SIS_PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 12772b676d7Smrg#else 12872b676d7Smrg#define SIS_MINOR_VERSION 7 12972b676d7Smrg#define SIS_PATCHLEVEL 1 13072b676d7Smrg#endif 13172b676d7Smrg#define SIS_CURRENT_VERSION ((SIS_MAJOR_VERSION << 16) | \ 13272b676d7Smrg (SIS_MINOR_VERSION << 8) | SIS_PATCHLEVEL ) 13372b676d7Smrg 13472b676d7Smrg#if (XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,0,0)) || (defined(XvExtension)) 13572b676d7Smrg#include "xf86xv.h" 13672b676d7Smrg#include <X11/extensions/Xv.h> 13772b676d7Smrg#endif 13872b676d7Smrg 13972b676d7Smrg/* Platform/architecture related definitions: */ 14072b676d7Smrg 14172b676d7Smrg/* SIS_PC_PLATFORM: Map VGA memory at a0000 and save/restore fonts? */ 14272b676d7Smrg/* List of architectures likely to be incomplete */ 14372b676d7Smrg#define SIS_PC_PLATFORM 14472b676d7Smrg#if defined(__powerpc__) || defined(__mips__) || defined(__arm32__) 14572b676d7Smrg#undef SIS_PC_PLATFORM 14672b676d7Smrg#endif 14772b676d7Smrg 14872b676d7Smrg/* SIS_USE_BIOS_SCRATCH: Save/restore mode number in BIOS scratch area? */ 14972b676d7Smrg#undef SIS_USE_BIOS_SCRATCH 15072b676d7Smrg#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__) 15172b676d7Smrg#define SIS_USE_BIOS_SCRATCH 15272b676d7Smrg#endif 15372b676d7Smrg 15472b676d7Smrg/* SIS_NEED_MAP_IOP: Map i/o port area to virtual memory? */ 15572b676d7Smrg/* List of architectures likely to be incomplete */ 15672b676d7Smrg/* This is BROKEN, see comment in sis_driver.c */ 15772b676d7Smrg#undef SIS_NEED_MAP_IOP 15872b676d7Smrg#if 0 15972b676d7Smrg#if defined(__arm32__) || defined(__mips__) 16072b676d7Smrg#define SIS_NEED_MAP_IOP 16172b676d7Smrg#endif 16272b676d7Smrg#endif 16372b676d7Smrg 16472b676d7Smrg/* SISUSEDEVPORT: Used on architectures without direct inX/outX access. In this case, 16572b676d7Smrg * we use read()/write() to /dev/port. LINUX ONLY! (How can this be done on *BSD?) 16672b676d7Smrg */ 16772b676d7Smrg#undef SISUSEDEVPORT 16872b676d7Smrg#if defined(SIS_LINUX) && (defined(__arm32__) || defined(__mips__)) 16972b676d7Smrg#ifndef SIS_NEED_MAP_IOP 17072b676d7Smrg#define SISUSEDEVPORT 17172b676d7Smrg#endif 17272b676d7Smrg#endif 17372b676d7Smrg 17472b676d7Smrg/* Our #includes: Require the arch/platform dependent #defines above */ 17572b676d7Smrg 17672b676d7Smrg#include "osdef.h" 17772b676d7Smrg#include "vgatypes.h" 17872b676d7Smrg#include "vstruct.h" 17972b676d7Smrg 18072b676d7Smrg#undef SISHAVEDRMWRITE 18172b676d7Smrg#undef SISNEWDRI 18274c14cd6Smrg 18374c14cd6Smrg/* if the server was built without DRI support, force-disable DRI */ 18474c14cd6Smrg#ifndef XF86DRI 18574c14cd6Smrg#undef SISDRI 18674c14cd6Smrg#endif 18774c14cd6Smrg 18874c14cd6Smrg#ifdef SISDRI 18972b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,3,0) 19072b676d7Smrg#define SISHAVEDRMWRITE 19172b676d7Smrg#endif 19272b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,14,0) 19372b676d7Smrg#define SISNEWDRI 19472b676d7Smrg#endif 19572b676d7Smrg#undef SIS315DRI /* define this if dri is adapted for 315/330 series */ 19672b676d7Smrg#include "xf86drm.h" 19772b676d7Smrg#include "sarea.h" 19872b676d7Smrg#define _XF86DRI_SERVER_ 19972b676d7Smrg#include "dri.h" 20072b676d7Smrg#include "sis_dri.h" 20174c14cd6Smrg#endif /* SISDRI */ 20272b676d7Smrg 20372b676d7Smrg/* Configurable stuff: ------------------------------------- */ 20472b676d7Smrg 20572b676d7Smrg#define SISDUALHEAD /* Include Dual Head code */ 20672b676d7Smrg 20772b676d7Smrg#define SISMERGED /* Include Merged-FB code */ 20872b676d7Smrg 20972b676d7Smrg#undef SISXINERAMA 21072b676d7Smrg#ifdef SISMERGED 21172b676d7Smrg#define SISXINERAMA /* Include SiS Pseudo-Xinerama for MergedFB mode */ 21272b676d7Smrg#define SIS_XINERAMA_MAJOR_VERSION 1 21372b676d7Smrg#define SIS_XINERAMA_MINOR_VERSION 1 21472b676d7Smrg#endif 21572b676d7Smrg 21672b676d7Smrg#define SIS_ARGB_CURSOR /* Include code for color hardware cursors */ 21772b676d7Smrg 21872b676d7Smrg#define ENABLE_YPBPR /* Include YPbPr support on SiS bridges (315 series and 661/741/760) */ 21972b676d7Smrg 22072b676d7Smrg#define SISVRAMQ /* Use VRAM queue mode on 315/330/340/XGI series */ 22172b676d7Smrg 22272b676d7Smrg#undef INCL_YUV_BLIT_ADAPTOR 22372b676d7Smrg#ifdef SISVRAMQ 22472b676d7Smrg#define INCL_YUV_BLIT_ADAPTOR /* Include support for YUV->RGB blit adaptors (VRAM queue mode only) */ 22572b676d7Smrg#endif 22672b676d7Smrg 22774c14cd6Smrg#ifdef HAVE_XAA_H 22872b676d7Smrg#define SIS_USE_XAA /* Include code for XAA */ 22972b676d7Smrg#endif 23072b676d7Smrg 23172b676d7Smrg#ifdef SISVRAMQ 23272b676d7Smrg#ifdef XORG_VERSION_CURRENT 23374fcc364Smrg#if defined(SIS_HAVE_EXA) || (defined(USE_EXA) && (USE_EXA != 0)) 23472b676d7Smrg#if 1 23572b676d7Smrg#define SIS_USE_EXA /* Include code for EXA */ 23672b676d7Smrg#endif 23772b676d7Smrg#endif 23872b676d7Smrg#endif 23972b676d7Smrg#endif 24072b676d7Smrg 24172b676d7Smrg#if 0 24272b676d7Smrg#define SISDEINT /* Include Xv deinterlacer code (not functional yet!) */ 24372b676d7Smrg#endif 24472b676d7Smrg 24572b676d7Smrg#if 0 24672b676d7Smrg#define XV_SD_DEPRECATED /* Include deprecated XV SD interface for SiSCtrl */ 24772b676d7Smrg#endif 24872b676d7Smrg 24972b676d7Smrg/* End of configurable stuff --------------------------------- */ 25072b676d7Smrg 25172b676d7Smrg#define UNLOCK_ALWAYS /* Always unlock the registers (should be set!) */ 25272b676d7Smrg 25372b676d7Smrg#if !defined(SIS_USE_XAA) && !defined(SIS_USE_EXA) 25472b676d7Smrg#define SIS_USE_XAA 25572b676d7Smrg#endif 25672b676d7Smrg 25772b676d7Smrg#ifdef SIS_USE_XAA 25872b676d7Smrg#include "xaa.h" 25972b676d7Smrg#endif 26072b676d7Smrg#ifdef SIS_USE_EXA 26172b676d7Smrg#include "exa.h" 26272b676d7Smrg#endif 26372b676d7Smrg 26472b676d7Smrg/* Need that for SiSCtrl and Pseudo-Xinerama */ 26572b676d7Smrg#define EXTENSION_PROC_ARGS void * 26672b676d7Smrg#include "extnsionst.h" /* required */ 26772b676d7Smrg#include <X11/extensions/panoramiXproto.h> /* required */ 26872b676d7Smrg 26974c14cd6Smrg#include "compat-api.h" 27074c14cd6Smrg 27172b676d7Smrg#undef SISCHECKOSSSE 27272b676d7Smrg#ifdef XORG_VERSION_CURRENT 27374fcc364Smrg#if (XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0)) || (XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,19,99,1,0)) 27472b676d7Smrg#define SISCHECKOSSSE /* Automatic check OS for SSE; requires SigIll facility */ 27572b676d7Smrg#endif 27672b676d7Smrg#endif 27772b676d7Smrg 27872b676d7Smrg#undef SISGAMMARAMP 27972b676d7Smrg#ifdef XORG_VERSION_CURRENT 28074fcc364Smrg#if (XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0)) || (XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,0,0,0,0)) 28172b676d7Smrg#define SISGAMMARAMP /* Driver can set gamma ramp; requires additional symbols in xf86sym.h */ 28272b676d7Smrg#endif 28372b676d7Smrg#endif 28472b676d7Smrg 28572b676d7Smrg#if 0 /* Perhaps for future use */ 28672b676d7Smrg#if 1 28772b676d7Smrg#define SIS_PCI_BUS(a) (a)->bus 28872b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->device 28972b676d7Smrg#define SIS_PCI_FUNC(a) (a)->func 29072b676d7Smrg#define SIS_PCI_TAG(a) pciTag((a)->bus, (a)->device, (a)->func); 29172b676d7Smrg#else 29272b676d7Smrg#define SIS_PCI_BUS(a) (a)->pciid.bus 29372b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->pciid.device 29472b676d7Smrg#define SIS_PCI_FUNC(a) (a)->pciid.func 29572b676d7Smrg#define SIS_PCI_TAG(a) pciTag(&((a)->pciid)); 29672b676d7Smrg#endif 29772b676d7Smrg#endif 29872b676d7Smrg 29972b676d7Smrg#ifdef TWDEBUG 30072b676d7Smrg#define SISVERBLEVEL 3 30172b676d7Smrg#else 30272b676d7Smrg#define SISVERBLEVEL 4 30372b676d7Smrg#endif 30472b676d7Smrg 30574c14cd6Smrg#ifndef _XF86_PCIINFO_H 30674c14cd6Smrg#define PCI_VENDOR_SIS 0x1039 30774c14cd6Smrg/* SiS */ 30874c14cd6Smrg#define PCI_CHIP_SG86C201 0x0001 30974c14cd6Smrg#define PCI_CHIP_SG86C202 0x0002 31074c14cd6Smrg#define PCI_CHIP_SG85C503 0x0008 31174c14cd6Smrg#define PCI_CHIP_SIS5597 0x0200 31274c14cd6Smrg/* Agregado por Carlos Duclos & Manuel Jander */ 31374c14cd6Smrg#define PCI_CHIP_SIS82C204 0x0204 31474c14cd6Smrg#define PCI_CHIP_SG86C205 0x0205 31574c14cd6Smrg#define PCI_CHIP_SG86C215 0x0215 31674c14cd6Smrg#define PCI_CHIP_SG86C225 0x0225 31774c14cd6Smrg#define PCI_CHIP_85C501 0x0406 31874c14cd6Smrg#define PCI_CHIP_85C496 0x0496 31974c14cd6Smrg#define PCI_CHIP_85C601 0x0601 32074c14cd6Smrg#define PCI_CHIP_85C5107 0x5107 32174c14cd6Smrg#define PCI_CHIP_85C5511 0x5511 32274c14cd6Smrg#define PCI_CHIP_85C5513 0x5513 32374c14cd6Smrg#define PCI_CHIP_SIS5571 0x5571 32474c14cd6Smrg#define PCI_CHIP_SIS5597_2 0x5597 32574c14cd6Smrg#define PCI_CHIP_SIS530 0x6306 32674c14cd6Smrg#define PCI_CHIP_SIS6326 0x6326 32774c14cd6Smrg#define PCI_CHIP_SIS7001 0x7001 32874c14cd6Smrg#define PCI_CHIP_SIS300 0x0300 32974c14cd6Smrg#define PCI_CHIP_SIS315H 0x0310 33074c14cd6Smrg#define PCI_CHIP_SIS315PRO 0x0325 33174c14cd6Smrg#define PCI_CHIP_SIS330 0x0330 33274c14cd6Smrg#define PCI_CHIP_SIS630 0x6300 33374c14cd6Smrg#define PCI_CHIP_SIS540 0x5300 33474c14cd6Smrg#define PCI_CHIP_SIS550 0x5315 33574c14cd6Smrg#define PCI_CHIP_SIS650 0x6325 33674c14cd6Smrg#define PCI_CHIP_SIS730 0x7300 33774c14cd6Smrg 33874c14cd6Smrg#endif 33974c14cd6Smrg 34072b676d7Smrg/* For SiS315/550/650/740/330/660 - these should be moved elsewhere! */ 34172b676d7Smrg#ifndef PCI_CHIP_SIS315H 34272b676d7Smrg#define PCI_CHIP_SIS315H 0x0310 34372b676d7Smrg#endif 34472b676d7Smrg#ifndef PCI_CHIP_SIS315 34572b676d7Smrg#define PCI_CHIP_SIS315 0x0315 34672b676d7Smrg#endif 34772b676d7Smrg#ifndef PCI_CHIP_SIS315PRO 34872b676d7Smrg#define PCI_CHIP_SIS315PRO 0x0325 34972b676d7Smrg#endif 35072b676d7Smrg#ifndef PCI_CHIP_SIS550 35172b676d7Smrg#define PCI_CHIP_SIS550 0x5315 /* 550_VGA */ 35272b676d7Smrg#endif 35372b676d7Smrg#ifndef PCI_CHIP_SIS650 35472b676d7Smrg#define PCI_CHIP_SIS650 0x6325 /* 650_VGA and 740_VGA */ 35572b676d7Smrg#endif 35672b676d7Smrg#ifndef PCI_CHIP_SIS330 35772b676d7Smrg#define PCI_CHIP_SIS330 0x0330 35872b676d7Smrg#endif 35972b676d7Smrg#ifndef PCI_CHIP_SIS660 36072b676d7Smrg#define PCI_CHIP_SIS660 0x6330 /* 661_VGA, 741_VGA, 760_VGA, 761_VGA */ 36172b676d7Smrg#endif 36272b676d7Smrg#ifndef PCI_CHIP_SIS340 36372b676d7Smrg#define PCI_CHIP_SIS340 0x0340 36472b676d7Smrg#endif 36572b676d7Smrg 36672b676d7Smrg#ifndef PCI_VENDOR_XGI 36772b676d7Smrg#define PCI_VENDOR_XGI 0x18ca 36872b676d7Smrg#endif 36972b676d7Smrg 37072b676d7Smrg#ifndef PCI_CHIP_XGIXG20 37172b676d7Smrg#define PCI_CHIP_XGIXG20 0x0020 37272b676d7Smrg#endif 37372b676d7Smrg 37472b676d7Smrg#ifndef PCI_CHIP_XGIXG40 37572b676d7Smrg#define PCI_CHIP_XGIXG40 0x0040 37672b676d7Smrg#endif 37772b676d7Smrg 37872b676d7Smrg/* pSiS->Flags (old series only) */ 37972b676d7Smrg#define SYNCDRAM 0x00000001 38072b676d7Smrg#define RAMFLAG 0x00000002 38172b676d7Smrg#define ESS137xPRESENT 0x00000004 38272b676d7Smrg#define SECRETFLAG 0x00000008 38372b676d7Smrg#define A6326REVAB 0x00000010 38472b676d7Smrg#define MMIOMODE 0x00010000 38572b676d7Smrg#define LFBQMODE 0x00020000 38672b676d7Smrg#define AGPQMODE 0x00040000 38772b676d7Smrg#define UMA 0x80000000 38872b676d7Smrg 38972b676d7Smrg#define BIOS_BASE 0xC0000 39072b676d7Smrg#define BIOS_SIZE 0x10000 39172b676d7Smrg 39272b676d7Smrg#define SIS_VBFlagsVersion 1 39372b676d7Smrg 39472b676d7Smrg/* pSiS->VBFlags - if anything is changed here, increase VBFlagsVersion! */ 39572b676d7Smrg#define CRT2_DEFAULT 0x00000001 39672b676d7Smrg#define CRT2_LCD 0x00000002 /* Never change the order of the CRT2_XXX entries */ 39772b676d7Smrg#define CRT2_TV 0x00000004 39872b676d7Smrg#define CRT2_VGA 0x00000008 39972b676d7Smrg#define TV_NTSC 0x00000010 40072b676d7Smrg#define TV_PAL 0x00000020 40172b676d7Smrg#define TV_HIVISION 0x00000040 40272b676d7Smrg#define TV_YPBPR 0x00000080 40372b676d7Smrg#define TV_AVIDEO 0x00000100 40472b676d7Smrg#define TV_SVIDEO 0x00000200 40572b676d7Smrg#define TV_SCART 0x00000400 40672b676d7Smrg#define OLDVB_CONEXANT 0x00000800 /* Definition deprecated (now VBFlags2) */ 40772b676d7Smrg#define OLDVB_TRUMPION OLDVB_CONEXANT /* Definition deprecated (now VBFlags2) */ 40872b676d7Smrg#define TV_PALM 0x00001000 40972b676d7Smrg#define TV_PALN 0x00002000 41072b676d7Smrg#define TV_NTSCJ TV_PALM 41172b676d7Smrg#define OLDVB_302ELV 0x00004000 /* Definition deprecated (now VBFlags2) */ 41272b676d7Smrg#define TV_CHSCART 0x00008000 41372b676d7Smrg#define TV_CHYPBPR525I 0x00010000 41472b676d7Smrg#define CRT1_VGA 0x00000000 /* ZERO - no mask! */ 41572b676d7Smrg#define CRT1_LCDA 0x00020000 41672b676d7Smrg#define VGA2_CONNECTED 0x00040000 41772b676d7Smrg#define DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ 41872b676d7Smrg#define TV_YPBPR625I 0x00100000 41972b676d7Smrg#define TV_YPBPR625P 0x00200000 42072b676d7Smrg#define OLDVB_302B 0x00400000 /* Definition deprecated (now VBFlags2) */ 42172b676d7Smrg#define OLDVB_30xBDH 0x00800000 /* Definition deprecated (now VBFlags2) */ 42272b676d7Smrg#define OLDVB_LVDS 0x01000000 /* Definition deprecated (now VBFlags2) */ 42372b676d7Smrg#define OLDVB_CHRONTEL 0x02000000 /* Definition deprecated (now VBFlags2) */ 42472b676d7Smrg#define OLDVB_301LV 0x04000000 /* Definition deprecated (now VBFlags2) */ 42572b676d7Smrg#define OLDVB_302LV 0x08000000 /* Definition deprecated (now VBFlags2) */ 42672b676d7Smrg#define OLDVB_301C 0x10000000 /* Definition deprecated (now VBFlags2) */ 42772b676d7Smrg#define SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ 42872b676d7Smrg#define MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ 42972b676d7Smrg#define DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ 43072b676d7Smrg 43172b676d7Smrg/* Aliases: */ 43272b676d7Smrg#define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA) 43372b676d7Smrg#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) 43472b676d7Smrg#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR) 43572b676d7Smrg 43672b676d7Smrg/* Only if TV_YPBPR is set: */ 43772b676d7Smrg#define TV_YPBPR525I TV_NTSC 43872b676d7Smrg#define TV_YPBPR525P TV_PAL 43972b676d7Smrg#define TV_YPBPR750P TV_PALM 44072b676d7Smrg#define TV_YPBPR1080I TV_PALN 44172b676d7Smrg#define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | \ 44272b676d7Smrg TV_YPBPR625I | TV_YPBPR625P | \ 44372b676d7Smrg TV_YPBPR750P | TV_YPBPR1080I) 44472b676d7Smrg 44572b676d7Smrg#define TV_YPBPR43LB TV_CHSCART 44672b676d7Smrg#define TV_YPBPR43 TV_CHYPBPR525I 44772b676d7Smrg#define TV_YPBPR169 (TV_CHSCART | TV_CHYPBPR525I) 44872b676d7Smrg#define TV_YPBPRAR (TV_CHSCART | TV_CHYPBPR525I) 44972b676d7Smrg 45072b676d7Smrg#define DISPTYPE_DISP2 CRT2_ENABLE 45172b676d7Smrg#define DISPTYPE_DISP1 DISPTYPE_CRT1 45272b676d7Smrg#define VB_DISPMODE_SINGLE SINGLE_MODE /* alias */ 45372b676d7Smrg#define VB_DISPMODE_MIRROR MIRROR_MODE /* alias */ 45472b676d7Smrg#define VB_DISPMODE_DUAL DUALVIEW_MODE /* alias */ 45572b676d7Smrg#define DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) 45672b676d7Smrg 45772b676d7Smrg/* pSiS->VBFlags2 (static stuff only!) */ 45872b676d7Smrg#define VB2_SISUMC 0x00000001 45972b676d7Smrg#define VB2_301 0x00000002 /* Video bridge type */ 46072b676d7Smrg#define VB2_301B 0x00000004 46172b676d7Smrg#define VB2_301C 0x00000008 46272b676d7Smrg#define VB2_307T 0x00000010 46372b676d7Smrg#define VB2_302B 0x00000800 46472b676d7Smrg#define VB2_301LV 0x00001000 46572b676d7Smrg#define VB2_302LV 0x00002000 46672b676d7Smrg#define VB2_302ELV 0x00004000 46772b676d7Smrg#define VB2_307LV 0x00008000 46872b676d7Smrg#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */ 46972b676d7Smrg#define VB2_CONEXANT 0x10000000 /* >=661 series only */ 47072b676d7Smrg#define VB2_TRUMPION 0x20000000 /* 300 series only */ 47172b676d7Smrg#define VB2_LVDS 0x40000000 47272b676d7Smrg#define VB2_CHRONTEL 0x80000000 47372b676d7Smrg 47472b676d7Smrg#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 47572b676d7Smrg#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 47672b676d7Smrg#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE) 47772b676d7Smrg 47872b676d7Smrg#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T) 47972b676d7Smrg#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 48072b676d7Smrg 48172b676d7Smrg#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B) 48272b676d7Smrg#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE) 48372b676d7Smrg#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV) 48472b676d7Smrg#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV) 48572b676d7Smrg#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE) 48672b676d7Smrg 48772b676d7Smrg#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 48872b676d7Smrg 48972b676d7Smrg#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT) 49072b676d7Smrg 49172b676d7Smrg#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T) 49272b676d7Smrg#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE) 49372b676d7Smrg#define VB2_30xC (VB2_301C | VB2_307T) 49472b676d7Smrg#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV) 49572b676d7Smrg#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV) 49672b676d7Smrg#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T) 49772b676d7Smrg/* CRT2/LCD over 1280 (overflow bits in Part4) */ 49872b676d7Smrg#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV) 49972b676d7Smrg/* CRT2/LCD over 1600? Is this really gonna happen, or will there be LCDA only for large panels? */ 50072b676d7Smrg#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV) 50172b676d7Smrg/* VGA2 up to 202MHz (1600x1200@75) */ 50272b676d7Smrg#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T) 50372b676d7Smrg 50472b676d7Smrg/* pSiS->VBFlags3 (for future use) */ 50572b676d7Smrg#define VB3_CRT1_TV 0x00000001 50672b676d7Smrg#define VB3_CRT1_LCD 0x00000002 50772b676d7Smrg#define VB3_CRT1_VGA 0x00000004 50872b676d7Smrg#define TV1_AVIDEO 0x00000100 50972b676d7Smrg#define TV1_SVIDEO 0x00000200 51072b676d7Smrg#define TV1_SCART 0x00000400 51172b676d7Smrg#define TV1_NTSC 0x00000800 51272b676d7Smrg#define TV1_PAL 0x00001000 51372b676d7Smrg#define TV1_YPBPR 0x00002000 51472b676d7Smrg#define TV1_PALM 0x00004000 51572b676d7Smrg#define TV1_PALN 0x00008000 51672b676d7Smrg#define TV1_NTSCJ 0x00010000 51772b676d7Smrg#define TV1_YPBPR525I 0x00020000 51872b676d7Smrg#define TV1_YPBPR525P 0x00040000 51972b676d7Smrg#define TV1_YPBPR625I 0x00080000 52072b676d7Smrg#define TV1_YPBPR625P 0x00100000 52172b676d7Smrg#define TV1_YPBPR750P 0x00200000 52272b676d7Smrg#define TV1_YPBPR1080I 0x00400000 52372b676d7Smrg 52472b676d7Smrg/* pSiS->VBLCDFlags */ 52572b676d7Smrg#define VB_LCD_320x480 0x00000001 /* DSTN/FSTN for 550 */ 52672b676d7Smrg#define VB_LCD_640x480 0x00000002 52772b676d7Smrg#define VB_LCD_800x600 0x00000004 52872b676d7Smrg#define VB_LCD_1024x768 0x00000008 52972b676d7Smrg#define VB_LCD_1280x1024 0x00000010 53072b676d7Smrg#define VB_LCD_1280x960 0x00000020 53172b676d7Smrg#define VB_LCD_1600x1200 0x00000040 53272b676d7Smrg#define VB_LCD_2048x1536 0x00000080 53372b676d7Smrg#define VB_LCD_1400x1050 0x00000100 53472b676d7Smrg#define VB_LCD_1152x864 0x00000200 53572b676d7Smrg#define VB_LCD_1152x768 0x00000400 53672b676d7Smrg#define VB_LCD_1280x768 0x00000800 53772b676d7Smrg#define VB_LCD_1024x600 0x00001000 53872b676d7Smrg#define VB_LCD_640x480_2 0x00002000 /* DSTN/FSTN */ 53972b676d7Smrg#define VB_LCD_640x480_3 0x00004000 /* DSTN/FSTN */ 54072b676d7Smrg#define VB_LCD_848x480 0x00008000 /* LVDS only, otherwise handled as custom */ 54172b676d7Smrg#define VB_LCD_1280x800 0x00010000 54272b676d7Smrg#define VB_LCD_1680x1050 0x00020000 54372b676d7Smrg#define VB_LCD_1280x720 0x00040000 54472b676d7Smrg#define VB_LCD_320x240 0x00080000 54572b676d7Smrg#define VB_LCD_856x480 0x00100000 54672b676d7Smrg#define VB_LCD_1280x854 0x00200000 54772b676d7Smrg#define VB_LCD_1920x1200 0x00400000 54872b676d7Smrg#define VB_LCD_UNKNOWN 0x10000000 54972b676d7Smrg#define VB_LCD_BARCO1366 0x20000000 55072b676d7Smrg#define VB_LCD_CUSTOM 0x40000000 55172b676d7Smrg#define VB_LCD_EXPANDING 0x80000000 55272b676d7Smrg 55372b676d7Smrg#define VB_FORBID_CRT2LCD_OVER_1600 /* CRT2/LCD supports only up to 1600 pixels */ 55472b676d7Smrg 55572b676d7Smrg/* PresetMode argument */ 55672b676d7Smrg#define SIS_MODE_SIMU 0 55772b676d7Smrg#define SIS_MODE_CRT1 1 55872b676d7Smrg#define SIS_MODE_CRT2 2 55972b676d7Smrg 56072b676d7Smrg/* pSiS->MiscFlags */ 56172b676d7Smrg#define MISC_CRT1OVERLAY 0x00000001 /* Current display mode supports overlay (CRT1) */ 56272b676d7Smrg#define MISC_PANELLINKSCALER 0x00000002 /* Panel link is currently scaling */ 56372b676d7Smrg#define MISC_CRT1OVERLAYGAMMA 0x00000004 /* Current display mode supports overlay gamma corr on CRT1 */ 56472b676d7Smrg#define MISC_TVNTSC1024 0x00000008 /* Current display mode is TV NTSC/PALM/YPBPR525I 1024x768 */ 56572b676d7Smrg#define MISC_CRT2OVERLAY 0x00000010 /* Current display mode supports overlay (CRT2) */ 56672b676d7Smrg#define MISC_SIS760ONEOVERLAY 0x00000020 /* SiS760/761: Only one overlay available currently */ 56772b676d7Smrg#define MISC_STNMODE 0x00000040 /* SiS550: xSTN active */ 56872b676d7Smrg 56972b676d7Smrg/* pSiS->SiS6326Flags */ 57072b676d7Smrg#define SIS6326_HASTV 0x00000001 57172b676d7Smrg#define SIS6326_TVSVIDEO 0x00000002 57272b676d7Smrg#define SIS6326_TVCVBS 0x00000004 57372b676d7Smrg#define SIS6326_TVPAL 0x00000008 57472b676d7Smrg#define SIS6326_TVDETECTED 0x00000010 57572b676d7Smrg#define SIS6326_TVON 0x80000000 57672b676d7Smrg 57772b676d7Smrg#ifdef DEBUG 57872b676d7Smrg#define PDEBUG(p) p 57972b676d7Smrg#else 58072b676d7Smrg#define PDEBUG(p) 58172b676d7Smrg#endif 58272b676d7Smrg 58372b676d7Smrg#define BITMASK(h,l) (((unsigned)(1U << ((h) - (l) + 1)) - 1) << (l)) 58472b676d7Smrg#define GENMASK(mask) BITMASK(1 ? mask, 0 ? mask) 58572b676d7Smrg 58672b676d7Smrg#define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0 ? mask)) 58772b676d7Smrg#define SETBITS(val,mask) ((val) << (0 ? mask)) 58872b676d7Smrg#define SETBIT(n) (1 << (n)) 58972b676d7Smrg 59072b676d7Smrg#define GETBITSTR(val,from,to) ((GETBITS(val, from)) << (0 ? to)) 59172b676d7Smrg#define SETVARBITS(var,val,from,to) (((var) & (~(GENMASK(to)))) | GETBITSTR(val,from,to)) 59272b676d7Smrg#define GETVAR8(var) ((var) & 0xFF) 59372b676d7Smrg#define SETVAR8(var,val) (var) = GETVAR8(val) 59472b676d7Smrg 59572b676d7Smrgtypedef unsigned long ULong; 59672b676d7Smrgtypedef unsigned short UShort; 59772b676d7Smrgtypedef unsigned char UChar; 59872b676d7Smrg 59972b676d7Smrg/* pSiS->VGAEngine - VGA engine types */ 60072b676d7Smrg#define UNKNOWN_VGA 0 60172b676d7Smrg#define SIS_530_VGA 1 60272b676d7Smrg#define SIS_OLD_VGA 2 60372b676d7Smrg#define SIS_300_VGA 3 60472b676d7Smrg#define SIS_315_VGA 4 /* Includes 330/660/661/741/760/340/761 and M versions thereof, XGI */ 60572b676d7Smrg 60672b676d7Smrg/* pSiS->oldChipset */ 60772b676d7Smrg#define OC_UNKNOWN 0 60872b676d7Smrg#define OC_SIS86201 1 60972b676d7Smrg#define OC_SIS86202 2 61072b676d7Smrg#define OC_SIS6205A 3 61172b676d7Smrg#define OC_SIS6205B 4 61272b676d7Smrg#define OC_SIS82204 5 61372b676d7Smrg#define OC_SIS6205C 6 61472b676d7Smrg#define OC_SIS6225 7 61572b676d7Smrg#define OC_SIS5597 8 61672b676d7Smrg#define OC_SIS6326 9 61772b676d7Smrg#define OC_SIS530A 11 61872b676d7Smrg#define OC_SIS530B 12 /* 620 in 620-WDR */ 61972b676d7Smrg#define OC_SIS620 13 62072b676d7Smrg 62172b676d7Smrg/* Chrontel type */ 62272b676d7Smrg#define CHRONTEL_700x 0 62372b676d7Smrg#define CHRONTEL_701x 1 62472b676d7Smrg 62572b676d7Smrg/* pSiS->ChipFlags */ 62672b676d7Smrg/* Use only lower 16 bit for chip id! (sisctrl) */ 62772b676d7Smrg#define SiSCF_LARGEOVERLAY 0x00000001 62872b676d7Smrg#define SiSCF_Is651 0x00000002 62972b676d7Smrg#define SiSCF_IsM650 0x00000004 63072b676d7Smrg#define SiSCF_IsM652 0x00000008 63172b676d7Smrg#define SiSCF_IsM653 0x00000010 63272b676d7Smrg#define SiSCF_Is652 0x00000020 63372b676d7Smrg#define SiSCF_Is65x (SiSCF_Is651|SiSCF_IsM650|SiSCF_IsM652|SiSCF_IsM653|SiSCF_Is652) 63472b676d7Smrg#define SiSCF_IsM661 0x00000100 /* M661FX */ 63572b676d7Smrg#define SiSCF_IsM741 0x00000200 63672b676d7Smrg#define SiSCF_IsM760 0x00000400 63772b676d7Smrg#define SiSCF_IsM661M 0x00000800 /* M661MX */ 63872b676d7Smrg#define SiSCF_IsM66x (SiSCF_IsM661 | SiSCF_IsM741 | SiSCF_IsM760 | SiSCF_IsM661M) 63972b676d7Smrg#define SiSCF_Is315USB 0x00001000 /* USB2VGA dongle */ 64072b676d7Smrg#define SiSCF_Is315E 0x00002000 /* 315E (lower clocks) */ 64172b676d7Smrg#define SiSCF_IsXGIV3 SiSCF_Is651 /* Volari V3(XT) (If neither XGI... set, is V8) */ 64272b676d7Smrg#define SiSCF_IsXGIV5 SiSCF_IsM650/* Volari V5 */ 64372b676d7Smrg#define SiSCF_IsXGIDUO SiSCF_IsM652/* Volari Duo */ 64472b676d7Smrg/* ... */ 64572b676d7Smrg#define SiSCF_315Core 0x00010000 /* 3D: Real 315 */ 64672b676d7Smrg#define SiSCF_Real256ECore 0x00020000 /* 3D: Similar to 315 core, no T&L? (65x, 661, 740, 741) */ 64772b676d7Smrg#define SiSCF_XabreCore 0x00040000 /* 3D: Real Xabre */ 64872b676d7Smrg#define SiSCF_Ultra256Core 0x00080000 /* 3D: aka "Mirage 2"; similar to Xabre, no T&L?, no P:Shader? (760) */ 64972b676d7Smrg#define SiSCF_MMIOPalette 0x00100000 /* HW supports MMIO palette writing/reading */ 65072b676d7Smrg#define SiSCF_IsXGI 0x00200000 /* Is XGI chip (Z7, V3, V5, V8) */ 65172b676d7Smrg#define SiSCF_UseLCDA 0x01000000 65272b676d7Smrg#define SiSCF_760LFB 0x08000000 /* 76x: LFB active (if not set, UMA only) */ 65372b676d7Smrg#define SiSCF_760UMA 0x10000000 /* 76x: UMA active (if not set, LFB only) */ 65472b676d7Smrg#define SiSCF_CRT2HWCKaputt 0x20000000 /* CRT2 Mono HWCursor engine buggy (SiS 330) */ 65572b676d7Smrg#define SiSCF_Glamour3 0x40000000 65672b676d7Smrg#define SiSCF_Integrated 0x80000000 65772b676d7Smrg 65872b676d7Smrg/* SiS Direct Xv-API */ 65972b676d7Smrg#define SiS_SD_IS300SERIES 0x00000001 66072b676d7Smrg#define SiS_SD_IS315SERIES 0x00000002 66172b676d7Smrg#define SiS_SD_IS330SERIES 0x00000004 66272b676d7Smrg#define SiS_SD_SUPPORTPALMN 0x00000008 /* tv chip supports pal-m, pal-n */ 66372b676d7Smrg#define SiS_SD_SUPPORT2OVL 0x00000010 /* set = 2 overlays, clear = support SWITCHCRT xv prop */ 66472b676d7Smrg#define SiS_SD_SUPPORTTVPOS 0x00000020 /* supports changing tv position */ 66572b676d7Smrg#define SiS_SD_ISDUALHEAD 0x00000040 /* Driver is in dual head mode */ 66672b676d7Smrg#define SiS_SD_ISMERGEDFB 0x00000080 /* Driver is in merged fb mode */ 66772b676d7Smrg#define SiS_SD_ISDHSECONDHEAD 0x00000100 /* Dual head: This is CRT1 (=second head) */ 66872b676d7Smrg#define SiS_SD_ISDHXINERAMA 0x00000200 /* Dual head: We are running Xinerama */ 66972b676d7Smrg#define SiS_SD_VBHASSCART 0x00000400 /* videobridge has SCART instead of VGA2 */ 67072b676d7Smrg#define SiS_SD_ISDEPTH8 0x00000800 /* Depth is 8, no independent gamma correction */ 67172b676d7Smrg#define SiS_SD_SUPPORTSOVER 0x00001000 /* Support for Chrontel Super Overscan */ 67272b676d7Smrg#define SiS_SD_ENABLED 0x00002000 /* sisctrl is enabled (by option) */ 67372b676d7Smrg#define SiS_SD_PSEUDOXINERAMA 0x00004000 /* pseudo xinerama is active */ 67472b676d7Smrg#define SiS_SD_SUPPORTLCDA 0x00008000 /* Support LCD Channel A */ 67572b676d7Smrg#define SiS_SD_SUPPORTNTSCJ 0x00010000 /* tv chip supports ntsc-j */ 67672b676d7Smrg#define SiS_SD_ADDLSUPFLAG 0x00020000 /* 1 = the following flags are valid */ 67772b676d7Smrg#define SiS_SD_SUPPORTVGA2 0x00040000 /* CRT2=VGA supported */ 67872b676d7Smrg#define SiS_SD_SUPPORTSCART 0x00080000 /* CRT2=SCART supported */ 67972b676d7Smrg#define SiS_SD_SUPPORTOVERSCAN 0x00100000 /* Overscan flag supported */ 68072b676d7Smrg#define SiS_SD_SUPPORTXVGAMMA1 0x00200000 /* Xv Gamma correction for CRT1 supported */ 68172b676d7Smrg#define SiS_SD_SUPPORTTV 0x00400000 /* CRT2=TV supported */ 68272b676d7Smrg#define SiS_SD_SUPPORTYPBPR 0x00800000 /* CRT2=YPbPr (525i, 525p, 750p, 1080i) is supported */ 68372b676d7Smrg#define SiS_SD_SUPPORTHIVISION 0x01000000 /* CRT2=HiVision is supported */ 68472b676d7Smrg#define SiS_SD_SUPPORTYPBPRAR 0x02000000 /* YPbPr aspect ratio is supported */ 68572b676d7Smrg#define SiS_SD_SUPPORTSCALE 0x04000000 /* Scaling of LCD panel supported */ 68672b676d7Smrg#define SiS_SD_SUPPORTCENTER 0x08000000 /* If scaling supported: Centering of screen [NOT] supported (TMDS only) */ 68772b676d7Smrg#define SiS_SD_SUPPORTREDETECT 0x10000000 /* Support re-detection of CRT2 devices */ 68872b676d7Smrg#define SiS_SD_IS340SERIES 0x20000000 68972b676d7Smrg#define SiS_SD_SUPPORTSGRCRT2 0x40000000 /* Separate CRT2 gamma correction supported */ 69072b676d7Smrg#define SiS_SD_CANSETGAMMA 0x80000000 /* Driver can set gamma ramp; otherwise: App needs to reset palette */ 69172b676d7Smrg /* after disabling sep CRT2 gamma corr */ 69272b676d7Smrg 69372b676d7Smrg#define SiS_SD2_LCDTMDS 0x00000001 /* SiS Bridge supports TMDS (DVI-D) */ 69472b676d7Smrg#define SiS_SD2_LCDLVDS 0x00000002 /* SiS Bridge supports LVDS */ 69572b676d7Smrg#define SiS_SD2_SUPPORTLCD 0x00000004 /* Bridge supports LCD (LVDS or TMDS, SiS+3rd party) */ 69672b676d7Smrg#define SiS_SD2_SUPPORTTVSIZE 0x00000008 /* TV resizing supported (SiS bridges) */ 69772b676d7Smrg#define SiS_SD2_SUPPORTTVTYPE 0x00000010 /* TV type selection supported (SiS bridges) */ 69872b676d7Smrg#define SiS_SD2_SUPPORTGAMMA2 0x00000020 /* Gamma corr for CRT2 supported (SiS bridges) */ 69972b676d7Smrg#define SiS_SD2_SISBRIDGE 0x00000040 /* SiS bridge */ 70072b676d7Smrg#define SiS_SD2_SUPPTVSAT 0x00000080 /* TV saturation supported */ 70172b676d7Smrg#define SiS_SD2_SUPPTVEDGE 0x00000100 /* TV edge enhancement supported */ 70272b676d7Smrg#define SiS_SD2_CHRONTEL 0x00000200 /* Chrontel TV encoder present */ 70372b676d7Smrg#define SiS_SD2_VIDEOBRIDGE 0x00000400 /* Any type of video bridge present */ 70472b676d7Smrg#define SiS_SD2_THIRDPARTYLVDS 0x00000800 /* Third party LVDS (non-SiS) */ 70572b676d7Smrg#define SiS_SD2_ADDLFLAGS 0x00001000 /* Following flags valid */ 70672b676d7Smrg#define SiS_SD2_SUPPORT760OO 0x00002000 /* Support dynamic one/two overlay configuration changes */ 70772b676d7Smrg /* (If set, utility must re-read SD2 flags after mode change) */ 70872b676d7Smrg#define SiS_SD2_SIS760ONEOVL 0x00004000 /* (76x:) Only one overlay currently */ 70972b676d7Smrg#define SiS_SD2_MERGEDUCLOCK 0x00008000 /* Provide VRefresh in mode->Clock field in MergedFB mode */ 71072b676d7Smrg#define SiS_SD2_SUPPORTXVHUESAT 0x00010000 /* Xv: Support hue & saturation */ 71172b676d7Smrg#define SiS_SD2_NEEDUSESSE 0x00020000 /* Need "UseSSE" option to use SSE (otherwise auto) */ 71272b676d7Smrg#define SiS_SD2_NODDCSUPPORT 0x00040000 /* No hardware DDC support (USB) */ 71372b676d7Smrg#define SiS_SD2_SUPPORTXVDEINT 0x00080000 /* Xv deinterlacing supported (n/a, for future use) */ 71472b676d7Smrg#define SiS_SD2_ISXGI 0x00100000 /* Is XGI chip */ 71572b676d7Smrg#define SiS_SD2_USEVBFLAGS2 0x00200000 /* Use VBFlags2 for bridge ID */ 71672b676d7Smrg#define SiS_SD2_SUPPLTFLAG 0x00400000 /* Driver supports the following 3 flags */ 71772b676d7Smrg#define SiS_SD2_ISLAPTOP 0x00800000 /* This machine is (very probably) a laptop */ 71872b676d7Smrg#define SiS_SD2_MACHINETYPE2 0x01000000 /* Machine type 2 (for future use) */ 71972b676d7Smrg#define SiS_SD2_MACHINETYPE3 0x02000000 /* Machine type 3 (for future use) */ 72072b676d7Smrg#define SiS_SD2_SUPPORT625I 0x04000000 /* Support YPbPr 625i */ 72172b676d7Smrg#define SiS_SD2_SUPPORT625P 0x08000000 /* Support YPbPr 625p */ 72272b676d7Smrg#define SiS_SD2_VBINVB2ONLY 0x10000000 /* VB_* bits in vbflags no longer used for vb type */ 72372b676d7Smrg#define SiS_SD2_NEWGAMMABRICON 0x20000000 /* Support new gamma brightness/contrast */ 72472b676d7Smrg#define SiS_SD2_HAVESD34 0x40000000 /* Support SD3 and SD4 flags */ 72572b676d7Smrg#define SiS_SD2_NOOVERLAY 0x80000000 /* No video overlay */ 72672b676d7Smrg 72772b676d7Smrg#define SiS_SD3_OLDGAMMAINUSE 0x00000001 /* Old gamma brightness is currently in use */ 72872b676d7Smrg#define SiS_SD3_MFBALLOWOFFCL 0x00000002 /* Supports off'ing CRTx in MFB if a clone mode is active */ 72972b676d7Smrg#define SiS_SD3_SUPPORTVBF34 0x00000004 /* Supports VBFlags3 and VBFlags4 */ 73072b676d7Smrg#define SiS_SD3_SUPPORTDUALDVI 0x00000008 /* Supports dual dvi-d (for future use) */ 73172b676d7Smrg#define SiS_SD3_SUPPORTDUALTV 0x00000010 /* Supports dual tv (for future use) */ 73272b676d7Smrg#define SiS_SD3_NEWOUTPUTSW 0x00000020 /* Supports NEWSETVBFLAGS (for future use) */ 73372b676d7Smrg#define SiS_SD3_CRT1SATGAIN 0x00000040 /* Supports CRT1 saturation gain */ 73472b676d7Smrg#define SiS_SD3_CRT2SATGAIN 0x00000080 /* Supports CRT2 saturation gain (apart from TV, see SiS_SD2_SUPPTVSAT) */ 73572b676d7Smrg 73672b676d7Smrg#define SIS_DIRECTKEY 0x03145792 73772b676d7Smrg 73872b676d7Smrg/* SiSCtrl: Check mode for CRT2 */ 73972b676d7Smrg#define SiS_CF2_LCD 0x01 74072b676d7Smrg#define SiS_CF2_TV 0x02 74172b676d7Smrg#define SiS_CF2_VGA2 0x04 74272b676d7Smrg#define SiS_CF2_TVPAL 0x08 74372b676d7Smrg#define SiS_CF2_TVNTSC 0x10 /* + NTSC-J */ 74472b676d7Smrg#define SiS_CF2_TVPALM 0x20 74572b676d7Smrg#define SiS_CF2_TVPALN 0x40 74672b676d7Smrg#define SiS_CF2_CRT1LCDA 0x80 74772b676d7Smrg#define SiS_CF2_TYPEMASK (SiS_CF2_LCD | SiS_CF2_TV | SiS_CF2_VGA2 | SiS_CF2_CRT1LCDA) 74872b676d7Smrg#define SiS_CF2_TVSPECIAL (SiS_CF2_LCD | SiS_CF2_TV) 74972b676d7Smrg#define SiS_CF2_TVSPECMASK (SiS_CF2_TVPAL | SiS_CF2_TVNTSC | SiS_CF2_TVPALM | SiS_CF2_TVPALN) 75072b676d7Smrg#define SiS_CF2_TVHIVISION SiS_CF2_TVPAL 75172b676d7Smrg#define SiS_CF2_TVYPBPR525I SiS_CF2_TVNTSC 75272b676d7Smrg#define SiS_CF2_TVYPBPR525P (SiS_CF2_TVPAL | SiS_CF2_TVNTSC) 75372b676d7Smrg#define SiS_CF2_TVYPBPR625I SiS_CF2_TVPALN 75472b676d7Smrg#define SiS_CF2_TVYPBPR625P (SiS_CF2_TVPALN | SiS_CF2_TVPAL) 75572b676d7Smrg#define SiS_CF2_TVYPBPR750P SiS_CF2_TVPALM 75672b676d7Smrg#define SiS_CF2_TVYPBPR1080I (SiS_CF2_TVPALM | SiS_CF2_TVPAL) 75772b676d7Smrg 75872b676d7Smrg/* AGP stuff for DRI */ 75972b676d7Smrg#define AGP_PAGE_SIZE 4096 76072b676d7Smrg#define AGP_PAGES 2048 /* Default: 2048 pages @ 4096 = 8MB */ 76172b676d7Smrg/* 300 */ 76272b676d7Smrg#define AGP_CMDBUF_PAGES 256 76372b676d7Smrg#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) 76472b676d7Smrg/* 315/330 */ 76572b676d7Smrg#define AGP_VTXBUF_PAGES 512 76672b676d7Smrg#define AGP_VTXBUF_SIZE (AGP_PAGE_SIZE * AGP_VTXBUF_PAGES) 76772b676d7Smrg 76872b676d7Smrg/* Defines for our own vgaHW functions */ 76972b676d7Smrg#define SISVGA_SR_MODE 0x01 77072b676d7Smrg#define SISVGA_SR_FONTS 0x02 77172b676d7Smrg#define SISVGA_SR_CMAP 0x04 77272b676d7Smrg#define SISVGA_SR_ALL (SISVGA_SR_MODE | SISVGA_SR_FONTS | SISVGA_SR_CMAP) 77372b676d7Smrg 77472b676d7Smrg#define SISKGA_FIX_OVERSCAN 1 /* overcan correction required */ 77572b676d7Smrg#define SISKGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning of next scanline/frame */ 77672b676d7Smrg#define SISKGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */ 77772b676d7Smrg 77872b676d7Smrg/* CPU flags (for memcpy() etc.) */ 77972b676d7Smrg#define SIS_CPUFL_LIBC 0x0001 78072b676d7Smrg#define SIS_CPUFL_BI 0x0002 78172b676d7Smrg#define SIS_CPUFL_SSE 0x0004 78272b676d7Smrg#define SIS_CPUFL_MMX 0x0008 78372b676d7Smrg#define SIS_CPUFL_3DNOW 0x0010 78472b676d7Smrg#define SIS_CPUFL_MMX2 0x0020 78572b676d7Smrg#define SIS_CPUFL_BI2 0x0040 78672b676d7Smrg#define SIS_CPUFL_SSE2 0x0080 78772b676d7Smrg#define SIS_CPUFL_FLAG 0x8000 78872b676d7Smrg 78972b676d7Smrg/* Convenience macro for sisfb version checks */ 79072b676d7Smrg#define SISFB_VERSION(a,b,c) ((a << 16) | (b << 8) | c) 79172b676d7Smrg 79272b676d7Smrg/* For backup of register contents */ 79372b676d7Smrgtypedef struct { 79472b676d7Smrg UChar sisRegMiscOut; 79572b676d7Smrg UChar sisRegsATTR[22]; 79672b676d7Smrg UChar sisRegsGR[10]; 79772b676d7Smrg UChar sisDAC[768]; 79872b676d7Smrg UChar sisRegs3C4[0x80]; 799e47418d9Smrg UChar sisRegs3D4[0x100]; 80072b676d7Smrg UChar sisRegs3C2; 80172b676d7Smrg UChar sisCapt[0x60]; 80272b676d7Smrg UChar sisVid[0x50]; 80372b676d7Smrg UChar VBPart1[0x80]; 80472b676d7Smrg UChar VBPart2[0x100]; 80572b676d7Smrg UChar VBPart3[0x50]; 80672b676d7Smrg UChar VBPart4[0x50]; 80772b676d7Smrg UShort ch70xx[64]; 80872b676d7Smrg unsigned int sisMMIO85C0; 80972b676d7Smrg UChar sis6326tv[0x46]; 81072b676d7Smrg unsigned int sisRegsPCI50, sisRegsPCIA0; 81172b676d7Smrg UChar BIOSModeSave; 81272b676d7Smrg} SISRegRec, *SISRegPtr; 81372b676d7Smrg 81472b676d7Smrgtypedef struct _sisModeInfoPtr { 81572b676d7Smrg int width; 81672b676d7Smrg int height; 81772b676d7Smrg int bpp; 81872b676d7Smrg int n; 81972b676d7Smrg struct _sisModeInfoPtr *next; 82072b676d7Smrg} sisModeInfoRec, *sisModeInfoPtr; 82172b676d7Smrg 82272b676d7Smrg/* SISFBLayout (which has nothing to do with sisfb, actually) 82372b676d7Smrg * is mainly there because of DGA. It holds the current layout 82472b676d7Smrg * parameters needed for acceleration and other stuff. When 82572b676d7Smrg * switching mode using DGA, these are set up accordingly and 82672b676d7Smrg * not necessarily match pScrn's. Therefore, driver modules 82772b676d7Smrg * should read these values instead of pScrn's. 82872b676d7Smrg */ 82972b676d7Smrgtypedef struct { 83072b676d7Smrg int bitsPerPixel; /* = pScrn->bitsPerPixel */ 83172b676d7Smrg int depth; /* = pScrn->depth */ 83272b676d7Smrg int displayWidth; /* = pScrn->displayWidth */ 83372b676d7Smrg int displayHeight; /* = imageHeight from DGA mode; ONLY WHEN DGA IS ACTIVE!!! */ 83472b676d7Smrg int DGAViewportX; 83572b676d7Smrg int DGAViewportY; 83672b676d7Smrg DisplayModePtr mode; /* = pScrn->currentMode */ 83772b676d7Smrg} SISFBLayout; 83872b676d7Smrg 83972b676d7Smrg/* For extended memcpy() */ 84072b676d7Smrgtypedef void (*vidCopyFunc)(UChar *, const UChar *, int); 84172b676d7Smrg 84272b676d7Smrg#ifdef SISISXORG6899900 84372b676d7Smrg#define SISAGPHTYPE drm_handle_t 84472b676d7Smrg#else 84572b676d7Smrg#define SISAGPHTYPE ULong 84672b676d7Smrg#endif 84772b676d7Smrg 84872b676d7Smrg/* Dual head private entity structure */ 84972b676d7Smrg#ifdef SISDUALHEAD 85072b676d7Smrgtypedef struct { 85172b676d7Smrg ScrnInfoPtr pScrn_1; 85272b676d7Smrg ScrnInfoPtr pScrn_2; 85372b676d7Smrg UChar *BIOS; 85472b676d7Smrg struct SiS_Private *SiS_Pr; 85574c14cd6Smrg#ifdef SISDRI 85672b676d7Smrg SISAGPHTYPE agpHandle; 85772b676d7Smrg ULong agpAddr; 85872b676d7Smrg UChar *agpBase; 85972b676d7Smrg unsigned int agpSize; 86072b676d7Smrg unsigned int agpWantedSize; 86172b676d7Smrg unsigned int agpWantedPages; 86272b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 86372b676d7Smrg UChar *agpCmdBufBase; 86472b676d7Smrg unsigned int agpCmdBufSize; 86572b676d7Smrg unsigned int agpCmdBufFree; 86672b676d7Smrg ULong agpVtxBufAddr; /* 315/330 series */ 86772b676d7Smrg UChar *agpVtxBufBase; 86872b676d7Smrg unsigned int agpVtxBufSize; 86972b676d7Smrg unsigned int agpVtxBufFree; 87072b676d7Smrg sisRegion agp; 87172b676d7Smrg int drmSubFD; 87272b676d7Smrg#endif 87372b676d7Smrg Bool AGPInitOK; 87472b676d7Smrg int CRT1ModeNo; /* Current display mode for CRT1 */ 87572b676d7Smrg DisplayModePtr CRT1DMode; /* Current display mode for CRT1 */ 87672b676d7Smrg int CRT2ModeNo; /* Current display mode for CRT2 */ 87772b676d7Smrg DisplayModePtr CRT2DMode; /* Current display mode for CRT2 */ 87872b676d7Smrg Bool CRT2ModeSet; /* CRT2 mode has been set */ 87972b676d7Smrg Bool CRT2IsCustom; 88072b676d7Smrg UChar CRT2CR30, CRT2CR31, CRT2CR35, CRT2CR38; 88172b676d7Smrg int refCount; 88272b676d7Smrg int lastInstance; /* number of entities */ 88372b676d7Smrg Bool DisableDual; /* Emergency flag */ 88472b676d7Smrg Bool ErrorAfterFirst; /* Emergency flag: Error after first init -> Abort second */ 88572b676d7Smrg Bool HWCursor; /* Backup master settings for use on slave */ 88672b676d7Smrg Bool TurboQueue; 88772b676d7Smrg int ForceCRT1Type; 88872b676d7Smrg Bool CRT1TypeForced; 88972b676d7Smrg int ForceCRT2Type; 89072b676d7Smrg int OptTVStand; 89172b676d7Smrg int OptTVOver; 89272b676d7Smrg int OptTVSOver; 89372b676d7Smrg int OptROMUsage; 89472b676d7Smrg int OptUseOEM; 89572b676d7Smrg Bool NoAccel; 89672b676d7Smrg Bool useEXA; 89772b676d7Smrg int forceCRT1; 89872b676d7Smrg int DSTN, FSTN; 89972b676d7Smrg Bool XvOnCRT2; 90072b676d7Smrg int maxUsedClock; /* Max used pixelclock on master head */ 90172b676d7Smrg ULong masterFbAddress; /* Framebuffer addresses and sizes */ 90272b676d7Smrg ULong masterFbSize; 90372b676d7Smrg ULong slaveFbAddress; 90472b676d7Smrg ULong slaveFbSize; 9051fd23544Smrg void *FbBase; /* VRAM linear address */ 90672b676d7Smrg UChar *RealFbBase; /* Real VRAM linear address (for DHM, SiS76x UMA skipping) */ 9071fd23544Smrg void *IOBase; /* MMIO linear address */ 90872b676d7Smrg UShort MapCountIOBase; /* map/unmap queue counter */ 90972b676d7Smrg UShort MapCountFbBase; /* map/unmap queue counter */ 91072b676d7Smrg Bool forceUnmapIOBase; /* ignore counter and unmap */ 91172b676d7Smrg Bool forceUnmapFbBase; /* ignore counter and unmap */ 91272b676d7Smrg#ifdef __alpha__ 9131fd23544Smrg void *IOBaseDense; /* MMIO for Alpha platform */ 91472b676d7Smrg UShort MapCountIOBaseDense; 91572b676d7Smrg Bool forceUnmapIOBaseDense; /* ignore counter and unmap */ 91672b676d7Smrg#endif 91772b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 91872b676d7Smrg int chtvlumabandwidthsvideo; 91972b676d7Smrg int chtvlumaflickerfilter; 92072b676d7Smrg int chtvchromabandwidth; 92172b676d7Smrg int chtvchromaflickerfilter; 92272b676d7Smrg int chtvcvbscolor; 92372b676d7Smrg int chtvtextenhance; 92472b676d7Smrg int chtvcontrast; 92572b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridge */ 92672b676d7Smrg int sistvantiflicker; 92772b676d7Smrg int sistvsaturation; 92872b676d7Smrg int sistvcolcalibc; 92972b676d7Smrg int sistvcolcalibf; 93072b676d7Smrg int sistvcfilter; 93172b676d7Smrg int sistvyfilter; 93272b676d7Smrg int tvxpos, tvypos; 93372b676d7Smrg int tvxscale, tvyscale; 93472b676d7Smrg int siscrt1satgain; 93572b676d7Smrg Bool crt1satgaingiven; 93672b676d7Smrg int ForceTVType, SenseYPbPr; 93772b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 93872b676d7Smrg int chtvtype; 93972b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 94072b676d7Smrg UShort tvx, tvy; 94172b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; 94272b676d7Smrg UChar p2_44, p2_45, p2_46; 94372b676d7Smrg unsigned int sistvccbase; 94472b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 94572b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 94672b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 94772b676d7Smrg UShort cursorBufferNum; 94872b676d7Smrg Bool restorebyset; 94972b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven, XvDefAdaptorBlit; 95072b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 95172b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; /* strictly for Xinerama */ 95272b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; /* strictly for Xinerama */ 95372b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; /* strictly for Xinerama */ 95472b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 95572b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 95672b676d7Smrg int curxvcrtnum; 95772b676d7Smrg int UsePanelScaler, CenterLCD; 95872b676d7Smrg int AllowHotkey; 95972b676d7Smrg Bool enablesisctrl; 96072b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 96172b676d7Smrg UChar *RenderAccelArray; 96272b676d7Smrg UChar *FbBase1; 96372b676d7Smrg ULong OnScreenSize1; 96472b676d7Smrg UChar OldMode; 96572b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 96672b676d7Smrg Bool ROM661New; 96772b676d7Smrg Bool HaveXGIBIOS; 96872b676d7Smrg Bool XvUseMemcpy; 96972b676d7Smrg Bool BenchMemCpy; 97072b676d7Smrg Bool HaveFastVidCpy; 97172b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 97272b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 97372b676d7Smrg unsigned int CPUFlags; 97472b676d7Smrg#ifdef SIS_NEED_MAP_IOP 97572b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 9761fd23544Smrg void *IOPBase; /* I/O port linear address */ 97772b676d7Smrg UShort MapCountIOPBase; /* map/unmap queue counter */ 97872b676d7Smrg Bool forceUnmapIOPBase; /* ignore counter and unmap */ 97972b676d7Smrg#endif 98072b676d7Smrg#ifdef SIS_CP 98172b676d7Smrg SIS_CP_H_ENT 98272b676d7Smrg#endif 98372b676d7Smrg} SISEntRec, *SISEntPtr; 98472b676d7Smrg#endif 98572b676d7Smrg 98672b676d7Smrg#define SISPTR(p) ((SISPtr)((p)->driverPrivate)) 98772b676d7Smrg#define XAAPTR(p) ((XAAInfoRecPtr)(SISPTR(p)->AccelInfoPtr)) 98872b676d7Smrg 98972b676d7Smrg/* MergedFB: Relative position */ 99072b676d7Smrgtypedef enum { 99172b676d7Smrg sisLeftOf, 99272b676d7Smrg sisRightOf, 99372b676d7Smrg sisAbove, 99472b676d7Smrg sisBelow, 99572b676d7Smrg sisClone 99672b676d7Smrg} SiSScrn2Rel; 99772b676d7Smrg 99872b676d7Smrgtypedef struct _region { 99972b676d7Smrg int x0,x1,y0,y1; 100072b676d7Smrg} region; 100172b676d7Smrg 100272b676d7Smrgtypedef struct { 100372b676d7Smrg ScrnInfoPtr pScrn; 100472b676d7Smrg pciVideoPtr PciInfo; 100572b676d7Smrg int PciBus, PciDevice, PciFunc; 100621525869Smrg#ifndef XSERVER_LIBPCIACCESS 100772b676d7Smrg PCITAG PciTag; 100821525869Smrg#endif 100972b676d7Smrg EntityInfoPtr pEnt; 101072b676d7Smrg int Chipset; 101172b676d7Smrg unsigned char ChipType; 101272b676d7Smrg int ChipRev; 101372b676d7Smrg int VGAEngine; /* see above */ 101472b676d7Smrg int hasTwoOverlays; /* Chipset supports two video overlays? */ 101572b676d7Smrg struct SiS_Private *SiS_Pr; /* For mode switching code */ 101672b676d7Smrg int DSTN; /* For 550 FSTN/DSTN; set by option, no detection */ 101772b676d7Smrg ULong FbAddress; /* VRAM physical address (in DHM: for each Fb!) */ 101872b676d7Smrg ULong realFbAddress; /* For DHM/PCI mem mapping: store global FBAddress */ 10191fd23544Smrg void *FbBase; /* VRAM virtual linear address */ 10201fd23544Smrg void *RealFbBase; /* Real VRAM virtual linear address (for DHM and SiS76x UMA skipping) */ 102172b676d7Smrg CARD32 IOAddress; /* MMIO physical address */ 10221fd23544Smrg void *IOBase; /* MMIO linear address */ 102374c14cd6Smrg unsigned long IODBase; /* Base of PIO memory area */ 102472b676d7Smrg#ifdef __alpha__ 10251fd23544Smrg void *IOBaseDense; /* MMIO for Alpha platform */ 102672b676d7Smrg#endif 102772b676d7Smrg SISIOADDRESS RelIO; /* Relocated IO Ports baseaddress */ 102872b676d7Smrg UChar *BIOS; 102972b676d7Smrg int MemClock; 103072b676d7Smrg int BusWidth; 103172b676d7Smrg int MinClock; 103272b676d7Smrg int MaxClock; 103372b676d7Smrg int Flags; /* HW config flags */ 103472b676d7Smrg long FbMapSize; /* Used for Mem Mapping - DON'T CHANGE THIS */ 103572b676d7Smrg long availMem; /* Really available Fb mem (minus TQ, HWCursor) */ 103672b676d7Smrg unsigned int maxxfbmem; /* limit fb memory X is to use to this (KB) */ 103772b676d7Smrg unsigned int sisfbHeapStart; /* heapstart of sisfb (if running) */ 103872b676d7Smrg unsigned int dhmOffset; /* Offset to memory for each head (0 or ..); also used on SiS76x/UMA+LFB */ 103972b676d7Smrg unsigned int FbBaseOffset; 104072b676d7Smrg DGAModePtr DGAModes; 104172b676d7Smrg int numDGAModes; 104272b676d7Smrg Bool DGAactive; 104372b676d7Smrg int DGAViewportStatus; 104472b676d7Smrg UChar OldMode; /* Back old modeNo (if available) */ 104572b676d7Smrg Bool NoAccel; 104672b676d7Smrg Bool NoXvideo; 104772b676d7Smrg Bool XvOnCRT2; /* see sis_opt.c */ 104872b676d7Smrg Bool HWCursor; 104972b676d7Smrg Bool UsePCIRetry; 105072b676d7Smrg Bool TurboQueue; 105172b676d7Smrg int VESA; 105272b676d7Smrg int ForceCRT1Type; 105372b676d7Smrg Bool CRT1Detected, CRT1TypeForced; 105472b676d7Smrg int ForceCRT2Type; 105572b676d7Smrg int OptTVStand; 105672b676d7Smrg int OptTVOver; 105772b676d7Smrg int OptROMUsage; 105872b676d7Smrg int UseCHOverScan; 105972b676d7Smrg Bool ValidWidth; 106072b676d7Smrg Bool FastVram; /* now unused */ 106172b676d7Smrg int forceCRT1; 106272b676d7Smrg Bool CRT1changed; 106372b676d7Smrg UChar oldCR17, oldCR63, oldSR1F; 106472b676d7Smrg UChar oldCR32, oldCR36, oldCR37; 106572b676d7Smrg UChar myCR32, myCR36, myCR37, myCR63; 106672b676d7Smrg UChar newCR32; 106772b676d7Smrg unsigned int VBFlags; /* Video bridge configuration (dynamic) */ 106872b676d7Smrg unsigned int VBFlags2; /* Video bridge configuration 2 (static flags only) */ 106972b676d7Smrg unsigned int VBFlags3, VBFlags4; /* Video bridge configuration 3, 4 (dynamic) */ 107072b676d7Smrg unsigned int VBFlags_backup; /* Backup for SlaveMode-modes */ 107172b676d7Smrg unsigned int VBFlags_backup3; /* Backup for SlaveMode-modes */ 107272b676d7Smrg unsigned int VBFlags_backup4; /* Backup for SlaveMode-modes */ 107372b676d7Smrg unsigned int VBLCDFlags, VBLCDFlags2; 107472b676d7Smrg int ChrontelType; /* CHRONTEL_700x or CHRONTEL_701x */ 107572b676d7Smrg unsigned int PDC, PDCA; /* PanelDelayCompensation */ 107672b676d7Smrg short scrnOffset; /* Screen pitch (data) */ 107772b676d7Smrg short scrnPitch; /* Screen pitch (display; regarding interlace) */ 107872b676d7Smrg short DstColor; 107972b676d7Smrg unsigned int SiS310_AccelDepth; /* used in accel for 315 series */ 108072b676d7Smrg int MaxCMDQueueLen; 108172b676d7Smrg int CurCMDQueueLen; 108272b676d7Smrg int MinCMDQueueLen; 108372b676d7Smrg CARD16 CursorSize; /* Size of HWCursor area (bytes) */ 108472b676d7Smrg CARD32 cursorOffset; /* see sis_driver.c and sis_cursor.c */ 108572b676d7Smrg Bool useEXA; 108672b676d7Smrg void (*InitAccel)(ScrnInfoPtr pScrn); 108772b676d7Smrg void (*SyncAccel)(ScrnInfoPtr pScrn); 108872b676d7Smrg void (*FillRect)(ScrnInfoPtr pScrn, int x, int y, int w, int h, int color); 108972b676d7Smrg void (*BlitRect)(ScrnInfoPtr pScrn, int srcx, int srcy, int dstx, int dsty, 109072b676d7Smrg int w, int h, int color); 109172b676d7Smrg int CommandReg; 109272b676d7Smrg Bool ClipEnabled; 109372b676d7Smrg int Xdirection; /* for temp use in accel */ 109472b676d7Smrg int Ydirection; /* for temp use in accel */ 109572b676d7Smrg#ifdef SIS_USE_XAA 109672b676d7Smrg XAAInfoRecPtr AccelInfoPtr; 109772b676d7Smrg UChar *XAAScanlineColorExpandBuffers[2]; 109872b676d7Smrg Bool DoColorExpand; 109972b676d7Smrg Bool ColorExpandBusy; 110072b676d7Smrg int xcurrent; /* for temp use in accel */ 110172b676d7Smrg int ycurrent; /* for temp use in accel */ 110272b676d7Smrg int sisPatternReg[4]; 110372b676d7Smrg int ROPReg; 110472b676d7Smrg#endif 110572b676d7Smrg#ifdef SIS_USE_EXA 110672b676d7Smrg ExaDriverPtr EXADriverPtr; 110772b676d7Smrg int fillPitch, fillBpp; 110872b676d7Smrg CARD32 fillDstBase; 110972b676d7Smrg int copyBpp; 111072b676d7Smrg int copySPitch, copyDPitch; 111172b676d7Smrg CARD32 copySrcBase, copyDstBase; 111272b676d7Smrg int copyXdir, copyYdir; 111372b676d7Smrg ExaOffscreenArea * exa_scratch; 111472b676d7Smrg unsigned int exa_scratch_next; 111572b676d7Smrg#endif 111672b676d7Smrg Bool alphaBlitBusy; 111772b676d7Smrg SISRegRec SavedReg; 111872b676d7Smrg SISRegRec ModeReg; 111972b676d7Smrg xf86CursorInfoPtr CursorInfoPtr; 112072b676d7Smrg CloseScreenProcPtr CloseScreen; 112172b676d7Smrg Bool (*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode); 112272b676d7Smrg void (*SiSSave)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 112372b676d7Smrg void (*SiSRestore)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 112472b676d7Smrg int cmdQueueLen; /* Current cmdQueueLength (for 2D and 3D) */ 112572b676d7Smrg unsigned int *cmdQueueBase; 112672b676d7Smrg int *cmdQueueLenPtr; /* Ptr to variable holding the current queue length */ 112772b676d7Smrg int *cmdQueueLenPtrBackup; /* Backup for DRI init/restore */ 112872b676d7Smrg unsigned int cmdQueueOffset; 112972b676d7Smrg unsigned int cmdQueueSize; 113072b676d7Smrg unsigned int cmdQueueSizeMask; 113172b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 113272b676d7Smrg unsigned int *cmdQ_SharedWritePort; 113372b676d7Smrg unsigned int *cmdQ_SharedWritePortBackup; 113472b676d7Smrg unsigned int cmdQueueSize_div2; 113572b676d7Smrg unsigned int cmdQueueSize_div4; 113672b676d7Smrg unsigned int cmdQueueSize_4_3; 113774c14cd6Smrg#ifdef SISDRI 113872b676d7Smrg SISAGPHTYPE agpHandle; 113972b676d7Smrg ULong agpAddr; 114072b676d7Smrg UChar *agpBase; 114172b676d7Smrg unsigned int agpSize; 114272b676d7Smrg unsigned int agpWantedSize; 114372b676d7Smrg unsigned int agpWantedPages; 114472b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 114572b676d7Smrg UChar *agpCmdBufBase; 114672b676d7Smrg unsigned int agpCmdBufSize; 114772b676d7Smrg unsigned int agpCmdBufFree; 114872b676d7Smrg ULong agpVtxBufAddr; /* 315 series */ 114972b676d7Smrg UChar *agpVtxBufBase; 115072b676d7Smrg unsigned int agpVtxBufSize; 115172b676d7Smrg unsigned int agpVtxBufFree; 115272b676d7Smrg sisRegion agp; 115372b676d7Smrg#endif 115472b676d7Smrg Bool AGPInitOK; 115572b676d7Smrg Bool irqEnabled; 115672b676d7Smrg int irq; 115772b676d7Smrg Bool IsAGPCard, IsPCIExpress; 115872b676d7Smrg unsigned int DRIheapstart, DRIheapend; 115972b676d7Smrg Bool NeedFlush; /* Need to flush cmd buf mem (760) */ 116072b676d7Smrg 116172b676d7Smrg#ifdef SIS_USE_XAA 116272b676d7Smrg void (*RenderCallback)(ScrnInfoPtr); 116372b676d7Smrg Time RenderTime; 116472b676d7Smrg FBLinearPtr AccelLinearScratch; 116572b676d7Smrg#endif 116672b676d7Smrg#ifdef SIS_USE_EXA 116772b676d7Smrg void (*ExaRenderCallback)(ScrnInfoPtr); 116872b676d7Smrg Time ExaRenderTime; 116972b676d7Smrg#endif 117072b676d7Smrg UChar *RenderAccelArray; 117172b676d7Smrg Bool doRender; 117272b676d7Smrg 117372b676d7Smrg int ColorExpandRingHead; 117472b676d7Smrg int ColorExpandRingTail; 117572b676d7Smrg int PerColorExpandBufferSize; 117672b676d7Smrg int ColorExpandBufferNumber; 117772b676d7Smrg int ColorExpandBufferCountMask; 117872b676d7Smrg UChar *ColorExpandBufferAddr[32]; 117972b676d7Smrg CARD32 ColorExpandBufferScreenOffset[32]; 118072b676d7Smrg CARD32 ColorExpandBase; 118172b676d7Smrg 118272b676d7Smrg int Rotate, Reflect; 118374c14cd6Smrg void (*PointerMoved)(SCRN_ARG_TYPE arg, int x, int y); 118472b676d7Smrg 118572b676d7Smrg /* ShadowFB support */ 118672b676d7Smrg Bool ShadowFB; 118772b676d7Smrg UChar *ShadowPtr; 118872b676d7Smrg int ShadowPitch; 118972b676d7Smrg 119072b676d7Smrg#ifdef SISUSEDEVPORT 119172b676d7Smrg Bool sisdevportopen; 119272b676d7Smrg#endif 119372b676d7Smrg 119472b676d7Smrg /* DRI */ 119572b676d7Smrg Bool loadDRI; 119674c14cd6Smrg#ifdef SISDRI 119772b676d7Smrg Bool directRenderingEnabled; 119872b676d7Smrg DRIInfoPtr pDRIInfo; 119972b676d7Smrg int drmSubFD; 120072b676d7Smrg SISRegRec DRContextRegs; 120172b676d7Smrg#endif 120272b676d7Smrg 120372b676d7Smrg /* Xv */ 120472b676d7Smrg XF86VideoAdaptorPtr adaptor; 120572b676d7Smrg XF86VideoAdaptorPtr blitadaptor; 120672b676d7Smrg void *blitPriv; 120772b676d7Smrg ScreenBlockHandlerProcPtr BlockHandler; 120872b676d7Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 120972b676d7Smrg void (*ResetXv)(ScrnInfoPtr); 121072b676d7Smrg void (*ResetXvDisplay)(ScrnInfoPtr); 121172b676d7Smrg void (*ResetXvGamma)(ScrnInfoPtr); 121272b676d7Smrg 121372b676d7Smrg /* misc */ 121472b676d7Smrg OptionInfoPtr Options; 121572b676d7Smrg UChar BIOSModeSave; 121672b676d7Smrg int CRT1off; /* 1=CRT1 off, 0=CRT1 on */ 121772b676d7Smrg CARD16 LCDheight; /* Vertical resolution of LCD panel */ 121872b676d7Smrg CARD16 LCDwidth; /* Horizontal resolution of LCD panel */ 121972b676d7Smrg vbeInfoPtr pVbe; /* For VESA mode switching */ 122072b676d7Smrg CARD16 vesamajor; 122172b676d7Smrg CARD16 vesaminor; 122272b676d7Smrg int UseVESA; 122372b676d7Smrg sisModeInfoPtr SISVESAModeList; 122472b676d7Smrg xf86MonPtr monitor; 122572b676d7Smrg CARD16 maxBytesPerScanline; 122672b676d7Smrg CARD32 *pal, *savedPal; 122772b676d7Smrg int mapPhys, mapOff, mapSize; 122872b676d7Smrg int statePage, stateSize, stateMode; 122972b676d7Smrg CARD8 *fonts; 123072b676d7Smrg CARD8 *state, *pstate; 123172b676d7Smrg void *base, *VGAbase; 123272b676d7Smrg#ifdef SISDUALHEAD 123372b676d7Smrg Bool DualHeadMode; /* TRUE if we use dual head mode */ 123472b676d7Smrg Bool SecondHead; /* TRUE is this is the second head */ 123572b676d7Smrg SISEntPtr entityPrivate; /* Ptr to private entity (see above) */ 123672b676d7Smrg Bool SiSXinerama; /* Do we use Xinerama mode? */ 123772b676d7Smrg#endif 123872b676d7Smrg SISFBLayout CurrentLayout; /* Current framebuffer layout */ 123972b676d7Smrg UShort SiS_DDC2_Index; 124072b676d7Smrg UShort SiS_DDC2_Data; 124172b676d7Smrg UShort SiS_DDC2_Clk; 124272b676d7Smrg Bool Primary; /* Display adapter is primary */ 124372b676d7Smrg Bool VGADecodingEnabled; /* a0000 memory adress decoding is enabled */ 124472b676d7Smrg xf86Int10InfoPtr pInt; /* Our int10 */ 124572b676d7Smrg int oldChipset; /* Type of old chipset */ 124672b676d7Smrg int RealVideoRam; /* 6326 can only address 4MB, but TQ can be above */ 124772b676d7Smrg CARD32 CmdQueLenMask; /* Mask of queue length in MMIO register */ 124872b676d7Smrg CARD32 CmdQueLenFix; /* Fix value to subtract from QueLen (530/620) */ 124972b676d7Smrg CARD32 CmdQueMaxLen; /* (6326/5597/5598) Amount of cmds the queue can hold */ 125072b676d7Smrg CARD32 TurboQueueLen; /* For future use */ 125172b676d7Smrg CARD32 detectedCRT2Devices; /* detected CRT2 devices before mask-out */ 125272b676d7Smrg Bool HostBus; /* Enable/disable 5597/5598 host bus */ 125372b676d7Smrg Bool noInternalModes; /* Use our own default modes? */ 125472b676d7Smrg int OptUseOEM; /* Use internal OEM data? */ 125572b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 125672b676d7Smrg int chtvlumabandwidthsvideo; 125772b676d7Smrg int chtvlumaflickerfilter; 125872b676d7Smrg int chtvchromabandwidth; 125972b676d7Smrg int chtvchromaflickerfilter; 126072b676d7Smrg int chtvcvbscolor; 126172b676d7Smrg int chtvtextenhance; 126272b676d7Smrg int chtvcontrast; 126372b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridges */ 126472b676d7Smrg int sistvantiflicker; 126572b676d7Smrg int sistvsaturation; 126672b676d7Smrg int sistvcolcalibc; 126772b676d7Smrg int sistvcolcalibf; 126872b676d7Smrg int sistvcfilter; 126972b676d7Smrg int sistvyfilter; 127072b676d7Smrg int OptTVSOver; /* Chrontel 7005: Superoverscan */ 127172b676d7Smrg int tvxpos, tvypos; 127272b676d7Smrg int tvxscale, tvyscale; 127372b676d7Smrg int SiS6326Flags; /* SiS6326 TV settings */ 127472b676d7Smrg int sis6326enableyfilter; 127572b676d7Smrg int sis6326yfilterstrong; 127672b676d7Smrg int sis6326tvplug; 127772b676d7Smrg int sis6326fscadjust; 127872b676d7Smrg Bool sisfbfound; 127972b676d7Smrg Bool donttrustpdc; /* Don't trust the detected PDC */ 128072b676d7Smrg UChar sisfbpdc, sisfbpdca; 128172b676d7Smrg UChar sisfblcda; 128272b676d7Smrg int sisfbscalelcd; 128372b676d7Smrg unsigned int sisfbspecialtiming; 128472b676d7Smrg Bool sisfb_haveemi, sisfb_haveemilcd, sisfb_tvposvalid, sisfb_havelock; 128572b676d7Smrg UChar sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; 128672b676d7Smrg int sisfb_tvxpos, sisfb_tvypos; 128772b676d7Smrg int siscrt1satgain; 128872b676d7Smrg Bool crt1satgaingiven; 128972b676d7Smrg Bool sisfbHaveNewHeapDef; 129072b676d7Smrg unsigned int sisfbHeapSize, sisfbVideoOffset; 129172b676d7Smrg Bool sisfbxSTN; 129272b676d7Smrg unsigned int sisfbDSTN, sisfbFSTN; 129372b676d7Smrg Bool sisfbcanpost, sisfbcardposted, sisfbprimary; 129472b676d7Smrg char sisfbdevname[16]; 129572b676d7Smrg int EMI; 129672b676d7Smrg int PRGB; 129772b676d7Smrg int NoYV12; /* Disable Xv YV12 support (old series) */ 129872b676d7Smrg UChar postVBCR32; 129972b676d7Smrg int newFastVram; /* Replaces FastVram */ 130072b676d7Smrg int ForceTVType, SenseYPbPr; 130172b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 130272b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 130372b676d7Smrg ULong lockcalls; /* Count unlock calls for debug */ 130472b676d7Smrg UShort tvx, tvy; /* Backup TV position registers */ 130572b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; /* Backup TV position registers */ 130672b676d7Smrg UShort tvx1, tvx2, tvx3, tvy1; /* Backup TV position registers */ 130772b676d7Smrg UChar p2_44, p2_45, p2_46; 130872b676d7Smrg unsigned int sistvccbase; 130972b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 131072b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 131172b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 131272b676d7Smrg Bool ForceCursorOff; 131372b676d7Smrg Bool HaveCustomModes; 131472b676d7Smrg Bool IsCustom; 131572b676d7Smrg DisplayModePtr backupmodelist; 131672b676d7Smrg int chtvtype; 131772b676d7Smrg Atom xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation; 131872b676d7Smrg Atom xvAutopaintColorKey, xvSetDefaults, xvSwitchCRT; 131972b676d7Smrg Atom xvDisableGfx, xvDisableGfxLR, xvTVXPosition, xvTVYPosition; 132072b676d7Smrg Atom xvDisableColorkey, xvUseChromakey, xvChromaMin, xvChromaMax; 132172b676d7Smrg Atom xvInsideChromakey, xvYUVChromakey, xvVSync; 132272b676d7Smrg#ifdef SISDEINT 132372b676d7Smrg Atom xvdeintmeth; 132472b676d7Smrg#endif 132572b676d7Smrg Atom xvGammaRed, xvGammaGreen, xvGammaBlue; 132672b676d7Smrg#ifdef XV_SD_DEPRECATED 132772b676d7Smrg Atom xv_QVF, xv_QVV, xv_USD, xv_SVF, xv_QDD, xv_TAF, xv_TSA, xv_TEE, xv_GSF; 132872b676d7Smrg Atom xv_TTE, xv_TCO, xv_TCC, xv_TCF, xv_TLF, xv_CMD, xv_CMDR, xv_CT1, xv_SGA; 132972b676d7Smrg Atom xv_GDV, xv_GHI, xv_OVR, xv_GBI, xv_TXS, xv_TYS, xv_CFI, xv_COC, xv_COF; 133072b676d7Smrg Atom xv_YFI, xv_GSS, xv_BRR, xv_BRG, xv_BRB, xv_PBR, xv_PBG, xv_PBB, xv_SHC; 133172b676d7Smrg Atom xv_BRR2, xv_BRG2, xv_BRB2, xv_PBR2, xv_PBG2, xv_PBB2, xv_PMD, xv_RDT; 133272b676d7Smrg Atom xv_GARC2,xv_GAGC2,xv_GABC2, xv_GSF2; 133372b676d7Smrg Atom xv_BRRC2, xv_BRGC2, xv_BRBC2, xv_PBRC2, xv_PBGC2, xv_PBBC2; 133472b676d7Smrg#ifdef TWDEBUG 133572b676d7Smrg Atom xv_STR; 133672b676d7Smrg#endif 133772b676d7Smrg unsigned int xv_sd_result; 133872b676d7Smrg#endif /* XV_SD_DEPRECATED */ 133972b676d7Smrg int xv_sisdirectunlocked; 134072b676d7Smrg int SiS76xLFBSize; 134172b676d7Smrg int SiS76xUMASize; 134272b676d7Smrg int CRT1isoff; 134372b676d7Smrg ULong UMAsize, LFBsize; /* For SiSCtrl extension info only */ 134472b676d7Smrg#ifdef SIS_CP 134572b676d7Smrg SIS_CP_H 134672b676d7Smrg#endif 134772b676d7Smrg ULong ChipFlags; 134872b676d7Smrg ULong SiS_SD_Flags, SiS_SD2_Flags, SiS_SD3_Flags, SiS_SD4_Flags; 134972b676d7Smrg Bool UseHWARGBCursor; 135072b676d7Smrg int OptUseColorCursor; 135172b676d7Smrg int OptUseColorCursorBlend; 135272b676d7Smrg CARD32 OptColorCursorBlendThreshold; 135372b676d7Smrg UShort cursorBufferNum; 135472b676d7Smrg int vb; 135572b676d7Smrg Bool restorebyset; 135672b676d7Smrg Bool nocrt2ddcdetection; 135772b676d7Smrg Bool forcecrt2redetection; 135872b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven; 135972b676d7Smrg int XvDefCon, XvDefBri, XvDefHue, XvDefSat; 136072b676d7Smrg Bool XvDefDisableGfx, XvDefDisableGfxLR, XvDefAdaptorBlit; 136172b676d7Smrg Bool XvUseMemcpy; 136272b676d7Smrg Bool XvUseChromaKey, XvDisableColorKey; 136372b676d7Smrg Bool XvInsideChromaKey, XvYUVChromaKey; 136472b676d7Smrg int XvChromaMin, XvChromaMax; 136572b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 136672b676d7Smrg int XvGammaRedDef, XvGammaGreenDef, XvGammaBlueDef; 136772b676d7Smrg CARD8 XvGammaRampRed[256], XvGammaRampGreen[256], XvGammaRampBlue[256]; 136872b676d7Smrg Bool disablecolorkeycurrent; 136972b676d7Smrg CARD32 colorKey; 137072b676d7Smrg CARD32 MiscFlags; 137172b676d7Smrg int UsePanelScaler, CenterLCD; 137272b676d7Smrg float zClearVal; 137372b676d7Smrg ULong bClrColor, dwColor; 137472b676d7Smrg int AllowHotkey; 137572b676d7Smrg Bool enablesisctrl; 137672b676d7Smrg short Video_MaxWidth, Video_MaxHeight; 137772b676d7Smrg int FSTN; 137872b676d7Smrg Bool AddedPlasmaModes; 137972b676d7Smrg short scrnPitch2; 138072b676d7Smrg CARD32 CurFGCol, CurBGCol; 138172b676d7Smrg UChar *CurMonoSrc; 138272b676d7Smrg CARD32 *CurARGBDest; 138372b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; 138472b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 138572b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 138672b676d7Smrg Bool HideHWCursor; /* Custom application */ 138772b676d7Smrg Bool HWCursorIsVisible; 138872b676d7Smrg unsigned int HWCursorBackup[16]; 138972b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 139072b676d7Smrg ULong mmioSize; 139172b676d7Smrg Bool ROM661New; 139272b676d7Smrg Bool HaveXGIBIOS; 139372b676d7Smrg Bool NewCRLayout; 139472b676d7Smrg Bool skipswitchcheck; 139572b676d7Smrg unsigned int VBFlagsInit; 139672b676d7Smrg DisplayModePtr currentModeLast; 139774c14cd6Smrg unsigned long MyPIOOffset; 139872b676d7Smrg Bool OverruleRanges; 139972b676d7Smrg Bool BenchMemCpy; 140072b676d7Smrg Bool NeedCopyFastVidCpy; 140172b676d7Smrg Bool SiSFastVidCopyDone; 140272b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 140372b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 140472b676d7Smrg unsigned int CPUFlags; 140572b676d7Smrg#ifndef SISCHECKOSSSE 140672b676d7Smrg Bool XvSSEMemcpy; 140772b676d7Smrg#endif 140872b676d7Smrg char messagebuffer[64]; 140972b676d7Smrg unsigned int VGAMapSize; /* SiSVGA stuff */ 141072b676d7Smrg ULong VGAMapPhys; 141172b676d7Smrg void *VGAMemBase; /* mapped */ 141272b676d7Smrg Bool VGAPaletteEnabled; 141372b676d7Smrg Bool VGACMapSaved; 141472b676d7Smrg Bool CRT2SepGamma; /* CRT2 separate gamma stuff */ 141572b676d7Smrg int *crt2cindices; 141672b676d7Smrg LOCO *crt2gcolortable, *crt2colors; 141772b676d7Smrg int CRT2ColNum; 141872b676d7Smrg float GammaR2, GammaG2, GammaB2; 141972b676d7Smrg int GammaR2i, GammaG2i, GammaB2i; 142072b676d7Smrg int GammaBriR2, GammaBriG2, GammaBriB2; 142172b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; 142272b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; 142372b676d7Smrg float NewGammaBriR2, NewGammaBriG2, NewGammaBriB2; 142472b676d7Smrg float NewGammaConR2, NewGammaConG2, NewGammaConB2; 142572b676d7Smrg ExtensionEntry *SiSCtrlExtEntry; 142672b676d7Smrg char devsectname[32]; 142772b676d7Smrg Bool SCLogQuiet; 142872b676d7Smrg#ifdef SIS_NEED_MAP_IOP 142972b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 14301fd23544Smrg void *IOPBase; /* I/O port linear address */ 143172b676d7Smrg#endif 143272b676d7Smrg#ifdef SISMERGED 143372b676d7Smrg Bool MergedFB, MergedFBAuto; 143472b676d7Smrg SiSScrn2Rel CRT2Position; 143572b676d7Smrg char *CRT2HSync; 143672b676d7Smrg char *CRT2VRefresh; 143772b676d7Smrg char *MetaModes; 143872b676d7Smrg ScrnInfoPtr CRT2pScrn; 143972b676d7Smrg DisplayModePtr CRT1Modes; 144072b676d7Smrg DisplayModePtr CRT1CurrentMode; 144172b676d7Smrg int CRT1frameX0; 144272b676d7Smrg int CRT1frameY0; 144372b676d7Smrg int CRT1frameX1; 144472b676d7Smrg int CRT1frameY1; 144572b676d7Smrg Bool CheckForCRT2; 144672b676d7Smrg Bool IsCustomCRT2; 144772b676d7Smrg Bool HaveCustomModes2; 144872b676d7Smrg int maxCRT1_X1, maxCRT1_X2, maxCRT1_Y1, maxCRT1_Y2; 144972b676d7Smrg int maxCRT2_X1, maxCRT2_X2, maxCRT2_Y1, maxCRT2_Y2; 145072b676d7Smrg int maxClone_X1, maxClone_X2, maxClone_Y1, maxClone_Y2; 145172b676d7Smrg int MergedFBXDPI, MergedFBYDPI; 145272b676d7Smrg int CRT1XOffs, CRT1YOffs, CRT2XOffs, CRT2YOffs; 145372b676d7Smrg int MBXNR1XMAX, MBXNR1YMAX, MBXNR2XMAX, MBXNR2YMAX; 145472b676d7Smrg Bool NonRect, HaveNonRect, HaveOffsRegions, MouseRestrictions; 145572b676d7Smrg region NonRectDead, OffDead1, OffDead2; 145672b676d7Smrg#ifdef SISXINERAMA 145772b676d7Smrg Bool UseSiSXinerama; 145872b676d7Smrg Bool CRT2IsScrn0; 145972b676d7Smrg ExtensionEntry *XineramaExtEntry; 146072b676d7Smrg int SiSXineramaVX, SiSXineramaVY; 146172b676d7Smrg Bool AtLeastOneNonClone; 146272b676d7Smrg#endif 146372b676d7Smrg#endif 146472b676d7Smrg} SISRec, *SISPtr; 146572b676d7Smrg 146672b676d7Smrgtypedef struct _ModeInfoData { 146772b676d7Smrg int mode; 146872b676d7Smrg VbeModeInfoBlock *data; 146972b676d7Smrg VbeCRTCInfoBlock *block; 147072b676d7Smrg} ModeInfoData; 147172b676d7Smrg 147272b676d7Smrg#define SDMPTR(x) ((SiSMergedDisplayModePtr)(x->currentMode->Private)) 147372b676d7Smrg#define CDMPTR ((SiSMergedDisplayModePtr)(pSiS->CurrentLayout.mode->Private)) 147472b676d7Smrg 147572b676d7Smrg#define BOUND(test,low,hi) \ 147672b676d7Smrg { \ 147772b676d7Smrg if((test) < (low)) (test) = (low); \ 147872b676d7Smrg if((test) > (hi)) (test) = (hi); \ 147972b676d7Smrg } 148072b676d7Smrg 148172b676d7Smrg#define REBOUND(low,hi,test) \ 148272b676d7Smrg { \ 148372b676d7Smrg if((test) < (low)) { \ 148472b676d7Smrg (hi) += (test)-(low); \ 148572b676d7Smrg (low) = (test); \ 148672b676d7Smrg } \ 148772b676d7Smrg if((test) > (hi)) { \ 148872b676d7Smrg (low) += (test)-(hi); \ 148972b676d7Smrg (hi) = (test); \ 149072b676d7Smrg } \ 149172b676d7Smrg } 149272b676d7Smrg 149372b676d7Smrgtypedef struct _MergedDisplayModeRec { 149472b676d7Smrg DisplayModePtr CRT1; 149572b676d7Smrg DisplayModePtr CRT2; 149672b676d7Smrg SiSScrn2Rel CRT2Position; 149772b676d7Smrg} SiSMergedDisplayModeRec, *SiSMergedDisplayModePtr; 149872b676d7Smrg 149972b676d7Smrgtypedef struct _myhddctiming { 150072b676d7Smrg int whichone; 150172b676d7Smrg UChar mask; 150272b676d7Smrg float rate; 150372b676d7Smrg} myhddctiming; 150472b676d7Smrg 150572b676d7Smrgtypedef struct _myvddctiming { 150672b676d7Smrg int whichone; 150772b676d7Smrg UChar mask; 150872b676d7Smrg int rate; 150972b676d7Smrg} myvddctiming; 151072b676d7Smrg 151172b676d7Smrgtypedef struct _pdctable { 151272b676d7Smrg int subsysVendor; 151372b676d7Smrg int subsysCard; 151472b676d7Smrg int pdc; 151572b676d7Smrg char *vendorName; 151672b676d7Smrg char *cardName; 151772b676d7Smrg} pdctable; 151872b676d7Smrg 151972b676d7Smrgtypedef struct _chswtable { 152072b676d7Smrg int subsysVendor; 152172b676d7Smrg int subsysCard; 152272b676d7Smrg char *vendorName; 152372b676d7Smrg char *cardName; 152472b676d7Smrg} chswtable; 152572b676d7Smrg 152672b676d7Smrgtypedef struct _customttable { 152772b676d7Smrg UShort chipID; 152872b676d7Smrg char *biosversion; 152972b676d7Smrg char *biosdate; 153072b676d7Smrg CARD32 bioschksum; 153172b676d7Smrg UShort biosFootprintAddr[5]; 153272b676d7Smrg UChar biosFootprintData[5]; 153372b676d7Smrg UShort pcisubsysvendor; 153472b676d7Smrg UShort pcisubsyscard; 153572b676d7Smrg char *vendorName; 153672b676d7Smrg char *cardName; 153772b676d7Smrg ULong SpecialID; 153872b676d7Smrg char *optionName; 153972b676d7Smrg} customttable; 154072b676d7Smrg 154172b676d7Smrg#ifdef SISMERGED 154272b676d7Smrg#ifdef SISXINERAMA 154372b676d7Smrgtypedef struct _SiSXineramaData { 154472b676d7Smrg int x; 154572b676d7Smrg int y; 154672b676d7Smrg int width; 154772b676d7Smrg int height; 154872b676d7Smrg} SiSXineramaData; 154972b676d7Smrg#endif 155072b676d7Smrg#endif 155172b676d7Smrg 155272b676d7Smrgextern const customttable SiS_customttable[]; 155372b676d7Smrg 155472b676d7Smrg/* prototypes */ 155572b676d7Smrg 155672b676d7Smrgextern void sisSaveUnlockExtRegisterLock(SISPtr pSiS, UChar *reg1, UChar *reg2); 155772b676d7Smrgextern void sisRestoreExtRegisterLock(SISPtr pSiS, UChar reg1, UChar reg2); 155872b676d7Smrgextern void SiSOptions(ScrnInfoPtr pScrn); 155972b676d7Smrgextern const OptionInfoRec * SISAvailableOptions(int chipid, int busid); 156072b676d7Smrgextern void SiSSetup(ScrnInfoPtr pScrn); 156172b676d7Smrgextern void SISVGAPreInit(ScrnInfoPtr pScrn); 156272b676d7Smrgextern Bool SiSHWCursorInit(ScreenPtr pScreen); 156372b676d7Smrgextern Bool SiSAccelInit(ScreenPtr pScreen); 156472b676d7Smrgextern Bool SiS300AccelInit(ScreenPtr pScreen); 156572b676d7Smrgextern Bool SiS530AccelInit(ScreenPtr pScreen); 156672b676d7Smrgextern Bool SiS315AccelInit(ScreenPtr pScreen); 156772b676d7Smrgextern void SISInitVideo(ScreenPtr pScreen); 156872b676d7Smrgextern void SIS6326InitVideo(ScreenPtr pScreen); 156972b676d7Smrgextern Bool SISDGAInit(ScreenPtr pScreen); 157072b676d7Smrg 157172b676d7Smrg/* For extended mempy() support */ 157272b676d7Smrgextern unsigned int SiSGetCPUFlags(ScrnInfoPtr pScrn); 157372b676d7Smrgextern vidCopyFunc SiSVidCopyInit(ScreenPtr pScreen, vidCopyFunc *UMemCpy, Bool from); 157472b676d7Smrgextern vidCopyFunc SiSVidCopyGetDefault(void); 157572b676d7Smrg 157672b676d7Smrgextern void SiSMemCopyToVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 157772b676d7Smrgextern void SiSMemCopyFromVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 157872b676d7Smrg 157972b676d7Smrgextern void SiS_SetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn, int val); 158072b676d7Smrgextern void SiS_SetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn, int val); 158172b676d7Smrgextern void SiS_SetCHTVlumaflickerfilter(ScrnInfoPtr pScrn, int val); 158272b676d7Smrgextern void SiS_SetCHTVchromabandwidth(ScrnInfoPtr pScrn, int val); 158372b676d7Smrgextern void SiS_SetCHTVchromaflickerfilter(ScrnInfoPtr pScrn, int val); 158472b676d7Smrgextern void SiS_SetCHTVcvbscolor(ScrnInfoPtr pScrn, int val); 158572b676d7Smrgextern void SiS_SetCHTVtextenhance(ScrnInfoPtr pScrn, int val); 158672b676d7Smrgextern void SiS_SetCHTVcontrast(ScrnInfoPtr pScrn, int val); 158772b676d7Smrgextern void SiS_SetSISTVedgeenhance(ScrnInfoPtr pScrn, int val); 158872b676d7Smrgextern void SiS_SetSISTVantiflicker(ScrnInfoPtr pScrn, int val); 158972b676d7Smrgextern void SiS_SetSISTVsaturation(ScrnInfoPtr pScrn, int val); 159072b676d7Smrgextern void SiS_SetSISTVcfilter(ScrnInfoPtr pScrn, int val); 159172b676d7Smrgextern void SiS_SetSISTVyfilter(ScrnInfoPtr pScrn, int val); 159272b676d7Smrgextern void SiS_SetSISTVcolcalib(ScrnInfoPtr pScrn, int val, Bool coarse); 159372b676d7Smrgextern void SiS_SetSIS6326TVantiflicker(ScrnInfoPtr pScrn, int val); 159472b676d7Smrgextern void SiS_SetSIS6326TVenableyfilter(ScrnInfoPtr pScrn, int val); 159572b676d7Smrgextern void SiS_SetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn, int val); 159672b676d7Smrgextern void SiS_SetTVxposoffset(ScrnInfoPtr pScrn, int val); 159772b676d7Smrgextern void SiS_SetTVyposoffset(ScrnInfoPtr pScrn, int val); 159872b676d7Smrgextern void SiS_SetTVxscale(ScrnInfoPtr pScrn, int val); 159972b676d7Smrgextern void SiS_SetTVyscale(ScrnInfoPtr pScrn, int val); 160072b676d7Smrgextern int SiS_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn); 160172b676d7Smrgextern int SiS_GetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn); 160272b676d7Smrgextern int SiS_GetCHTVlumaflickerfilter(ScrnInfoPtr pScrn); 160372b676d7Smrgextern int SiS_GetCHTVchromabandwidth(ScrnInfoPtr pScrn); 160472b676d7Smrgextern int SiS_GetCHTVchromaflickerfilter(ScrnInfoPtr pScrn); 160572b676d7Smrgextern int SiS_GetCHTVcvbscolor(ScrnInfoPtr pScrn); 160672b676d7Smrgextern int SiS_GetCHTVtextenhance(ScrnInfoPtr pScrn); 160772b676d7Smrgextern int SiS_GetCHTVcontrast(ScrnInfoPtr pScrn); 160872b676d7Smrgextern int SiS_GetSISTVedgeenhance(ScrnInfoPtr pScrn); 160972b676d7Smrgextern int SiS_GetSISTVantiflicker(ScrnInfoPtr pScrn); 161072b676d7Smrgextern int SiS_GetSISTVsaturation(ScrnInfoPtr pScrn); 161172b676d7Smrgextern int SiS_GetSISTVcfilter(ScrnInfoPtr pScrn); 161272b676d7Smrgextern int SiS_GetSISTVyfilter(ScrnInfoPtr pScrn); 161372b676d7Smrgextern int SiS_GetSISTVcolcalib(ScrnInfoPtr pScrn, Bool coarse); 161472b676d7Smrgextern int SiS_GetSIS6326TVantiflicker(ScrnInfoPtr pScrn); 161572b676d7Smrgextern int SiS_GetSIS6326TVenableyfilter(ScrnInfoPtr pScrn); 161672b676d7Smrgextern int SiS_GetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn); 161772b676d7Smrgextern int SiS_GetTVxposoffset(ScrnInfoPtr pScrn); 161872b676d7Smrgextern int SiS_GetTVyposoffset(ScrnInfoPtr pScrn); 161972b676d7Smrgextern int SiS_GetTVxscale(ScrnInfoPtr pScrn); 162072b676d7Smrgextern int SiS_GetTVyscale(ScrnInfoPtr pScrn); 162172b676d7Smrgextern int SiS_GetSISCRT1SaturationGain(ScrnInfoPtr pScrn); 162272b676d7Smrgextern void SiS_SetSISCRT1SaturationGain(ScrnInfoPtr pScrn, int val); 162372b676d7Smrg 16241fd23544Smrgextern unsigned int sis_pci_read_device_u32(int device, int offset); 16251fd23544Smrgextern unsigned char sis_pci_read_device_u8(int device, int offset); 16261fd23544Smrgextern unsigned int sis_pci_read_host_bridge_u32(int offset); 16271fd23544Smrgextern unsigned char sis_pci_read_host_bridge_u8(int offset); 16281fd23544Smrgextern void sis_pci_write_host_bridge_u8(int offset, unsigned char value); 16291fd23544Smrgextern void sis_pci_write_host_bridge_u32(int offset, unsigned int value); 163072b676d7Smrg#endif /* _SIS_H_ */ 163172b676d7Smrg 163272b676d7Smrg 163372b676d7Smrg 1634