sis.h revision 1fd23544
172b676d7Smrg/* 272b676d7Smrg * Main global data and definitions 372b676d7Smrg * 472b676d7Smrg * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 572b676d7Smrg * 672b676d7Smrg * Redistribution and use in source and binary forms, with or without 772b676d7Smrg * modification, are permitted provided that the following conditions 872b676d7Smrg * are met: 972b676d7Smrg * 1) Redistributions of source code must retain the above copyright 1072b676d7Smrg * notice, this list of conditions and the following disclaimer. 1172b676d7Smrg * 2) Redistributions in binary form must reproduce the above copyright 1272b676d7Smrg * notice, this list of conditions and the following disclaimer in the 1372b676d7Smrg * documentation and/or other materials provided with the distribution. 1472b676d7Smrg * 3) The name of the author may not be used to endorse or promote products 1572b676d7Smrg * derived from this software without specific prior written permission. 1672b676d7Smrg * 1772b676d7Smrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1872b676d7Smrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 1972b676d7Smrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2072b676d7Smrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2172b676d7Smrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2272b676d7Smrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2372b676d7Smrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2472b676d7Smrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2572b676d7Smrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2672b676d7Smrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2772b676d7Smrg * 2872b676d7Smrg * Authors: Thomas Winischhofer <thomas@winischhofer.net> 2972b676d7Smrg * others (old code base) 3072b676d7Smrg * 3172b676d7Smrg */ 3272b676d7Smrg 3372b676d7Smrg#ifndef _SIS_H_ 3472b676d7Smrg#define _SIS_H_ 3572b676d7Smrg 3672b676d7Smrg#include <stdio.h> 3772b676d7Smrg#include <string.h> 3872b676d7Smrg#include <math.h> 3972b676d7Smrg#include <setjmp.h> 401fd23544Smrg#include <unistd.h> 411fd23544Smrg#include <fcntl.h> 421fd23544Smrg#include <sys/ioctl.h> 431fd23544Smrg 441fd23544Smrg#include <sispcirename.h> 4572b676d7Smrg 4672b676d7Smrg#define SISDRIVERVERSIONYEAR 5 4772b676d7Smrg#define SISDRIVERVERSIONMONTH 9 4872b676d7Smrg#define SISDRIVERVERSIONDAY 20 4972b676d7Smrg#define SISDRIVERREVISION 1 5072b676d7Smrg 5172b676d7Smrg#define SISDRIVERIVERSION ((SISDRIVERVERSIONYEAR << 16) | \ 5272b676d7Smrg (SISDRIVERVERSIONMONTH << 8) | \ 5372b676d7Smrg SISDRIVERVERSIONDAY | \ 5472b676d7Smrg (SISDRIVERREVISION << 24)) 5572b676d7Smrg 5672b676d7Smrg#undef SIS_LINUX /* Try to find out whether platform is Linux */ 5772b676d7Smrg#if defined(__GNUC__) && (__GNUC__ >= 4) 5872b676d7Smrg#ifdef __linux__ 5972b676d7Smrg#define SIS_LINUX 6072b676d7Smrg#endif 6172b676d7Smrg#else 6272b676d7Smrg#ifdef linux 6372b676d7Smrg#define SIS_LINUX 6472b676d7Smrg#endif 6572b676d7Smrg#endif 6672b676d7Smrg 6772b676d7Smrg#if 0 6872b676d7Smrg#define TWDEBUG /* for debugging */ 6972b676d7Smrg#endif 7072b676d7Smrg 7172b676d7Smrg#undef SIS_CP 7272b676d7Smrg#if 0 7372b676d7Smrg#include "siscp.H" 7472b676d7Smrg#endif 7572b676d7Smrg 7672b676d7Smrg#include "compiler.h" 7772b676d7Smrg#include "xf86Pci.h" 7872b676d7Smrg#include "xf86Priv.h" 7972b676d7Smrg#include "xf86_OSproc.h" 8072b676d7Smrg#include "xf86Resources.h" 8172b676d7Smrg#include "xf86.h" 8272b676d7Smrg#include "xf86PciInfo.h" 8372b676d7Smrg#include "xf86Cursor.h" 8472b676d7Smrg#include "xf86cmap.h" 8572b676d7Smrg#include "vbe.h" 8672b676d7Smrg 8772b676d7Smrg#define SIS_HaveDriverFuncs 0 8872b676d7Smrg 8972b676d7Smrg#undef SISISXORG6899900 9072b676d7Smrg#ifdef XORG_VERSION_CURRENT 9172b676d7Smrg#include "xorgVersion.h" 9272b676d7Smrg#define SISMYSERVERNAME "X.org" 9372b676d7Smrg#ifndef XF86_VERSION_NUMERIC 9472b676d7Smrg#define XF86_VERSION_NUMERIC(major,minor,patch,snap,dummy) \ 9572b676d7Smrg (((major) * 10000000) + ((minor) * 100000) + ((patch) * 1000) + snap) 9672b676d7Smrg#define XF86_VERSION_CURRENT XF86_VERSION_NUMERIC(4,3,99,902,0) 9772b676d7Smrg#endif 981fd23544Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,900,0) || XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(4,0,0,0,0) 9972b676d7Smrg#define SISISXORG6899900 10072b676d7Smrg#endif 10172b676d7Smrg#if 0 10272b676d7Smrg#ifdef HaveDriverFuncs 10372b676d7Smrg#define SIS_HAVE_DRIVER_FUNC 10472b676d7Smrg#undef SIS_HaveDriverFuncs 10572b676d7Smrg#define SIS_HaveDriverFuncs HaveDriverFuncs 10672b676d7Smrg#endif 10772b676d7Smrg#endif 10872b676d7Smrg#else 10972b676d7Smrg#include "xf86Version.h" 11072b676d7Smrg#define SISMYSERVERNAME "XFree86" 11172b676d7Smrg#endif 11272b676d7Smrg 11372b676d7Smrg#define SIS_NAME "SIS" 11472b676d7Smrg#define SIS_DRIVER_NAME "sis" 1151fd23544Smrg#define SIS_MAJOR_VERSION PACKAGE_VERSION_MAJOR 11672b676d7Smrg#ifdef SISISXORG6899900 1171fd23544Smrg#define SIS_MINOR_VERSION PACKAGE_VERSION_MINOR /* DRI changes */ 1181fd23544Smrg#define SIS_PATCHLEVEL PACKAGE_VERSION_PATCHLEVEL 11972b676d7Smrg#else 12072b676d7Smrg#define SIS_MINOR_VERSION 7 12172b676d7Smrg#define SIS_PATCHLEVEL 1 12272b676d7Smrg#endif 12372b676d7Smrg#define SIS_CURRENT_VERSION ((SIS_MAJOR_VERSION << 16) | \ 12472b676d7Smrg (SIS_MINOR_VERSION << 8) | SIS_PATCHLEVEL ) 12572b676d7Smrg 12672b676d7Smrg#if (XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,0,0)) || (defined(XvExtension)) 12772b676d7Smrg#include "xf86xv.h" 12872b676d7Smrg#include <X11/extensions/Xv.h> 12972b676d7Smrg#endif 13072b676d7Smrg 13172b676d7Smrg/* Platform/architecture related definitions: */ 13272b676d7Smrg 13372b676d7Smrg/* SIS_PC_PLATFORM: Map VGA memory at a0000 and save/restore fonts? */ 13472b676d7Smrg/* List of architectures likely to be incomplete */ 13572b676d7Smrg#define SIS_PC_PLATFORM 13672b676d7Smrg#if defined(__powerpc__) || defined(__mips__) || defined(__arm32__) 13772b676d7Smrg#undef SIS_PC_PLATFORM 13872b676d7Smrg#endif 13972b676d7Smrg 14072b676d7Smrg/* SIS_USE_BIOS_SCRATCH: Save/restore mode number in BIOS scratch area? */ 14172b676d7Smrg#undef SIS_USE_BIOS_SCRATCH 14272b676d7Smrg#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__) 14372b676d7Smrg#define SIS_USE_BIOS_SCRATCH 14472b676d7Smrg#endif 14572b676d7Smrg 14672b676d7Smrg/* SIS_NEED_MAP_IOP: Map i/o port area to virtual memory? */ 14772b676d7Smrg/* List of architectures likely to be incomplete */ 14872b676d7Smrg/* This is BROKEN, see comment in sis_driver.c */ 14972b676d7Smrg#undef SIS_NEED_MAP_IOP 15072b676d7Smrg#if 0 15172b676d7Smrg#if defined(__arm32__) || defined(__mips__) 15272b676d7Smrg#define SIS_NEED_MAP_IOP 15372b676d7Smrg#endif 15472b676d7Smrg#endif 15572b676d7Smrg 15672b676d7Smrg/* SISUSEDEVPORT: Used on architectures without direct inX/outX access. In this case, 15772b676d7Smrg * we use read()/write() to /dev/port. LINUX ONLY! (How can this be done on *BSD?) 15872b676d7Smrg */ 15972b676d7Smrg#undef SISUSEDEVPORT 16072b676d7Smrg#if defined(SIS_LINUX) && (defined(__arm32__) || defined(__mips__)) 16172b676d7Smrg#ifndef SIS_NEED_MAP_IOP 16272b676d7Smrg#define SISUSEDEVPORT 16372b676d7Smrg#endif 16472b676d7Smrg#endif 16572b676d7Smrg 16672b676d7Smrg/* Our #includes: Require the arch/platform dependent #defines above */ 16772b676d7Smrg 16872b676d7Smrg#include "osdef.h" 16972b676d7Smrg#include "vgatypes.h" 17072b676d7Smrg#include "vstruct.h" 17172b676d7Smrg 17272b676d7Smrg#undef SISHAVEDRMWRITE 17372b676d7Smrg#undef SISNEWDRI 17472b676d7Smrg#ifdef XF86DRI 17572b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,3,0) 17672b676d7Smrg#define SISHAVEDRMWRITE 17772b676d7Smrg#endif 17872b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,14,0) 17972b676d7Smrg#define SISNEWDRI 18072b676d7Smrg#endif 18172b676d7Smrg#undef SIS315DRI /* define this if dri is adapted for 315/330 series */ 18272b676d7Smrg#include "xf86drm.h" 18372b676d7Smrg#include "sarea.h" 18472b676d7Smrg#define _XF86DRI_SERVER_ 18572b676d7Smrg#include "dri.h" 18672b676d7Smrg#include "GL/glxint.h" 18772b676d7Smrg#include "sis_dri.h" 18872b676d7Smrg#endif /* XF86DRI */ 18972b676d7Smrg 19072b676d7Smrg/* Configurable stuff: ------------------------------------- */ 19172b676d7Smrg 19272b676d7Smrg#define SISDUALHEAD /* Include Dual Head code */ 19372b676d7Smrg 19472b676d7Smrg#define SISMERGED /* Include Merged-FB code */ 19572b676d7Smrg 19672b676d7Smrg#undef SISXINERAMA 19772b676d7Smrg#ifdef SISMERGED 19872b676d7Smrg#define SISXINERAMA /* Include SiS Pseudo-Xinerama for MergedFB mode */ 19972b676d7Smrg#define SIS_XINERAMA_MAJOR_VERSION 1 20072b676d7Smrg#define SIS_XINERAMA_MINOR_VERSION 1 20172b676d7Smrg#endif 20272b676d7Smrg 20372b676d7Smrg#define SIS_ARGB_CURSOR /* Include code for color hardware cursors */ 20472b676d7Smrg 20572b676d7Smrg#define ENABLE_YPBPR /* Include YPbPr support on SiS bridges (315 series and 661/741/760) */ 20672b676d7Smrg 20772b676d7Smrg#define SISVRAMQ /* Use VRAM queue mode on 315/330/340/XGI series */ 20872b676d7Smrg 20972b676d7Smrg#undef INCL_YUV_BLIT_ADAPTOR 21072b676d7Smrg#ifdef SISVRAMQ 21172b676d7Smrg#define INCL_YUV_BLIT_ADAPTOR /* Include support for YUV->RGB blit adaptors (VRAM queue mode only) */ 21272b676d7Smrg#endif 21372b676d7Smrg 21472b676d7Smrg#if 1 21572b676d7Smrg#define SIS_USE_XAA /* Include code for XAA */ 21672b676d7Smrg#endif 21772b676d7Smrg 21872b676d7Smrg#ifdef SISVRAMQ 21972b676d7Smrg#ifdef XORG_VERSION_CURRENT 22072b676d7Smrg#if defined(SIS_HAVE_EXA) || (defined(XF86EXA) && (XF86EXA != 0)) 22172b676d7Smrg#if 1 22272b676d7Smrg#define SIS_USE_EXA /* Include code for EXA */ 22372b676d7Smrg#endif 22472b676d7Smrg#endif 22572b676d7Smrg#endif 22672b676d7Smrg#endif 22772b676d7Smrg 22872b676d7Smrg#if 0 22972b676d7Smrg#define SISDEINT /* Include Xv deinterlacer code (not functional yet!) */ 23072b676d7Smrg#endif 23172b676d7Smrg 23272b676d7Smrg#if 0 23372b676d7Smrg#define XV_SD_DEPRECATED /* Include deprecated XV SD interface for SiSCtrl */ 23472b676d7Smrg#endif 23572b676d7Smrg 23672b676d7Smrg/* End of configurable stuff --------------------------------- */ 23772b676d7Smrg 23872b676d7Smrg#define UNLOCK_ALWAYS /* Always unlock the registers (should be set!) */ 23972b676d7Smrg 24072b676d7Smrg#if !defined(SIS_USE_XAA) && !defined(SIS_USE_EXA) 24172b676d7Smrg#define SIS_USE_XAA 24272b676d7Smrg#endif 24372b676d7Smrg 24472b676d7Smrg#ifdef SIS_USE_XAA 24572b676d7Smrg#include "xaa.h" 24672b676d7Smrg#endif 24772b676d7Smrg#ifdef SIS_USE_EXA 24872b676d7Smrg#include "exa.h" 24972b676d7Smrg#endif 25072b676d7Smrg 25172b676d7Smrg/* Need that for SiSCtrl and Pseudo-Xinerama */ 25272b676d7Smrg#define NEED_REPLIES /* ? */ 25372b676d7Smrg#define EXTENSION_PROC_ARGS void * 25472b676d7Smrg#include "extnsionst.h" /* required */ 25572b676d7Smrg#include <X11/extensions/panoramiXproto.h> /* required */ 25672b676d7Smrg 25772b676d7Smrg#undef SISCHECKOSSSE 25872b676d7Smrg#ifdef XORG_VERSION_CURRENT 25972b676d7Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0) 26072b676d7Smrg#define SISCHECKOSSSE /* Automatic check OS for SSE; requires SigIll facility */ 26172b676d7Smrg#endif 26272b676d7Smrg#endif 26372b676d7Smrg 26472b676d7Smrg#undef SISGAMMARAMP 26572b676d7Smrg#ifdef XORG_VERSION_CURRENT 26672b676d7Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0) 26772b676d7Smrg#define SISGAMMARAMP /* Driver can set gamma ramp; requires additional symbols in xf86sym.h */ 26872b676d7Smrg#endif 26972b676d7Smrg#endif 27072b676d7Smrg 27172b676d7Smrg#if 0 /* Perhaps for future use */ 27272b676d7Smrg#if 1 27372b676d7Smrg#define SIS_PCI_BUS(a) (a)->bus 27472b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->device 27572b676d7Smrg#define SIS_PCI_FUNC(a) (a)->func 27672b676d7Smrg#define SIS_PCI_TAG(a) pciTag((a)->bus, (a)->device, (a)->func); 27772b676d7Smrg#else 27872b676d7Smrg#define SIS_PCI_BUS(a) (a)->pciid.bus 27972b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->pciid.device 28072b676d7Smrg#define SIS_PCI_FUNC(a) (a)->pciid.func 28172b676d7Smrg#define SIS_PCI_TAG(a) pciTag(&((a)->pciid)); 28272b676d7Smrg#endif 28372b676d7Smrg#endif 28472b676d7Smrg 28572b676d7Smrg#ifdef TWDEBUG 28672b676d7Smrg#define SISVERBLEVEL 3 28772b676d7Smrg#else 28872b676d7Smrg#define SISVERBLEVEL 4 28972b676d7Smrg#endif 29072b676d7Smrg 29172b676d7Smrg/* For SiS315/550/650/740/330/660 - these should be moved elsewhere! */ 29272b676d7Smrg#ifndef PCI_CHIP_SIS315H 29372b676d7Smrg#define PCI_CHIP_SIS315H 0x0310 29472b676d7Smrg#endif 29572b676d7Smrg#ifndef PCI_CHIP_SIS315 29672b676d7Smrg#define PCI_CHIP_SIS315 0x0315 29772b676d7Smrg#endif 29872b676d7Smrg#ifndef PCI_CHIP_SIS315PRO 29972b676d7Smrg#define PCI_CHIP_SIS315PRO 0x0325 30072b676d7Smrg#endif 30172b676d7Smrg#ifndef PCI_CHIP_SIS550 30272b676d7Smrg#define PCI_CHIP_SIS550 0x5315 /* 550_VGA */ 30372b676d7Smrg#endif 30472b676d7Smrg#ifndef PCI_CHIP_SIS650 30572b676d7Smrg#define PCI_CHIP_SIS650 0x6325 /* 650_VGA and 740_VGA */ 30672b676d7Smrg#endif 30772b676d7Smrg#ifndef PCI_CHIP_SIS330 30872b676d7Smrg#define PCI_CHIP_SIS330 0x0330 30972b676d7Smrg#endif 31072b676d7Smrg#ifndef PCI_CHIP_SIS660 31172b676d7Smrg#define PCI_CHIP_SIS660 0x6330 /* 661_VGA, 741_VGA, 760_VGA, 761_VGA */ 31272b676d7Smrg#endif 31372b676d7Smrg#ifndef PCI_CHIP_SIS340 31472b676d7Smrg#define PCI_CHIP_SIS340 0x0340 31572b676d7Smrg#endif 31672b676d7Smrg 31772b676d7Smrg#ifndef PCI_VENDOR_XGI 31872b676d7Smrg#define PCI_VENDOR_XGI 0x18ca 31972b676d7Smrg#endif 32072b676d7Smrg 32172b676d7Smrg#ifndef PCI_CHIP_XGIXG20 32272b676d7Smrg#define PCI_CHIP_XGIXG20 0x0020 32372b676d7Smrg#endif 32472b676d7Smrg 32572b676d7Smrg#ifndef PCI_CHIP_XGIXG40 32672b676d7Smrg#define PCI_CHIP_XGIXG40 0x0040 32772b676d7Smrg#endif 32872b676d7Smrg 32972b676d7Smrg/* pSiS->Flags (old series only) */ 33072b676d7Smrg#define SYNCDRAM 0x00000001 33172b676d7Smrg#define RAMFLAG 0x00000002 33272b676d7Smrg#define ESS137xPRESENT 0x00000004 33372b676d7Smrg#define SECRETFLAG 0x00000008 33472b676d7Smrg#define A6326REVAB 0x00000010 33572b676d7Smrg#define MMIOMODE 0x00010000 33672b676d7Smrg#define LFBQMODE 0x00020000 33772b676d7Smrg#define AGPQMODE 0x00040000 33872b676d7Smrg#define UMA 0x80000000 33972b676d7Smrg 34072b676d7Smrg#define BIOS_BASE 0xC0000 34172b676d7Smrg#define BIOS_SIZE 0x10000 34272b676d7Smrg 34372b676d7Smrg#define SIS_VBFlagsVersion 1 34472b676d7Smrg 34572b676d7Smrg/* pSiS->VBFlags - if anything is changed here, increase VBFlagsVersion! */ 34672b676d7Smrg#define CRT2_DEFAULT 0x00000001 34772b676d7Smrg#define CRT2_LCD 0x00000002 /* Never change the order of the CRT2_XXX entries */ 34872b676d7Smrg#define CRT2_TV 0x00000004 34972b676d7Smrg#define CRT2_VGA 0x00000008 35072b676d7Smrg#define TV_NTSC 0x00000010 35172b676d7Smrg#define TV_PAL 0x00000020 35272b676d7Smrg#define TV_HIVISION 0x00000040 35372b676d7Smrg#define TV_YPBPR 0x00000080 35472b676d7Smrg#define TV_AVIDEO 0x00000100 35572b676d7Smrg#define TV_SVIDEO 0x00000200 35672b676d7Smrg#define TV_SCART 0x00000400 35772b676d7Smrg#define OLDVB_CONEXANT 0x00000800 /* Definition deprecated (now VBFlags2) */ 35872b676d7Smrg#define OLDVB_TRUMPION OLDVB_CONEXANT /* Definition deprecated (now VBFlags2) */ 35972b676d7Smrg#define TV_PALM 0x00001000 36072b676d7Smrg#define TV_PALN 0x00002000 36172b676d7Smrg#define TV_NTSCJ TV_PALM 36272b676d7Smrg#define OLDVB_302ELV 0x00004000 /* Definition deprecated (now VBFlags2) */ 36372b676d7Smrg#define TV_CHSCART 0x00008000 36472b676d7Smrg#define TV_CHYPBPR525I 0x00010000 36572b676d7Smrg#define CRT1_VGA 0x00000000 /* ZERO - no mask! */ 36672b676d7Smrg#define CRT1_LCDA 0x00020000 36772b676d7Smrg#define VGA2_CONNECTED 0x00040000 36872b676d7Smrg#define DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ 36972b676d7Smrg#define TV_YPBPR625I 0x00100000 37072b676d7Smrg#define TV_YPBPR625P 0x00200000 37172b676d7Smrg#define OLDVB_302B 0x00400000 /* Definition deprecated (now VBFlags2) */ 37272b676d7Smrg#define OLDVB_30xBDH 0x00800000 /* Definition deprecated (now VBFlags2) */ 37372b676d7Smrg#define OLDVB_LVDS 0x01000000 /* Definition deprecated (now VBFlags2) */ 37472b676d7Smrg#define OLDVB_CHRONTEL 0x02000000 /* Definition deprecated (now VBFlags2) */ 37572b676d7Smrg#define OLDVB_301LV 0x04000000 /* Definition deprecated (now VBFlags2) */ 37672b676d7Smrg#define OLDVB_302LV 0x08000000 /* Definition deprecated (now VBFlags2) */ 37772b676d7Smrg#define OLDVB_301C 0x10000000 /* Definition deprecated (now VBFlags2) */ 37872b676d7Smrg#define SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ 37972b676d7Smrg#define MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ 38072b676d7Smrg#define DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ 38172b676d7Smrg 38272b676d7Smrg/* Aliases: */ 38372b676d7Smrg#define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA) 38472b676d7Smrg#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) 38572b676d7Smrg#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR) 38672b676d7Smrg 38772b676d7Smrg/* Only if TV_YPBPR is set: */ 38872b676d7Smrg#define TV_YPBPR525I TV_NTSC 38972b676d7Smrg#define TV_YPBPR525P TV_PAL 39072b676d7Smrg#define TV_YPBPR750P TV_PALM 39172b676d7Smrg#define TV_YPBPR1080I TV_PALN 39272b676d7Smrg#define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | \ 39372b676d7Smrg TV_YPBPR625I | TV_YPBPR625P | \ 39472b676d7Smrg TV_YPBPR750P | TV_YPBPR1080I) 39572b676d7Smrg 39672b676d7Smrg#define TV_YPBPR43LB TV_CHSCART 39772b676d7Smrg#define TV_YPBPR43 TV_CHYPBPR525I 39872b676d7Smrg#define TV_YPBPR169 (TV_CHSCART | TV_CHYPBPR525I) 39972b676d7Smrg#define TV_YPBPRAR (TV_CHSCART | TV_CHYPBPR525I) 40072b676d7Smrg 40172b676d7Smrg#define DISPTYPE_DISP2 CRT2_ENABLE 40272b676d7Smrg#define DISPTYPE_DISP1 DISPTYPE_CRT1 40372b676d7Smrg#define VB_DISPMODE_SINGLE SINGLE_MODE /* alias */ 40472b676d7Smrg#define VB_DISPMODE_MIRROR MIRROR_MODE /* alias */ 40572b676d7Smrg#define VB_DISPMODE_DUAL DUALVIEW_MODE /* alias */ 40672b676d7Smrg#define DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) 40772b676d7Smrg 40872b676d7Smrg/* pSiS->VBFlags2 (static stuff only!) */ 40972b676d7Smrg#define VB2_SISUMC 0x00000001 41072b676d7Smrg#define VB2_301 0x00000002 /* Video bridge type */ 41172b676d7Smrg#define VB2_301B 0x00000004 41272b676d7Smrg#define VB2_301C 0x00000008 41372b676d7Smrg#define VB2_307T 0x00000010 41472b676d7Smrg#define VB2_302B 0x00000800 41572b676d7Smrg#define VB2_301LV 0x00001000 41672b676d7Smrg#define VB2_302LV 0x00002000 41772b676d7Smrg#define VB2_302ELV 0x00004000 41872b676d7Smrg#define VB2_307LV 0x00008000 41972b676d7Smrg#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */ 42072b676d7Smrg#define VB2_CONEXANT 0x10000000 /* >=661 series only */ 42172b676d7Smrg#define VB2_TRUMPION 0x20000000 /* 300 series only */ 42272b676d7Smrg#define VB2_LVDS 0x40000000 42372b676d7Smrg#define VB2_CHRONTEL 0x80000000 42472b676d7Smrg 42572b676d7Smrg#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 42672b676d7Smrg#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 42772b676d7Smrg#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE) 42872b676d7Smrg 42972b676d7Smrg#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T) 43072b676d7Smrg#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 43172b676d7Smrg 43272b676d7Smrg#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B) 43372b676d7Smrg#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE) 43472b676d7Smrg#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV) 43572b676d7Smrg#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV) 43672b676d7Smrg#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE) 43772b676d7Smrg 43872b676d7Smrg#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 43972b676d7Smrg 44072b676d7Smrg#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT) 44172b676d7Smrg 44272b676d7Smrg#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T) 44372b676d7Smrg#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE) 44472b676d7Smrg#define VB2_30xC (VB2_301C | VB2_307T) 44572b676d7Smrg#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV) 44672b676d7Smrg#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV) 44772b676d7Smrg#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T) 44872b676d7Smrg/* CRT2/LCD over 1280 (overflow bits in Part4) */ 44972b676d7Smrg#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV) 45072b676d7Smrg/* CRT2/LCD over 1600? Is this really gonna happen, or will there be LCDA only for large panels? */ 45172b676d7Smrg#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV) 45272b676d7Smrg/* VGA2 up to 202MHz (1600x1200@75) */ 45372b676d7Smrg#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T) 45472b676d7Smrg 45572b676d7Smrg/* pSiS->VBFlags3 (for future use) */ 45672b676d7Smrg#define VB3_CRT1_TV 0x00000001 45772b676d7Smrg#define VB3_CRT1_LCD 0x00000002 45872b676d7Smrg#define VB3_CRT1_VGA 0x00000004 45972b676d7Smrg#define TV1_AVIDEO 0x00000100 46072b676d7Smrg#define TV1_SVIDEO 0x00000200 46172b676d7Smrg#define TV1_SCART 0x00000400 46272b676d7Smrg#define TV1_NTSC 0x00000800 46372b676d7Smrg#define TV1_PAL 0x00001000 46472b676d7Smrg#define TV1_YPBPR 0x00002000 46572b676d7Smrg#define TV1_PALM 0x00004000 46672b676d7Smrg#define TV1_PALN 0x00008000 46772b676d7Smrg#define TV1_NTSCJ 0x00010000 46872b676d7Smrg#define TV1_YPBPR525I 0x00020000 46972b676d7Smrg#define TV1_YPBPR525P 0x00040000 47072b676d7Smrg#define TV1_YPBPR625I 0x00080000 47172b676d7Smrg#define TV1_YPBPR625P 0x00100000 47272b676d7Smrg#define TV1_YPBPR750P 0x00200000 47372b676d7Smrg#define TV1_YPBPR1080I 0x00400000 47472b676d7Smrg 47572b676d7Smrg/* pSiS->VBLCDFlags */ 47672b676d7Smrg#define VB_LCD_320x480 0x00000001 /* DSTN/FSTN for 550 */ 47772b676d7Smrg#define VB_LCD_640x480 0x00000002 47872b676d7Smrg#define VB_LCD_800x600 0x00000004 47972b676d7Smrg#define VB_LCD_1024x768 0x00000008 48072b676d7Smrg#define VB_LCD_1280x1024 0x00000010 48172b676d7Smrg#define VB_LCD_1280x960 0x00000020 48272b676d7Smrg#define VB_LCD_1600x1200 0x00000040 48372b676d7Smrg#define VB_LCD_2048x1536 0x00000080 48472b676d7Smrg#define VB_LCD_1400x1050 0x00000100 48572b676d7Smrg#define VB_LCD_1152x864 0x00000200 48672b676d7Smrg#define VB_LCD_1152x768 0x00000400 48772b676d7Smrg#define VB_LCD_1280x768 0x00000800 48872b676d7Smrg#define VB_LCD_1024x600 0x00001000 48972b676d7Smrg#define VB_LCD_640x480_2 0x00002000 /* DSTN/FSTN */ 49072b676d7Smrg#define VB_LCD_640x480_3 0x00004000 /* DSTN/FSTN */ 49172b676d7Smrg#define VB_LCD_848x480 0x00008000 /* LVDS only, otherwise handled as custom */ 49272b676d7Smrg#define VB_LCD_1280x800 0x00010000 49372b676d7Smrg#define VB_LCD_1680x1050 0x00020000 49472b676d7Smrg#define VB_LCD_1280x720 0x00040000 49572b676d7Smrg#define VB_LCD_320x240 0x00080000 49672b676d7Smrg#define VB_LCD_856x480 0x00100000 49772b676d7Smrg#define VB_LCD_1280x854 0x00200000 49872b676d7Smrg#define VB_LCD_1920x1200 0x00400000 49972b676d7Smrg#define VB_LCD_UNKNOWN 0x10000000 50072b676d7Smrg#define VB_LCD_BARCO1366 0x20000000 50172b676d7Smrg#define VB_LCD_CUSTOM 0x40000000 50272b676d7Smrg#define VB_LCD_EXPANDING 0x80000000 50372b676d7Smrg 50472b676d7Smrg#define VB_FORBID_CRT2LCD_OVER_1600 /* CRT2/LCD supports only up to 1600 pixels */ 50572b676d7Smrg 50672b676d7Smrg/* PresetMode argument */ 50772b676d7Smrg#define SIS_MODE_SIMU 0 50872b676d7Smrg#define SIS_MODE_CRT1 1 50972b676d7Smrg#define SIS_MODE_CRT2 2 51072b676d7Smrg 51172b676d7Smrg/* pSiS->MiscFlags */ 51272b676d7Smrg#define MISC_CRT1OVERLAY 0x00000001 /* Current display mode supports overlay (CRT1) */ 51372b676d7Smrg#define MISC_PANELLINKSCALER 0x00000002 /* Panel link is currently scaling */ 51472b676d7Smrg#define MISC_CRT1OVERLAYGAMMA 0x00000004 /* Current display mode supports overlay gamma corr on CRT1 */ 51572b676d7Smrg#define MISC_TVNTSC1024 0x00000008 /* Current display mode is TV NTSC/PALM/YPBPR525I 1024x768 */ 51672b676d7Smrg#define MISC_CRT2OVERLAY 0x00000010 /* Current display mode supports overlay (CRT2) */ 51772b676d7Smrg#define MISC_SIS760ONEOVERLAY 0x00000020 /* SiS760/761: Only one overlay available currently */ 51872b676d7Smrg#define MISC_STNMODE 0x00000040 /* SiS550: xSTN active */ 51972b676d7Smrg 52072b676d7Smrg/* pSiS->SiS6326Flags */ 52172b676d7Smrg#define SIS6326_HASTV 0x00000001 52272b676d7Smrg#define SIS6326_TVSVIDEO 0x00000002 52372b676d7Smrg#define SIS6326_TVCVBS 0x00000004 52472b676d7Smrg#define SIS6326_TVPAL 0x00000008 52572b676d7Smrg#define SIS6326_TVDETECTED 0x00000010 52672b676d7Smrg#define SIS6326_TVON 0x80000000 52772b676d7Smrg 52872b676d7Smrg#ifdef DEBUG 52972b676d7Smrg#define PDEBUG(p) p 53072b676d7Smrg#else 53172b676d7Smrg#define PDEBUG(p) 53272b676d7Smrg#endif 53372b676d7Smrg 53472b676d7Smrg#define BITMASK(h,l) (((unsigned)(1U << ((h) - (l) + 1)) - 1) << (l)) 53572b676d7Smrg#define GENMASK(mask) BITMASK(1 ? mask, 0 ? mask) 53672b676d7Smrg 53772b676d7Smrg#define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0 ? mask)) 53872b676d7Smrg#define SETBITS(val,mask) ((val) << (0 ? mask)) 53972b676d7Smrg#define SETBIT(n) (1 << (n)) 54072b676d7Smrg 54172b676d7Smrg#define GETBITSTR(val,from,to) ((GETBITS(val, from)) << (0 ? to)) 54272b676d7Smrg#define SETVARBITS(var,val,from,to) (((var) & (~(GENMASK(to)))) | GETBITSTR(val,from,to)) 54372b676d7Smrg#define GETVAR8(var) ((var) & 0xFF) 54472b676d7Smrg#define SETVAR8(var,val) (var) = GETVAR8(val) 54572b676d7Smrg 54672b676d7Smrgtypedef unsigned long ULong; 54772b676d7Smrgtypedef unsigned short UShort; 54872b676d7Smrgtypedef unsigned char UChar; 54972b676d7Smrg 55072b676d7Smrg/* pSiS->VGAEngine - VGA engine types */ 55172b676d7Smrg#define UNKNOWN_VGA 0 55272b676d7Smrg#define SIS_530_VGA 1 55372b676d7Smrg#define SIS_OLD_VGA 2 55472b676d7Smrg#define SIS_300_VGA 3 55572b676d7Smrg#define SIS_315_VGA 4 /* Includes 330/660/661/741/760/340/761 and M versions thereof, XGI */ 55672b676d7Smrg 55772b676d7Smrg/* pSiS->oldChipset */ 55872b676d7Smrg#define OC_UNKNOWN 0 55972b676d7Smrg#define OC_SIS86201 1 56072b676d7Smrg#define OC_SIS86202 2 56172b676d7Smrg#define OC_SIS6205A 3 56272b676d7Smrg#define OC_SIS6205B 4 56372b676d7Smrg#define OC_SIS82204 5 56472b676d7Smrg#define OC_SIS6205C 6 56572b676d7Smrg#define OC_SIS6225 7 56672b676d7Smrg#define OC_SIS5597 8 56772b676d7Smrg#define OC_SIS6326 9 56872b676d7Smrg#define OC_SIS530A 11 56972b676d7Smrg#define OC_SIS530B 12 /* 620 in 620-WDR */ 57072b676d7Smrg#define OC_SIS620 13 57172b676d7Smrg 57272b676d7Smrg/* Chrontel type */ 57372b676d7Smrg#define CHRONTEL_700x 0 57472b676d7Smrg#define CHRONTEL_701x 1 57572b676d7Smrg 57672b676d7Smrg/* pSiS->ChipFlags */ 57772b676d7Smrg/* Use only lower 16 bit for chip id! (sisctrl) */ 57872b676d7Smrg#define SiSCF_LARGEOVERLAY 0x00000001 57972b676d7Smrg#define SiSCF_Is651 0x00000002 58072b676d7Smrg#define SiSCF_IsM650 0x00000004 58172b676d7Smrg#define SiSCF_IsM652 0x00000008 58272b676d7Smrg#define SiSCF_IsM653 0x00000010 58372b676d7Smrg#define SiSCF_Is652 0x00000020 58472b676d7Smrg#define SiSCF_Is65x (SiSCF_Is651|SiSCF_IsM650|SiSCF_IsM652|SiSCF_IsM653|SiSCF_Is652) 58572b676d7Smrg#define SiSCF_IsM661 0x00000100 /* M661FX */ 58672b676d7Smrg#define SiSCF_IsM741 0x00000200 58772b676d7Smrg#define SiSCF_IsM760 0x00000400 58872b676d7Smrg#define SiSCF_IsM661M 0x00000800 /* M661MX */ 58972b676d7Smrg#define SiSCF_IsM66x (SiSCF_IsM661 | SiSCF_IsM741 | SiSCF_IsM760 | SiSCF_IsM661M) 59072b676d7Smrg#define SiSCF_Is315USB 0x00001000 /* USB2VGA dongle */ 59172b676d7Smrg#define SiSCF_Is315E 0x00002000 /* 315E (lower clocks) */ 59272b676d7Smrg#define SiSCF_IsXGIV3 SiSCF_Is651 /* Volari V3(XT) (If neither XGI... set, is V8) */ 59372b676d7Smrg#define SiSCF_IsXGIV5 SiSCF_IsM650/* Volari V5 */ 59472b676d7Smrg#define SiSCF_IsXGIDUO SiSCF_IsM652/* Volari Duo */ 59572b676d7Smrg/* ... */ 59672b676d7Smrg#define SiSCF_315Core 0x00010000 /* 3D: Real 315 */ 59772b676d7Smrg#define SiSCF_Real256ECore 0x00020000 /* 3D: Similar to 315 core, no T&L? (65x, 661, 740, 741) */ 59872b676d7Smrg#define SiSCF_XabreCore 0x00040000 /* 3D: Real Xabre */ 59972b676d7Smrg#define SiSCF_Ultra256Core 0x00080000 /* 3D: aka "Mirage 2"; similar to Xabre, no T&L?, no P:Shader? (760) */ 60072b676d7Smrg#define SiSCF_MMIOPalette 0x00100000 /* HW supports MMIO palette writing/reading */ 60172b676d7Smrg#define SiSCF_IsXGI 0x00200000 /* Is XGI chip (Z7, V3, V5, V8) */ 60272b676d7Smrg#define SiSCF_UseLCDA 0x01000000 60372b676d7Smrg#define SiSCF_760LFB 0x08000000 /* 76x: LFB active (if not set, UMA only) */ 60472b676d7Smrg#define SiSCF_760UMA 0x10000000 /* 76x: UMA active (if not set, LFB only) */ 60572b676d7Smrg#define SiSCF_CRT2HWCKaputt 0x20000000 /* CRT2 Mono HWCursor engine buggy (SiS 330) */ 60672b676d7Smrg#define SiSCF_Glamour3 0x40000000 60772b676d7Smrg#define SiSCF_Integrated 0x80000000 60872b676d7Smrg 60972b676d7Smrg/* SiS Direct Xv-API */ 61072b676d7Smrg#define SiS_SD_IS300SERIES 0x00000001 61172b676d7Smrg#define SiS_SD_IS315SERIES 0x00000002 61272b676d7Smrg#define SiS_SD_IS330SERIES 0x00000004 61372b676d7Smrg#define SiS_SD_SUPPORTPALMN 0x00000008 /* tv chip supports pal-m, pal-n */ 61472b676d7Smrg#define SiS_SD_SUPPORT2OVL 0x00000010 /* set = 2 overlays, clear = support SWITCHCRT xv prop */ 61572b676d7Smrg#define SiS_SD_SUPPORTTVPOS 0x00000020 /* supports changing tv position */ 61672b676d7Smrg#define SiS_SD_ISDUALHEAD 0x00000040 /* Driver is in dual head mode */ 61772b676d7Smrg#define SiS_SD_ISMERGEDFB 0x00000080 /* Driver is in merged fb mode */ 61872b676d7Smrg#define SiS_SD_ISDHSECONDHEAD 0x00000100 /* Dual head: This is CRT1 (=second head) */ 61972b676d7Smrg#define SiS_SD_ISDHXINERAMA 0x00000200 /* Dual head: We are running Xinerama */ 62072b676d7Smrg#define SiS_SD_VBHASSCART 0x00000400 /* videobridge has SCART instead of VGA2 */ 62172b676d7Smrg#define SiS_SD_ISDEPTH8 0x00000800 /* Depth is 8, no independent gamma correction */ 62272b676d7Smrg#define SiS_SD_SUPPORTSOVER 0x00001000 /* Support for Chrontel Super Overscan */ 62372b676d7Smrg#define SiS_SD_ENABLED 0x00002000 /* sisctrl is enabled (by option) */ 62472b676d7Smrg#define SiS_SD_PSEUDOXINERAMA 0x00004000 /* pseudo xinerama is active */ 62572b676d7Smrg#define SiS_SD_SUPPORTLCDA 0x00008000 /* Support LCD Channel A */ 62672b676d7Smrg#define SiS_SD_SUPPORTNTSCJ 0x00010000 /* tv chip supports ntsc-j */ 62772b676d7Smrg#define SiS_SD_ADDLSUPFLAG 0x00020000 /* 1 = the following flags are valid */ 62872b676d7Smrg#define SiS_SD_SUPPORTVGA2 0x00040000 /* CRT2=VGA supported */ 62972b676d7Smrg#define SiS_SD_SUPPORTSCART 0x00080000 /* CRT2=SCART supported */ 63072b676d7Smrg#define SiS_SD_SUPPORTOVERSCAN 0x00100000 /* Overscan flag supported */ 63172b676d7Smrg#define SiS_SD_SUPPORTXVGAMMA1 0x00200000 /* Xv Gamma correction for CRT1 supported */ 63272b676d7Smrg#define SiS_SD_SUPPORTTV 0x00400000 /* CRT2=TV supported */ 63372b676d7Smrg#define SiS_SD_SUPPORTYPBPR 0x00800000 /* CRT2=YPbPr (525i, 525p, 750p, 1080i) is supported */ 63472b676d7Smrg#define SiS_SD_SUPPORTHIVISION 0x01000000 /* CRT2=HiVision is supported */ 63572b676d7Smrg#define SiS_SD_SUPPORTYPBPRAR 0x02000000 /* YPbPr aspect ratio is supported */ 63672b676d7Smrg#define SiS_SD_SUPPORTSCALE 0x04000000 /* Scaling of LCD panel supported */ 63772b676d7Smrg#define SiS_SD_SUPPORTCENTER 0x08000000 /* If scaling supported: Centering of screen [NOT] supported (TMDS only) */ 63872b676d7Smrg#define SiS_SD_SUPPORTREDETECT 0x10000000 /* Support re-detection of CRT2 devices */ 63972b676d7Smrg#define SiS_SD_IS340SERIES 0x20000000 64072b676d7Smrg#define SiS_SD_SUPPORTSGRCRT2 0x40000000 /* Separate CRT2 gamma correction supported */ 64172b676d7Smrg#define SiS_SD_CANSETGAMMA 0x80000000 /* Driver can set gamma ramp; otherwise: App needs to reset palette */ 64272b676d7Smrg /* after disabling sep CRT2 gamma corr */ 64372b676d7Smrg 64472b676d7Smrg#define SiS_SD2_LCDTMDS 0x00000001 /* SiS Bridge supports TMDS (DVI-D) */ 64572b676d7Smrg#define SiS_SD2_LCDLVDS 0x00000002 /* SiS Bridge supports LVDS */ 64672b676d7Smrg#define SiS_SD2_SUPPORTLCD 0x00000004 /* Bridge supports LCD (LVDS or TMDS, SiS+3rd party) */ 64772b676d7Smrg#define SiS_SD2_SUPPORTTVSIZE 0x00000008 /* TV resizing supported (SiS bridges) */ 64872b676d7Smrg#define SiS_SD2_SUPPORTTVTYPE 0x00000010 /* TV type selection supported (SiS bridges) */ 64972b676d7Smrg#define SiS_SD2_SUPPORTGAMMA2 0x00000020 /* Gamma corr for CRT2 supported (SiS bridges) */ 65072b676d7Smrg#define SiS_SD2_SISBRIDGE 0x00000040 /* SiS bridge */ 65172b676d7Smrg#define SiS_SD2_SUPPTVSAT 0x00000080 /* TV saturation supported */ 65272b676d7Smrg#define SiS_SD2_SUPPTVEDGE 0x00000100 /* TV edge enhancement supported */ 65372b676d7Smrg#define SiS_SD2_CHRONTEL 0x00000200 /* Chrontel TV encoder present */ 65472b676d7Smrg#define SiS_SD2_VIDEOBRIDGE 0x00000400 /* Any type of video bridge present */ 65572b676d7Smrg#define SiS_SD2_THIRDPARTYLVDS 0x00000800 /* Third party LVDS (non-SiS) */ 65672b676d7Smrg#define SiS_SD2_ADDLFLAGS 0x00001000 /* Following flags valid */ 65772b676d7Smrg#define SiS_SD2_SUPPORT760OO 0x00002000 /* Support dynamic one/two overlay configuration changes */ 65872b676d7Smrg /* (If set, utility must re-read SD2 flags after mode change) */ 65972b676d7Smrg#define SiS_SD2_SIS760ONEOVL 0x00004000 /* (76x:) Only one overlay currently */ 66072b676d7Smrg#define SiS_SD2_MERGEDUCLOCK 0x00008000 /* Provide VRefresh in mode->Clock field in MergedFB mode */ 66172b676d7Smrg#define SiS_SD2_SUPPORTXVHUESAT 0x00010000 /* Xv: Support hue & saturation */ 66272b676d7Smrg#define SiS_SD2_NEEDUSESSE 0x00020000 /* Need "UseSSE" option to use SSE (otherwise auto) */ 66372b676d7Smrg#define SiS_SD2_NODDCSUPPORT 0x00040000 /* No hardware DDC support (USB) */ 66472b676d7Smrg#define SiS_SD2_SUPPORTXVDEINT 0x00080000 /* Xv deinterlacing supported (n/a, for future use) */ 66572b676d7Smrg#define SiS_SD2_ISXGI 0x00100000 /* Is XGI chip */ 66672b676d7Smrg#define SiS_SD2_USEVBFLAGS2 0x00200000 /* Use VBFlags2 for bridge ID */ 66772b676d7Smrg#define SiS_SD2_SUPPLTFLAG 0x00400000 /* Driver supports the following 3 flags */ 66872b676d7Smrg#define SiS_SD2_ISLAPTOP 0x00800000 /* This machine is (very probably) a laptop */ 66972b676d7Smrg#define SiS_SD2_MACHINETYPE2 0x01000000 /* Machine type 2 (for future use) */ 67072b676d7Smrg#define SiS_SD2_MACHINETYPE3 0x02000000 /* Machine type 3 (for future use) */ 67172b676d7Smrg#define SiS_SD2_SUPPORT625I 0x04000000 /* Support YPbPr 625i */ 67272b676d7Smrg#define SiS_SD2_SUPPORT625P 0x08000000 /* Support YPbPr 625p */ 67372b676d7Smrg#define SiS_SD2_VBINVB2ONLY 0x10000000 /* VB_* bits in vbflags no longer used for vb type */ 67472b676d7Smrg#define SiS_SD2_NEWGAMMABRICON 0x20000000 /* Support new gamma brightness/contrast */ 67572b676d7Smrg#define SiS_SD2_HAVESD34 0x40000000 /* Support SD3 and SD4 flags */ 67672b676d7Smrg#define SiS_SD2_NOOVERLAY 0x80000000 /* No video overlay */ 67772b676d7Smrg 67872b676d7Smrg#define SiS_SD3_OLDGAMMAINUSE 0x00000001 /* Old gamma brightness is currently in use */ 67972b676d7Smrg#define SiS_SD3_MFBALLOWOFFCL 0x00000002 /* Supports off'ing CRTx in MFB if a clone mode is active */ 68072b676d7Smrg#define SiS_SD3_SUPPORTVBF34 0x00000004 /* Supports VBFlags3 and VBFlags4 */ 68172b676d7Smrg#define SiS_SD3_SUPPORTDUALDVI 0x00000008 /* Supports dual dvi-d (for future use) */ 68272b676d7Smrg#define SiS_SD3_SUPPORTDUALTV 0x00000010 /* Supports dual tv (for future use) */ 68372b676d7Smrg#define SiS_SD3_NEWOUTPUTSW 0x00000020 /* Supports NEWSETVBFLAGS (for future use) */ 68472b676d7Smrg#define SiS_SD3_CRT1SATGAIN 0x00000040 /* Supports CRT1 saturation gain */ 68572b676d7Smrg#define SiS_SD3_CRT2SATGAIN 0x00000080 /* Supports CRT2 saturation gain (apart from TV, see SiS_SD2_SUPPTVSAT) */ 68672b676d7Smrg 68772b676d7Smrg#define SIS_DIRECTKEY 0x03145792 68872b676d7Smrg 68972b676d7Smrg/* SiSCtrl: Check mode for CRT2 */ 69072b676d7Smrg#define SiS_CF2_LCD 0x01 69172b676d7Smrg#define SiS_CF2_TV 0x02 69272b676d7Smrg#define SiS_CF2_VGA2 0x04 69372b676d7Smrg#define SiS_CF2_TVPAL 0x08 69472b676d7Smrg#define SiS_CF2_TVNTSC 0x10 /* + NTSC-J */ 69572b676d7Smrg#define SiS_CF2_TVPALM 0x20 69672b676d7Smrg#define SiS_CF2_TVPALN 0x40 69772b676d7Smrg#define SiS_CF2_CRT1LCDA 0x80 69872b676d7Smrg#define SiS_CF2_TYPEMASK (SiS_CF2_LCD | SiS_CF2_TV | SiS_CF2_VGA2 | SiS_CF2_CRT1LCDA) 69972b676d7Smrg#define SiS_CF2_TVSPECIAL (SiS_CF2_LCD | SiS_CF2_TV) 70072b676d7Smrg#define SiS_CF2_TVSPECMASK (SiS_CF2_TVPAL | SiS_CF2_TVNTSC | SiS_CF2_TVPALM | SiS_CF2_TVPALN) 70172b676d7Smrg#define SiS_CF2_TVHIVISION SiS_CF2_TVPAL 70272b676d7Smrg#define SiS_CF2_TVYPBPR525I SiS_CF2_TVNTSC 70372b676d7Smrg#define SiS_CF2_TVYPBPR525P (SiS_CF2_TVPAL | SiS_CF2_TVNTSC) 70472b676d7Smrg#define SiS_CF2_TVYPBPR625I SiS_CF2_TVPALN 70572b676d7Smrg#define SiS_CF2_TVYPBPR625P (SiS_CF2_TVPALN | SiS_CF2_TVPAL) 70672b676d7Smrg#define SiS_CF2_TVYPBPR750P SiS_CF2_TVPALM 70772b676d7Smrg#define SiS_CF2_TVYPBPR1080I (SiS_CF2_TVPALM | SiS_CF2_TVPAL) 70872b676d7Smrg 70972b676d7Smrg/* AGP stuff for DRI */ 71072b676d7Smrg#define AGP_PAGE_SIZE 4096 71172b676d7Smrg#define AGP_PAGES 2048 /* Default: 2048 pages @ 4096 = 8MB */ 71272b676d7Smrg/* 300 */ 71372b676d7Smrg#define AGP_CMDBUF_PAGES 256 71472b676d7Smrg#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) 71572b676d7Smrg/* 315/330 */ 71672b676d7Smrg#define AGP_VTXBUF_PAGES 512 71772b676d7Smrg#define AGP_VTXBUF_SIZE (AGP_PAGE_SIZE * AGP_VTXBUF_PAGES) 71872b676d7Smrg 71972b676d7Smrg/* Defines for our own vgaHW functions */ 72072b676d7Smrg#define SISVGA_SR_MODE 0x01 72172b676d7Smrg#define SISVGA_SR_FONTS 0x02 72272b676d7Smrg#define SISVGA_SR_CMAP 0x04 72372b676d7Smrg#define SISVGA_SR_ALL (SISVGA_SR_MODE | SISVGA_SR_FONTS | SISVGA_SR_CMAP) 72472b676d7Smrg 72572b676d7Smrg#define SISKGA_FIX_OVERSCAN 1 /* overcan correction required */ 72672b676d7Smrg#define SISKGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning of next scanline/frame */ 72772b676d7Smrg#define SISKGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */ 72872b676d7Smrg 72972b676d7Smrg/* CPU flags (for memcpy() etc.) */ 73072b676d7Smrg#define SIS_CPUFL_LIBC 0x0001 73172b676d7Smrg#define SIS_CPUFL_BI 0x0002 73272b676d7Smrg#define SIS_CPUFL_SSE 0x0004 73372b676d7Smrg#define SIS_CPUFL_MMX 0x0008 73472b676d7Smrg#define SIS_CPUFL_3DNOW 0x0010 73572b676d7Smrg#define SIS_CPUFL_MMX2 0x0020 73672b676d7Smrg#define SIS_CPUFL_BI2 0x0040 73772b676d7Smrg#define SIS_CPUFL_SSE2 0x0080 73872b676d7Smrg#define SIS_CPUFL_FLAG 0x8000 73972b676d7Smrg 74072b676d7Smrg/* Convenience macro for sisfb version checks */ 74172b676d7Smrg#define SISFB_VERSION(a,b,c) ((a << 16) | (b << 8) | c) 74272b676d7Smrg 74372b676d7Smrg/* For backup of register contents */ 74472b676d7Smrgtypedef struct { 74572b676d7Smrg UChar sisRegMiscOut; 74672b676d7Smrg UChar sisRegsATTR[22]; 74772b676d7Smrg UChar sisRegsGR[10]; 74872b676d7Smrg UChar sisDAC[768]; 74972b676d7Smrg UChar sisRegs3C4[0x80]; 75072b676d7Smrg UChar sisRegs3D4[0xff]; 75172b676d7Smrg UChar sisRegs3C2; 75272b676d7Smrg UChar sisCapt[0x60]; 75372b676d7Smrg UChar sisVid[0x50]; 75472b676d7Smrg UChar VBPart1[0x80]; 75572b676d7Smrg UChar VBPart2[0x100]; 75672b676d7Smrg UChar VBPart3[0x50]; 75772b676d7Smrg UChar VBPart4[0x50]; 75872b676d7Smrg UShort ch70xx[64]; 75972b676d7Smrg unsigned int sisMMIO85C0; 76072b676d7Smrg UChar sis6326tv[0x46]; 76172b676d7Smrg unsigned int sisRegsPCI50, sisRegsPCIA0; 76272b676d7Smrg UChar BIOSModeSave; 76372b676d7Smrg} SISRegRec, *SISRegPtr; 76472b676d7Smrg 76572b676d7Smrgtypedef struct _sisModeInfoPtr { 76672b676d7Smrg int width; 76772b676d7Smrg int height; 76872b676d7Smrg int bpp; 76972b676d7Smrg int n; 77072b676d7Smrg struct _sisModeInfoPtr *next; 77172b676d7Smrg} sisModeInfoRec, *sisModeInfoPtr; 77272b676d7Smrg 77372b676d7Smrg/* SISFBLayout (which has nothing to do with sisfb, actually) 77472b676d7Smrg * is mainly there because of DGA. It holds the current layout 77572b676d7Smrg * parameters needed for acceleration and other stuff. When 77672b676d7Smrg * switching mode using DGA, these are set up accordingly and 77772b676d7Smrg * not necessarily match pScrn's. Therefore, driver modules 77872b676d7Smrg * should read these values instead of pScrn's. 77972b676d7Smrg */ 78072b676d7Smrgtypedef struct { 78172b676d7Smrg int bitsPerPixel; /* = pScrn->bitsPerPixel */ 78272b676d7Smrg int depth; /* = pScrn->depth */ 78372b676d7Smrg int displayWidth; /* = pScrn->displayWidth */ 78472b676d7Smrg int displayHeight; /* = imageHeight from DGA mode; ONLY WHEN DGA IS ACTIVE!!! */ 78572b676d7Smrg int DGAViewportX; 78672b676d7Smrg int DGAViewportY; 78772b676d7Smrg DisplayModePtr mode; /* = pScrn->currentMode */ 78872b676d7Smrg} SISFBLayout; 78972b676d7Smrg 79072b676d7Smrg/* For extended memcpy() */ 79172b676d7Smrgtypedef void (*vidCopyFunc)(UChar *, const UChar *, int); 79272b676d7Smrg 79372b676d7Smrg#ifdef SISISXORG6899900 79472b676d7Smrg#define SISAGPHTYPE drm_handle_t 79572b676d7Smrg#else 79672b676d7Smrg#define SISAGPHTYPE ULong 79772b676d7Smrg#endif 79872b676d7Smrg 79972b676d7Smrg/* Dual head private entity structure */ 80072b676d7Smrg#ifdef SISDUALHEAD 80172b676d7Smrgtypedef struct { 80272b676d7Smrg ScrnInfoPtr pScrn_1; 80372b676d7Smrg ScrnInfoPtr pScrn_2; 80472b676d7Smrg UChar *BIOS; 80572b676d7Smrg struct SiS_Private *SiS_Pr; 80672b676d7Smrg#ifdef XF86DRI 80772b676d7Smrg SISAGPHTYPE agpHandle; 80872b676d7Smrg ULong agpAddr; 80972b676d7Smrg UChar *agpBase; 81072b676d7Smrg unsigned int agpSize; 81172b676d7Smrg unsigned int agpWantedSize; 81272b676d7Smrg unsigned int agpWantedPages; 81372b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 81472b676d7Smrg UChar *agpCmdBufBase; 81572b676d7Smrg unsigned int agpCmdBufSize; 81672b676d7Smrg unsigned int agpCmdBufFree; 81772b676d7Smrg ULong agpVtxBufAddr; /* 315/330 series */ 81872b676d7Smrg UChar *agpVtxBufBase; 81972b676d7Smrg unsigned int agpVtxBufSize; 82072b676d7Smrg unsigned int agpVtxBufFree; 82172b676d7Smrg sisRegion agp; 82272b676d7Smrg int drmSubFD; 82372b676d7Smrg#endif 82472b676d7Smrg Bool AGPInitOK; 82572b676d7Smrg int CRT1ModeNo; /* Current display mode for CRT1 */ 82672b676d7Smrg DisplayModePtr CRT1DMode; /* Current display mode for CRT1 */ 82772b676d7Smrg int CRT2ModeNo; /* Current display mode for CRT2 */ 82872b676d7Smrg DisplayModePtr CRT2DMode; /* Current display mode for CRT2 */ 82972b676d7Smrg Bool CRT2ModeSet; /* CRT2 mode has been set */ 83072b676d7Smrg Bool CRT2IsCustom; 83172b676d7Smrg UChar CRT2CR30, CRT2CR31, CRT2CR35, CRT2CR38; 83272b676d7Smrg int refCount; 83372b676d7Smrg int lastInstance; /* number of entities */ 83472b676d7Smrg Bool DisableDual; /* Emergency flag */ 83572b676d7Smrg Bool ErrorAfterFirst; /* Emergency flag: Error after first init -> Abort second */ 83672b676d7Smrg Bool HWCursor; /* Backup master settings for use on slave */ 83772b676d7Smrg Bool TurboQueue; 83872b676d7Smrg int ForceCRT1Type; 83972b676d7Smrg Bool CRT1TypeForced; 84072b676d7Smrg int ForceCRT2Type; 84172b676d7Smrg int OptTVStand; 84272b676d7Smrg int OptTVOver; 84372b676d7Smrg int OptTVSOver; 84472b676d7Smrg int OptROMUsage; 84572b676d7Smrg int OptUseOEM; 84672b676d7Smrg Bool NoAccel; 84772b676d7Smrg Bool useEXA; 84872b676d7Smrg int forceCRT1; 84972b676d7Smrg int DSTN, FSTN; 85072b676d7Smrg Bool XvOnCRT2; 85172b676d7Smrg int maxUsedClock; /* Max used pixelclock on master head */ 85272b676d7Smrg ULong masterFbAddress; /* Framebuffer addresses and sizes */ 85372b676d7Smrg ULong masterFbSize; 85472b676d7Smrg ULong slaveFbAddress; 85572b676d7Smrg ULong slaveFbSize; 8561fd23544Smrg void *FbBase; /* VRAM linear address */ 85772b676d7Smrg UChar *RealFbBase; /* Real VRAM linear address (for DHM, SiS76x UMA skipping) */ 8581fd23544Smrg void *IOBase; /* MMIO linear address */ 85972b676d7Smrg UShort MapCountIOBase; /* map/unmap queue counter */ 86072b676d7Smrg UShort MapCountFbBase; /* map/unmap queue counter */ 86172b676d7Smrg Bool forceUnmapIOBase; /* ignore counter and unmap */ 86272b676d7Smrg Bool forceUnmapFbBase; /* ignore counter and unmap */ 86372b676d7Smrg#ifdef __alpha__ 8641fd23544Smrg void *IOBaseDense; /* MMIO for Alpha platform */ 86572b676d7Smrg UShort MapCountIOBaseDense; 86672b676d7Smrg Bool forceUnmapIOBaseDense; /* ignore counter and unmap */ 86772b676d7Smrg#endif 86872b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 86972b676d7Smrg int chtvlumabandwidthsvideo; 87072b676d7Smrg int chtvlumaflickerfilter; 87172b676d7Smrg int chtvchromabandwidth; 87272b676d7Smrg int chtvchromaflickerfilter; 87372b676d7Smrg int chtvcvbscolor; 87472b676d7Smrg int chtvtextenhance; 87572b676d7Smrg int chtvcontrast; 87672b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridge */ 87772b676d7Smrg int sistvantiflicker; 87872b676d7Smrg int sistvsaturation; 87972b676d7Smrg int sistvcolcalibc; 88072b676d7Smrg int sistvcolcalibf; 88172b676d7Smrg int sistvcfilter; 88272b676d7Smrg int sistvyfilter; 88372b676d7Smrg int tvxpos, tvypos; 88472b676d7Smrg int tvxscale, tvyscale; 88572b676d7Smrg int siscrt1satgain; 88672b676d7Smrg Bool crt1satgaingiven; 88772b676d7Smrg int ForceTVType, SenseYPbPr; 88872b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 88972b676d7Smrg int chtvtype; 89072b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 89172b676d7Smrg UShort tvx, tvy; 89272b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; 89372b676d7Smrg UChar p2_44, p2_45, p2_46; 89472b676d7Smrg unsigned int sistvccbase; 89572b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 89672b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 89772b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 89872b676d7Smrg UShort cursorBufferNum; 89972b676d7Smrg Bool restorebyset; 90072b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven, XvDefAdaptorBlit; 90172b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 90272b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; /* strictly for Xinerama */ 90372b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; /* strictly for Xinerama */ 90472b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; /* strictly for Xinerama */ 90572b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 90672b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 90772b676d7Smrg int curxvcrtnum; 90872b676d7Smrg int UsePanelScaler, CenterLCD; 90972b676d7Smrg int AllowHotkey; 91072b676d7Smrg Bool enablesisctrl; 91172b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 91272b676d7Smrg UChar *RenderAccelArray; 91372b676d7Smrg UChar *FbBase1; 91472b676d7Smrg ULong OnScreenSize1; 91572b676d7Smrg UChar OldMode; 91672b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 91772b676d7Smrg Bool ROM661New; 91872b676d7Smrg Bool HaveXGIBIOS; 91972b676d7Smrg Bool XvUseMemcpy; 92072b676d7Smrg Bool BenchMemCpy; 92172b676d7Smrg Bool HaveFastVidCpy; 92272b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 92372b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 92472b676d7Smrg unsigned int CPUFlags; 92572b676d7Smrg#ifdef SIS_NEED_MAP_IOP 92672b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 9271fd23544Smrg void *IOPBase; /* I/O port linear address */ 92872b676d7Smrg UShort MapCountIOPBase; /* map/unmap queue counter */ 92972b676d7Smrg Bool forceUnmapIOPBase; /* ignore counter and unmap */ 93072b676d7Smrg#endif 93172b676d7Smrg#ifdef SIS_CP 93272b676d7Smrg SIS_CP_H_ENT 93372b676d7Smrg#endif 93472b676d7Smrg} SISEntRec, *SISEntPtr; 93572b676d7Smrg#endif 93672b676d7Smrg 93772b676d7Smrg#define SISPTR(p) ((SISPtr)((p)->driverPrivate)) 93872b676d7Smrg#define XAAPTR(p) ((XAAInfoRecPtr)(SISPTR(p)->AccelInfoPtr)) 93972b676d7Smrg 94072b676d7Smrg/* MergedFB: Relative position */ 94172b676d7Smrgtypedef enum { 94272b676d7Smrg sisLeftOf, 94372b676d7Smrg sisRightOf, 94472b676d7Smrg sisAbove, 94572b676d7Smrg sisBelow, 94672b676d7Smrg sisClone 94772b676d7Smrg} SiSScrn2Rel; 94872b676d7Smrg 94972b676d7Smrgtypedef struct _region { 95072b676d7Smrg int x0,x1,y0,y1; 95172b676d7Smrg} region; 95272b676d7Smrg 95372b676d7Smrgtypedef struct { 95472b676d7Smrg ScrnInfoPtr pScrn; 95572b676d7Smrg pciVideoPtr PciInfo; 95672b676d7Smrg int PciBus, PciDevice, PciFunc; 95772b676d7Smrg PCITAG PciTag; 95872b676d7Smrg EntityInfoPtr pEnt; 95972b676d7Smrg int Chipset; 96072b676d7Smrg unsigned char ChipType; 96172b676d7Smrg int ChipRev; 96272b676d7Smrg int VGAEngine; /* see above */ 96372b676d7Smrg int hasTwoOverlays; /* Chipset supports two video overlays? */ 96472b676d7Smrg struct SiS_Private *SiS_Pr; /* For mode switching code */ 96572b676d7Smrg int DSTN; /* For 550 FSTN/DSTN; set by option, no detection */ 96672b676d7Smrg ULong FbAddress; /* VRAM physical address (in DHM: for each Fb!) */ 96772b676d7Smrg ULong realFbAddress; /* For DHM/PCI mem mapping: store global FBAddress */ 9681fd23544Smrg void *FbBase; /* VRAM virtual linear address */ 9691fd23544Smrg void *RealFbBase; /* Real VRAM virtual linear address (for DHM and SiS76x UMA skipping) */ 97072b676d7Smrg CARD32 IOAddress; /* MMIO physical address */ 9711fd23544Smrg void *IOBase; /* MMIO linear address */ 97272b676d7Smrg IOADDRESS IODBase; /* Base of PIO memory area */ 97372b676d7Smrg#ifdef __alpha__ 9741fd23544Smrg void *IOBaseDense; /* MMIO for Alpha platform */ 97572b676d7Smrg#endif 97672b676d7Smrg SISIOADDRESS RelIO; /* Relocated IO Ports baseaddress */ 97772b676d7Smrg UChar *BIOS; 97872b676d7Smrg int MemClock; 97972b676d7Smrg int BusWidth; 98072b676d7Smrg int MinClock; 98172b676d7Smrg int MaxClock; 98272b676d7Smrg int Flags; /* HW config flags */ 98372b676d7Smrg long FbMapSize; /* Used for Mem Mapping - DON'T CHANGE THIS */ 98472b676d7Smrg long availMem; /* Really available Fb mem (minus TQ, HWCursor) */ 98572b676d7Smrg unsigned int maxxfbmem; /* limit fb memory X is to use to this (KB) */ 98672b676d7Smrg unsigned int sisfbHeapStart; /* heapstart of sisfb (if running) */ 98772b676d7Smrg unsigned int dhmOffset; /* Offset to memory for each head (0 or ..); also used on SiS76x/UMA+LFB */ 98872b676d7Smrg unsigned int FbBaseOffset; 98972b676d7Smrg DGAModePtr DGAModes; 99072b676d7Smrg int numDGAModes; 99172b676d7Smrg Bool DGAactive; 99272b676d7Smrg int DGAViewportStatus; 99372b676d7Smrg UChar OldMode; /* Back old modeNo (if available) */ 99472b676d7Smrg Bool NoAccel; 99572b676d7Smrg Bool NoXvideo; 99672b676d7Smrg Bool XvOnCRT2; /* see sis_opt.c */ 99772b676d7Smrg Bool HWCursor; 99872b676d7Smrg Bool UsePCIRetry; 99972b676d7Smrg Bool TurboQueue; 100072b676d7Smrg int VESA; 100172b676d7Smrg int ForceCRT1Type; 100272b676d7Smrg Bool CRT1Detected, CRT1TypeForced; 100372b676d7Smrg int ForceCRT2Type; 100472b676d7Smrg int OptTVStand; 100572b676d7Smrg int OptTVOver; 100672b676d7Smrg int OptROMUsage; 100772b676d7Smrg int UseCHOverScan; 100872b676d7Smrg Bool ValidWidth; 100972b676d7Smrg Bool FastVram; /* now unused */ 101072b676d7Smrg int forceCRT1; 101172b676d7Smrg Bool CRT1changed; 101272b676d7Smrg UChar oldCR17, oldCR63, oldSR1F; 101372b676d7Smrg UChar oldCR32, oldCR36, oldCR37; 101472b676d7Smrg UChar myCR32, myCR36, myCR37, myCR63; 101572b676d7Smrg UChar newCR32; 101672b676d7Smrg unsigned int VBFlags; /* Video bridge configuration (dynamic) */ 101772b676d7Smrg unsigned int VBFlags2; /* Video bridge configuration 2 (static flags only) */ 101872b676d7Smrg unsigned int VBFlags3, VBFlags4; /* Video bridge configuration 3, 4 (dynamic) */ 101972b676d7Smrg unsigned int VBFlags_backup; /* Backup for SlaveMode-modes */ 102072b676d7Smrg unsigned int VBFlags_backup3; /* Backup for SlaveMode-modes */ 102172b676d7Smrg unsigned int VBFlags_backup4; /* Backup for SlaveMode-modes */ 102272b676d7Smrg unsigned int VBLCDFlags, VBLCDFlags2; 102372b676d7Smrg int ChrontelType; /* CHRONTEL_700x or CHRONTEL_701x */ 102472b676d7Smrg unsigned int PDC, PDCA; /* PanelDelayCompensation */ 102572b676d7Smrg short scrnOffset; /* Screen pitch (data) */ 102672b676d7Smrg short scrnPitch; /* Screen pitch (display; regarding interlace) */ 102772b676d7Smrg short DstColor; 102872b676d7Smrg unsigned int SiS310_AccelDepth; /* used in accel for 315 series */ 102972b676d7Smrg int MaxCMDQueueLen; 103072b676d7Smrg int CurCMDQueueLen; 103172b676d7Smrg int MinCMDQueueLen; 103272b676d7Smrg CARD16 CursorSize; /* Size of HWCursor area (bytes) */ 103372b676d7Smrg CARD32 cursorOffset; /* see sis_driver.c and sis_cursor.c */ 103472b676d7Smrg Bool useEXA; 103572b676d7Smrg void (*InitAccel)(ScrnInfoPtr pScrn); 103672b676d7Smrg void (*SyncAccel)(ScrnInfoPtr pScrn); 103772b676d7Smrg void (*FillRect)(ScrnInfoPtr pScrn, int x, int y, int w, int h, int color); 103872b676d7Smrg void (*BlitRect)(ScrnInfoPtr pScrn, int srcx, int srcy, int dstx, int dsty, 103972b676d7Smrg int w, int h, int color); 104072b676d7Smrg int CommandReg; 104172b676d7Smrg Bool ClipEnabled; 104272b676d7Smrg int Xdirection; /* for temp use in accel */ 104372b676d7Smrg int Ydirection; /* for temp use in accel */ 104472b676d7Smrg#ifdef SIS_USE_XAA 104572b676d7Smrg XAAInfoRecPtr AccelInfoPtr; 104672b676d7Smrg UChar *XAAScanlineColorExpandBuffers[2]; 104772b676d7Smrg Bool DoColorExpand; 104872b676d7Smrg Bool ColorExpandBusy; 104972b676d7Smrg int xcurrent; /* for temp use in accel */ 105072b676d7Smrg int ycurrent; /* for temp use in accel */ 105172b676d7Smrg int sisPatternReg[4]; 105272b676d7Smrg int ROPReg; 105372b676d7Smrg#endif 105472b676d7Smrg#ifdef SIS_USE_EXA 105572b676d7Smrg ExaDriverPtr EXADriverPtr; 105672b676d7Smrg int fillPitch, fillBpp; 105772b676d7Smrg CARD32 fillDstBase; 105872b676d7Smrg int copyBpp; 105972b676d7Smrg int copySPitch, copyDPitch; 106072b676d7Smrg CARD32 copySrcBase, copyDstBase; 106172b676d7Smrg int copyXdir, copyYdir; 106272b676d7Smrg ExaOffscreenArea * exa_scratch; 106372b676d7Smrg unsigned int exa_scratch_next; 106472b676d7Smrg#endif 106572b676d7Smrg Bool alphaBlitBusy; 106672b676d7Smrg SISRegRec SavedReg; 106772b676d7Smrg SISRegRec ModeReg; 106872b676d7Smrg xf86CursorInfoPtr CursorInfoPtr; 106972b676d7Smrg CloseScreenProcPtr CloseScreen; 107072b676d7Smrg Bool (*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode); 107172b676d7Smrg void (*SiSSave)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 107272b676d7Smrg void (*SiSRestore)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 107372b676d7Smrg int cmdQueueLen; /* Current cmdQueueLength (for 2D and 3D) */ 107472b676d7Smrg unsigned int *cmdQueueBase; 107572b676d7Smrg int *cmdQueueLenPtr; /* Ptr to variable holding the current queue length */ 107672b676d7Smrg int *cmdQueueLenPtrBackup; /* Backup for DRI init/restore */ 107772b676d7Smrg unsigned int cmdQueueOffset; 107872b676d7Smrg unsigned int cmdQueueSize; 107972b676d7Smrg unsigned int cmdQueueSizeMask; 108072b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 108172b676d7Smrg unsigned int *cmdQ_SharedWritePort; 108272b676d7Smrg unsigned int *cmdQ_SharedWritePortBackup; 108372b676d7Smrg unsigned int cmdQueueSize_div2; 108472b676d7Smrg unsigned int cmdQueueSize_div4; 108572b676d7Smrg unsigned int cmdQueueSize_4_3; 108672b676d7Smrg#ifdef XF86DRI 108772b676d7Smrg SISAGPHTYPE agpHandle; 108872b676d7Smrg ULong agpAddr; 108972b676d7Smrg UChar *agpBase; 109072b676d7Smrg unsigned int agpSize; 109172b676d7Smrg unsigned int agpWantedSize; 109272b676d7Smrg unsigned int agpWantedPages; 109372b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 109472b676d7Smrg UChar *agpCmdBufBase; 109572b676d7Smrg unsigned int agpCmdBufSize; 109672b676d7Smrg unsigned int agpCmdBufFree; 109772b676d7Smrg ULong agpVtxBufAddr; /* 315 series */ 109872b676d7Smrg UChar *agpVtxBufBase; 109972b676d7Smrg unsigned int agpVtxBufSize; 110072b676d7Smrg unsigned int agpVtxBufFree; 110172b676d7Smrg sisRegion agp; 110272b676d7Smrg#endif 110372b676d7Smrg Bool AGPInitOK; 110472b676d7Smrg Bool irqEnabled; 110572b676d7Smrg int irq; 110672b676d7Smrg Bool IsAGPCard, IsPCIExpress; 110772b676d7Smrg unsigned int DRIheapstart, DRIheapend; 110872b676d7Smrg Bool NeedFlush; /* Need to flush cmd buf mem (760) */ 110972b676d7Smrg 111072b676d7Smrg#ifdef SIS_USE_XAA 111172b676d7Smrg void (*RenderCallback)(ScrnInfoPtr); 111272b676d7Smrg Time RenderTime; 111372b676d7Smrg FBLinearPtr AccelLinearScratch; 111472b676d7Smrg#endif 111572b676d7Smrg#ifdef SIS_USE_EXA 111672b676d7Smrg void (*ExaRenderCallback)(ScrnInfoPtr); 111772b676d7Smrg Time ExaRenderTime; 111872b676d7Smrg#endif 111972b676d7Smrg UChar *RenderAccelArray; 112072b676d7Smrg Bool doRender; 112172b676d7Smrg 112272b676d7Smrg int ColorExpandRingHead; 112372b676d7Smrg int ColorExpandRingTail; 112472b676d7Smrg int PerColorExpandBufferSize; 112572b676d7Smrg int ColorExpandBufferNumber; 112672b676d7Smrg int ColorExpandBufferCountMask; 112772b676d7Smrg UChar *ColorExpandBufferAddr[32]; 112872b676d7Smrg CARD32 ColorExpandBufferScreenOffset[32]; 112972b676d7Smrg CARD32 ColorExpandBase; 113072b676d7Smrg 113172b676d7Smrg int Rotate, Reflect; 113272b676d7Smrg void (*PointerMoved)(int index, int x, int y); 113372b676d7Smrg 113472b676d7Smrg /* ShadowFB support */ 113572b676d7Smrg Bool ShadowFB; 113672b676d7Smrg UChar *ShadowPtr; 113772b676d7Smrg int ShadowPitch; 113872b676d7Smrg 113972b676d7Smrg#ifdef SISUSEDEVPORT 114072b676d7Smrg Bool sisdevportopen; 114172b676d7Smrg#endif 114272b676d7Smrg 114372b676d7Smrg /* DRI */ 114472b676d7Smrg Bool loadDRI; 114572b676d7Smrg#ifdef XF86DRI 114672b676d7Smrg Bool directRenderingEnabled; 114772b676d7Smrg DRIInfoPtr pDRIInfo; 114872b676d7Smrg int drmSubFD; 114972b676d7Smrg int numVisualConfigs; 115072b676d7Smrg __GLXvisualConfig* pVisualConfigs; 115172b676d7Smrg SISConfigPrivPtr pVisualConfigsPriv; 115272b676d7Smrg SISRegRec DRContextRegs; 115372b676d7Smrg#endif 115472b676d7Smrg 115572b676d7Smrg /* Xv */ 115672b676d7Smrg XF86VideoAdaptorPtr adaptor; 115772b676d7Smrg XF86VideoAdaptorPtr blitadaptor; 115872b676d7Smrg void *blitPriv; 115972b676d7Smrg ScreenBlockHandlerProcPtr BlockHandler; 116072b676d7Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 116172b676d7Smrg void (*ResetXv)(ScrnInfoPtr); 116272b676d7Smrg void (*ResetXvDisplay)(ScrnInfoPtr); 116372b676d7Smrg void (*ResetXvGamma)(ScrnInfoPtr); 116472b676d7Smrg 116572b676d7Smrg /* misc */ 116672b676d7Smrg OptionInfoPtr Options; 116772b676d7Smrg UChar BIOSModeSave; 116872b676d7Smrg int CRT1off; /* 1=CRT1 off, 0=CRT1 on */ 116972b676d7Smrg CARD16 LCDheight; /* Vertical resolution of LCD panel */ 117072b676d7Smrg CARD16 LCDwidth; /* Horizontal resolution of LCD panel */ 117172b676d7Smrg vbeInfoPtr pVbe; /* For VESA mode switching */ 117272b676d7Smrg CARD16 vesamajor; 117372b676d7Smrg CARD16 vesaminor; 117472b676d7Smrg int UseVESA; 117572b676d7Smrg sisModeInfoPtr SISVESAModeList; 117672b676d7Smrg xf86MonPtr monitor; 117772b676d7Smrg CARD16 maxBytesPerScanline; 117872b676d7Smrg CARD32 *pal, *savedPal; 117972b676d7Smrg int mapPhys, mapOff, mapSize; 118072b676d7Smrg int statePage, stateSize, stateMode; 118172b676d7Smrg CARD8 *fonts; 118272b676d7Smrg CARD8 *state, *pstate; 118372b676d7Smrg void *base, *VGAbase; 118472b676d7Smrg#ifdef SISDUALHEAD 118572b676d7Smrg Bool DualHeadMode; /* TRUE if we use dual head mode */ 118672b676d7Smrg Bool SecondHead; /* TRUE is this is the second head */ 118772b676d7Smrg SISEntPtr entityPrivate; /* Ptr to private entity (see above) */ 118872b676d7Smrg Bool SiSXinerama; /* Do we use Xinerama mode? */ 118972b676d7Smrg#endif 119072b676d7Smrg SISFBLayout CurrentLayout; /* Current framebuffer layout */ 119172b676d7Smrg UShort SiS_DDC2_Index; 119272b676d7Smrg UShort SiS_DDC2_Data; 119372b676d7Smrg UShort SiS_DDC2_Clk; 119472b676d7Smrg Bool Primary; /* Display adapter is primary */ 119572b676d7Smrg Bool VGADecodingEnabled; /* a0000 memory adress decoding is enabled */ 119672b676d7Smrg xf86Int10InfoPtr pInt; /* Our int10 */ 119772b676d7Smrg int oldChipset; /* Type of old chipset */ 119872b676d7Smrg int RealVideoRam; /* 6326 can only address 4MB, but TQ can be above */ 119972b676d7Smrg CARD32 CmdQueLenMask; /* Mask of queue length in MMIO register */ 120072b676d7Smrg CARD32 CmdQueLenFix; /* Fix value to subtract from QueLen (530/620) */ 120172b676d7Smrg CARD32 CmdQueMaxLen; /* (6326/5597/5598) Amount of cmds the queue can hold */ 120272b676d7Smrg CARD32 TurboQueueLen; /* For future use */ 120372b676d7Smrg CARD32 detectedCRT2Devices; /* detected CRT2 devices before mask-out */ 120472b676d7Smrg Bool HostBus; /* Enable/disable 5597/5598 host bus */ 120572b676d7Smrg Bool noInternalModes; /* Use our own default modes? */ 120672b676d7Smrg int OptUseOEM; /* Use internal OEM data? */ 120772b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 120872b676d7Smrg int chtvlumabandwidthsvideo; 120972b676d7Smrg int chtvlumaflickerfilter; 121072b676d7Smrg int chtvchromabandwidth; 121172b676d7Smrg int chtvchromaflickerfilter; 121272b676d7Smrg int chtvcvbscolor; 121372b676d7Smrg int chtvtextenhance; 121472b676d7Smrg int chtvcontrast; 121572b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridges */ 121672b676d7Smrg int sistvantiflicker; 121772b676d7Smrg int sistvsaturation; 121872b676d7Smrg int sistvcolcalibc; 121972b676d7Smrg int sistvcolcalibf; 122072b676d7Smrg int sistvcfilter; 122172b676d7Smrg int sistvyfilter; 122272b676d7Smrg int OptTVSOver; /* Chrontel 7005: Superoverscan */ 122372b676d7Smrg int tvxpos, tvypos; 122472b676d7Smrg int tvxscale, tvyscale; 122572b676d7Smrg int SiS6326Flags; /* SiS6326 TV settings */ 122672b676d7Smrg int sis6326enableyfilter; 122772b676d7Smrg int sis6326yfilterstrong; 122872b676d7Smrg int sis6326tvplug; 122972b676d7Smrg int sis6326fscadjust; 123072b676d7Smrg Bool sisfbfound; 123172b676d7Smrg Bool donttrustpdc; /* Don't trust the detected PDC */ 123272b676d7Smrg UChar sisfbpdc, sisfbpdca; 123372b676d7Smrg UChar sisfblcda; 123472b676d7Smrg int sisfbscalelcd; 123572b676d7Smrg unsigned int sisfbspecialtiming; 123672b676d7Smrg Bool sisfb_haveemi, sisfb_haveemilcd, sisfb_tvposvalid, sisfb_havelock; 123772b676d7Smrg UChar sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; 123872b676d7Smrg int sisfb_tvxpos, sisfb_tvypos; 123972b676d7Smrg int siscrt1satgain; 124072b676d7Smrg Bool crt1satgaingiven; 124172b676d7Smrg Bool sisfbHaveNewHeapDef; 124272b676d7Smrg unsigned int sisfbHeapSize, sisfbVideoOffset; 124372b676d7Smrg Bool sisfbxSTN; 124472b676d7Smrg unsigned int sisfbDSTN, sisfbFSTN; 124572b676d7Smrg Bool sisfbcanpost, sisfbcardposted, sisfbprimary; 124672b676d7Smrg char sisfbdevname[16]; 124772b676d7Smrg int EMI; 124872b676d7Smrg int PRGB; 124972b676d7Smrg int NoYV12; /* Disable Xv YV12 support (old series) */ 125072b676d7Smrg UChar postVBCR32; 125172b676d7Smrg int newFastVram; /* Replaces FastVram */ 125272b676d7Smrg int ForceTVType, SenseYPbPr; 125372b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 125472b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 125572b676d7Smrg ULong lockcalls; /* Count unlock calls for debug */ 125672b676d7Smrg UShort tvx, tvy; /* Backup TV position registers */ 125772b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; /* Backup TV position registers */ 125872b676d7Smrg UShort tvx1, tvx2, tvx3, tvy1; /* Backup TV position registers */ 125972b676d7Smrg UChar p2_44, p2_45, p2_46; 126072b676d7Smrg unsigned int sistvccbase; 126172b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 126272b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 126372b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 126472b676d7Smrg Bool ForceCursorOff; 126572b676d7Smrg Bool HaveCustomModes; 126672b676d7Smrg Bool IsCustom; 126772b676d7Smrg DisplayModePtr backupmodelist; 126872b676d7Smrg int chtvtype; 126972b676d7Smrg Atom xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation; 127072b676d7Smrg Atom xvAutopaintColorKey, xvSetDefaults, xvSwitchCRT; 127172b676d7Smrg Atom xvDisableGfx, xvDisableGfxLR, xvTVXPosition, xvTVYPosition; 127272b676d7Smrg Atom xvDisableColorkey, xvUseChromakey, xvChromaMin, xvChromaMax; 127372b676d7Smrg Atom xvInsideChromakey, xvYUVChromakey, xvVSync; 127472b676d7Smrg#ifdef SISDEINT 127572b676d7Smrg Atom xvdeintmeth; 127672b676d7Smrg#endif 127772b676d7Smrg Atom xvGammaRed, xvGammaGreen, xvGammaBlue; 127872b676d7Smrg#ifdef XV_SD_DEPRECATED 127972b676d7Smrg Atom xv_QVF, xv_QVV, xv_USD, xv_SVF, xv_QDD, xv_TAF, xv_TSA, xv_TEE, xv_GSF; 128072b676d7Smrg Atom xv_TTE, xv_TCO, xv_TCC, xv_TCF, xv_TLF, xv_CMD, xv_CMDR, xv_CT1, xv_SGA; 128172b676d7Smrg Atom xv_GDV, xv_GHI, xv_OVR, xv_GBI, xv_TXS, xv_TYS, xv_CFI, xv_COC, xv_COF; 128272b676d7Smrg Atom xv_YFI, xv_GSS, xv_BRR, xv_BRG, xv_BRB, xv_PBR, xv_PBG, xv_PBB, xv_SHC; 128372b676d7Smrg Atom xv_BRR2, xv_BRG2, xv_BRB2, xv_PBR2, xv_PBG2, xv_PBB2, xv_PMD, xv_RDT; 128472b676d7Smrg Atom xv_GARC2,xv_GAGC2,xv_GABC2, xv_GSF2; 128572b676d7Smrg Atom xv_BRRC2, xv_BRGC2, xv_BRBC2, xv_PBRC2, xv_PBGC2, xv_PBBC2; 128672b676d7Smrg#ifdef TWDEBUG 128772b676d7Smrg Atom xv_STR; 128872b676d7Smrg#endif 128972b676d7Smrg unsigned int xv_sd_result; 129072b676d7Smrg#endif /* XV_SD_DEPRECATED */ 129172b676d7Smrg int xv_sisdirectunlocked; 129272b676d7Smrg int SiS76xLFBSize; 129372b676d7Smrg int SiS76xUMASize; 129472b676d7Smrg int CRT1isoff; 129572b676d7Smrg ULong UMAsize, LFBsize; /* For SiSCtrl extension info only */ 129672b676d7Smrg#ifdef SIS_CP 129772b676d7Smrg SIS_CP_H 129872b676d7Smrg#endif 129972b676d7Smrg ULong ChipFlags; 130072b676d7Smrg ULong SiS_SD_Flags, SiS_SD2_Flags, SiS_SD3_Flags, SiS_SD4_Flags; 130172b676d7Smrg Bool UseHWARGBCursor; 130272b676d7Smrg int OptUseColorCursor; 130372b676d7Smrg int OptUseColorCursorBlend; 130472b676d7Smrg CARD32 OptColorCursorBlendThreshold; 130572b676d7Smrg UShort cursorBufferNum; 130672b676d7Smrg int vb; 130772b676d7Smrg Bool restorebyset; 130872b676d7Smrg Bool nocrt2ddcdetection; 130972b676d7Smrg Bool forcecrt2redetection; 131072b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven; 131172b676d7Smrg int XvDefCon, XvDefBri, XvDefHue, XvDefSat; 131272b676d7Smrg Bool XvDefDisableGfx, XvDefDisableGfxLR, XvDefAdaptorBlit; 131372b676d7Smrg Bool XvUseMemcpy; 131472b676d7Smrg Bool XvUseChromaKey, XvDisableColorKey; 131572b676d7Smrg Bool XvInsideChromaKey, XvYUVChromaKey; 131672b676d7Smrg int XvChromaMin, XvChromaMax; 131772b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 131872b676d7Smrg int XvGammaRedDef, XvGammaGreenDef, XvGammaBlueDef; 131972b676d7Smrg CARD8 XvGammaRampRed[256], XvGammaRampGreen[256], XvGammaRampBlue[256]; 132072b676d7Smrg Bool disablecolorkeycurrent; 132172b676d7Smrg CARD32 colorKey; 132272b676d7Smrg CARD32 MiscFlags; 132372b676d7Smrg int UsePanelScaler, CenterLCD; 132472b676d7Smrg float zClearVal; 132572b676d7Smrg ULong bClrColor, dwColor; 132672b676d7Smrg int AllowHotkey; 132772b676d7Smrg Bool enablesisctrl; 132872b676d7Smrg short Video_MaxWidth, Video_MaxHeight; 132972b676d7Smrg int FSTN; 133072b676d7Smrg Bool AddedPlasmaModes; 133172b676d7Smrg short scrnPitch2; 133272b676d7Smrg CARD32 CurFGCol, CurBGCol; 133372b676d7Smrg UChar *CurMonoSrc; 133472b676d7Smrg CARD32 *CurARGBDest; 133572b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; 133672b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 133772b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 133872b676d7Smrg Bool HideHWCursor; /* Custom application */ 133972b676d7Smrg Bool HWCursorIsVisible; 134072b676d7Smrg unsigned int HWCursorBackup[16]; 134172b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 134272b676d7Smrg ULong mmioSize; 134372b676d7Smrg Bool ROM661New; 134472b676d7Smrg Bool HaveXGIBIOS; 134572b676d7Smrg Bool NewCRLayout; 134672b676d7Smrg Bool skipswitchcheck; 134772b676d7Smrg unsigned int VBFlagsInit; 134872b676d7Smrg DisplayModePtr currentModeLast; 134972b676d7Smrg IOADDRESS MyPIOOffset; 135072b676d7Smrg Bool OverruleRanges; 135172b676d7Smrg Bool BenchMemCpy; 135272b676d7Smrg Bool NeedCopyFastVidCpy; 135372b676d7Smrg Bool SiSFastVidCopyDone; 135472b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 135572b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 135672b676d7Smrg unsigned int CPUFlags; 135772b676d7Smrg#ifndef SISCHECKOSSSE 135872b676d7Smrg Bool XvSSEMemcpy; 135972b676d7Smrg#endif 136072b676d7Smrg char messagebuffer[64]; 136172b676d7Smrg unsigned int VGAMapSize; /* SiSVGA stuff */ 136272b676d7Smrg ULong VGAMapPhys; 136372b676d7Smrg void *VGAMemBase; /* mapped */ 136472b676d7Smrg Bool VGAPaletteEnabled; 136572b676d7Smrg Bool VGACMapSaved; 136672b676d7Smrg Bool CRT2SepGamma; /* CRT2 separate gamma stuff */ 136772b676d7Smrg int *crt2cindices; 136872b676d7Smrg LOCO *crt2gcolortable, *crt2colors; 136972b676d7Smrg int CRT2ColNum; 137072b676d7Smrg float GammaR2, GammaG2, GammaB2; 137172b676d7Smrg int GammaR2i, GammaG2i, GammaB2i; 137272b676d7Smrg int GammaBriR2, GammaBriG2, GammaBriB2; 137372b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; 137472b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; 137572b676d7Smrg float NewGammaBriR2, NewGammaBriG2, NewGammaBriB2; 137672b676d7Smrg float NewGammaConR2, NewGammaConG2, NewGammaConB2; 137772b676d7Smrg ExtensionEntry *SiSCtrlExtEntry; 137872b676d7Smrg char devsectname[32]; 137972b676d7Smrg Bool SCLogQuiet; 138072b676d7Smrg#ifdef SIS_NEED_MAP_IOP 138172b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 13821fd23544Smrg void *IOPBase; /* I/O port linear address */ 138372b676d7Smrg#endif 138472b676d7Smrg#ifdef SISMERGED 138572b676d7Smrg Bool MergedFB, MergedFBAuto; 138672b676d7Smrg SiSScrn2Rel CRT2Position; 138772b676d7Smrg char *CRT2HSync; 138872b676d7Smrg char *CRT2VRefresh; 138972b676d7Smrg char *MetaModes; 139072b676d7Smrg ScrnInfoPtr CRT2pScrn; 139172b676d7Smrg DisplayModePtr CRT1Modes; 139272b676d7Smrg DisplayModePtr CRT1CurrentMode; 139372b676d7Smrg int CRT1frameX0; 139472b676d7Smrg int CRT1frameY0; 139572b676d7Smrg int CRT1frameX1; 139672b676d7Smrg int CRT1frameY1; 139772b676d7Smrg Bool CheckForCRT2; 139872b676d7Smrg Bool IsCustomCRT2; 139972b676d7Smrg Bool HaveCustomModes2; 140072b676d7Smrg int maxCRT1_X1, maxCRT1_X2, maxCRT1_Y1, maxCRT1_Y2; 140172b676d7Smrg int maxCRT2_X1, maxCRT2_X2, maxCRT2_Y1, maxCRT2_Y2; 140272b676d7Smrg int maxClone_X1, maxClone_X2, maxClone_Y1, maxClone_Y2; 140372b676d7Smrg int MergedFBXDPI, MergedFBYDPI; 140472b676d7Smrg int CRT1XOffs, CRT1YOffs, CRT2XOffs, CRT2YOffs; 140572b676d7Smrg int MBXNR1XMAX, MBXNR1YMAX, MBXNR2XMAX, MBXNR2YMAX; 140672b676d7Smrg Bool NonRect, HaveNonRect, HaveOffsRegions, MouseRestrictions; 140772b676d7Smrg region NonRectDead, OffDead1, OffDead2; 140872b676d7Smrg#ifdef SISXINERAMA 140972b676d7Smrg Bool UseSiSXinerama; 141072b676d7Smrg Bool CRT2IsScrn0; 141172b676d7Smrg ExtensionEntry *XineramaExtEntry; 141272b676d7Smrg int SiSXineramaVX, SiSXineramaVY; 141372b676d7Smrg Bool AtLeastOneNonClone; 141472b676d7Smrg#endif 141572b676d7Smrg#endif 141672b676d7Smrg} SISRec, *SISPtr; 141772b676d7Smrg 141872b676d7Smrgtypedef struct _ModeInfoData { 141972b676d7Smrg int mode; 142072b676d7Smrg VbeModeInfoBlock *data; 142172b676d7Smrg VbeCRTCInfoBlock *block; 142272b676d7Smrg} ModeInfoData; 142372b676d7Smrg 142472b676d7Smrg#define SDMPTR(x) ((SiSMergedDisplayModePtr)(x->currentMode->Private)) 142572b676d7Smrg#define CDMPTR ((SiSMergedDisplayModePtr)(pSiS->CurrentLayout.mode->Private)) 142672b676d7Smrg 142772b676d7Smrg#define BOUND(test,low,hi) \ 142872b676d7Smrg { \ 142972b676d7Smrg if((test) < (low)) (test) = (low); \ 143072b676d7Smrg if((test) > (hi)) (test) = (hi); \ 143172b676d7Smrg } 143272b676d7Smrg 143372b676d7Smrg#define REBOUND(low,hi,test) \ 143472b676d7Smrg { \ 143572b676d7Smrg if((test) < (low)) { \ 143672b676d7Smrg (hi) += (test)-(low); \ 143772b676d7Smrg (low) = (test); \ 143872b676d7Smrg } \ 143972b676d7Smrg if((test) > (hi)) { \ 144072b676d7Smrg (low) += (test)-(hi); \ 144172b676d7Smrg (hi) = (test); \ 144272b676d7Smrg } \ 144372b676d7Smrg } 144472b676d7Smrg 144572b676d7Smrgtypedef struct _MergedDisplayModeRec { 144672b676d7Smrg DisplayModePtr CRT1; 144772b676d7Smrg DisplayModePtr CRT2; 144872b676d7Smrg SiSScrn2Rel CRT2Position; 144972b676d7Smrg} SiSMergedDisplayModeRec, *SiSMergedDisplayModePtr; 145072b676d7Smrg 145172b676d7Smrgtypedef struct _myhddctiming { 145272b676d7Smrg int whichone; 145372b676d7Smrg UChar mask; 145472b676d7Smrg float rate; 145572b676d7Smrg} myhddctiming; 145672b676d7Smrg 145772b676d7Smrgtypedef struct _myvddctiming { 145872b676d7Smrg int whichone; 145972b676d7Smrg UChar mask; 146072b676d7Smrg int rate; 146172b676d7Smrg} myvddctiming; 146272b676d7Smrg 146372b676d7Smrgtypedef struct _pdctable { 146472b676d7Smrg int subsysVendor; 146572b676d7Smrg int subsysCard; 146672b676d7Smrg int pdc; 146772b676d7Smrg char *vendorName; 146872b676d7Smrg char *cardName; 146972b676d7Smrg} pdctable; 147072b676d7Smrg 147172b676d7Smrgtypedef struct _chswtable { 147272b676d7Smrg int subsysVendor; 147372b676d7Smrg int subsysCard; 147472b676d7Smrg char *vendorName; 147572b676d7Smrg char *cardName; 147672b676d7Smrg} chswtable; 147772b676d7Smrg 147872b676d7Smrgtypedef struct _customttable { 147972b676d7Smrg UShort chipID; 148072b676d7Smrg char *biosversion; 148172b676d7Smrg char *biosdate; 148272b676d7Smrg CARD32 bioschksum; 148372b676d7Smrg UShort biosFootprintAddr[5]; 148472b676d7Smrg UChar biosFootprintData[5]; 148572b676d7Smrg UShort pcisubsysvendor; 148672b676d7Smrg UShort pcisubsyscard; 148772b676d7Smrg char *vendorName; 148872b676d7Smrg char *cardName; 148972b676d7Smrg ULong SpecialID; 149072b676d7Smrg char *optionName; 149172b676d7Smrg} customttable; 149272b676d7Smrg 149372b676d7Smrg#ifdef SISMERGED 149472b676d7Smrg#ifdef SISXINERAMA 149572b676d7Smrgtypedef struct _SiSXineramaData { 149672b676d7Smrg int x; 149772b676d7Smrg int y; 149872b676d7Smrg int width; 149972b676d7Smrg int height; 150072b676d7Smrg} SiSXineramaData; 150172b676d7Smrg#endif 150272b676d7Smrg#endif 150372b676d7Smrg 150472b676d7Smrgextern const customttable SiS_customttable[]; 150572b676d7Smrg 150672b676d7Smrg/* prototypes */ 150772b676d7Smrg 150872b676d7Smrgextern void sisSaveUnlockExtRegisterLock(SISPtr pSiS, UChar *reg1, UChar *reg2); 150972b676d7Smrgextern void sisRestoreExtRegisterLock(SISPtr pSiS, UChar reg1, UChar reg2); 151072b676d7Smrgextern void SiSOptions(ScrnInfoPtr pScrn); 151172b676d7Smrgextern const OptionInfoRec * SISAvailableOptions(int chipid, int busid); 151272b676d7Smrgextern void SiSSetup(ScrnInfoPtr pScrn); 151372b676d7Smrgextern void SISVGAPreInit(ScrnInfoPtr pScrn); 151472b676d7Smrgextern Bool SiSHWCursorInit(ScreenPtr pScreen); 151572b676d7Smrgextern Bool SiSAccelInit(ScreenPtr pScreen); 151672b676d7Smrgextern Bool SiS300AccelInit(ScreenPtr pScreen); 151772b676d7Smrgextern Bool SiS530AccelInit(ScreenPtr pScreen); 151872b676d7Smrgextern Bool SiS315AccelInit(ScreenPtr pScreen); 151972b676d7Smrgextern void SISInitVideo(ScreenPtr pScreen); 152072b676d7Smrgextern void SIS6326InitVideo(ScreenPtr pScreen); 152172b676d7Smrgextern Bool SISDGAInit(ScreenPtr pScreen); 152272b676d7Smrg 152372b676d7Smrg/* For extended mempy() support */ 152472b676d7Smrgextern unsigned int SiSGetCPUFlags(ScrnInfoPtr pScrn); 152572b676d7Smrgextern vidCopyFunc SiSVidCopyInit(ScreenPtr pScreen, vidCopyFunc *UMemCpy, Bool from); 152672b676d7Smrgextern vidCopyFunc SiSVidCopyGetDefault(void); 152772b676d7Smrg 152872b676d7Smrgextern void SiSMemCopyToVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 152972b676d7Smrgextern void SiSMemCopyFromVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 153072b676d7Smrg 153172b676d7Smrgextern void SiS_SetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn, int val); 153272b676d7Smrgextern void SiS_SetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn, int val); 153372b676d7Smrgextern void SiS_SetCHTVlumaflickerfilter(ScrnInfoPtr pScrn, int val); 153472b676d7Smrgextern void SiS_SetCHTVchromabandwidth(ScrnInfoPtr pScrn, int val); 153572b676d7Smrgextern void SiS_SetCHTVchromaflickerfilter(ScrnInfoPtr pScrn, int val); 153672b676d7Smrgextern void SiS_SetCHTVcvbscolor(ScrnInfoPtr pScrn, int val); 153772b676d7Smrgextern void SiS_SetCHTVtextenhance(ScrnInfoPtr pScrn, int val); 153872b676d7Smrgextern void SiS_SetCHTVcontrast(ScrnInfoPtr pScrn, int val); 153972b676d7Smrgextern void SiS_SetSISTVedgeenhance(ScrnInfoPtr pScrn, int val); 154072b676d7Smrgextern void SiS_SetSISTVantiflicker(ScrnInfoPtr pScrn, int val); 154172b676d7Smrgextern void SiS_SetSISTVsaturation(ScrnInfoPtr pScrn, int val); 154272b676d7Smrgextern void SiS_SetSISTVcfilter(ScrnInfoPtr pScrn, int val); 154372b676d7Smrgextern void SiS_SetSISTVyfilter(ScrnInfoPtr pScrn, int val); 154472b676d7Smrgextern void SiS_SetSISTVcolcalib(ScrnInfoPtr pScrn, int val, Bool coarse); 154572b676d7Smrgextern void SiS_SetSIS6326TVantiflicker(ScrnInfoPtr pScrn, int val); 154672b676d7Smrgextern void SiS_SetSIS6326TVenableyfilter(ScrnInfoPtr pScrn, int val); 154772b676d7Smrgextern void SiS_SetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn, int val); 154872b676d7Smrgextern void SiS_SetTVxposoffset(ScrnInfoPtr pScrn, int val); 154972b676d7Smrgextern void SiS_SetTVyposoffset(ScrnInfoPtr pScrn, int val); 155072b676d7Smrgextern void SiS_SetTVxscale(ScrnInfoPtr pScrn, int val); 155172b676d7Smrgextern void SiS_SetTVyscale(ScrnInfoPtr pScrn, int val); 155272b676d7Smrgextern int SiS_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn); 155372b676d7Smrgextern int SiS_GetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn); 155472b676d7Smrgextern int SiS_GetCHTVlumaflickerfilter(ScrnInfoPtr pScrn); 155572b676d7Smrgextern int SiS_GetCHTVchromabandwidth(ScrnInfoPtr pScrn); 155672b676d7Smrgextern int SiS_GetCHTVchromaflickerfilter(ScrnInfoPtr pScrn); 155772b676d7Smrgextern int SiS_GetCHTVcvbscolor(ScrnInfoPtr pScrn); 155872b676d7Smrgextern int SiS_GetCHTVtextenhance(ScrnInfoPtr pScrn); 155972b676d7Smrgextern int SiS_GetCHTVcontrast(ScrnInfoPtr pScrn); 156072b676d7Smrgextern int SiS_GetSISTVedgeenhance(ScrnInfoPtr pScrn); 156172b676d7Smrgextern int SiS_GetSISTVantiflicker(ScrnInfoPtr pScrn); 156272b676d7Smrgextern int SiS_GetSISTVsaturation(ScrnInfoPtr pScrn); 156372b676d7Smrgextern int SiS_GetSISTVcfilter(ScrnInfoPtr pScrn); 156472b676d7Smrgextern int SiS_GetSISTVyfilter(ScrnInfoPtr pScrn); 156572b676d7Smrgextern int SiS_GetSISTVcolcalib(ScrnInfoPtr pScrn, Bool coarse); 156672b676d7Smrgextern int SiS_GetSIS6326TVantiflicker(ScrnInfoPtr pScrn); 156772b676d7Smrgextern int SiS_GetSIS6326TVenableyfilter(ScrnInfoPtr pScrn); 156872b676d7Smrgextern int SiS_GetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn); 156972b676d7Smrgextern int SiS_GetTVxposoffset(ScrnInfoPtr pScrn); 157072b676d7Smrgextern int SiS_GetTVyposoffset(ScrnInfoPtr pScrn); 157172b676d7Smrgextern int SiS_GetTVxscale(ScrnInfoPtr pScrn); 157272b676d7Smrgextern int SiS_GetTVyscale(ScrnInfoPtr pScrn); 157372b676d7Smrgextern int SiS_GetSISCRT1SaturationGain(ScrnInfoPtr pScrn); 157472b676d7Smrgextern void SiS_SetSISCRT1SaturationGain(ScrnInfoPtr pScrn, int val); 157572b676d7Smrg 15761fd23544Smrgextern unsigned int sis_pci_read_device_u32(int device, int offset); 15771fd23544Smrgextern unsigned char sis_pci_read_device_u8(int device, int offset); 15781fd23544Smrgextern unsigned int sis_pci_read_host_bridge_u32(int offset); 15791fd23544Smrgextern unsigned char sis_pci_read_host_bridge_u8(int offset); 15801fd23544Smrgextern void sis_pci_write_host_bridge_u8(int offset, unsigned char value); 15811fd23544Smrgextern void sis_pci_write_host_bridge_u32(int offset, unsigned int value); 158272b676d7Smrg#endif /* _SIS_H_ */ 158372b676d7Smrg 158472b676d7Smrg 158572b676d7Smrg 1586