sis.h revision 72b676d7
172b676d7Smrg/* $XFree86$ */ 272b676d7Smrg/* $XdotOrg: driver/xf86-video-sis/src/sis.h,v 1.67 2006/04/07 21:05:21 ajax Exp $ */ 372b676d7Smrg/* 472b676d7Smrg * Main global data and definitions 572b676d7Smrg * 672b676d7Smrg * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 772b676d7Smrg * 872b676d7Smrg * Redistribution and use in source and binary forms, with or without 972b676d7Smrg * modification, are permitted provided that the following conditions 1072b676d7Smrg * are met: 1172b676d7Smrg * 1) Redistributions of source code must retain the above copyright 1272b676d7Smrg * notice, this list of conditions and the following disclaimer. 1372b676d7Smrg * 2) Redistributions in binary form must reproduce the above copyright 1472b676d7Smrg * notice, this list of conditions and the following disclaimer in the 1572b676d7Smrg * documentation and/or other materials provided with the distribution. 1672b676d7Smrg * 3) The name of the author may not be used to endorse or promote products 1772b676d7Smrg * derived from this software without specific prior written permission. 1872b676d7Smrg * 1972b676d7Smrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 2072b676d7Smrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 2172b676d7Smrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2272b676d7Smrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2372b676d7Smrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2472b676d7Smrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2572b676d7Smrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2672b676d7Smrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2772b676d7Smrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2872b676d7Smrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2972b676d7Smrg * 3072b676d7Smrg * Authors: Thomas Winischhofer <thomas@winischhofer.net> 3172b676d7Smrg * others (old code base) 3272b676d7Smrg * 3372b676d7Smrg */ 3472b676d7Smrg 3572b676d7Smrg#ifndef _SIS_H_ 3672b676d7Smrg#define _SIS_H_ 3772b676d7Smrg 3872b676d7Smrg#include <stdio.h> 3972b676d7Smrg#include <string.h> 4072b676d7Smrg#include <math.h> 4172b676d7Smrg#include <setjmp.h> 4272b676d7Smrg 4372b676d7Smrg#define SISDRIVERVERSIONYEAR 5 4472b676d7Smrg#define SISDRIVERVERSIONMONTH 9 4572b676d7Smrg#define SISDRIVERVERSIONDAY 20 4672b676d7Smrg#define SISDRIVERREVISION 1 4772b676d7Smrg 4872b676d7Smrg#define SISDRIVERIVERSION ((SISDRIVERVERSIONYEAR << 16) | \ 4972b676d7Smrg (SISDRIVERVERSIONMONTH << 8) | \ 5072b676d7Smrg SISDRIVERVERSIONDAY | \ 5172b676d7Smrg (SISDRIVERREVISION << 24)) 5272b676d7Smrg 5372b676d7Smrg#undef SIS_LINUX /* Try to find out whether platform is Linux */ 5472b676d7Smrg#if defined(__GNUC__) && (__GNUC__ >= 4) 5572b676d7Smrg#ifdef __linux__ 5672b676d7Smrg#define SIS_LINUX 5772b676d7Smrg#endif 5872b676d7Smrg#else 5972b676d7Smrg#ifdef linux 6072b676d7Smrg#define SIS_LINUX 6172b676d7Smrg#endif 6272b676d7Smrg#endif 6372b676d7Smrg 6472b676d7Smrg#if 0 6572b676d7Smrg#define TWDEBUG /* for debugging */ 6672b676d7Smrg#endif 6772b676d7Smrg 6872b676d7Smrg#undef SIS_CP 6972b676d7Smrg#if 0 7072b676d7Smrg#include "siscp.H" 7172b676d7Smrg#endif 7272b676d7Smrg 7372b676d7Smrg#include "compiler.h" 7472b676d7Smrg#include "xf86Pci.h" 7572b676d7Smrg#include "xf86Priv.h" 7672b676d7Smrg#include "xf86_OSproc.h" 7772b676d7Smrg#include "xf86Resources.h" 7872b676d7Smrg#include "xf86.h" 7972b676d7Smrg#include "xf86PciInfo.h" 8072b676d7Smrg#include "xf86Cursor.h" 8172b676d7Smrg#include "xf86cmap.h" 8272b676d7Smrg#include "vbe.h" 8372b676d7Smrg 8472b676d7Smrg#define SIS_HaveDriverFuncs 0 8572b676d7Smrg 8672b676d7Smrg#undef SISISXORG6899900 8772b676d7Smrg#ifdef XORG_VERSION_CURRENT 8872b676d7Smrg#include "xorgVersion.h" 8972b676d7Smrg#define SISMYSERVERNAME "X.org" 9072b676d7Smrg#ifndef XF86_VERSION_NUMERIC 9172b676d7Smrg#define XF86_VERSION_NUMERIC(major,minor,patch,snap,dummy) \ 9272b676d7Smrg (((major) * 10000000) + ((minor) * 100000) + ((patch) * 1000) + snap) 9372b676d7Smrg#define XF86_VERSION_CURRENT XF86_VERSION_NUMERIC(4,3,99,902,0) 9472b676d7Smrg#endif 9572b676d7Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,900,0) 9672b676d7Smrg#define SISISXORG6899900 9772b676d7Smrg#endif 9872b676d7Smrg#if 0 9972b676d7Smrg#ifdef HaveDriverFuncs 10072b676d7Smrg#define SIS_HAVE_DRIVER_FUNC 10172b676d7Smrg#undef SIS_HaveDriverFuncs 10272b676d7Smrg#define SIS_HaveDriverFuncs HaveDriverFuncs 10372b676d7Smrg#endif 10472b676d7Smrg#endif 10572b676d7Smrg#else 10672b676d7Smrg#include "xf86Version.h" 10772b676d7Smrg#define SISMYSERVERNAME "XFree86" 10872b676d7Smrg#endif 10972b676d7Smrg 11072b676d7Smrg#define SIS_NAME "SIS" 11172b676d7Smrg#define SIS_DRIVER_NAME "sis" 11272b676d7Smrg#define SIS_MAJOR_VERSION 0 11372b676d7Smrg#ifdef SISISXORG6899900 11472b676d7Smrg#define SIS_MINOR_VERSION 9 /* DRI changes */ 11572b676d7Smrg#define SIS_PATCHLEVEL 1 11672b676d7Smrg#else 11772b676d7Smrg#define SIS_MINOR_VERSION 7 11872b676d7Smrg#define SIS_PATCHLEVEL 1 11972b676d7Smrg#endif 12072b676d7Smrg#define SIS_CURRENT_VERSION ((SIS_MAJOR_VERSION << 16) | \ 12172b676d7Smrg (SIS_MINOR_VERSION << 8) | SIS_PATCHLEVEL ) 12272b676d7Smrg 12372b676d7Smrg#if (XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,0,0)) || (defined(XvExtension)) 12472b676d7Smrg#include "xf86xv.h" 12572b676d7Smrg#include <X11/extensions/Xv.h> 12672b676d7Smrg#endif 12772b676d7Smrg 12872b676d7Smrg/* Platform/architecture related definitions: */ 12972b676d7Smrg 13072b676d7Smrg/* SIS_PC_PLATFORM: Map VGA memory at a0000 and save/restore fonts? */ 13172b676d7Smrg/* List of architectures likely to be incomplete */ 13272b676d7Smrg#define SIS_PC_PLATFORM 13372b676d7Smrg#if defined(__powerpc__) || defined(__mips__) || defined(__arm32__) 13472b676d7Smrg#undef SIS_PC_PLATFORM 13572b676d7Smrg#endif 13672b676d7Smrg 13772b676d7Smrg/* SIS_USE_BIOS_SCRATCH: Save/restore mode number in BIOS scratch area? */ 13872b676d7Smrg#undef SIS_USE_BIOS_SCRATCH 13972b676d7Smrg#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__) 14072b676d7Smrg#define SIS_USE_BIOS_SCRATCH 14172b676d7Smrg#endif 14272b676d7Smrg 14372b676d7Smrg/* SIS_NEED_MAP_IOP: Map i/o port area to virtual memory? */ 14472b676d7Smrg/* List of architectures likely to be incomplete */ 14572b676d7Smrg/* This is BROKEN, see comment in sis_driver.c */ 14672b676d7Smrg#undef SIS_NEED_MAP_IOP 14772b676d7Smrg#if 0 14872b676d7Smrg#if defined(__arm32__) || defined(__mips__) 14972b676d7Smrg#define SIS_NEED_MAP_IOP 15072b676d7Smrg#endif 15172b676d7Smrg#endif 15272b676d7Smrg 15372b676d7Smrg/* SISUSEDEVPORT: Used on architectures without direct inX/outX access. In this case, 15472b676d7Smrg * we use read()/write() to /dev/port. LINUX ONLY! (How can this be done on *BSD?) 15572b676d7Smrg */ 15672b676d7Smrg#undef SISUSEDEVPORT 15772b676d7Smrg#if defined(SIS_LINUX) && (defined(__arm32__) || defined(__mips__)) 15872b676d7Smrg#ifndef SIS_NEED_MAP_IOP 15972b676d7Smrg#define SISUSEDEVPORT 16072b676d7Smrg#endif 16172b676d7Smrg#endif 16272b676d7Smrg 16372b676d7Smrg/* Our #includes: Require the arch/platform dependent #defines above */ 16472b676d7Smrg 16572b676d7Smrg#include "osdef.h" 16672b676d7Smrg#include "vgatypes.h" 16772b676d7Smrg#include "vstruct.h" 16872b676d7Smrg 16972b676d7Smrg#undef SISHAVEDRMWRITE 17072b676d7Smrg#undef SISNEWDRI 17172b676d7Smrg#ifdef XF86DRI 17272b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,3,0) 17372b676d7Smrg#define SISHAVEDRMWRITE 17472b676d7Smrg#endif 17572b676d7Smrg#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,14,0) 17672b676d7Smrg#define SISNEWDRI 17772b676d7Smrg#endif 17872b676d7Smrg#undef SIS315DRI /* define this if dri is adapted for 315/330 series */ 17972b676d7Smrg#include "xf86drm.h" 18072b676d7Smrg#include "sarea.h" 18172b676d7Smrg#define _XF86DRI_SERVER_ 18272b676d7Smrg#include "dri.h" 18372b676d7Smrg#include "GL/glxint.h" 18472b676d7Smrg#include "sis_dri.h" 18572b676d7Smrg#endif /* XF86DRI */ 18672b676d7Smrg 18772b676d7Smrg/* Configurable stuff: ------------------------------------- */ 18872b676d7Smrg 18972b676d7Smrg#define SISDUALHEAD /* Include Dual Head code */ 19072b676d7Smrg 19172b676d7Smrg#define SISMERGED /* Include Merged-FB code */ 19272b676d7Smrg 19372b676d7Smrg#undef SISXINERAMA 19472b676d7Smrg#ifdef SISMERGED 19572b676d7Smrg#define SISXINERAMA /* Include SiS Pseudo-Xinerama for MergedFB mode */ 19672b676d7Smrg#define SIS_XINERAMA_MAJOR_VERSION 1 19772b676d7Smrg#define SIS_XINERAMA_MINOR_VERSION 1 19872b676d7Smrg#endif 19972b676d7Smrg 20072b676d7Smrg#define SIS_ARGB_CURSOR /* Include code for color hardware cursors */ 20172b676d7Smrg 20272b676d7Smrg#define ENABLE_YPBPR /* Include YPbPr support on SiS bridges (315 series and 661/741/760) */ 20372b676d7Smrg 20472b676d7Smrg#define SISVRAMQ /* Use VRAM queue mode on 315/330/340/XGI series */ 20572b676d7Smrg 20672b676d7Smrg#undef INCL_YUV_BLIT_ADAPTOR 20772b676d7Smrg#ifdef SISVRAMQ 20872b676d7Smrg#define INCL_YUV_BLIT_ADAPTOR /* Include support for YUV->RGB blit adaptors (VRAM queue mode only) */ 20972b676d7Smrg#endif 21072b676d7Smrg 21172b676d7Smrg#if 1 21272b676d7Smrg#define SIS_USE_XAA /* Include code for XAA */ 21372b676d7Smrg#endif 21472b676d7Smrg 21572b676d7Smrg#ifdef SISVRAMQ 21672b676d7Smrg#ifdef XORG_VERSION_CURRENT 21772b676d7Smrg#if defined(SIS_HAVE_EXA) || (defined(XF86EXA) && (XF86EXA != 0)) 21872b676d7Smrg#if 1 21972b676d7Smrg#define SIS_USE_EXA /* Include code for EXA */ 22072b676d7Smrg#endif 22172b676d7Smrg#endif 22272b676d7Smrg#endif 22372b676d7Smrg#endif 22472b676d7Smrg 22572b676d7Smrg#if 0 22672b676d7Smrg#define SISDEINT /* Include Xv deinterlacer code (not functional yet!) */ 22772b676d7Smrg#endif 22872b676d7Smrg 22972b676d7Smrg#if 0 23072b676d7Smrg#define XV_SD_DEPRECATED /* Include deprecated XV SD interface for SiSCtrl */ 23172b676d7Smrg#endif 23272b676d7Smrg 23372b676d7Smrg/* End of configurable stuff --------------------------------- */ 23472b676d7Smrg 23572b676d7Smrg#define UNLOCK_ALWAYS /* Always unlock the registers (should be set!) */ 23672b676d7Smrg 23772b676d7Smrg#if !defined(SIS_USE_XAA) && !defined(SIS_USE_EXA) 23872b676d7Smrg#define SIS_USE_XAA 23972b676d7Smrg#endif 24072b676d7Smrg 24172b676d7Smrg#ifdef SIS_USE_XAA 24272b676d7Smrg#include "xaa.h" 24372b676d7Smrg#endif 24472b676d7Smrg#ifdef SIS_USE_EXA 24572b676d7Smrg#include "exa.h" 24672b676d7Smrg#endif 24772b676d7Smrg 24872b676d7Smrg/* Need that for SiSCtrl and Pseudo-Xinerama */ 24972b676d7Smrg#define NEED_REPLIES /* ? */ 25072b676d7Smrg#define EXTENSION_PROC_ARGS void * 25172b676d7Smrg#include "extnsionst.h" /* required */ 25272b676d7Smrg#include <X11/extensions/panoramiXproto.h> /* required */ 25372b676d7Smrg 25472b676d7Smrg#undef SISCHECKOSSSE 25572b676d7Smrg#ifdef XORG_VERSION_CURRENT 25672b676d7Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0) 25772b676d7Smrg#define SISCHECKOSSSE /* Automatic check OS for SSE; requires SigIll facility */ 25872b676d7Smrg#endif 25972b676d7Smrg#endif 26072b676d7Smrg 26172b676d7Smrg#undef SISGAMMARAMP 26272b676d7Smrg#ifdef XORG_VERSION_CURRENT 26372b676d7Smrg#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(6,8,99,13,0) 26472b676d7Smrg#define SISGAMMARAMP /* Driver can set gamma ramp; requires additional symbols in xf86sym.h */ 26572b676d7Smrg#endif 26672b676d7Smrg#endif 26772b676d7Smrg 26872b676d7Smrg#if 0 /* Perhaps for future use */ 26972b676d7Smrg#if 1 27072b676d7Smrg#define SIS_PCI_BUS(a) (a)->bus 27172b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->device 27272b676d7Smrg#define SIS_PCI_FUNC(a) (a)->func 27372b676d7Smrg#define SIS_PCI_TAG(a) pciTag((a)->bus, (a)->device, (a)->func); 27472b676d7Smrg#else 27572b676d7Smrg#define SIS_PCI_BUS(a) (a)->pciid.bus 27672b676d7Smrg#define SIS_PCI_DEVICE(a) (a)->pciid.device 27772b676d7Smrg#define SIS_PCI_FUNC(a) (a)->pciid.func 27872b676d7Smrg#define SIS_PCI_TAG(a) pciTag(&((a)->pciid)); 27972b676d7Smrg#endif 28072b676d7Smrg#endif 28172b676d7Smrg 28272b676d7Smrg#ifdef TWDEBUG 28372b676d7Smrg#define SISVERBLEVEL 3 28472b676d7Smrg#else 28572b676d7Smrg#define SISVERBLEVEL 4 28672b676d7Smrg#endif 28772b676d7Smrg 28872b676d7Smrg/* For SiS315/550/650/740/330/660 - these should be moved elsewhere! */ 28972b676d7Smrg#ifndef PCI_CHIP_SIS315H 29072b676d7Smrg#define PCI_CHIP_SIS315H 0x0310 29172b676d7Smrg#endif 29272b676d7Smrg#ifndef PCI_CHIP_SIS315 29372b676d7Smrg#define PCI_CHIP_SIS315 0x0315 29472b676d7Smrg#endif 29572b676d7Smrg#ifndef PCI_CHIP_SIS315PRO 29672b676d7Smrg#define PCI_CHIP_SIS315PRO 0x0325 29772b676d7Smrg#endif 29872b676d7Smrg#ifndef PCI_CHIP_SIS550 29972b676d7Smrg#define PCI_CHIP_SIS550 0x5315 /* 550_VGA */ 30072b676d7Smrg#endif 30172b676d7Smrg#ifndef PCI_CHIP_SIS650 30272b676d7Smrg#define PCI_CHIP_SIS650 0x6325 /* 650_VGA and 740_VGA */ 30372b676d7Smrg#endif 30472b676d7Smrg#ifndef PCI_CHIP_SIS330 30572b676d7Smrg#define PCI_CHIP_SIS330 0x0330 30672b676d7Smrg#endif 30772b676d7Smrg#ifndef PCI_CHIP_SIS660 30872b676d7Smrg#define PCI_CHIP_SIS660 0x6330 /* 661_VGA, 741_VGA, 760_VGA, 761_VGA */ 30972b676d7Smrg#endif 31072b676d7Smrg#ifndef PCI_CHIP_SIS340 31172b676d7Smrg#define PCI_CHIP_SIS340 0x0340 31272b676d7Smrg#endif 31372b676d7Smrg 31472b676d7Smrg#ifndef PCI_VENDOR_XGI 31572b676d7Smrg#define PCI_VENDOR_XGI 0x18ca 31672b676d7Smrg#endif 31772b676d7Smrg 31872b676d7Smrg#ifndef PCI_CHIP_XGIXG20 31972b676d7Smrg#define PCI_CHIP_XGIXG20 0x0020 32072b676d7Smrg#endif 32172b676d7Smrg 32272b676d7Smrg#ifndef PCI_CHIP_XGIXG40 32372b676d7Smrg#define PCI_CHIP_XGIXG40 0x0040 32472b676d7Smrg#endif 32572b676d7Smrg 32672b676d7Smrg/* pSiS->Flags (old series only) */ 32772b676d7Smrg#define SYNCDRAM 0x00000001 32872b676d7Smrg#define RAMFLAG 0x00000002 32972b676d7Smrg#define ESS137xPRESENT 0x00000004 33072b676d7Smrg#define SECRETFLAG 0x00000008 33172b676d7Smrg#define A6326REVAB 0x00000010 33272b676d7Smrg#define MMIOMODE 0x00010000 33372b676d7Smrg#define LFBQMODE 0x00020000 33472b676d7Smrg#define AGPQMODE 0x00040000 33572b676d7Smrg#define UMA 0x80000000 33672b676d7Smrg 33772b676d7Smrg#define BIOS_BASE 0xC0000 33872b676d7Smrg#define BIOS_SIZE 0x10000 33972b676d7Smrg 34072b676d7Smrg#define SIS_VBFlagsVersion 1 34172b676d7Smrg 34272b676d7Smrg/* pSiS->VBFlags - if anything is changed here, increase VBFlagsVersion! */ 34372b676d7Smrg#define CRT2_DEFAULT 0x00000001 34472b676d7Smrg#define CRT2_LCD 0x00000002 /* Never change the order of the CRT2_XXX entries */ 34572b676d7Smrg#define CRT2_TV 0x00000004 34672b676d7Smrg#define CRT2_VGA 0x00000008 34772b676d7Smrg#define TV_NTSC 0x00000010 34872b676d7Smrg#define TV_PAL 0x00000020 34972b676d7Smrg#define TV_HIVISION 0x00000040 35072b676d7Smrg#define TV_YPBPR 0x00000080 35172b676d7Smrg#define TV_AVIDEO 0x00000100 35272b676d7Smrg#define TV_SVIDEO 0x00000200 35372b676d7Smrg#define TV_SCART 0x00000400 35472b676d7Smrg#define OLDVB_CONEXANT 0x00000800 /* Definition deprecated (now VBFlags2) */ 35572b676d7Smrg#define OLDVB_TRUMPION OLDVB_CONEXANT /* Definition deprecated (now VBFlags2) */ 35672b676d7Smrg#define TV_PALM 0x00001000 35772b676d7Smrg#define TV_PALN 0x00002000 35872b676d7Smrg#define TV_NTSCJ TV_PALM 35972b676d7Smrg#define OLDVB_302ELV 0x00004000 /* Definition deprecated (now VBFlags2) */ 36072b676d7Smrg#define TV_CHSCART 0x00008000 36172b676d7Smrg#define TV_CHYPBPR525I 0x00010000 36272b676d7Smrg#define CRT1_VGA 0x00000000 /* ZERO - no mask! */ 36372b676d7Smrg#define CRT1_LCDA 0x00020000 36472b676d7Smrg#define VGA2_CONNECTED 0x00040000 36572b676d7Smrg#define DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ 36672b676d7Smrg#define TV_YPBPR625I 0x00100000 36772b676d7Smrg#define TV_YPBPR625P 0x00200000 36872b676d7Smrg#define OLDVB_302B 0x00400000 /* Definition deprecated (now VBFlags2) */ 36972b676d7Smrg#define OLDVB_30xBDH 0x00800000 /* Definition deprecated (now VBFlags2) */ 37072b676d7Smrg#define OLDVB_LVDS 0x01000000 /* Definition deprecated (now VBFlags2) */ 37172b676d7Smrg#define OLDVB_CHRONTEL 0x02000000 /* Definition deprecated (now VBFlags2) */ 37272b676d7Smrg#define OLDVB_301LV 0x04000000 /* Definition deprecated (now VBFlags2) */ 37372b676d7Smrg#define OLDVB_302LV 0x08000000 /* Definition deprecated (now VBFlags2) */ 37472b676d7Smrg#define OLDVB_301C 0x10000000 /* Definition deprecated (now VBFlags2) */ 37572b676d7Smrg#define SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ 37672b676d7Smrg#define MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ 37772b676d7Smrg#define DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ 37872b676d7Smrg 37972b676d7Smrg/* Aliases: */ 38072b676d7Smrg#define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA) 38172b676d7Smrg#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) 38272b676d7Smrg#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR) 38372b676d7Smrg 38472b676d7Smrg/* Only if TV_YPBPR is set: */ 38572b676d7Smrg#define TV_YPBPR525I TV_NTSC 38672b676d7Smrg#define TV_YPBPR525P TV_PAL 38772b676d7Smrg#define TV_YPBPR750P TV_PALM 38872b676d7Smrg#define TV_YPBPR1080I TV_PALN 38972b676d7Smrg#define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | \ 39072b676d7Smrg TV_YPBPR625I | TV_YPBPR625P | \ 39172b676d7Smrg TV_YPBPR750P | TV_YPBPR1080I) 39272b676d7Smrg 39372b676d7Smrg#define TV_YPBPR43LB TV_CHSCART 39472b676d7Smrg#define TV_YPBPR43 TV_CHYPBPR525I 39572b676d7Smrg#define TV_YPBPR169 (TV_CHSCART | TV_CHYPBPR525I) 39672b676d7Smrg#define TV_YPBPRAR (TV_CHSCART | TV_CHYPBPR525I) 39772b676d7Smrg 39872b676d7Smrg#define DISPTYPE_DISP2 CRT2_ENABLE 39972b676d7Smrg#define DISPTYPE_DISP1 DISPTYPE_CRT1 40072b676d7Smrg#define VB_DISPMODE_SINGLE SINGLE_MODE /* alias */ 40172b676d7Smrg#define VB_DISPMODE_MIRROR MIRROR_MODE /* alias */ 40272b676d7Smrg#define VB_DISPMODE_DUAL DUALVIEW_MODE /* alias */ 40372b676d7Smrg#define DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) 40472b676d7Smrg 40572b676d7Smrg/* pSiS->VBFlags2 (static stuff only!) */ 40672b676d7Smrg#define VB2_SISUMC 0x00000001 40772b676d7Smrg#define VB2_301 0x00000002 /* Video bridge type */ 40872b676d7Smrg#define VB2_301B 0x00000004 40972b676d7Smrg#define VB2_301C 0x00000008 41072b676d7Smrg#define VB2_307T 0x00000010 41172b676d7Smrg#define VB2_302B 0x00000800 41272b676d7Smrg#define VB2_301LV 0x00001000 41372b676d7Smrg#define VB2_302LV 0x00002000 41472b676d7Smrg#define VB2_302ELV 0x00004000 41572b676d7Smrg#define VB2_307LV 0x00008000 41672b676d7Smrg#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */ 41772b676d7Smrg#define VB2_CONEXANT 0x10000000 /* >=661 series only */ 41872b676d7Smrg#define VB2_TRUMPION 0x20000000 /* 300 series only */ 41972b676d7Smrg#define VB2_LVDS 0x40000000 42072b676d7Smrg#define VB2_CHRONTEL 0x80000000 42172b676d7Smrg 42272b676d7Smrg#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 42372b676d7Smrg#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 42472b676d7Smrg#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE) 42572b676d7Smrg 42672b676d7Smrg#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T) 42772b676d7Smrg#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV) 42872b676d7Smrg 42972b676d7Smrg#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B) 43072b676d7Smrg#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE) 43172b676d7Smrg#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV) 43272b676d7Smrg#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV) 43372b676d7Smrg#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE) 43472b676d7Smrg 43572b676d7Smrg#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T) 43672b676d7Smrg 43772b676d7Smrg#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT) 43872b676d7Smrg 43972b676d7Smrg#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T) 44072b676d7Smrg#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE) 44172b676d7Smrg#define VB2_30xC (VB2_301C | VB2_307T) 44272b676d7Smrg#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV) 44372b676d7Smrg#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV) 44472b676d7Smrg#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T) 44572b676d7Smrg/* CRT2/LCD over 1280 (overflow bits in Part4) */ 44672b676d7Smrg#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV) 44772b676d7Smrg/* CRT2/LCD over 1600? Is this really gonna happen, or will there be LCDA only for large panels? */ 44872b676d7Smrg#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV) 44972b676d7Smrg/* VGA2 up to 202MHz (1600x1200@75) */ 45072b676d7Smrg#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T) 45172b676d7Smrg 45272b676d7Smrg/* pSiS->VBFlags3 (for future use) */ 45372b676d7Smrg#define VB3_CRT1_TV 0x00000001 45472b676d7Smrg#define VB3_CRT1_LCD 0x00000002 45572b676d7Smrg#define VB3_CRT1_VGA 0x00000004 45672b676d7Smrg#define TV1_AVIDEO 0x00000100 45772b676d7Smrg#define TV1_SVIDEO 0x00000200 45872b676d7Smrg#define TV1_SCART 0x00000400 45972b676d7Smrg#define TV1_NTSC 0x00000800 46072b676d7Smrg#define TV1_PAL 0x00001000 46172b676d7Smrg#define TV1_YPBPR 0x00002000 46272b676d7Smrg#define TV1_PALM 0x00004000 46372b676d7Smrg#define TV1_PALN 0x00008000 46472b676d7Smrg#define TV1_NTSCJ 0x00010000 46572b676d7Smrg#define TV1_YPBPR525I 0x00020000 46672b676d7Smrg#define TV1_YPBPR525P 0x00040000 46772b676d7Smrg#define TV1_YPBPR625I 0x00080000 46872b676d7Smrg#define TV1_YPBPR625P 0x00100000 46972b676d7Smrg#define TV1_YPBPR750P 0x00200000 47072b676d7Smrg#define TV1_YPBPR1080I 0x00400000 47172b676d7Smrg 47272b676d7Smrg/* pSiS->VBLCDFlags */ 47372b676d7Smrg#define VB_LCD_320x480 0x00000001 /* DSTN/FSTN for 550 */ 47472b676d7Smrg#define VB_LCD_640x480 0x00000002 47572b676d7Smrg#define VB_LCD_800x600 0x00000004 47672b676d7Smrg#define VB_LCD_1024x768 0x00000008 47772b676d7Smrg#define VB_LCD_1280x1024 0x00000010 47872b676d7Smrg#define VB_LCD_1280x960 0x00000020 47972b676d7Smrg#define VB_LCD_1600x1200 0x00000040 48072b676d7Smrg#define VB_LCD_2048x1536 0x00000080 48172b676d7Smrg#define VB_LCD_1400x1050 0x00000100 48272b676d7Smrg#define VB_LCD_1152x864 0x00000200 48372b676d7Smrg#define VB_LCD_1152x768 0x00000400 48472b676d7Smrg#define VB_LCD_1280x768 0x00000800 48572b676d7Smrg#define VB_LCD_1024x600 0x00001000 48672b676d7Smrg#define VB_LCD_640x480_2 0x00002000 /* DSTN/FSTN */ 48772b676d7Smrg#define VB_LCD_640x480_3 0x00004000 /* DSTN/FSTN */ 48872b676d7Smrg#define VB_LCD_848x480 0x00008000 /* LVDS only, otherwise handled as custom */ 48972b676d7Smrg#define VB_LCD_1280x800 0x00010000 49072b676d7Smrg#define VB_LCD_1680x1050 0x00020000 49172b676d7Smrg#define VB_LCD_1280x720 0x00040000 49272b676d7Smrg#define VB_LCD_320x240 0x00080000 49372b676d7Smrg#define VB_LCD_856x480 0x00100000 49472b676d7Smrg#define VB_LCD_1280x854 0x00200000 49572b676d7Smrg#define VB_LCD_1920x1200 0x00400000 49672b676d7Smrg#define VB_LCD_UNKNOWN 0x10000000 49772b676d7Smrg#define VB_LCD_BARCO1366 0x20000000 49872b676d7Smrg#define VB_LCD_CUSTOM 0x40000000 49972b676d7Smrg#define VB_LCD_EXPANDING 0x80000000 50072b676d7Smrg 50172b676d7Smrg#define VB_FORBID_CRT2LCD_OVER_1600 /* CRT2/LCD supports only up to 1600 pixels */ 50272b676d7Smrg 50372b676d7Smrg/* PresetMode argument */ 50472b676d7Smrg#define SIS_MODE_SIMU 0 50572b676d7Smrg#define SIS_MODE_CRT1 1 50672b676d7Smrg#define SIS_MODE_CRT2 2 50772b676d7Smrg 50872b676d7Smrg/* pSiS->MiscFlags */ 50972b676d7Smrg#define MISC_CRT1OVERLAY 0x00000001 /* Current display mode supports overlay (CRT1) */ 51072b676d7Smrg#define MISC_PANELLINKSCALER 0x00000002 /* Panel link is currently scaling */ 51172b676d7Smrg#define MISC_CRT1OVERLAYGAMMA 0x00000004 /* Current display mode supports overlay gamma corr on CRT1 */ 51272b676d7Smrg#define MISC_TVNTSC1024 0x00000008 /* Current display mode is TV NTSC/PALM/YPBPR525I 1024x768 */ 51372b676d7Smrg#define MISC_CRT2OVERLAY 0x00000010 /* Current display mode supports overlay (CRT2) */ 51472b676d7Smrg#define MISC_SIS760ONEOVERLAY 0x00000020 /* SiS760/761: Only one overlay available currently */ 51572b676d7Smrg#define MISC_STNMODE 0x00000040 /* SiS550: xSTN active */ 51672b676d7Smrg 51772b676d7Smrg/* pSiS->SiS6326Flags */ 51872b676d7Smrg#define SIS6326_HASTV 0x00000001 51972b676d7Smrg#define SIS6326_TVSVIDEO 0x00000002 52072b676d7Smrg#define SIS6326_TVCVBS 0x00000004 52172b676d7Smrg#define SIS6326_TVPAL 0x00000008 52272b676d7Smrg#define SIS6326_TVDETECTED 0x00000010 52372b676d7Smrg#define SIS6326_TVON 0x80000000 52472b676d7Smrg 52572b676d7Smrg#ifdef DEBUG 52672b676d7Smrg#define PDEBUG(p) p 52772b676d7Smrg#else 52872b676d7Smrg#define PDEBUG(p) 52972b676d7Smrg#endif 53072b676d7Smrg 53172b676d7Smrg#define BITMASK(h,l) (((unsigned)(1U << ((h) - (l) + 1)) - 1) << (l)) 53272b676d7Smrg#define GENMASK(mask) BITMASK(1 ? mask, 0 ? mask) 53372b676d7Smrg 53472b676d7Smrg#define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0 ? mask)) 53572b676d7Smrg#define SETBITS(val,mask) ((val) << (0 ? mask)) 53672b676d7Smrg#define SETBIT(n) (1 << (n)) 53772b676d7Smrg 53872b676d7Smrg#define GETBITSTR(val,from,to) ((GETBITS(val, from)) << (0 ? to)) 53972b676d7Smrg#define SETVARBITS(var,val,from,to) (((var) & (~(GENMASK(to)))) | GETBITSTR(val,from,to)) 54072b676d7Smrg#define GETVAR8(var) ((var) & 0xFF) 54172b676d7Smrg#define SETVAR8(var,val) (var) = GETVAR8(val) 54272b676d7Smrg 54372b676d7Smrgtypedef unsigned long ULong; 54472b676d7Smrgtypedef unsigned short UShort; 54572b676d7Smrgtypedef unsigned char UChar; 54672b676d7Smrg 54772b676d7Smrg/* pSiS->VGAEngine - VGA engine types */ 54872b676d7Smrg#define UNKNOWN_VGA 0 54972b676d7Smrg#define SIS_530_VGA 1 55072b676d7Smrg#define SIS_OLD_VGA 2 55172b676d7Smrg#define SIS_300_VGA 3 55272b676d7Smrg#define SIS_315_VGA 4 /* Includes 330/660/661/741/760/340/761 and M versions thereof, XGI */ 55372b676d7Smrg 55472b676d7Smrg/* pSiS->oldChipset */ 55572b676d7Smrg#define OC_UNKNOWN 0 55672b676d7Smrg#define OC_SIS86201 1 55772b676d7Smrg#define OC_SIS86202 2 55872b676d7Smrg#define OC_SIS6205A 3 55972b676d7Smrg#define OC_SIS6205B 4 56072b676d7Smrg#define OC_SIS82204 5 56172b676d7Smrg#define OC_SIS6205C 6 56272b676d7Smrg#define OC_SIS6225 7 56372b676d7Smrg#define OC_SIS5597 8 56472b676d7Smrg#define OC_SIS6326 9 56572b676d7Smrg#define OC_SIS530A 11 56672b676d7Smrg#define OC_SIS530B 12 /* 620 in 620-WDR */ 56772b676d7Smrg#define OC_SIS620 13 56872b676d7Smrg 56972b676d7Smrg/* Chrontel type */ 57072b676d7Smrg#define CHRONTEL_700x 0 57172b676d7Smrg#define CHRONTEL_701x 1 57272b676d7Smrg 57372b676d7Smrg/* pSiS->ChipFlags */ 57472b676d7Smrg/* Use only lower 16 bit for chip id! (sisctrl) */ 57572b676d7Smrg#define SiSCF_LARGEOVERLAY 0x00000001 57672b676d7Smrg#define SiSCF_Is651 0x00000002 57772b676d7Smrg#define SiSCF_IsM650 0x00000004 57872b676d7Smrg#define SiSCF_IsM652 0x00000008 57972b676d7Smrg#define SiSCF_IsM653 0x00000010 58072b676d7Smrg#define SiSCF_Is652 0x00000020 58172b676d7Smrg#define SiSCF_Is65x (SiSCF_Is651|SiSCF_IsM650|SiSCF_IsM652|SiSCF_IsM653|SiSCF_Is652) 58272b676d7Smrg#define SiSCF_IsM661 0x00000100 /* M661FX */ 58372b676d7Smrg#define SiSCF_IsM741 0x00000200 58472b676d7Smrg#define SiSCF_IsM760 0x00000400 58572b676d7Smrg#define SiSCF_IsM661M 0x00000800 /* M661MX */ 58672b676d7Smrg#define SiSCF_IsM66x (SiSCF_IsM661 | SiSCF_IsM741 | SiSCF_IsM760 | SiSCF_IsM661M) 58772b676d7Smrg#define SiSCF_Is315USB 0x00001000 /* USB2VGA dongle */ 58872b676d7Smrg#define SiSCF_Is315E 0x00002000 /* 315E (lower clocks) */ 58972b676d7Smrg#define SiSCF_IsXGIV3 SiSCF_Is651 /* Volari V3(XT) (If neither XGI... set, is V8) */ 59072b676d7Smrg#define SiSCF_IsXGIV5 SiSCF_IsM650/* Volari V5 */ 59172b676d7Smrg#define SiSCF_IsXGIDUO SiSCF_IsM652/* Volari Duo */ 59272b676d7Smrg/* ... */ 59372b676d7Smrg#define SiSCF_315Core 0x00010000 /* 3D: Real 315 */ 59472b676d7Smrg#define SiSCF_Real256ECore 0x00020000 /* 3D: Similar to 315 core, no T&L? (65x, 661, 740, 741) */ 59572b676d7Smrg#define SiSCF_XabreCore 0x00040000 /* 3D: Real Xabre */ 59672b676d7Smrg#define SiSCF_Ultra256Core 0x00080000 /* 3D: aka "Mirage 2"; similar to Xabre, no T&L?, no P:Shader? (760) */ 59772b676d7Smrg#define SiSCF_MMIOPalette 0x00100000 /* HW supports MMIO palette writing/reading */ 59872b676d7Smrg#define SiSCF_IsXGI 0x00200000 /* Is XGI chip (Z7, V3, V5, V8) */ 59972b676d7Smrg#define SiSCF_UseLCDA 0x01000000 60072b676d7Smrg#define SiSCF_760LFB 0x08000000 /* 76x: LFB active (if not set, UMA only) */ 60172b676d7Smrg#define SiSCF_760UMA 0x10000000 /* 76x: UMA active (if not set, LFB only) */ 60272b676d7Smrg#define SiSCF_CRT2HWCKaputt 0x20000000 /* CRT2 Mono HWCursor engine buggy (SiS 330) */ 60372b676d7Smrg#define SiSCF_Glamour3 0x40000000 60472b676d7Smrg#define SiSCF_Integrated 0x80000000 60572b676d7Smrg 60672b676d7Smrg/* SiS Direct Xv-API */ 60772b676d7Smrg#define SiS_SD_IS300SERIES 0x00000001 60872b676d7Smrg#define SiS_SD_IS315SERIES 0x00000002 60972b676d7Smrg#define SiS_SD_IS330SERIES 0x00000004 61072b676d7Smrg#define SiS_SD_SUPPORTPALMN 0x00000008 /* tv chip supports pal-m, pal-n */ 61172b676d7Smrg#define SiS_SD_SUPPORT2OVL 0x00000010 /* set = 2 overlays, clear = support SWITCHCRT xv prop */ 61272b676d7Smrg#define SiS_SD_SUPPORTTVPOS 0x00000020 /* supports changing tv position */ 61372b676d7Smrg#define SiS_SD_ISDUALHEAD 0x00000040 /* Driver is in dual head mode */ 61472b676d7Smrg#define SiS_SD_ISMERGEDFB 0x00000080 /* Driver is in merged fb mode */ 61572b676d7Smrg#define SiS_SD_ISDHSECONDHEAD 0x00000100 /* Dual head: This is CRT1 (=second head) */ 61672b676d7Smrg#define SiS_SD_ISDHXINERAMA 0x00000200 /* Dual head: We are running Xinerama */ 61772b676d7Smrg#define SiS_SD_VBHASSCART 0x00000400 /* videobridge has SCART instead of VGA2 */ 61872b676d7Smrg#define SiS_SD_ISDEPTH8 0x00000800 /* Depth is 8, no independent gamma correction */ 61972b676d7Smrg#define SiS_SD_SUPPORTSOVER 0x00001000 /* Support for Chrontel Super Overscan */ 62072b676d7Smrg#define SiS_SD_ENABLED 0x00002000 /* sisctrl is enabled (by option) */ 62172b676d7Smrg#define SiS_SD_PSEUDOXINERAMA 0x00004000 /* pseudo xinerama is active */ 62272b676d7Smrg#define SiS_SD_SUPPORTLCDA 0x00008000 /* Support LCD Channel A */ 62372b676d7Smrg#define SiS_SD_SUPPORTNTSCJ 0x00010000 /* tv chip supports ntsc-j */ 62472b676d7Smrg#define SiS_SD_ADDLSUPFLAG 0x00020000 /* 1 = the following flags are valid */ 62572b676d7Smrg#define SiS_SD_SUPPORTVGA2 0x00040000 /* CRT2=VGA supported */ 62672b676d7Smrg#define SiS_SD_SUPPORTSCART 0x00080000 /* CRT2=SCART supported */ 62772b676d7Smrg#define SiS_SD_SUPPORTOVERSCAN 0x00100000 /* Overscan flag supported */ 62872b676d7Smrg#define SiS_SD_SUPPORTXVGAMMA1 0x00200000 /* Xv Gamma correction for CRT1 supported */ 62972b676d7Smrg#define SiS_SD_SUPPORTTV 0x00400000 /* CRT2=TV supported */ 63072b676d7Smrg#define SiS_SD_SUPPORTYPBPR 0x00800000 /* CRT2=YPbPr (525i, 525p, 750p, 1080i) is supported */ 63172b676d7Smrg#define SiS_SD_SUPPORTHIVISION 0x01000000 /* CRT2=HiVision is supported */ 63272b676d7Smrg#define SiS_SD_SUPPORTYPBPRAR 0x02000000 /* YPbPr aspect ratio is supported */ 63372b676d7Smrg#define SiS_SD_SUPPORTSCALE 0x04000000 /* Scaling of LCD panel supported */ 63472b676d7Smrg#define SiS_SD_SUPPORTCENTER 0x08000000 /* If scaling supported: Centering of screen [NOT] supported (TMDS only) */ 63572b676d7Smrg#define SiS_SD_SUPPORTREDETECT 0x10000000 /* Support re-detection of CRT2 devices */ 63672b676d7Smrg#define SiS_SD_IS340SERIES 0x20000000 63772b676d7Smrg#define SiS_SD_SUPPORTSGRCRT2 0x40000000 /* Separate CRT2 gamma correction supported */ 63872b676d7Smrg#define SiS_SD_CANSETGAMMA 0x80000000 /* Driver can set gamma ramp; otherwise: App needs to reset palette */ 63972b676d7Smrg /* after disabling sep CRT2 gamma corr */ 64072b676d7Smrg 64172b676d7Smrg#define SiS_SD2_LCDTMDS 0x00000001 /* SiS Bridge supports TMDS (DVI-D) */ 64272b676d7Smrg#define SiS_SD2_LCDLVDS 0x00000002 /* SiS Bridge supports LVDS */ 64372b676d7Smrg#define SiS_SD2_SUPPORTLCD 0x00000004 /* Bridge supports LCD (LVDS or TMDS, SiS+3rd party) */ 64472b676d7Smrg#define SiS_SD2_SUPPORTTVSIZE 0x00000008 /* TV resizing supported (SiS bridges) */ 64572b676d7Smrg#define SiS_SD2_SUPPORTTVTYPE 0x00000010 /* TV type selection supported (SiS bridges) */ 64672b676d7Smrg#define SiS_SD2_SUPPORTGAMMA2 0x00000020 /* Gamma corr for CRT2 supported (SiS bridges) */ 64772b676d7Smrg#define SiS_SD2_SISBRIDGE 0x00000040 /* SiS bridge */ 64872b676d7Smrg#define SiS_SD2_SUPPTVSAT 0x00000080 /* TV saturation supported */ 64972b676d7Smrg#define SiS_SD2_SUPPTVEDGE 0x00000100 /* TV edge enhancement supported */ 65072b676d7Smrg#define SiS_SD2_CHRONTEL 0x00000200 /* Chrontel TV encoder present */ 65172b676d7Smrg#define SiS_SD2_VIDEOBRIDGE 0x00000400 /* Any type of video bridge present */ 65272b676d7Smrg#define SiS_SD2_THIRDPARTYLVDS 0x00000800 /* Third party LVDS (non-SiS) */ 65372b676d7Smrg#define SiS_SD2_ADDLFLAGS 0x00001000 /* Following flags valid */ 65472b676d7Smrg#define SiS_SD2_SUPPORT760OO 0x00002000 /* Support dynamic one/two overlay configuration changes */ 65572b676d7Smrg /* (If set, utility must re-read SD2 flags after mode change) */ 65672b676d7Smrg#define SiS_SD2_SIS760ONEOVL 0x00004000 /* (76x:) Only one overlay currently */ 65772b676d7Smrg#define SiS_SD2_MERGEDUCLOCK 0x00008000 /* Provide VRefresh in mode->Clock field in MergedFB mode */ 65872b676d7Smrg#define SiS_SD2_SUPPORTXVHUESAT 0x00010000 /* Xv: Support hue & saturation */ 65972b676d7Smrg#define SiS_SD2_NEEDUSESSE 0x00020000 /* Need "UseSSE" option to use SSE (otherwise auto) */ 66072b676d7Smrg#define SiS_SD2_NODDCSUPPORT 0x00040000 /* No hardware DDC support (USB) */ 66172b676d7Smrg#define SiS_SD2_SUPPORTXVDEINT 0x00080000 /* Xv deinterlacing supported (n/a, for future use) */ 66272b676d7Smrg#define SiS_SD2_ISXGI 0x00100000 /* Is XGI chip */ 66372b676d7Smrg#define SiS_SD2_USEVBFLAGS2 0x00200000 /* Use VBFlags2 for bridge ID */ 66472b676d7Smrg#define SiS_SD2_SUPPLTFLAG 0x00400000 /* Driver supports the following 3 flags */ 66572b676d7Smrg#define SiS_SD2_ISLAPTOP 0x00800000 /* This machine is (very probably) a laptop */ 66672b676d7Smrg#define SiS_SD2_MACHINETYPE2 0x01000000 /* Machine type 2 (for future use) */ 66772b676d7Smrg#define SiS_SD2_MACHINETYPE3 0x02000000 /* Machine type 3 (for future use) */ 66872b676d7Smrg#define SiS_SD2_SUPPORT625I 0x04000000 /* Support YPbPr 625i */ 66972b676d7Smrg#define SiS_SD2_SUPPORT625P 0x08000000 /* Support YPbPr 625p */ 67072b676d7Smrg#define SiS_SD2_VBINVB2ONLY 0x10000000 /* VB_* bits in vbflags no longer used for vb type */ 67172b676d7Smrg#define SiS_SD2_NEWGAMMABRICON 0x20000000 /* Support new gamma brightness/contrast */ 67272b676d7Smrg#define SiS_SD2_HAVESD34 0x40000000 /* Support SD3 and SD4 flags */ 67372b676d7Smrg#define SiS_SD2_NOOVERLAY 0x80000000 /* No video overlay */ 67472b676d7Smrg 67572b676d7Smrg#define SiS_SD3_OLDGAMMAINUSE 0x00000001 /* Old gamma brightness is currently in use */ 67672b676d7Smrg#define SiS_SD3_MFBALLOWOFFCL 0x00000002 /* Supports off'ing CRTx in MFB if a clone mode is active */ 67772b676d7Smrg#define SiS_SD3_SUPPORTVBF34 0x00000004 /* Supports VBFlags3 and VBFlags4 */ 67872b676d7Smrg#define SiS_SD3_SUPPORTDUALDVI 0x00000008 /* Supports dual dvi-d (for future use) */ 67972b676d7Smrg#define SiS_SD3_SUPPORTDUALTV 0x00000010 /* Supports dual tv (for future use) */ 68072b676d7Smrg#define SiS_SD3_NEWOUTPUTSW 0x00000020 /* Supports NEWSETVBFLAGS (for future use) */ 68172b676d7Smrg#define SiS_SD3_CRT1SATGAIN 0x00000040 /* Supports CRT1 saturation gain */ 68272b676d7Smrg#define SiS_SD3_CRT2SATGAIN 0x00000080 /* Supports CRT2 saturation gain (apart from TV, see SiS_SD2_SUPPTVSAT) */ 68372b676d7Smrg 68472b676d7Smrg#define SIS_DIRECTKEY 0x03145792 68572b676d7Smrg 68672b676d7Smrg/* SiSCtrl: Check mode for CRT2 */ 68772b676d7Smrg#define SiS_CF2_LCD 0x01 68872b676d7Smrg#define SiS_CF2_TV 0x02 68972b676d7Smrg#define SiS_CF2_VGA2 0x04 69072b676d7Smrg#define SiS_CF2_TVPAL 0x08 69172b676d7Smrg#define SiS_CF2_TVNTSC 0x10 /* + NTSC-J */ 69272b676d7Smrg#define SiS_CF2_TVPALM 0x20 69372b676d7Smrg#define SiS_CF2_TVPALN 0x40 69472b676d7Smrg#define SiS_CF2_CRT1LCDA 0x80 69572b676d7Smrg#define SiS_CF2_TYPEMASK (SiS_CF2_LCD | SiS_CF2_TV | SiS_CF2_VGA2 | SiS_CF2_CRT1LCDA) 69672b676d7Smrg#define SiS_CF2_TVSPECIAL (SiS_CF2_LCD | SiS_CF2_TV) 69772b676d7Smrg#define SiS_CF2_TVSPECMASK (SiS_CF2_TVPAL | SiS_CF2_TVNTSC | SiS_CF2_TVPALM | SiS_CF2_TVPALN) 69872b676d7Smrg#define SiS_CF2_TVHIVISION SiS_CF2_TVPAL 69972b676d7Smrg#define SiS_CF2_TVYPBPR525I SiS_CF2_TVNTSC 70072b676d7Smrg#define SiS_CF2_TVYPBPR525P (SiS_CF2_TVPAL | SiS_CF2_TVNTSC) 70172b676d7Smrg#define SiS_CF2_TVYPBPR625I SiS_CF2_TVPALN 70272b676d7Smrg#define SiS_CF2_TVYPBPR625P (SiS_CF2_TVPALN | SiS_CF2_TVPAL) 70372b676d7Smrg#define SiS_CF2_TVYPBPR750P SiS_CF2_TVPALM 70472b676d7Smrg#define SiS_CF2_TVYPBPR1080I (SiS_CF2_TVPALM | SiS_CF2_TVPAL) 70572b676d7Smrg 70672b676d7Smrg/* AGP stuff for DRI */ 70772b676d7Smrg#define AGP_PAGE_SIZE 4096 70872b676d7Smrg#define AGP_PAGES 2048 /* Default: 2048 pages @ 4096 = 8MB */ 70972b676d7Smrg/* 300 */ 71072b676d7Smrg#define AGP_CMDBUF_PAGES 256 71172b676d7Smrg#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) 71272b676d7Smrg/* 315/330 */ 71372b676d7Smrg#define AGP_VTXBUF_PAGES 512 71472b676d7Smrg#define AGP_VTXBUF_SIZE (AGP_PAGE_SIZE * AGP_VTXBUF_PAGES) 71572b676d7Smrg 71672b676d7Smrg/* Defines for our own vgaHW functions */ 71772b676d7Smrg#define SISVGA_SR_MODE 0x01 71872b676d7Smrg#define SISVGA_SR_FONTS 0x02 71972b676d7Smrg#define SISVGA_SR_CMAP 0x04 72072b676d7Smrg#define SISVGA_SR_ALL (SISVGA_SR_MODE | SISVGA_SR_FONTS | SISVGA_SR_CMAP) 72172b676d7Smrg 72272b676d7Smrg#define SISKGA_FIX_OVERSCAN 1 /* overcan correction required */ 72372b676d7Smrg#define SISKGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning of next scanline/frame */ 72472b676d7Smrg#define SISKGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */ 72572b676d7Smrg 72672b676d7Smrg/* CPU flags (for memcpy() etc.) */ 72772b676d7Smrg#define SIS_CPUFL_LIBC 0x0001 72872b676d7Smrg#define SIS_CPUFL_BI 0x0002 72972b676d7Smrg#define SIS_CPUFL_SSE 0x0004 73072b676d7Smrg#define SIS_CPUFL_MMX 0x0008 73172b676d7Smrg#define SIS_CPUFL_3DNOW 0x0010 73272b676d7Smrg#define SIS_CPUFL_MMX2 0x0020 73372b676d7Smrg#define SIS_CPUFL_BI2 0x0040 73472b676d7Smrg#define SIS_CPUFL_SSE2 0x0080 73572b676d7Smrg#define SIS_CPUFL_FLAG 0x8000 73672b676d7Smrg 73772b676d7Smrg/* Convenience macro for sisfb version checks */ 73872b676d7Smrg#define SISFB_VERSION(a,b,c) ((a << 16) | (b << 8) | c) 73972b676d7Smrg 74072b676d7Smrg/* For backup of register contents */ 74172b676d7Smrgtypedef struct { 74272b676d7Smrg UChar sisRegMiscOut; 74372b676d7Smrg UChar sisRegsATTR[22]; 74472b676d7Smrg UChar sisRegsGR[10]; 74572b676d7Smrg UChar sisDAC[768]; 74672b676d7Smrg UChar sisRegs3C4[0x80]; 74772b676d7Smrg UChar sisRegs3D4[0xff]; 74872b676d7Smrg UChar sisRegs3C2; 74972b676d7Smrg UChar sisCapt[0x60]; 75072b676d7Smrg UChar sisVid[0x50]; 75172b676d7Smrg UChar VBPart1[0x80]; 75272b676d7Smrg UChar VBPart2[0x100]; 75372b676d7Smrg UChar VBPart3[0x50]; 75472b676d7Smrg UChar VBPart4[0x50]; 75572b676d7Smrg UShort ch70xx[64]; 75672b676d7Smrg unsigned int sisMMIO85C0; 75772b676d7Smrg UChar sis6326tv[0x46]; 75872b676d7Smrg unsigned int sisRegsPCI50, sisRegsPCIA0; 75972b676d7Smrg UChar BIOSModeSave; 76072b676d7Smrg} SISRegRec, *SISRegPtr; 76172b676d7Smrg 76272b676d7Smrgtypedef struct _sisModeInfoPtr { 76372b676d7Smrg int width; 76472b676d7Smrg int height; 76572b676d7Smrg int bpp; 76672b676d7Smrg int n; 76772b676d7Smrg struct _sisModeInfoPtr *next; 76872b676d7Smrg} sisModeInfoRec, *sisModeInfoPtr; 76972b676d7Smrg 77072b676d7Smrg/* SISFBLayout (which has nothing to do with sisfb, actually) 77172b676d7Smrg * is mainly there because of DGA. It holds the current layout 77272b676d7Smrg * parameters needed for acceleration and other stuff. When 77372b676d7Smrg * switching mode using DGA, these are set up accordingly and 77472b676d7Smrg * not necessarily match pScrn's. Therefore, driver modules 77572b676d7Smrg * should read these values instead of pScrn's. 77672b676d7Smrg */ 77772b676d7Smrgtypedef struct { 77872b676d7Smrg int bitsPerPixel; /* = pScrn->bitsPerPixel */ 77972b676d7Smrg int depth; /* = pScrn->depth */ 78072b676d7Smrg int displayWidth; /* = pScrn->displayWidth */ 78172b676d7Smrg int displayHeight; /* = imageHeight from DGA mode; ONLY WHEN DGA IS ACTIVE!!! */ 78272b676d7Smrg int DGAViewportX; 78372b676d7Smrg int DGAViewportY; 78472b676d7Smrg DisplayModePtr mode; /* = pScrn->currentMode */ 78572b676d7Smrg} SISFBLayout; 78672b676d7Smrg 78772b676d7Smrg/* For extended memcpy() */ 78872b676d7Smrgtypedef void (*vidCopyFunc)(UChar *, const UChar *, int); 78972b676d7Smrg 79072b676d7Smrg#ifdef SISISXORG6899900 79172b676d7Smrg#define SISAGPHTYPE drm_handle_t 79272b676d7Smrg#else 79372b676d7Smrg#define SISAGPHTYPE ULong 79472b676d7Smrg#endif 79572b676d7Smrg 79672b676d7Smrg/* Dual head private entity structure */ 79772b676d7Smrg#ifdef SISDUALHEAD 79872b676d7Smrgtypedef struct { 79972b676d7Smrg ScrnInfoPtr pScrn_1; 80072b676d7Smrg ScrnInfoPtr pScrn_2; 80172b676d7Smrg UChar *BIOS; 80272b676d7Smrg struct SiS_Private *SiS_Pr; 80372b676d7Smrg#ifdef XF86DRI 80472b676d7Smrg SISAGPHTYPE agpHandle; 80572b676d7Smrg ULong agpAddr; 80672b676d7Smrg UChar *agpBase; 80772b676d7Smrg unsigned int agpSize; 80872b676d7Smrg unsigned int agpWantedSize; 80972b676d7Smrg unsigned int agpWantedPages; 81072b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 81172b676d7Smrg UChar *agpCmdBufBase; 81272b676d7Smrg unsigned int agpCmdBufSize; 81372b676d7Smrg unsigned int agpCmdBufFree; 81472b676d7Smrg ULong agpVtxBufAddr; /* 315/330 series */ 81572b676d7Smrg UChar *agpVtxBufBase; 81672b676d7Smrg unsigned int agpVtxBufSize; 81772b676d7Smrg unsigned int agpVtxBufFree; 81872b676d7Smrg sisRegion agp; 81972b676d7Smrg int drmSubFD; 82072b676d7Smrg#endif 82172b676d7Smrg Bool AGPInitOK; 82272b676d7Smrg int CRT1ModeNo; /* Current display mode for CRT1 */ 82372b676d7Smrg DisplayModePtr CRT1DMode; /* Current display mode for CRT1 */ 82472b676d7Smrg int CRT2ModeNo; /* Current display mode for CRT2 */ 82572b676d7Smrg DisplayModePtr CRT2DMode; /* Current display mode for CRT2 */ 82672b676d7Smrg Bool CRT2ModeSet; /* CRT2 mode has been set */ 82772b676d7Smrg Bool CRT2IsCustom; 82872b676d7Smrg UChar CRT2CR30, CRT2CR31, CRT2CR35, CRT2CR38; 82972b676d7Smrg int refCount; 83072b676d7Smrg int lastInstance; /* number of entities */ 83172b676d7Smrg Bool DisableDual; /* Emergency flag */ 83272b676d7Smrg Bool ErrorAfterFirst; /* Emergency flag: Error after first init -> Abort second */ 83372b676d7Smrg Bool HWCursor; /* Backup master settings for use on slave */ 83472b676d7Smrg Bool TurboQueue; 83572b676d7Smrg int ForceCRT1Type; 83672b676d7Smrg Bool CRT1TypeForced; 83772b676d7Smrg int ForceCRT2Type; 83872b676d7Smrg int OptTVStand; 83972b676d7Smrg int OptTVOver; 84072b676d7Smrg int OptTVSOver; 84172b676d7Smrg int OptROMUsage; 84272b676d7Smrg int OptUseOEM; 84372b676d7Smrg Bool NoAccel; 84472b676d7Smrg Bool useEXA; 84572b676d7Smrg int forceCRT1; 84672b676d7Smrg int DSTN, FSTN; 84772b676d7Smrg Bool XvOnCRT2; 84872b676d7Smrg int maxUsedClock; /* Max used pixelclock on master head */ 84972b676d7Smrg ULong masterFbAddress; /* Framebuffer addresses and sizes */ 85072b676d7Smrg ULong masterFbSize; 85172b676d7Smrg ULong slaveFbAddress; 85272b676d7Smrg ULong slaveFbSize; 85372b676d7Smrg UChar *FbBase; /* VRAM linear address */ 85472b676d7Smrg UChar *RealFbBase; /* Real VRAM linear address (for DHM, SiS76x UMA skipping) */ 85572b676d7Smrg UChar *IOBase; /* MMIO linear address */ 85672b676d7Smrg UShort MapCountIOBase; /* map/unmap queue counter */ 85772b676d7Smrg UShort MapCountFbBase; /* map/unmap queue counter */ 85872b676d7Smrg Bool forceUnmapIOBase; /* ignore counter and unmap */ 85972b676d7Smrg Bool forceUnmapFbBase; /* ignore counter and unmap */ 86072b676d7Smrg#ifdef __alpha__ 86172b676d7Smrg UChar *IOBaseDense; /* MMIO for Alpha platform */ 86272b676d7Smrg UShort MapCountIOBaseDense; 86372b676d7Smrg Bool forceUnmapIOBaseDense; /* ignore counter and unmap */ 86472b676d7Smrg#endif 86572b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 86672b676d7Smrg int chtvlumabandwidthsvideo; 86772b676d7Smrg int chtvlumaflickerfilter; 86872b676d7Smrg int chtvchromabandwidth; 86972b676d7Smrg int chtvchromaflickerfilter; 87072b676d7Smrg int chtvcvbscolor; 87172b676d7Smrg int chtvtextenhance; 87272b676d7Smrg int chtvcontrast; 87372b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridge */ 87472b676d7Smrg int sistvantiflicker; 87572b676d7Smrg int sistvsaturation; 87672b676d7Smrg int sistvcolcalibc; 87772b676d7Smrg int sistvcolcalibf; 87872b676d7Smrg int sistvcfilter; 87972b676d7Smrg int sistvyfilter; 88072b676d7Smrg int tvxpos, tvypos; 88172b676d7Smrg int tvxscale, tvyscale; 88272b676d7Smrg int siscrt1satgain; 88372b676d7Smrg Bool crt1satgaingiven; 88472b676d7Smrg int ForceTVType, SenseYPbPr; 88572b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 88672b676d7Smrg int chtvtype; 88772b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 88872b676d7Smrg UShort tvx, tvy; 88972b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; 89072b676d7Smrg UChar p2_44, p2_45, p2_46; 89172b676d7Smrg unsigned int sistvccbase; 89272b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 89372b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 89472b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 89572b676d7Smrg UShort cursorBufferNum; 89672b676d7Smrg Bool restorebyset; 89772b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven, XvDefAdaptorBlit; 89872b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 89972b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; /* strictly for Xinerama */ 90072b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; /* strictly for Xinerama */ 90172b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; /* strictly for Xinerama */ 90272b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 90372b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 90472b676d7Smrg int curxvcrtnum; 90572b676d7Smrg int UsePanelScaler, CenterLCD; 90672b676d7Smrg int AllowHotkey; 90772b676d7Smrg Bool enablesisctrl; 90872b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 90972b676d7Smrg UChar *RenderAccelArray; 91072b676d7Smrg UChar *FbBase1; 91172b676d7Smrg ULong OnScreenSize1; 91272b676d7Smrg UChar OldMode; 91372b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 91472b676d7Smrg Bool ROM661New; 91572b676d7Smrg Bool HaveXGIBIOS; 91672b676d7Smrg Bool XvUseMemcpy; 91772b676d7Smrg Bool BenchMemCpy; 91872b676d7Smrg Bool HaveFastVidCpy; 91972b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 92072b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 92172b676d7Smrg unsigned int CPUFlags; 92272b676d7Smrg#ifdef SIS_NEED_MAP_IOP 92372b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 92472b676d7Smrg UChar *IOPBase; /* I/O port linear address */ 92572b676d7Smrg UShort MapCountIOPBase; /* map/unmap queue counter */ 92672b676d7Smrg Bool forceUnmapIOPBase; /* ignore counter and unmap */ 92772b676d7Smrg#endif 92872b676d7Smrg#ifdef SIS_CP 92972b676d7Smrg SIS_CP_H_ENT 93072b676d7Smrg#endif 93172b676d7Smrg} SISEntRec, *SISEntPtr; 93272b676d7Smrg#endif 93372b676d7Smrg 93472b676d7Smrg#define SISPTR(p) ((SISPtr)((p)->driverPrivate)) 93572b676d7Smrg#define XAAPTR(p) ((XAAInfoRecPtr)(SISPTR(p)->AccelInfoPtr)) 93672b676d7Smrg 93772b676d7Smrg/* MergedFB: Relative position */ 93872b676d7Smrgtypedef enum { 93972b676d7Smrg sisLeftOf, 94072b676d7Smrg sisRightOf, 94172b676d7Smrg sisAbove, 94272b676d7Smrg sisBelow, 94372b676d7Smrg sisClone 94472b676d7Smrg} SiSScrn2Rel; 94572b676d7Smrg 94672b676d7Smrgtypedef struct _region { 94772b676d7Smrg int x0,x1,y0,y1; 94872b676d7Smrg} region; 94972b676d7Smrg 95072b676d7Smrgtypedef struct { 95172b676d7Smrg ScrnInfoPtr pScrn; 95272b676d7Smrg pciVideoPtr PciInfo; 95372b676d7Smrg int PciBus, PciDevice, PciFunc; 95472b676d7Smrg PCITAG PciTag; 95572b676d7Smrg EntityInfoPtr pEnt; 95672b676d7Smrg int Chipset; 95772b676d7Smrg unsigned char ChipType; 95872b676d7Smrg int ChipRev; 95972b676d7Smrg int VGAEngine; /* see above */ 96072b676d7Smrg int hasTwoOverlays; /* Chipset supports two video overlays? */ 96172b676d7Smrg struct SiS_Private *SiS_Pr; /* For mode switching code */ 96272b676d7Smrg int DSTN; /* For 550 FSTN/DSTN; set by option, no detection */ 96372b676d7Smrg ULong FbAddress; /* VRAM physical address (in DHM: for each Fb!) */ 96472b676d7Smrg ULong realFbAddress; /* For DHM/PCI mem mapping: store global FBAddress */ 96572b676d7Smrg UChar *FbBase; /* VRAM virtual linear address */ 96672b676d7Smrg UChar *RealFbBase; /* Real VRAM virtual linear address (for DHM and SiS76x UMA skipping) */ 96772b676d7Smrg CARD32 IOAddress; /* MMIO physical address */ 96872b676d7Smrg UChar *IOBase; /* MMIO linear address */ 96972b676d7Smrg IOADDRESS IODBase; /* Base of PIO memory area */ 97072b676d7Smrg#ifdef __alpha__ 97172b676d7Smrg UChar *IOBaseDense; /* MMIO for Alpha platform */ 97272b676d7Smrg#endif 97372b676d7Smrg SISIOADDRESS RelIO; /* Relocated IO Ports baseaddress */ 97472b676d7Smrg UChar *BIOS; 97572b676d7Smrg int MemClock; 97672b676d7Smrg int BusWidth; 97772b676d7Smrg int MinClock; 97872b676d7Smrg int MaxClock; 97972b676d7Smrg int Flags; /* HW config flags */ 98072b676d7Smrg long FbMapSize; /* Used for Mem Mapping - DON'T CHANGE THIS */ 98172b676d7Smrg long availMem; /* Really available Fb mem (minus TQ, HWCursor) */ 98272b676d7Smrg unsigned int maxxfbmem; /* limit fb memory X is to use to this (KB) */ 98372b676d7Smrg unsigned int sisfbHeapStart; /* heapstart of sisfb (if running) */ 98472b676d7Smrg unsigned int dhmOffset; /* Offset to memory for each head (0 or ..); also used on SiS76x/UMA+LFB */ 98572b676d7Smrg unsigned int FbBaseOffset; 98672b676d7Smrg DGAModePtr DGAModes; 98772b676d7Smrg int numDGAModes; 98872b676d7Smrg Bool DGAactive; 98972b676d7Smrg int DGAViewportStatus; 99072b676d7Smrg UChar OldMode; /* Back old modeNo (if available) */ 99172b676d7Smrg Bool NoAccel; 99272b676d7Smrg Bool NoXvideo; 99372b676d7Smrg Bool XvOnCRT2; /* see sis_opt.c */ 99472b676d7Smrg Bool HWCursor; 99572b676d7Smrg Bool UsePCIRetry; 99672b676d7Smrg Bool TurboQueue; 99772b676d7Smrg int VESA; 99872b676d7Smrg int ForceCRT1Type; 99972b676d7Smrg Bool CRT1Detected, CRT1TypeForced; 100072b676d7Smrg int ForceCRT2Type; 100172b676d7Smrg int OptTVStand; 100272b676d7Smrg int OptTVOver; 100372b676d7Smrg int OptROMUsage; 100472b676d7Smrg int UseCHOverScan; 100572b676d7Smrg Bool ValidWidth; 100672b676d7Smrg Bool FastVram; /* now unused */ 100772b676d7Smrg int forceCRT1; 100872b676d7Smrg Bool CRT1changed; 100972b676d7Smrg UChar oldCR17, oldCR63, oldSR1F; 101072b676d7Smrg UChar oldCR32, oldCR36, oldCR37; 101172b676d7Smrg UChar myCR32, myCR36, myCR37, myCR63; 101272b676d7Smrg UChar newCR32; 101372b676d7Smrg unsigned int VBFlags; /* Video bridge configuration (dynamic) */ 101472b676d7Smrg unsigned int VBFlags2; /* Video bridge configuration 2 (static flags only) */ 101572b676d7Smrg unsigned int VBFlags3, VBFlags4; /* Video bridge configuration 3, 4 (dynamic) */ 101672b676d7Smrg unsigned int VBFlags_backup; /* Backup for SlaveMode-modes */ 101772b676d7Smrg unsigned int VBFlags_backup3; /* Backup for SlaveMode-modes */ 101872b676d7Smrg unsigned int VBFlags_backup4; /* Backup for SlaveMode-modes */ 101972b676d7Smrg unsigned int VBLCDFlags, VBLCDFlags2; 102072b676d7Smrg int ChrontelType; /* CHRONTEL_700x or CHRONTEL_701x */ 102172b676d7Smrg unsigned int PDC, PDCA; /* PanelDelayCompensation */ 102272b676d7Smrg short scrnOffset; /* Screen pitch (data) */ 102372b676d7Smrg short scrnPitch; /* Screen pitch (display; regarding interlace) */ 102472b676d7Smrg short DstColor; 102572b676d7Smrg unsigned int SiS310_AccelDepth; /* used in accel for 315 series */ 102672b676d7Smrg int MaxCMDQueueLen; 102772b676d7Smrg int CurCMDQueueLen; 102872b676d7Smrg int MinCMDQueueLen; 102972b676d7Smrg CARD16 CursorSize; /* Size of HWCursor area (bytes) */ 103072b676d7Smrg CARD32 cursorOffset; /* see sis_driver.c and sis_cursor.c */ 103172b676d7Smrg Bool useEXA; 103272b676d7Smrg void (*InitAccel)(ScrnInfoPtr pScrn); 103372b676d7Smrg void (*SyncAccel)(ScrnInfoPtr pScrn); 103472b676d7Smrg void (*FillRect)(ScrnInfoPtr pScrn, int x, int y, int w, int h, int color); 103572b676d7Smrg void (*BlitRect)(ScrnInfoPtr pScrn, int srcx, int srcy, int dstx, int dsty, 103672b676d7Smrg int w, int h, int color); 103772b676d7Smrg int CommandReg; 103872b676d7Smrg Bool ClipEnabled; 103972b676d7Smrg int Xdirection; /* for temp use in accel */ 104072b676d7Smrg int Ydirection; /* for temp use in accel */ 104172b676d7Smrg#ifdef SIS_USE_XAA 104272b676d7Smrg XAAInfoRecPtr AccelInfoPtr; 104372b676d7Smrg UChar *XAAScanlineColorExpandBuffers[2]; 104472b676d7Smrg Bool DoColorExpand; 104572b676d7Smrg Bool ColorExpandBusy; 104672b676d7Smrg int xcurrent; /* for temp use in accel */ 104772b676d7Smrg int ycurrent; /* for temp use in accel */ 104872b676d7Smrg int sisPatternReg[4]; 104972b676d7Smrg int ROPReg; 105072b676d7Smrg#endif 105172b676d7Smrg#ifdef SIS_USE_EXA 105272b676d7Smrg ExaDriverPtr EXADriverPtr; 105372b676d7Smrg int fillPitch, fillBpp; 105472b676d7Smrg CARD32 fillDstBase; 105572b676d7Smrg int copyBpp; 105672b676d7Smrg int copySPitch, copyDPitch; 105772b676d7Smrg CARD32 copySrcBase, copyDstBase; 105872b676d7Smrg int copyXdir, copyYdir; 105972b676d7Smrg ExaOffscreenArea * exa_scratch; 106072b676d7Smrg unsigned int exa_scratch_next; 106172b676d7Smrg#endif 106272b676d7Smrg Bool alphaBlitBusy; 106372b676d7Smrg SISRegRec SavedReg; 106472b676d7Smrg SISRegRec ModeReg; 106572b676d7Smrg xf86CursorInfoPtr CursorInfoPtr; 106672b676d7Smrg CloseScreenProcPtr CloseScreen; 106772b676d7Smrg Bool (*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode); 106872b676d7Smrg void (*SiSSave)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 106972b676d7Smrg void (*SiSRestore)(ScrnInfoPtr pScrn, SISRegPtr sisreg); 107072b676d7Smrg int cmdQueueLen; /* Current cmdQueueLength (for 2D and 3D) */ 107172b676d7Smrg unsigned int *cmdQueueBase; 107272b676d7Smrg int *cmdQueueLenPtr; /* Ptr to variable holding the current queue length */ 107372b676d7Smrg int *cmdQueueLenPtrBackup; /* Backup for DRI init/restore */ 107472b676d7Smrg unsigned int cmdQueueOffset; 107572b676d7Smrg unsigned int cmdQueueSize; 107672b676d7Smrg unsigned int cmdQueueSizeMask; 107772b676d7Smrg unsigned int cmdQ_SharedWritePort_2D; 107872b676d7Smrg unsigned int *cmdQ_SharedWritePort; 107972b676d7Smrg unsigned int *cmdQ_SharedWritePortBackup; 108072b676d7Smrg unsigned int cmdQueueSize_div2; 108172b676d7Smrg unsigned int cmdQueueSize_div4; 108272b676d7Smrg unsigned int cmdQueueSize_4_3; 108372b676d7Smrg#ifdef XF86DRI 108472b676d7Smrg SISAGPHTYPE agpHandle; 108572b676d7Smrg ULong agpAddr; 108672b676d7Smrg UChar *agpBase; 108772b676d7Smrg unsigned int agpSize; 108872b676d7Smrg unsigned int agpWantedSize; 108972b676d7Smrg unsigned int agpWantedPages; 109072b676d7Smrg ULong agpCmdBufAddr; /* 300 series */ 109172b676d7Smrg UChar *agpCmdBufBase; 109272b676d7Smrg unsigned int agpCmdBufSize; 109372b676d7Smrg unsigned int agpCmdBufFree; 109472b676d7Smrg ULong agpVtxBufAddr; /* 315 series */ 109572b676d7Smrg UChar *agpVtxBufBase; 109672b676d7Smrg unsigned int agpVtxBufSize; 109772b676d7Smrg unsigned int agpVtxBufFree; 109872b676d7Smrg sisRegion agp; 109972b676d7Smrg#endif 110072b676d7Smrg Bool AGPInitOK; 110172b676d7Smrg Bool irqEnabled; 110272b676d7Smrg int irq; 110372b676d7Smrg Bool IsAGPCard, IsPCIExpress; 110472b676d7Smrg unsigned int DRIheapstart, DRIheapend; 110572b676d7Smrg Bool NeedFlush; /* Need to flush cmd buf mem (760) */ 110672b676d7Smrg 110772b676d7Smrg#ifdef SIS_USE_XAA 110872b676d7Smrg void (*RenderCallback)(ScrnInfoPtr); 110972b676d7Smrg Time RenderTime; 111072b676d7Smrg FBLinearPtr AccelLinearScratch; 111172b676d7Smrg#endif 111272b676d7Smrg#ifdef SIS_USE_EXA 111372b676d7Smrg void (*ExaRenderCallback)(ScrnInfoPtr); 111472b676d7Smrg Time ExaRenderTime; 111572b676d7Smrg#endif 111672b676d7Smrg UChar *RenderAccelArray; 111772b676d7Smrg Bool doRender; 111872b676d7Smrg 111972b676d7Smrg int ColorExpandRingHead; 112072b676d7Smrg int ColorExpandRingTail; 112172b676d7Smrg int PerColorExpandBufferSize; 112272b676d7Smrg int ColorExpandBufferNumber; 112372b676d7Smrg int ColorExpandBufferCountMask; 112472b676d7Smrg UChar *ColorExpandBufferAddr[32]; 112572b676d7Smrg CARD32 ColorExpandBufferScreenOffset[32]; 112672b676d7Smrg CARD32 ColorExpandBase; 112772b676d7Smrg 112872b676d7Smrg int Rotate, Reflect; 112972b676d7Smrg void (*PointerMoved)(int index, int x, int y); 113072b676d7Smrg 113172b676d7Smrg /* ShadowFB support */ 113272b676d7Smrg Bool ShadowFB; 113372b676d7Smrg UChar *ShadowPtr; 113472b676d7Smrg int ShadowPitch; 113572b676d7Smrg 113672b676d7Smrg#ifdef SISUSEDEVPORT 113772b676d7Smrg Bool sisdevportopen; 113872b676d7Smrg#endif 113972b676d7Smrg 114072b676d7Smrg /* DRI */ 114172b676d7Smrg Bool loadDRI; 114272b676d7Smrg#ifdef XF86DRI 114372b676d7Smrg Bool directRenderingEnabled; 114472b676d7Smrg DRIInfoPtr pDRIInfo; 114572b676d7Smrg int drmSubFD; 114672b676d7Smrg int numVisualConfigs; 114772b676d7Smrg __GLXvisualConfig* pVisualConfigs; 114872b676d7Smrg SISConfigPrivPtr pVisualConfigsPriv; 114972b676d7Smrg SISRegRec DRContextRegs; 115072b676d7Smrg#endif 115172b676d7Smrg 115272b676d7Smrg /* Xv */ 115372b676d7Smrg XF86VideoAdaptorPtr adaptor; 115472b676d7Smrg XF86VideoAdaptorPtr blitadaptor; 115572b676d7Smrg void *blitPriv; 115672b676d7Smrg ScreenBlockHandlerProcPtr BlockHandler; 115772b676d7Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 115872b676d7Smrg void (*ResetXv)(ScrnInfoPtr); 115972b676d7Smrg void (*ResetXvDisplay)(ScrnInfoPtr); 116072b676d7Smrg void (*ResetXvGamma)(ScrnInfoPtr); 116172b676d7Smrg 116272b676d7Smrg /* misc */ 116372b676d7Smrg OptionInfoPtr Options; 116472b676d7Smrg UChar BIOSModeSave; 116572b676d7Smrg int CRT1off; /* 1=CRT1 off, 0=CRT1 on */ 116672b676d7Smrg CARD16 LCDheight; /* Vertical resolution of LCD panel */ 116772b676d7Smrg CARD16 LCDwidth; /* Horizontal resolution of LCD panel */ 116872b676d7Smrg vbeInfoPtr pVbe; /* For VESA mode switching */ 116972b676d7Smrg CARD16 vesamajor; 117072b676d7Smrg CARD16 vesaminor; 117172b676d7Smrg int UseVESA; 117272b676d7Smrg sisModeInfoPtr SISVESAModeList; 117372b676d7Smrg xf86MonPtr monitor; 117472b676d7Smrg CARD16 maxBytesPerScanline; 117572b676d7Smrg CARD32 *pal, *savedPal; 117672b676d7Smrg int mapPhys, mapOff, mapSize; 117772b676d7Smrg int statePage, stateSize, stateMode; 117872b676d7Smrg CARD8 *fonts; 117972b676d7Smrg CARD8 *state, *pstate; 118072b676d7Smrg void *base, *VGAbase; 118172b676d7Smrg#ifdef SISDUALHEAD 118272b676d7Smrg Bool DualHeadMode; /* TRUE if we use dual head mode */ 118372b676d7Smrg Bool SecondHead; /* TRUE is this is the second head */ 118472b676d7Smrg SISEntPtr entityPrivate; /* Ptr to private entity (see above) */ 118572b676d7Smrg Bool SiSXinerama; /* Do we use Xinerama mode? */ 118672b676d7Smrg#endif 118772b676d7Smrg SISFBLayout CurrentLayout; /* Current framebuffer layout */ 118872b676d7Smrg UShort SiS_DDC2_Index; 118972b676d7Smrg UShort SiS_DDC2_Data; 119072b676d7Smrg UShort SiS_DDC2_Clk; 119172b676d7Smrg Bool Primary; /* Display adapter is primary */ 119272b676d7Smrg Bool VGADecodingEnabled; /* a0000 memory adress decoding is enabled */ 119372b676d7Smrg xf86Int10InfoPtr pInt; /* Our int10 */ 119472b676d7Smrg int oldChipset; /* Type of old chipset */ 119572b676d7Smrg int RealVideoRam; /* 6326 can only address 4MB, but TQ can be above */ 119672b676d7Smrg CARD32 CmdQueLenMask; /* Mask of queue length in MMIO register */ 119772b676d7Smrg CARD32 CmdQueLenFix; /* Fix value to subtract from QueLen (530/620) */ 119872b676d7Smrg CARD32 CmdQueMaxLen; /* (6326/5597/5598) Amount of cmds the queue can hold */ 119972b676d7Smrg CARD32 TurboQueueLen; /* For future use */ 120072b676d7Smrg CARD32 detectedCRT2Devices; /* detected CRT2 devices before mask-out */ 120172b676d7Smrg Bool HostBus; /* Enable/disable 5597/5598 host bus */ 120272b676d7Smrg Bool noInternalModes; /* Use our own default modes? */ 120372b676d7Smrg int OptUseOEM; /* Use internal OEM data? */ 120472b676d7Smrg int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ 120572b676d7Smrg int chtvlumabandwidthsvideo; 120672b676d7Smrg int chtvlumaflickerfilter; 120772b676d7Smrg int chtvchromabandwidth; 120872b676d7Smrg int chtvchromaflickerfilter; 120972b676d7Smrg int chtvcvbscolor; 121072b676d7Smrg int chtvtextenhance; 121172b676d7Smrg int chtvcontrast; 121272b676d7Smrg int sistvedgeenhance; /* TV settings for SiS bridges */ 121372b676d7Smrg int sistvantiflicker; 121472b676d7Smrg int sistvsaturation; 121572b676d7Smrg int sistvcolcalibc; 121672b676d7Smrg int sistvcolcalibf; 121772b676d7Smrg int sistvcfilter; 121872b676d7Smrg int sistvyfilter; 121972b676d7Smrg int OptTVSOver; /* Chrontel 7005: Superoverscan */ 122072b676d7Smrg int tvxpos, tvypos; 122172b676d7Smrg int tvxscale, tvyscale; 122272b676d7Smrg int SiS6326Flags; /* SiS6326 TV settings */ 122372b676d7Smrg int sis6326enableyfilter; 122472b676d7Smrg int sis6326yfilterstrong; 122572b676d7Smrg int sis6326tvplug; 122672b676d7Smrg int sis6326fscadjust; 122772b676d7Smrg Bool sisfbfound; 122872b676d7Smrg Bool donttrustpdc; /* Don't trust the detected PDC */ 122972b676d7Smrg UChar sisfbpdc, sisfbpdca; 123072b676d7Smrg UChar sisfblcda; 123172b676d7Smrg int sisfbscalelcd; 123272b676d7Smrg unsigned int sisfbspecialtiming; 123372b676d7Smrg Bool sisfb_haveemi, sisfb_haveemilcd, sisfb_tvposvalid, sisfb_havelock; 123472b676d7Smrg UChar sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; 123572b676d7Smrg int sisfb_tvxpos, sisfb_tvypos; 123672b676d7Smrg int siscrt1satgain; 123772b676d7Smrg Bool crt1satgaingiven; 123872b676d7Smrg Bool sisfbHaveNewHeapDef; 123972b676d7Smrg unsigned int sisfbHeapSize, sisfbVideoOffset; 124072b676d7Smrg Bool sisfbxSTN; 124172b676d7Smrg unsigned int sisfbDSTN, sisfbFSTN; 124272b676d7Smrg Bool sisfbcanpost, sisfbcardposted, sisfbprimary; 124372b676d7Smrg char sisfbdevname[16]; 124472b676d7Smrg int EMI; 124572b676d7Smrg int PRGB; 124672b676d7Smrg int NoYV12; /* Disable Xv YV12 support (old series) */ 124772b676d7Smrg UChar postVBCR32; 124872b676d7Smrg int newFastVram; /* Replaces FastVram */ 124972b676d7Smrg int ForceTVType, SenseYPbPr; 125072b676d7Smrg int NonDefaultPAL, NonDefaultNTSC; 125172b676d7Smrg unsigned int ForceYPbPrType, ForceYPbPrAR; 125272b676d7Smrg ULong lockcalls; /* Count unlock calls for debug */ 125372b676d7Smrg UShort tvx, tvy; /* Backup TV position registers */ 125472b676d7Smrg UChar p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; /* Backup TV position registers */ 125572b676d7Smrg UShort tvx1, tvx2, tvx3, tvy1; /* Backup TV position registers */ 125672b676d7Smrg UChar p2_44, p2_45, p2_46; 125772b676d7Smrg unsigned int sistvccbase; 125872b676d7Smrg UChar p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; 125972b676d7Smrg UChar p2_0a, p2_2f, p2_30, p2_47; 126072b676d7Smrg UChar scalingp1[9], scalingp4[9], scalingp2[64]; 126172b676d7Smrg Bool ForceCursorOff; 126272b676d7Smrg Bool HaveCustomModes; 126372b676d7Smrg Bool IsCustom; 126472b676d7Smrg DisplayModePtr backupmodelist; 126572b676d7Smrg int chtvtype; 126672b676d7Smrg Atom xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation; 126772b676d7Smrg Atom xvAutopaintColorKey, xvSetDefaults, xvSwitchCRT; 126872b676d7Smrg Atom xvDisableGfx, xvDisableGfxLR, xvTVXPosition, xvTVYPosition; 126972b676d7Smrg Atom xvDisableColorkey, xvUseChromakey, xvChromaMin, xvChromaMax; 127072b676d7Smrg Atom xvInsideChromakey, xvYUVChromakey, xvVSync; 127172b676d7Smrg#ifdef SISDEINT 127272b676d7Smrg Atom xvdeintmeth; 127372b676d7Smrg#endif 127472b676d7Smrg Atom xvGammaRed, xvGammaGreen, xvGammaBlue; 127572b676d7Smrg#ifdef XV_SD_DEPRECATED 127672b676d7Smrg Atom xv_QVF, xv_QVV, xv_USD, xv_SVF, xv_QDD, xv_TAF, xv_TSA, xv_TEE, xv_GSF; 127772b676d7Smrg Atom xv_TTE, xv_TCO, xv_TCC, xv_TCF, xv_TLF, xv_CMD, xv_CMDR, xv_CT1, xv_SGA; 127872b676d7Smrg Atom xv_GDV, xv_GHI, xv_OVR, xv_GBI, xv_TXS, xv_TYS, xv_CFI, xv_COC, xv_COF; 127972b676d7Smrg Atom xv_YFI, xv_GSS, xv_BRR, xv_BRG, xv_BRB, xv_PBR, xv_PBG, xv_PBB, xv_SHC; 128072b676d7Smrg Atom xv_BRR2, xv_BRG2, xv_BRB2, xv_PBR2, xv_PBG2, xv_PBB2, xv_PMD, xv_RDT; 128172b676d7Smrg Atom xv_GARC2,xv_GAGC2,xv_GABC2, xv_GSF2; 128272b676d7Smrg Atom xv_BRRC2, xv_BRGC2, xv_BRBC2, xv_PBRC2, xv_PBGC2, xv_PBBC2; 128372b676d7Smrg#ifdef TWDEBUG 128472b676d7Smrg Atom xv_STR; 128572b676d7Smrg#endif 128672b676d7Smrg unsigned int xv_sd_result; 128772b676d7Smrg#endif /* XV_SD_DEPRECATED */ 128872b676d7Smrg int xv_sisdirectunlocked; 128972b676d7Smrg int SiS76xLFBSize; 129072b676d7Smrg int SiS76xUMASize; 129172b676d7Smrg int CRT1isoff; 129272b676d7Smrg ULong UMAsize, LFBsize; /* For SiSCtrl extension info only */ 129372b676d7Smrg#ifdef SIS_CP 129472b676d7Smrg SIS_CP_H 129572b676d7Smrg#endif 129672b676d7Smrg ULong ChipFlags; 129772b676d7Smrg ULong SiS_SD_Flags, SiS_SD2_Flags, SiS_SD3_Flags, SiS_SD4_Flags; 129872b676d7Smrg Bool UseHWARGBCursor; 129972b676d7Smrg int OptUseColorCursor; 130072b676d7Smrg int OptUseColorCursorBlend; 130172b676d7Smrg CARD32 OptColorCursorBlendThreshold; 130272b676d7Smrg UShort cursorBufferNum; 130372b676d7Smrg int vb; 130472b676d7Smrg Bool restorebyset; 130572b676d7Smrg Bool nocrt2ddcdetection; 130672b676d7Smrg Bool forcecrt2redetection; 130772b676d7Smrg Bool CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven; 130872b676d7Smrg int XvDefCon, XvDefBri, XvDefHue, XvDefSat; 130972b676d7Smrg Bool XvDefDisableGfx, XvDefDisableGfxLR, XvDefAdaptorBlit; 131072b676d7Smrg Bool XvUseMemcpy; 131172b676d7Smrg Bool XvUseChromaKey, XvDisableColorKey; 131272b676d7Smrg Bool XvInsideChromaKey, XvYUVChromaKey; 131372b676d7Smrg int XvChromaMin, XvChromaMax; 131472b676d7Smrg int XvGammaRed, XvGammaGreen, XvGammaBlue; 131572b676d7Smrg int XvGammaRedDef, XvGammaGreenDef, XvGammaBlueDef; 131672b676d7Smrg CARD8 XvGammaRampRed[256], XvGammaRampGreen[256], XvGammaRampBlue[256]; 131772b676d7Smrg Bool disablecolorkeycurrent; 131872b676d7Smrg CARD32 colorKey; 131972b676d7Smrg CARD32 MiscFlags; 132072b676d7Smrg int UsePanelScaler, CenterLCD; 132172b676d7Smrg float zClearVal; 132272b676d7Smrg ULong bClrColor, dwColor; 132372b676d7Smrg int AllowHotkey; 132472b676d7Smrg Bool enablesisctrl; 132572b676d7Smrg short Video_MaxWidth, Video_MaxHeight; 132672b676d7Smrg int FSTN; 132772b676d7Smrg Bool AddedPlasmaModes; 132872b676d7Smrg short scrnPitch2; 132972b676d7Smrg CARD32 CurFGCol, CurBGCol; 133072b676d7Smrg UChar *CurMonoSrc; 133172b676d7Smrg CARD32 *CurARGBDest; 133272b676d7Smrg int GammaBriR, GammaBriG, GammaBriB; 133372b676d7Smrg unsigned int CRT1MonGamma, CRT2MonGamma; 133472b676d7Smrg unsigned int CRT1VGAMonitorGamma, CRT2LCDMonitorGamma, CRT2VGAMonitorGamma; 133572b676d7Smrg Bool HideHWCursor; /* Custom application */ 133672b676d7Smrg Bool HWCursorIsVisible; 133772b676d7Smrg unsigned int HWCursorBackup[16]; 133872b676d7Smrg int HWCursorMBufNum, HWCursorCBufNum; 133972b676d7Smrg ULong mmioSize; 134072b676d7Smrg Bool ROM661New; 134172b676d7Smrg Bool HaveXGIBIOS; 134272b676d7Smrg Bool NewCRLayout; 134372b676d7Smrg Bool skipswitchcheck; 134472b676d7Smrg unsigned int VBFlagsInit; 134572b676d7Smrg DisplayModePtr currentModeLast; 134672b676d7Smrg IOADDRESS MyPIOOffset; 134772b676d7Smrg Bool OverruleRanges; 134872b676d7Smrg Bool BenchMemCpy; 134972b676d7Smrg Bool NeedCopyFastVidCpy; 135072b676d7Smrg Bool SiSFastVidCopyDone; 135172b676d7Smrg vidCopyFunc SiSFastVidCopy, SiSFastMemCopy; 135272b676d7Smrg vidCopyFunc SiSFastVidCopyFrom, SiSFastMemCopyFrom; 135372b676d7Smrg unsigned int CPUFlags; 135472b676d7Smrg#ifndef SISCHECKOSSSE 135572b676d7Smrg Bool XvSSEMemcpy; 135672b676d7Smrg#endif 135772b676d7Smrg char messagebuffer[64]; 135872b676d7Smrg unsigned int VGAMapSize; /* SiSVGA stuff */ 135972b676d7Smrg ULong VGAMapPhys; 136072b676d7Smrg void *VGAMemBase; /* mapped */ 136172b676d7Smrg Bool VGAPaletteEnabled; 136272b676d7Smrg Bool VGACMapSaved; 136372b676d7Smrg Bool CRT2SepGamma; /* CRT2 separate gamma stuff */ 136472b676d7Smrg int *crt2cindices; 136572b676d7Smrg LOCO *crt2gcolortable, *crt2colors; 136672b676d7Smrg int CRT2ColNum; 136772b676d7Smrg float GammaR2, GammaG2, GammaB2; 136872b676d7Smrg int GammaR2i, GammaG2i, GammaB2i; 136972b676d7Smrg int GammaBriR2, GammaBriG2, GammaBriB2; 137072b676d7Smrg float NewGammaBriR, NewGammaBriG, NewGammaBriB; 137172b676d7Smrg float NewGammaConR, NewGammaConG, NewGammaConB; 137272b676d7Smrg float NewGammaBriR2, NewGammaBriG2, NewGammaBriB2; 137372b676d7Smrg float NewGammaConR2, NewGammaConG2, NewGammaConB2; 137472b676d7Smrg ExtensionEntry *SiSCtrlExtEntry; 137572b676d7Smrg char devsectname[32]; 137672b676d7Smrg Bool SCLogQuiet; 137772b676d7Smrg#ifdef SIS_NEED_MAP_IOP 137872b676d7Smrg CARD32 IOPAddress; /* I/O port physical address */ 137972b676d7Smrg UChar *IOPBase; /* I/O port linear address */ 138072b676d7Smrg#endif 138172b676d7Smrg#ifdef SISMERGED 138272b676d7Smrg Bool MergedFB, MergedFBAuto; 138372b676d7Smrg SiSScrn2Rel CRT2Position; 138472b676d7Smrg char *CRT2HSync; 138572b676d7Smrg char *CRT2VRefresh; 138672b676d7Smrg char *MetaModes; 138772b676d7Smrg ScrnInfoPtr CRT2pScrn; 138872b676d7Smrg DisplayModePtr CRT1Modes; 138972b676d7Smrg DisplayModePtr CRT1CurrentMode; 139072b676d7Smrg int CRT1frameX0; 139172b676d7Smrg int CRT1frameY0; 139272b676d7Smrg int CRT1frameX1; 139372b676d7Smrg int CRT1frameY1; 139472b676d7Smrg Bool CheckForCRT2; 139572b676d7Smrg Bool IsCustomCRT2; 139672b676d7Smrg Bool HaveCustomModes2; 139772b676d7Smrg int maxCRT1_X1, maxCRT1_X2, maxCRT1_Y1, maxCRT1_Y2; 139872b676d7Smrg int maxCRT2_X1, maxCRT2_X2, maxCRT2_Y1, maxCRT2_Y2; 139972b676d7Smrg int maxClone_X1, maxClone_X2, maxClone_Y1, maxClone_Y2; 140072b676d7Smrg int MergedFBXDPI, MergedFBYDPI; 140172b676d7Smrg int CRT1XOffs, CRT1YOffs, CRT2XOffs, CRT2YOffs; 140272b676d7Smrg int MBXNR1XMAX, MBXNR1YMAX, MBXNR2XMAX, MBXNR2YMAX; 140372b676d7Smrg Bool NonRect, HaveNonRect, HaveOffsRegions, MouseRestrictions; 140472b676d7Smrg region NonRectDead, OffDead1, OffDead2; 140572b676d7Smrg#ifdef SISXINERAMA 140672b676d7Smrg Bool UseSiSXinerama; 140772b676d7Smrg Bool CRT2IsScrn0; 140872b676d7Smrg ExtensionEntry *XineramaExtEntry; 140972b676d7Smrg int SiSXineramaVX, SiSXineramaVY; 141072b676d7Smrg Bool AtLeastOneNonClone; 141172b676d7Smrg#endif 141272b676d7Smrg#endif 141372b676d7Smrg} SISRec, *SISPtr; 141472b676d7Smrg 141572b676d7Smrgtypedef struct _ModeInfoData { 141672b676d7Smrg int mode; 141772b676d7Smrg VbeModeInfoBlock *data; 141872b676d7Smrg VbeCRTCInfoBlock *block; 141972b676d7Smrg} ModeInfoData; 142072b676d7Smrg 142172b676d7Smrg#define SDMPTR(x) ((SiSMergedDisplayModePtr)(x->currentMode->Private)) 142272b676d7Smrg#define CDMPTR ((SiSMergedDisplayModePtr)(pSiS->CurrentLayout.mode->Private)) 142372b676d7Smrg 142472b676d7Smrg#define BOUND(test,low,hi) \ 142572b676d7Smrg { \ 142672b676d7Smrg if((test) < (low)) (test) = (low); \ 142772b676d7Smrg if((test) > (hi)) (test) = (hi); \ 142872b676d7Smrg } 142972b676d7Smrg 143072b676d7Smrg#define REBOUND(low,hi,test) \ 143172b676d7Smrg { \ 143272b676d7Smrg if((test) < (low)) { \ 143372b676d7Smrg (hi) += (test)-(low); \ 143472b676d7Smrg (low) = (test); \ 143572b676d7Smrg } \ 143672b676d7Smrg if((test) > (hi)) { \ 143772b676d7Smrg (low) += (test)-(hi); \ 143872b676d7Smrg (hi) = (test); \ 143972b676d7Smrg } \ 144072b676d7Smrg } 144172b676d7Smrg 144272b676d7Smrgtypedef struct _MergedDisplayModeRec { 144372b676d7Smrg DisplayModePtr CRT1; 144472b676d7Smrg DisplayModePtr CRT2; 144572b676d7Smrg SiSScrn2Rel CRT2Position; 144672b676d7Smrg} SiSMergedDisplayModeRec, *SiSMergedDisplayModePtr; 144772b676d7Smrg 144872b676d7Smrgtypedef struct _myhddctiming { 144972b676d7Smrg int whichone; 145072b676d7Smrg UChar mask; 145172b676d7Smrg float rate; 145272b676d7Smrg} myhddctiming; 145372b676d7Smrg 145472b676d7Smrgtypedef struct _myvddctiming { 145572b676d7Smrg int whichone; 145672b676d7Smrg UChar mask; 145772b676d7Smrg int rate; 145872b676d7Smrg} myvddctiming; 145972b676d7Smrg 146072b676d7Smrgtypedef struct _pdctable { 146172b676d7Smrg int subsysVendor; 146272b676d7Smrg int subsysCard; 146372b676d7Smrg int pdc; 146472b676d7Smrg char *vendorName; 146572b676d7Smrg char *cardName; 146672b676d7Smrg} pdctable; 146772b676d7Smrg 146872b676d7Smrgtypedef struct _chswtable { 146972b676d7Smrg int subsysVendor; 147072b676d7Smrg int subsysCard; 147172b676d7Smrg char *vendorName; 147272b676d7Smrg char *cardName; 147372b676d7Smrg} chswtable; 147472b676d7Smrg 147572b676d7Smrgtypedef struct _customttable { 147672b676d7Smrg UShort chipID; 147772b676d7Smrg char *biosversion; 147872b676d7Smrg char *biosdate; 147972b676d7Smrg CARD32 bioschksum; 148072b676d7Smrg UShort biosFootprintAddr[5]; 148172b676d7Smrg UChar biosFootprintData[5]; 148272b676d7Smrg UShort pcisubsysvendor; 148372b676d7Smrg UShort pcisubsyscard; 148472b676d7Smrg char *vendorName; 148572b676d7Smrg char *cardName; 148672b676d7Smrg ULong SpecialID; 148772b676d7Smrg char *optionName; 148872b676d7Smrg} customttable; 148972b676d7Smrg 149072b676d7Smrg#ifdef SISMERGED 149172b676d7Smrg#ifdef SISXINERAMA 149272b676d7Smrgtypedef struct _SiSXineramaData { 149372b676d7Smrg int x; 149472b676d7Smrg int y; 149572b676d7Smrg int width; 149672b676d7Smrg int height; 149772b676d7Smrg} SiSXineramaData; 149872b676d7Smrg#endif 149972b676d7Smrg#endif 150072b676d7Smrg 150172b676d7Smrgextern const customttable SiS_customttable[]; 150272b676d7Smrg 150372b676d7Smrg/* prototypes */ 150472b676d7Smrg 150572b676d7Smrgextern void sisSaveUnlockExtRegisterLock(SISPtr pSiS, UChar *reg1, UChar *reg2); 150672b676d7Smrgextern void sisRestoreExtRegisterLock(SISPtr pSiS, UChar reg1, UChar reg2); 150772b676d7Smrgextern void SiSOptions(ScrnInfoPtr pScrn); 150872b676d7Smrgextern const OptionInfoRec * SISAvailableOptions(int chipid, int busid); 150972b676d7Smrgextern void SiSSetup(ScrnInfoPtr pScrn); 151072b676d7Smrgextern void SISVGAPreInit(ScrnInfoPtr pScrn); 151172b676d7Smrgextern Bool SiSHWCursorInit(ScreenPtr pScreen); 151272b676d7Smrgextern Bool SiSAccelInit(ScreenPtr pScreen); 151372b676d7Smrgextern Bool SiS300AccelInit(ScreenPtr pScreen); 151472b676d7Smrgextern Bool SiS530AccelInit(ScreenPtr pScreen); 151572b676d7Smrgextern Bool SiS315AccelInit(ScreenPtr pScreen); 151672b676d7Smrgextern void SISInitVideo(ScreenPtr pScreen); 151772b676d7Smrgextern void SIS6326InitVideo(ScreenPtr pScreen); 151872b676d7Smrgextern Bool SISDGAInit(ScreenPtr pScreen); 151972b676d7Smrg 152072b676d7Smrg/* For extended mempy() support */ 152172b676d7Smrgextern unsigned int SiSGetCPUFlags(ScrnInfoPtr pScrn); 152272b676d7Smrgextern vidCopyFunc SiSVidCopyInit(ScreenPtr pScreen, vidCopyFunc *UMemCpy, Bool from); 152372b676d7Smrgextern vidCopyFunc SiSVidCopyGetDefault(void); 152472b676d7Smrg 152572b676d7Smrgextern void SiSMemCopyToVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 152672b676d7Smrgextern void SiSMemCopyFromVideoRam(SISPtr pSiS, UChar *to, UChar *from, int size); 152772b676d7Smrg 152872b676d7Smrgextern void SiS_SetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn, int val); 152972b676d7Smrgextern void SiS_SetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn, int val); 153072b676d7Smrgextern void SiS_SetCHTVlumaflickerfilter(ScrnInfoPtr pScrn, int val); 153172b676d7Smrgextern void SiS_SetCHTVchromabandwidth(ScrnInfoPtr pScrn, int val); 153272b676d7Smrgextern void SiS_SetCHTVchromaflickerfilter(ScrnInfoPtr pScrn, int val); 153372b676d7Smrgextern void SiS_SetCHTVcvbscolor(ScrnInfoPtr pScrn, int val); 153472b676d7Smrgextern void SiS_SetCHTVtextenhance(ScrnInfoPtr pScrn, int val); 153572b676d7Smrgextern void SiS_SetCHTVcontrast(ScrnInfoPtr pScrn, int val); 153672b676d7Smrgextern void SiS_SetSISTVedgeenhance(ScrnInfoPtr pScrn, int val); 153772b676d7Smrgextern void SiS_SetSISTVantiflicker(ScrnInfoPtr pScrn, int val); 153872b676d7Smrgextern void SiS_SetSISTVsaturation(ScrnInfoPtr pScrn, int val); 153972b676d7Smrgextern void SiS_SetSISTVcfilter(ScrnInfoPtr pScrn, int val); 154072b676d7Smrgextern void SiS_SetSISTVyfilter(ScrnInfoPtr pScrn, int val); 154172b676d7Smrgextern void SiS_SetSISTVcolcalib(ScrnInfoPtr pScrn, int val, Bool coarse); 154272b676d7Smrgextern void SiS_SetSIS6326TVantiflicker(ScrnInfoPtr pScrn, int val); 154372b676d7Smrgextern void SiS_SetSIS6326TVenableyfilter(ScrnInfoPtr pScrn, int val); 154472b676d7Smrgextern void SiS_SetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn, int val); 154572b676d7Smrgextern void SiS_SetTVxposoffset(ScrnInfoPtr pScrn, int val); 154672b676d7Smrgextern void SiS_SetTVyposoffset(ScrnInfoPtr pScrn, int val); 154772b676d7Smrgextern void SiS_SetTVxscale(ScrnInfoPtr pScrn, int val); 154872b676d7Smrgextern void SiS_SetTVyscale(ScrnInfoPtr pScrn, int val); 154972b676d7Smrgextern int SiS_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn); 155072b676d7Smrgextern int SiS_GetCHTVlumabandwidthsvideo(ScrnInfoPtr pScrn); 155172b676d7Smrgextern int SiS_GetCHTVlumaflickerfilter(ScrnInfoPtr pScrn); 155272b676d7Smrgextern int SiS_GetCHTVchromabandwidth(ScrnInfoPtr pScrn); 155372b676d7Smrgextern int SiS_GetCHTVchromaflickerfilter(ScrnInfoPtr pScrn); 155472b676d7Smrgextern int SiS_GetCHTVcvbscolor(ScrnInfoPtr pScrn); 155572b676d7Smrgextern int SiS_GetCHTVtextenhance(ScrnInfoPtr pScrn); 155672b676d7Smrgextern int SiS_GetCHTVcontrast(ScrnInfoPtr pScrn); 155772b676d7Smrgextern int SiS_GetSISTVedgeenhance(ScrnInfoPtr pScrn); 155872b676d7Smrgextern int SiS_GetSISTVantiflicker(ScrnInfoPtr pScrn); 155972b676d7Smrgextern int SiS_GetSISTVsaturation(ScrnInfoPtr pScrn); 156072b676d7Smrgextern int SiS_GetSISTVcfilter(ScrnInfoPtr pScrn); 156172b676d7Smrgextern int SiS_GetSISTVyfilter(ScrnInfoPtr pScrn); 156272b676d7Smrgextern int SiS_GetSISTVcolcalib(ScrnInfoPtr pScrn, Bool coarse); 156372b676d7Smrgextern int SiS_GetSIS6326TVantiflicker(ScrnInfoPtr pScrn); 156472b676d7Smrgextern int SiS_GetSIS6326TVenableyfilter(ScrnInfoPtr pScrn); 156572b676d7Smrgextern int SiS_GetSIS6326TVyfilterstrong(ScrnInfoPtr pScrn); 156672b676d7Smrgextern int SiS_GetTVxposoffset(ScrnInfoPtr pScrn); 156772b676d7Smrgextern int SiS_GetTVyposoffset(ScrnInfoPtr pScrn); 156872b676d7Smrgextern int SiS_GetTVxscale(ScrnInfoPtr pScrn); 156972b676d7Smrgextern int SiS_GetTVyscale(ScrnInfoPtr pScrn); 157072b676d7Smrgextern int SiS_GetSISCRT1SaturationGain(ScrnInfoPtr pScrn); 157172b676d7Smrgextern void SiS_SetSISCRT1SaturationGain(ScrnInfoPtr pScrn, int val); 157272b676d7Smrg 157372b676d7Smrg#endif /* _SIS_H_ */ 157472b676d7Smrg 157572b676d7Smrg 157672b676d7Smrg 1577