sis_accel.h revision 72b676d7 
1/* $XFree86$ */
2/* $XdotOrg$ */
3/*
4 * 2D acceleration for 5597/5598 and 6326
5 * Definitions for the SIS engine communication
6 *
7 * Copyright (C) 1998, 1999 by Alan Hourihane, Wigan, England.
8 * Parts Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
9 *
10 * Licensed under the following terms:
11 *
12 * Permission to use, copy, modify, distribute, and sell this software and its
13 * documentation for any purpose is hereby granted without fee, provided that
14 * the above copyright notice appears in all copies and that both that copyright
15 * notice and this permission notice appear in supporting documentation, and
16 * and that the name of the copyright holder not be used in advertising
17 * or publicity pertaining to distribution of the software without specific,
18 * written prior permission. The copyright holder makes no representations
19 * about the suitability of this software for any purpose.  It is provided
20 * "as is" without expressed or implied warranty.
21 *
22 * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
23 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO
24 * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR
25 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
26 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
27 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
28 * PERFORMANCE OF THIS SOFTWARE.
29 *
30 * Authors:  Alan Hourihane <alanh@fairlite.demon.co.uk>,
31 *           Mike Chapman <mike@paranoia.com>,
32 *           Juanjo Santamarta <santamarta@ctv.es>,
33 *           Mitani Hiroshi <hmitani@drl.mei.co.jp>,
34 *           David Thomas <davtom@dream.org.uk>,
35 *	     Thomas Winischhofer <thomas@winischhofer.net>.
36 */
37
38
39/* Definitions for the SIS engine communication. ------------------------------------ */
40
41/* For pre-530 chipsets only!!! */
42
43/* Engine Registers for 1st generation engines (5597/5598/6326) */
44const int sisReg32MMIO[] = {
45            0x8280,0x8284,0x8288,0x828C,0x8290,0x8294,
46            0x8298,0x829C,0x82A0,0x82A4,0x82A8,0x82AC
47};
48
49#define BR(x) sisReg32MMIO[x]
50
51/* These are done using Memory Mapped IO, of the registers */
52/*
53 * Modified for Sis by Xavier Ducoin (xavier@rd.lectra.fr)
54 *
55 */
56
57/* Command Reg 0 (0x82aa, [15:0]) */
58#define sisSRCBG            0x0000   /* source select */
59#define sisSRCFG            0x0001
60#define sisSRCVIDEO         0x0002
61#define sisSRCSYSTEM        0x0003
62
63#define sisPATFG            0x0004   /* pattern select */
64#define sisPATREG           0x0008
65#define sisPATBG            0x0000
66
67#define sisLEFT2RIGHT       0x0010   /* Direction select */
68#define sisRIGHT2LEFT       0x0000
69#define sisTOP2BOTTOM       0x0020
70#define sisBOTTOM2TOP       0x0000
71#define sisXINCREASE        sisLEFT2RIGHT
72#define sisYINCREASE        sisTOP2BOTTOM
73
74#define sisCLIPENABL        0x0040   /* Clipping select */
75#define sisCLIPINTRN        0x0080
76#define sisCLIPEXTRN        0x0000
77
78#define sisCMDBLT           0x0000   /* Command select */
79#define sisCMDBLTMSK        0x0100
80#define sisCMDCOLEXP        0x0200
81#define sisCMDLINE          0x0300
82#define sisFLGECOLEXP       0x2000
83#define sisCMDECOLEXP       (sisCMDCOLEXP | sisFLGECOLEXP)
84
85#define sisLASTPIX          0x0800   /* Line parameters */
86#define sisXMAJOR           0x0400
87
88
89/* Macros to do useful things with the SIS BitBLT engine */
90
91#define sisBLTSync \
92  while(SIS_MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {}
93
94/* According to SiS 6326 2D programming guide, 16 bits position at   */
95/* 0x82A8 returns queue free. But this don't work, so don't wait     */
96/* anything when turbo-queue is enabled. If there are frequent syncs */
97/* this should work. But not for xaa_benchmark :-(     */
98
99/* TW: Bit 16 only applies to the hardware queue, not the software
100 *     (=turbo) queue.
101 */
102
103#define sisBLTWAIT \
104  if(!pSiS->TurboQueue) { \
105    while(SIS_MMIO_IN16(pSiS->IOBase, BR(10) + 2) & 0x4000) {} \
106  } else { \
107    sisBLTSync \
108  }
109
110#define sisSETPATREG() \
111   ((UChar *)(pSiS->IOBase + BR(11)))
112
113#define sisSETPATREGL() \
114   ((ULong *)(pSiS->IOBase + BR(11)))
115
116/* trigger command */
117#define sisSETCMD(op) \
118  { \
119  ULong temp; \
120  SIS_MMIO_OUT16(pSiS->IOBase, BR(10) + 2, op); \
121  temp = SIS_MMIO_IN32(pSiS->IOBase, BR(10)); \
122  (void)temp; \
123  }
124
125/* set foreground color and fg ROP */
126#define sisSETFGROPCOL(rop, color) \
127   SIS_MMIO_OUT32(pSiS->IOBase, BR(4), ((rop << 24) | (color & 0xFFFFFF)));
128
129/* set background color and bg ROP */
130#define sisSETBGROPCOL(rop, color) \
131   SIS_MMIO_OUT32(pSiS->IOBase, BR(5), ((rop << 24) | (color & 0xFFFFFF)));
132
133/* background color */
134#define sisSETBGCOLOR(bgColor) \
135   SIS_MMIO_OUT32(pSiS->IOBase, BR(5), (bgColor));
136
137/* foreground color */
138#define sisSETFGCOLOR(fgColor) \
139   SIS_MMIO_OUT32(pSiS->IOBase, BR(4), (fgcolor));
140
141/* ROP */
142#define sisSETROPFG(op) \
143   SIS_MMIO_OUT8(pSiS->IOBase, BR(4) + 3, op);
144
145#define sisSETROPBG(op) \
146  SIS_MMIO_OUT8(pSiS->IOBase, BR(5) + 3, op);
147
148#define sisSETROP(op) \
149   sisSETROPFG(op); sisSETROPBG(op);
150
151/* source and dest address */
152#define sisSETSRCADDR(srcAddr) \
153  SIS_MMIO_OUT32(pSiS->IOBase, BR(0), (srcAddr & 0x3FFFFFL));
154
155#define sisSETDSTADDR(dstAddr) \
156  SIS_MMIO_OUT32(pSiS->IOBase, BR(1), (dstAddr & 0x3FFFFFL));
157
158/* pitch */
159#define sisSETPITCH(srcPitch,dstPitch) \
160  SIS_MMIO_OUT32(pSiS->IOBase, BR(2), ((((dstPitch) & 0xFFFF) << 16) | ((srcPitch) & 0xFFFF)));
161
162#define sisSETSRCPITCH(srcPitch) \
163  SIS_MMIO_OUT16(pSiS->IOBase, BR(2), ((srcPitch) & 0xFFFF));
164
165#define sisSETDSTPITCH(dstPitch) \
166  SIS_MMIO_OUT16(pSiS->IOBase, BR(2) + 2, ((dstPitch) & 0xFFFF));
167
168/* Height and width
169 * According to SIS 2D Engine Programming Guide
170 * height -1, width - 1 independant of Bpp
171 */
172#define sisSETHEIGHTWIDTH(Height, Width) \
173  SIS_MMIO_OUT32(pSiS->IOBase, BR(3), ((((Height) & 0xFFFF) << 16) | ((Width) & 0xFFFF)));
174
175/* Clipping */
176#define sisSETCLIPTOP(x, y) \
177   SIS_MMIO_OUT32(pSiS->IOBase, BR(8), ((((y) & 0xFFFF) << 16) | ((x) & 0xFFFF)));
178
179#define sisSETCLIPBOTTOM(x, y) \
180   SIS_MMIO_OUT32(pSiS->IOBase, BR(9), ((((y) & 0xFFFF) << 16) | ((x) & 0xFFFF)));
181
182/* Line drawing */
183#define sisSETXStart(XStart) \
184  SIS_MMIO_OUT32(pSiS->IOBase, BR(0), ((XStart) & 0xFFFF));
185
186#define sisSETYStart(YStart) \
187  SIS_MMIO_OUT32(pSiS->IOBase, BR(1), ((YStart) & 0xFFFF));
188
189#define sisSETLineMajorCount(MajorAxisCount) \
190   SIS_MMIO_OUT32(pSiS->IOBase, BR(3), ((MajorAxisCount) & 0xFFFF));
191
192#define sisSETLineSteps(K1,K2) \
193   SIS_MMIO_OUT32(pSiS->IOBase, BR(6), ((((K1) & 0xFFFF) << 16) | ((K2) & 0xFFFF)));
194
195#define sisSETLineErrorTerm(ErrorTerm) \
196   SIS_MMIO_OUT16(pSiS->IOBase, BR(7), (ErrorTerm));
197