172b676d7Smrg/* 272b676d7Smrg * SiS hardware cursor handling 372b676d7Smrg * Definitions 472b676d7Smrg * 572b676d7Smrg * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria. 672b676d7Smrg * 772b676d7Smrg * Redistribution and use in source and binary forms, with or without 872b676d7Smrg * modification, are permitted provided that the following conditions 972b676d7Smrg * are met: 1072b676d7Smrg * 1) Redistributions of source code must retain the above copyright 1172b676d7Smrg * notice, this list of conditions and the following disclaimer. 1272b676d7Smrg * 2) Redistributions in binary form must reproduce the above copyright 1372b676d7Smrg * notice, this list of conditions and the following disclaimer in the 1472b676d7Smrg * documentation and/or other materials provided with the distribution. 1572b676d7Smrg * 3) The name of the author may not be used to endorse or promote products 1672b676d7Smrg * derived from this software without specific prior written permission. 1772b676d7Smrg * 1872b676d7Smrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 1972b676d7Smrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 2072b676d7Smrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 2172b676d7Smrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 2272b676d7Smrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 2372b676d7Smrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2472b676d7Smrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2572b676d7Smrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2672b676d7Smrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 2772b676d7Smrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2872b676d7Smrg * 2972b676d7Smrg * Author: Thomas Winischhofer <thomas@winischhofer.net> 3072b676d7Smrg * 3172b676d7Smrg * Idea based on code by Can-Ru Yeou, SiS Inc. 3272b676d7Smrg * 3372b676d7Smrg */ 3472b676d7Smrg 3572b676d7Smrg#define CS(x) (0x8500 + (x << 2)) 3672b676d7Smrg 3772b676d7Smrg/* 300 series, CRT1 */ 3872b676d7Smrg 3972b676d7Smrg/* 80000000 = RGB(1) - MONO(0) 4072b676d7Smrg * 40000000 = enable(1) - disable(0) 4172b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB 4272b676d7Smrg * 10000000 = "ghost"(1) - [other effect](0) 4372b676d7Smrg */ 4472b676d7Smrg 4572b676d7Smrg#define sis300GetCursorStatus \ 4672b676d7Smrg SIS_MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000; 4772b676d7Smrg 4872b676d7Smrg#define sis300SetCursorStatus(status) \ 4972b676d7Smrg { \ 5072b676d7Smrg ULong temp; \ 5172b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 5272b676d7Smrg temp &= 0xbfffffff; \ 5372b676d7Smrg temp |= status; \ 5472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 5572b676d7Smrg } 5672b676d7Smrg 5772b676d7Smrg#define sis300EnableHWCursor() \ 5872b676d7Smrg { \ 5972b676d7Smrg ULong temp; \ 6072b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 6172b676d7Smrg temp &= 0x0fffffff; \ 6272b676d7Smrg temp |= 0x40000000; \ 6372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 6472b676d7Smrg } 6572b676d7Smrg 6672b676d7Smrg#define sis300EnableHWARGBCursor() \ 6772b676d7Smrg { \ 6872b676d7Smrg ULong temp; \ 6972b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 7072b676d7Smrg temp |= 0xF0000000; \ 7172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 7272b676d7Smrg } 7372b676d7Smrg 7472b676d7Smrg#define sis300EnableHWARGB16Cursor() \ 7572b676d7Smrg { \ 7672b676d7Smrg ULong temp; \ 7772b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 7872b676d7Smrg temp &= 0x0fffffff; \ 7972b676d7Smrg temp |= 0xD0000000; \ 8072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 8172b676d7Smrg } 8272b676d7Smrg 8372b676d7Smrg#define sis300SwitchToMONOCursor() \ 8472b676d7Smrg { \ 8572b676d7Smrg ULong temp; \ 8672b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 8772b676d7Smrg temp &= 0x4fffffff; \ 8872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 8972b676d7Smrg } 9072b676d7Smrg 9172b676d7Smrg#define sis300SwitchToRGBCursor() \ 9272b676d7Smrg { \ 9372b676d7Smrg ULong temp; \ 9472b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 9572b676d7Smrg temp |= 0xB0000000; \ 9672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 9772b676d7Smrg } 9872b676d7Smrg 9972b676d7Smrg#define sis300DisableHWCursor()\ 10072b676d7Smrg { \ 10172b676d7Smrg ULong temp; \ 10272b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 10372b676d7Smrg temp &= 0xbFFFFFFF; \ 10472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), temp); \ 10572b676d7Smrg } 10672b676d7Smrg 10772b676d7Smrg#define sis300SetCursorBGColor(color)\ 10872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(1), (color)); 10972b676d7Smrg#define sis300SetCursorFGColor(color)\ 11072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(2), (color)); 11172b676d7Smrg 11272b676d7Smrg#define sis300SetCursorPositionX(x,preset)\ 11372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), ((x) | ((preset) << 16))); 11472b676d7Smrg#define sis300SetCursorPositionY(y,preset)\ 11572b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), ((y) | ((preset) << 16))); 11672b676d7Smrg 11772b676d7Smrg#define sis300SetCursorAddress(address)\ 11872b676d7Smrg { \ 11972b676d7Smrg ULong temp; \ 12072b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(0)); \ 12172b676d7Smrg temp &= 0xF0FF0000; \ 12272b676d7Smrg temp |= address; \ 12372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase,CS(0),temp); \ 12472b676d7Smrg } 12572b676d7Smrg 12672b676d7Smrg/* 300 series, CRT2 */ 12772b676d7Smrg 12872b676d7Smrg/* 80000000 = RGB(1) - MONO(0) 12972b676d7Smrg * 40000000 = enable(1) - disable(0) 13072b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB 13172b676d7Smrg * 10000000 = unused (always "ghosting") 13272b676d7Smrg */ 13372b676d7Smrg 13472b676d7Smrg#define sis301GetCursorStatus \ 13572b676d7Smrg SIS_MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000; 13672b676d7Smrg 13772b676d7Smrg#define sis301SetCursorStatus(status) \ 13872b676d7Smrg { \ 13972b676d7Smrg ULong temp; \ 14072b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 14172b676d7Smrg temp &= 0xbfffffff; \ 14272b676d7Smrg temp |= status; \ 14372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 14472b676d7Smrg } 14572b676d7Smrg 14672b676d7Smrg#define sis301EnableHWCursor()\ 14772b676d7Smrg { \ 14872b676d7Smrg ULong temp; \ 14972b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 15072b676d7Smrg temp &= 0x0fffffff; \ 15172b676d7Smrg temp |= 0x40000000; \ 15272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 15372b676d7Smrg } 15472b676d7Smrg 15572b676d7Smrg#define sis301EnableHWARGBCursor()\ 15672b676d7Smrg { \ 15772b676d7Smrg ULong temp; \ 15872b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 15972b676d7Smrg temp |= 0xF0000000; \ 16072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 16172b676d7Smrg } 16272b676d7Smrg 16372b676d7Smrg#define sis301EnableHWARGB16Cursor()\ 16472b676d7Smrg { \ 16572b676d7Smrg ULong temp; \ 16672b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 16772b676d7Smrg temp &= 0x0FFFFFFF; \ 16872b676d7Smrg temp |= 0xD0000000; \ 16972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 17072b676d7Smrg } 17172b676d7Smrg 17272b676d7Smrg#define sis301SwitchToRGBCursor() \ 17372b676d7Smrg { \ 17472b676d7Smrg ULong temp; \ 17572b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 17672b676d7Smrg temp |= 0xB0000000; \ 17772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 17872b676d7Smrg } 17972b676d7Smrg 18072b676d7Smrg#define sis301SwitchToMONOCursor() \ 18172b676d7Smrg { \ 18272b676d7Smrg ULong temp; \ 18372b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 18472b676d7Smrg temp &= 0x4fffffff; \ 18572b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 18672b676d7Smrg } 18772b676d7Smrg 18872b676d7Smrg#define sis301DisableHWCursor()\ 18972b676d7Smrg { \ 19072b676d7Smrg ULong temp; \ 19172b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 19272b676d7Smrg temp &= 0xbFFFFFFF; \ 19372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), temp); \ 19472b676d7Smrg } 19572b676d7Smrg 19672b676d7Smrg#define sis301SetCursorBGColor(color)\ 19772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(9), (color)); 19872b676d7Smrg#define sis301SetCursorFGColor(color)\ 19972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(10), (color)); 20072b676d7Smrg 20172b676d7Smrg#define sis301SetCursorPositionX(x,preset)\ 20272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), ((x) | ((preset) << 16))); 20372b676d7Smrg#define sis301SetCursorPositionY(y,preset)\ 20472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), ((y) | ((preset) << 16))); 20572b676d7Smrg 20672b676d7Smrg#define sis301SetCursorAddress(address)\ 20772b676d7Smrg { \ 20872b676d7Smrg ULong temp; \ 20972b676d7Smrg temp = SIS_MMIO_IN32(pSiS->IOBase, CS(8)); \ 21072b676d7Smrg temp &= 0xF0FF0000; \ 21172b676d7Smrg temp |= address; \ 21272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase,CS(8),temp); \ 21372b676d7Smrg } 21472b676d7Smrg 21572b676d7Smrg/* 315/330 series CRT1 */ 21672b676d7Smrg 21772b676d7Smrg/* 80000000 = RGB(1) - MONO(0) 21872b676d7Smrg * 40000000 = enable(1) - disable(0) 21972b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB 22072b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0) 22172b676d7Smrg */ 22272b676d7Smrg 22372b676d7Smrg#define sis310GetCursorStatus \ 22472b676d7Smrg SIS_MMIO_IN32(pSiS->IOBase, CS(0)) & 0x40000000; 22572b676d7Smrg 22672b676d7Smrg#define sis310SetCursorStatus(status) \ 22772b676d7Smrg pSiS->HWCursorBackup[0] &= 0xbfffffff; \ 22872b676d7Smrg pSiS->HWCursorBackup[0] |= status; \ 22972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 23072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 23172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 23272b676d7Smrg 23372b676d7Smrg#define sis310EnableHWCursor()\ 23472b676d7Smrg pSiS->HWCursorBackup[0] &= 0x0fffffff; \ 23572b676d7Smrg pSiS->HWCursorBackup[0] |= 0x40000000; \ 23672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 23772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 23872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 23972b676d7Smrg 24072b676d7Smrg#define sis310EnableHWARGBCursor()\ 24172b676d7Smrg pSiS->HWCursorBackup[0] &= 0x0FFFFFFF; \ 24272b676d7Smrg pSiS->HWCursorBackup[0] |= 0xE0000000; \ 24372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 24472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 24572b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 24672b676d7Smrg 24772b676d7Smrg#define sis310SwitchToMONOCursor() \ 24872b676d7Smrg pSiS->HWCursorBackup[0] &= 0x4fffffff; \ 24972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 25072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 25172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 25272b676d7Smrg 25372b676d7Smrg#define sis310SwitchToRGBCursor() \ 25472b676d7Smrg pSiS->HWCursorBackup[0] &= 0xBFFFFFFF; \ 25572b676d7Smrg pSiS->HWCursorBackup[0] |= 0xA0000000; \ 25672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 25772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 25872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 25972b676d7Smrg 26072b676d7Smrg#define sis310DisableHWCursor()\ 26172b676d7Smrg pSiS->HWCursorBackup[0] &= 0xBFFFFFFF; \ 26272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 26372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 26472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 26572b676d7Smrg 26672b676d7Smrg#define sis310SetCursorBGColor(color) \ 26772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(1), (color)); \ 26872b676d7Smrg pSiS->HWCursorBackup[1] = color; 26972b676d7Smrg 27072b676d7Smrg#define sis310SetCursorFGColor(color)\ 27172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(2), (color)); \ 27272b676d7Smrg pSiS->HWCursorBackup[2] = color; 27372b676d7Smrg 27472b676d7Smrg#define sis310SetCursorPositionX(x,preset) \ 27572b676d7Smrg pSiS->HWCursorBackup[3] = ((x) | ((preset) << 16)); \ 27672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); 27772b676d7Smrg 27872b676d7Smrg#define sis310SetCursorPositionY(y,preset) \ 27972b676d7Smrg pSiS->HWCursorBackup[4] = ((y) | ((preset) << 16)); \ 28072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 28172b676d7Smrg 28272b676d7Smrg#define sis310SetCursorAddress(address)\ 28372b676d7Smrg pSiS->HWCursorBackup[0] &= 0xF0F00000; \ 28472b676d7Smrg pSiS->HWCursorBackup[0] |= address; \ 28572b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(0), pSiS->HWCursorBackup[0]); \ 28672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(1), pSiS->HWCursorBackup[1]); \ 28772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(2), pSiS->HWCursorBackup[2]); \ 28872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(3), pSiS->HWCursorBackup[3]); \ 28972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(4), pSiS->HWCursorBackup[4]); 29072b676d7Smrg 29172b676d7Smrg/* 315 series CRT2 */ 29272b676d7Smrg 29372b676d7Smrg/* 80000000 = RGB(1) - MONO(0) 29472b676d7Smrg * 40000000 = enable(1) - disable(0) 29572b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB 29672b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0) ? 29772b676d7Smrg */ 29872b676d7Smrg 29972b676d7Smrg#define sis301GetCursorStatus310 \ 30072b676d7Smrg SIS_MMIO_IN32(pSiS->IOBase, CS(8)) & 0x40000000; 30172b676d7Smrg 30272b676d7Smrg#define sis301SetCursorStatus310(status) \ 30372b676d7Smrg pSiS->HWCursorBackup[8] &= 0xbfffffff; \ 30472b676d7Smrg pSiS->HWCursorBackup[8] |= status; \ 30572b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 30672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 30772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 30872b676d7Smrg 30972b676d7Smrg#define sis301EnableHWCursor310()\ 31072b676d7Smrg pSiS->HWCursorBackup[8] &= 0x0fffffff; \ 31172b676d7Smrg pSiS->HWCursorBackup[8] |= 0x40000000; \ 31272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 31372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 31472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 31572b676d7Smrg 31672b676d7Smrg#define sis301EnableHWARGBCursor310()\ 31772b676d7Smrg pSiS->HWCursorBackup[8] &= 0x0FFFFFFF; \ 31872b676d7Smrg pSiS->HWCursorBackup[8] |= 0xE0000000; \ 31972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 32072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 32172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 32272b676d7Smrg 32372b676d7Smrg#define sis301SwitchToRGBCursor310() \ 32472b676d7Smrg pSiS->HWCursorBackup[8] &= 0xBFFFFFFF; \ 32572b676d7Smrg pSiS->HWCursorBackup[8] |= 0xA0000000; \ 32672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 32772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 32872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 32972b676d7Smrg 33072b676d7Smrg#define sis301SwitchToMONOCursor310() \ 33172b676d7Smrg pSiS->HWCursorBackup[8] &= 0x4fffffff; \ 33272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 33372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 33472b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 33572b676d7Smrg 33672b676d7Smrg#define sis301DisableHWCursor310()\ 33772b676d7Smrg pSiS->HWCursorBackup[8] &= 0xBFFFFFFF; \ 33872b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 33972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 34072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 34172b676d7Smrg 34272b676d7Smrg#define sis301SetCursorBGColor310(color) \ 34372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(9), (color)); \ 34472b676d7Smrg pSiS->HWCursorBackup[9] = color; 34572b676d7Smrg 34672b676d7Smrg#define sis301SetCursorFGColor310(color) \ 34772b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(10), (color)); \ 34872b676d7Smrg pSiS->HWCursorBackup[10] = color; 34972b676d7Smrg 35072b676d7Smrg#define sis301SetCursorPositionX310(x,preset) \ 35172b676d7Smrg pSiS->HWCursorBackup[11] = ((x) | ((preset) << 16)); \ 35272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); 35372b676d7Smrg 35472b676d7Smrg#define sis301SetCursorPositionY310(y,preset) \ 35572b676d7Smrg pSiS->HWCursorBackup[12] = ((y) | ((preset) << 16)); \ 35672b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 35772b676d7Smrg 35872b676d7Smrg#define sis301SetCursorAddress310(address) \ 35972b676d7Smrg if(pSiS->ChipType == SIS_315H) { \ 36072b676d7Smrg if(address & 0x10000) { \ 36172b676d7Smrg address &= ~0x10000; \ 36272b676d7Smrg orSISIDXREG(SISSR, 0x37, 0x80); \ 36372b676d7Smrg } else { \ 36472b676d7Smrg andSISIDXREG(SISSR, 0x37, 0x7f); \ 36572b676d7Smrg } \ 36672b676d7Smrg } \ 36772b676d7Smrg pSiS->HWCursorBackup[8] &= 0xF0F00000; \ 36872b676d7Smrg pSiS->HWCursorBackup[8] |= address; \ 36972b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 37072b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(9), pSiS->HWCursorBackup[9]); \ 37172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(10), pSiS->HWCursorBackup[10]); \ 37272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 37372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); 37472b676d7Smrg 37572b676d7Smrg/* 330 series CRT2 */ 37672b676d7Smrg 37772b676d7Smrg/* Mono cursor engine for CRT2 on SiS330 (Xabre) has bugs 37872b676d7Smrg * and cannot be used! Will hang engine. 37972b676d7Smrg */ 38072b676d7Smrg 38172b676d7Smrg/* 80000000 = RGB(1) - MONO(0) 38272b676d7Smrg * 40000000 = enable(1) - disable(0) 38372b676d7Smrg * 20000000 = 32(1) / 16(1) bit RGB 38472b676d7Smrg * 10000000 = "ghost"(1) - Alpha Blend(0) ? 38572b676d7Smrg */ 38672b676d7Smrg 38772b676d7Smrg#define sis301EnableHWCursor330() \ 38872b676d7Smrg /* andSISIDXREG(SISCR,0x5b,~0x10); */ \ 38972b676d7Smrg pSiS->HWCursorBackup[8] &= 0x0fffffff; \ 39072b676d7Smrg pSiS->HWCursorBackup[8] |= 0xE0000000; \ 39172b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(8), pSiS->HWCursorBackup[8]); \ 39272b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(11), pSiS->HWCursorBackup[11]); \ 39372b676d7Smrg SIS_MMIO_OUT32(pSiS->IOBase, CS(12), pSiS->HWCursorBackup[12]); \ 39472b676d7Smrg /* orSISIDXREG(SISCR,0x5b,0x10); */ 39572b676d7Smrg 39672b676d7Smrg 39772b676d7Smrg 398