ffb_regs.h revision 89b0bd4c
1/*
2 * Acceleration for the Creator and Creator3D framebuffer - register layout.
3 *
4 * Copyright (C) 1998,1999,2000 Jakub Jelinek (jakub@redhat.com)
5 * Copyright (C) 1998 Michal Rehacek (majkl@iname.com)
6 * Copyright (C) 1999 David S. Miller (davem@redhat.com)
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
21 * JAKUB JELINEK, MICHAL REHACEK, OR DAVID MILLER BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 */
27
28#ifndef FFBREGS_H
29#define FFBREGS_H
30
31/* Auxilliary clips. */
32typedef struct  {
33	volatile unsigned int min;
34	volatile unsigned int max;
35} ffb_auxclip, *ffb_auxclipPtr;
36
37/* FFB register set. */
38typedef struct _ffb_fbc {
39	/* Next vertex registers, on the right we list which drawops
40	 * use said register and the logical name the register has in
41	 * that context.
42	 */					/* DESCRIPTION		DRAWOP(NAME)	*/
43/*0x00*/unsigned int		pad1[3];	/* Reserved				*/
44/*0x0c*/volatile unsigned int	alpha;		/* ALPHA Transparency			*/
45/*0x10*/volatile unsigned int	red;		/* RED					*/
46/*0x14*/volatile unsigned int	green;		/* GREEN				*/
47/*0x18*/volatile unsigned int	blue;		/* BLUE					*/
48/*0x1c*/volatile unsigned int	z;		/* DEPTH				*/
49/*0x20*/volatile unsigned int	y;		/* Y			triangle(DOYF)	*/
50						/*                      aadot(DYF)	*/
51						/*                      ddline(DYF)	*/
52						/*                      aaline(DYF)	*/
53/*0x24*/volatile unsigned int	x;		/* X			triangle(DOXF)	*/
54						/*                      aadot(DXF)	*/
55						/*                      ddline(DXF)	*/
56						/*                      aaline(DXF)	*/
57/*0x28*/unsigned int		pad2[2];	/* Reserved				*/
58/*0x30*/volatile unsigned int	ryf;		/* Y (alias to DOYF)	ddline(RYF)	*/
59						/*			aaline(RYF)	*/
60						/*			triangle(RYF)	*/
61/*0x34*/volatile unsigned int	rxf;		/* X			ddline(RXF)	*/
62						/*			aaline(RXF)	*/
63						/*			triangle(RXF)	*/
64/*0x38*/unsigned int		pad3[2];	/* Reserved				*/
65/*0x40*/volatile unsigned int	dmyf;		/* Y (alias to DOYF)	triangle(DMYF)	*/
66/*0x44*/volatile unsigned int	dmxf;		/* X			triangle(DMXF)	*/
67/*0x48*/unsigned int		pad4[2];	/* Reserved				*/
68/*0x50*/volatile unsigned int	ebyi;		/* Y (alias to RYI)	polygon(EBYI)	*/
69/*0x54*/volatile unsigned int	ebxi;		/* X			polygon(EBXI)	*/
70/*0x58*/unsigned int		pad5[2];	/* Reserved				*/
71/*0x60*/volatile unsigned int	by;		/* Y			brline(RYI)	*/
72						/*			fastfill(OP)	*/
73						/*			polygon(YI)	*/
74						/*			rectangle(YI)	*/
75						/*			bcopy(SRCY)	*/
76						/*			vscroll(SRCY)	*/
77/*0x64*/volatile unsigned int	bx;		/* X			brline(RXI)	*/
78						/*			polygon(XI)	*/
79						/*			rectangle(XI)	*/
80						/*			bcopy(SRCX)	*/
81						/*			vscroll(SRCX)	*/
82						/*			fastfill(GO)	*/
83/*0x68*/volatile unsigned int	dy;		/* destination Y	fastfill(DSTY)	*/
84						/*			bcopy(DSRY)	*/
85						/*			vscroll(DSRY)	*/
86/*0x6c*/volatile unsigned int	dx;		/* destination X	fastfill(DSTX)	*/
87						/*			bcopy(DSTX)	*/
88						/*			vscroll(DSTX)	*/
89/*0x70*/volatile unsigned int	bh;		/* Y (alias to RYI)	brline(DYI)	*/
90						/*			dot(DYI)	*/
91						/*			polygon(ETYI)	*/
92						/* Height		fastfill(H)	*/
93						/*			bcopy(H)	*/
94						/*			vscroll(H)	*/
95						/* Y count		fastfill(NY)	*/
96/*0x74*/volatile unsigned int	bw;		/* X			dot(DXI)	*/
97						/*			brline(DXI)	*/
98						/*			polygon(ETXI)	*/
99						/*			fastfill(W)	*/
100						/*			bcopy(W)	*/
101						/*			vscroll(W)	*/
102						/*			fastfill(NX)	*/
103/*0x78*/unsigned int		pad6[2];	/* Reserved				*/
104/*0x80*/unsigned int		pad7[32];	/* Reserved				*/
105
106	/* Setup Unit's vertex state register */
107/*100*/	volatile unsigned int	suvtx;
108/*104*/	unsigned int		pad8[63];	/* Reserved				*/
109
110	/* Frame Buffer Control Registers */
111/*200*/	volatile unsigned int	ppc;		/* Pixel Processor Control		*/
112/*204*/	volatile unsigned int	wid;		/* Current WID				*/
113/*208*/	volatile unsigned int	fg;		/* FG data				*/
114/*20c*/	volatile unsigned int	bg;		/* BG data				*/
115/*210*/	volatile unsigned int	consty;		/* Constant Y				*/
116/*214*/	volatile unsigned int	constz;		/* Constant Z				*/
117/*218*/	volatile unsigned int	xclip;		/* X Clip				*/
118/*21c*/	volatile unsigned int	dcss;		/* Depth Cue Scale Slope		*/
119/*220*/	volatile unsigned int	vclipmin;	/* Viewclip XY Min Bounds		*/
120/*224*/	volatile unsigned int	vclipmax;	/* Viewclip XY Max Bounds		*/
121/*228*/	volatile unsigned int	vclipzmin;	/* Viewclip Z Min Bounds		*/
122/*22c*/	volatile unsigned int	vclipzmax;	/* Viewclip Z Max Bounds		*/
123/*230*/	volatile unsigned int	dcsf;		/* Depth Cue Scale Front Bound		*/
124/*234*/	volatile unsigned int	dcsb;		/* Depth Cue Scale Back Bound		*/
125/*238*/	volatile unsigned int	dczf;		/* Depth Cue Z Front			*/
126/*23c*/	volatile unsigned int	dczb;		/* Depth Cue Z Back			*/
127/*240*/	unsigned int		pad9;		/* Reserved				*/
128/*244*/	volatile unsigned int	blendc;		/* Alpha Blend Control			*/
129/*248*/	volatile unsigned int	blendc1;	/* Alpha Blend Color 1			*/
130/*24c*/	volatile unsigned int	blendc2;	/* Alpha Blend Color 2			*/
131/*250*/	volatile unsigned int	fbramitc;	/* FB RAM Interleave Test Control	*/
132/*254*/	volatile unsigned int	fbc;		/* Frame Buffer Control			*/
133/*258*/	volatile unsigned int	rop;		/* Raster OPeration			*/
134/*25c*/	volatile unsigned int	cmp;		/* Frame Buffer Compare			*/
135/*260*/	volatile unsigned int	matchab;	/* Buffer AB Match Mask			*/
136/*264*/	volatile unsigned int	matchc;		/* Buffer C(YZ) Match Mask		*/
137/*268*/	volatile unsigned int	magnab;		/* Buffer AB Magnitude Mask		*/
138/*26c*/	volatile unsigned int	magnc;		/* Buffer C(YZ) Magnitude Mask		*/
139/*270*/	volatile unsigned int	fbcfg0;		/* Frame Buffer Config 0		*/
140/*274*/	volatile unsigned int	fbcfg1;		/* Frame Buffer Config 1		*/
141/*278*/	volatile unsigned int	fbcfg2;		/* Frame Buffer Config 2		*/
142/*27c*/	volatile unsigned int	fbcfg3;		/* Frame Buffer Config 3		*/
143/*280*/	volatile unsigned int	ppcfg;		/* Pixel Processor Config		*/
144/*284*/	volatile unsigned int	pick;		/* Picking Control			*/
145/*288*/	volatile unsigned int	fillmode;	/* FillMode				*/
146/*28c*/	volatile unsigned int	fbramwac;	/* FB RAM Write Address Control		*/
147/*290*/	volatile unsigned int	pmask;		/* RGB PlaneMask			*/
148/*294*/	volatile unsigned int	xpmask;		/* X PlaneMask				*/
149/*298*/	volatile unsigned int	ypmask;		/* Y PlaneMask				*/
150/*29c*/	volatile unsigned int	zpmask;		/* Z PlaneMask				*/
151/*2a0*/	ffb_auxclip		auxclip[4]; 	/* Auxilliary Viewport Clip		*/
152
153	/* New 3dRAM III support regs */
154/*2c0*/	volatile unsigned int	rawblend2;
155/*2c4*/	volatile unsigned int	rawpreblend;
156/*2c8*/	volatile unsigned int	rawstencil;
157/*2cc*/	volatile unsigned int	rawstencilctl;
158/*2d0*/	volatile unsigned int	threedram1;
159/*2d4*/	volatile unsigned int	threedram2;
160/*2d8*/	volatile unsigned int	passin;
161/*2dc*/	volatile unsigned int	rawclrdepth;
162/*2e0*/	volatile unsigned int	rawpmask;
163/*2e4*/	volatile unsigned int	rawcsrc;
164/*2e8*/	volatile unsigned int	rawmatch;
165/*2ec*/	volatile unsigned int	rawmagn;
166/*2f0*/	volatile unsigned int	rawropblend;
167/*2f4*/	volatile unsigned int	rawcmp;
168/*2f8*/	volatile unsigned int	rawwac;
169/*2fc*/	volatile unsigned int	fbramid;
170
171/*300*/	volatile unsigned int	drawop;		/* Draw OPeration			*/
172/*304*/	unsigned int		pad10[2];	/* Reserved				*/
173/*30c*/	volatile unsigned int	lpat;		/* Line Pattern control			*/
174/*310*/	unsigned int		pad11;		/* Reserved				*/
175/*314*/	volatile unsigned int	fontxy;		/* XY Font coordinate			*/
176/*318*/	volatile unsigned int	fontw;		/* Font Width				*/
177/*31c*/	volatile unsigned int	fontinc;	/* Font Increment			*/
178/*320*/	volatile unsigned int	font;		/* Font bits				*/
179/*324*/	unsigned int		pad12[3];	/* Reserved				*/
180/*330*/	volatile unsigned int	blend2;
181/*334*/	volatile unsigned int	preblend;
182/*338*/	volatile unsigned int	stencil;
183/*33c*/	volatile unsigned int	stencilctl;
184
185/*340*/	unsigned int		pad13[4];	/* Reserved				*/
186/*350*/	volatile unsigned int	dcss1;		/* Depth Cue Scale Slope 1		*/
187/*354*/	volatile unsigned int	dcss2;		/* Depth Cue Scale Slope 2		*/
188/*358*/	volatile unsigned int	dcss3;		/* Depth Cue Scale Slope 3		*/
189/*35c*/	volatile unsigned int	widpmask;
190/*360*/	volatile unsigned int	dcs2;
191/*364*/	volatile unsigned int	dcs3;
192/*368*/	volatile unsigned int	dcs4;
193/*36c*/	unsigned int		pad14;		/* Reserved				*/
194/*370*/	volatile unsigned int	dcd2;
195/*374*/	volatile unsigned int	dcd3;
196/*378*/	volatile unsigned int	dcd4;
197/*37c*/	unsigned int		pad15;		/* Reserved				*/
198/*380*/	volatile unsigned int	pattern[32];	/* area Pattern				*/
199/*400*/	unsigned int		pad16[8];	/* Reserved				*/
200/*420*/	volatile unsigned int	reset;		/* chip RESET				*/
201/*424*/	unsigned int		pad17[247];	/* Reserved				*/
202/*800*/	volatile unsigned int	devid;		/* Device ID				*/
203/*804*/	unsigned int		pad18[63];	/* Reserved				*/
204/*900*/	volatile unsigned int	ucsr;		/* User Control & Status Register	*/
205/*904*/	unsigned int		pad19[31];	/* Reserved				*/
206/*980*/	volatile unsigned int	mer;		/* Mode Enable Register			*/
207/*984*/	unsigned int		pad20[1439];	/* Reserved				*/
208} ffb_fbc, *ffb_fbcPtr;
209
210/* Draw operations */
211#define FFB_DRAWOP_DOT		0x00
212#define FFB_DRAWOP_AADOT	0x01
213#define FFB_DRAWOP_BRLINECAP	0x02
214#define FFB_DRAWOP_BRLINEOPEN	0x03
215#define FFB_DRAWOP_DDLINE	0x04
216#define FFB_DRAWOP_AALINE	0x05
217#define FFB_DRAWOP_TRIANGLE	0x06
218#define FFB_DRAWOP_POLYGON	0x07
219#define FFB_DRAWOP_RECTANGLE	0x08
220#define FFB_DRAWOP_FASTFILL	0x09
221#define FFB_DRAWOP_BCOPY	0x0a	/* Not implemented in any FFB, VIS is faster		*/
222#define FFB_DRAWOP_VSCROLL	0x0b	/* Up to 12x faster than BCOPY, 3-4x faster than VIS	*/
223
224/* FastFill operation codes. */
225#define FFB_FASTFILL_PAGE	0x01
226#define FFB_FASTFILL_BLOCK	0x02
227#define FFB_FASTFILL_COLOR_BLK	0x03
228#define FFB_FASTFILL_BLOCK_X	0x04
229
230/* Spanfill Unit Line Pattern */
231#define FFB_LPAT_SCALEPTR	0xf0000000
232#define FFB_LPAT_SCALEPTR_SHIFT	28
233#define FFB_LPAT_PATPTR		0x0f000000
234#define FFB_LPAT_PATPTR_SHIFT	24
235#define FFB_LPAT_SCALEVAL	0x00f00000
236#define FFB_LPAT_SCALEVAL_SHIFT	20
237#define FFB_LPAT_PATLEN		0x000f0000
238#define FFB_LPAT_PATLEN_SHIFT	16
239#define FFB_LPAT_PATTERN	0x0000ffff
240#define FFB_LPAT_PATTERN_SHIFT	0
241
242/* Pixel processor control */
243/* Force WID */
244#define FFB_PPC_FW_DISABLE	0x800000
245#define FFB_PPC_FW_ENABLE	0xc00000
246#define FFB_PPC_FW_MASK		0xc00000
247/* Auxiliary clip */
248#define FFB_PPC_ACE_DISABLE	0x040000
249#define FFB_PPC_ACE_AUX_SUB	0x080000
250#define FFB_PPC_ACE_AUX_ADD	0x0c0000
251#define FFB_PPC_ACE_MASK	0x0c0000
252/* Depth cue */
253#define FFB_PPC_DCE_DISABLE	0x020000
254#define FFB_PPC_DCE_ENABLE	0x030000
255#define FFB_PPC_DCE_MASK	0x030000
256/* Alpha blend */
257#define FFB_PPC_ABE_DISABLE	0x008000
258#define FFB_PPC_ABE_ENABLE	0x00c000
259#define FFB_PPC_ABE_MASK	0x00c000
260/* View clip */
261#define FFB_PPC_VCE_DISABLE	0x001000
262#define FFB_PPC_VCE_2D		0x002000
263#define FFB_PPC_VCE_3D		0x003000
264#define FFB_PPC_VCE_MASK	0x003000
265/* Area pattern */
266#define FFB_PPC_APE_DISABLE	0x000800
267#define FFB_PPC_APE_ENABLE	0x000c00
268#define FFB_PPC_APE_MASK	0x000c00
269/* Transparent background */
270#define FFB_PPC_TBE_OPAQUE	0x000200
271#define FFB_PPC_TBE_TRANSPARENT	0x000300
272#define FFB_PPC_TBE_MASK	0x000300
273/* Z source */
274#define FFB_PPC_ZS_VAR		0x000080
275#define FFB_PPC_ZS_CONST	0x0000c0
276#define FFB_PPC_ZS_MASK		0x0000c0
277/* Y source */
278#define FFB_PPC_YS_VAR		0x000020
279#define FFB_PPC_YS_CONST	0x000030
280#define FFB_PPC_YS_MASK		0x000030
281/* X source */
282#define FFB_PPC_XS_WID		0x000004
283#define FFB_PPC_XS_VAR		0x000008
284#define FFB_PPC_XS_CONST	0x00000c
285#define FFB_PPC_XS_MASK		0x00000c
286/* Color (BGR) source */
287#define FFB_PPC_CS_VAR		0x000002
288#define FFB_PPC_CS_CONST	0x000003
289#define FFB_PPC_CS_MASK		0x000003
290
291/* X Clip */
292#define FFB_XCLIP_XREF		0x000000ff
293#define FFB_XCLIP_TEST_MASK	0x00070000
294#define FFB_XCLIP_TEST_ALWAYS	0x00000000
295#define FFB_XCLIP_TEST_GT	0x00010000
296#define FFB_XCLIP_TEST_EQ	0x00020000
297#define FFB_XCLIP_TEST_GE	0x00030000
298#define FFB_XCLIP_TEST_NEVER	0x00040000
299#define FFB_XCLIP_TEST_LE	0x00050000
300#define FFB_XCLIP_TEST_NE	0x00060000
301#define FFB_XCLIP_TEST_LT	0x00070000
302
303/* FB Control register */
304/* Write buffer dest */
305#define FFB_FBC_WB_A		0x20000000
306#define FFB_FBC_WB_B		0x40000000
307#define FFB_FBC_WB_AB		0x60000000
308#define FFB_FBC_WB_C		0x80000000
309#define FFB_FBC_WB_AC		0xa0000000
310#define FFB_FBC_WB_BC		0xc0000000
311#define FFB_FBC_WB_ABC		0xe0000000
312#define FFB_FBC_WB_MASK		0xe0000000
313/* Write enable */
314#define FFB_FBC_WE_FORCEOFF	0x00100000
315#define FFB_FBC_WE_FORCEON	0x00200000
316#define FFB_FBC_WE_USE_WMASK	0x00300000
317#define FFB_FBC_WE_MASK		0x00300000
318/* Write group mode */
319#define FFB_FBC_WM_RSVD		0x00040000
320#define FFB_FBC_WM_COMBINED	0x00080000
321#define FFB_FBC_WM_SEPARATE	0x000c0000
322#define FFB_FBC_WM_MASK		0x000c0000
323/* Read buffer src */
324#define FFB_FBC_RB_A		0x00004000
325#define FFB_FBC_RB_B		0x00008000
326#define FFB_FBC_RB_C		0x0000c000
327#define FFB_FBC_RB_MASK		0x0000c000
328/* Stereo buf dest */
329#define FFB_FBC_SB_LEFT		0x00001000
330#define FFB_FBC_SB_RIGHT	0x00002000
331#define FFB_FBC_SB_BOTH		0x00003000
332#define FFB_FBC_SB_MASK		0x00003000
333/* Z plane group enable */
334#define FFB_FBC_ZE_OFF		0x00000400
335#define FFB_FBC_ZE_ON		0x00000800
336#define FFB_FBC_ZE_MASK		0x00000c00
337/* Y plane group enable */
338#define FFB_FBC_YE_OFF		0x00000100
339#define FFB_FBC_YE_ON		0x00000200
340#define FFB_FBC_YE_MASK		0x00000300
341/* X plane group enable */
342#define FFB_FBC_XE_OFF		0x00000040
343#define FFB_FBC_XE_ON		0x00000080
344#define FFB_FBC_XE_MASK		0x000000c0
345/* B plane group enable */
346#define FFB_FBC_BE_OFF		0x00000010
347#define FFB_FBC_BE_ON		0x00000020
348#define FFB_FBC_BE_MASK		0x00000030
349/* G plane group enable */
350#define FFB_FBC_GE_OFF		0x00000004
351#define FFB_FBC_GE_ON		0x00000008
352#define FFB_FBC_GE_MASK		0x0000000c
353/* R plane group enable */
354#define FFB_FBC_RE_OFF		0x00000001
355#define FFB_FBC_RE_ON		0x00000002
356#define FFB_FBC_RE_MASK		0x00000003
357/* Combined */
358#define FFB_FBC_RGBE_OFF	0x00000015
359#define FFB_FBC_RGBE_ON		0x0000002a
360#define FFB_FBC_RGBE_MASK	0x0000003f
361
362/* Raster OP */
363#define FFB_ROP_YZ_MASK		0x008f0000
364#define FFB_ROP_X_MASK		0x00008f00
365#define FFB_ROP_RGB_MASK	0x0000008f
366
367/* Now the rops themselves which get shifted into the
368 * above fields.
369 */
370#define FFB_ROP_EDIT_BIT	0x80
371#define FFB_ROP_ZERO		0x80
372#define FFB_ROP_NEW_AND_OLD	0x81
373#define FFB_ROP_NEW_AND_NOLD	0x82
374#define FFB_ROP_NEW		0x83
375#define FFB_ROP_NNEW_AND_OLD	0x84
376#define FFB_ROP_OLD		0x85
377#define FFB_ROP_NEW_XOR_OLD	0x86
378#define FFB_ROP_NEW_OR_OLD	0x87
379#define FFB_ROP_NNEW_AND_NOLD	0x88
380#define FFB_ROP_NNEW_XOR_NOLD	0x89
381#define FFB_ROP_NOLD		0x8a
382#define FFB_ROP_NEW_OR_NOLD	0x8b
383#define FFB_ROP_NNEW		0x8c
384#define FFB_ROP_NNEW_OR_OLD	0x8d
385#define FFB_ROP_NNEW_OR_NOLD	0x8e
386#define FFB_ROP_ONES		0x8f
387
388/* FB Compare */
389#define FFB_CMP_MATCHC_MASK	0x8f000000
390#define FFB_CMP_MAGNC_MASK	0x00870000
391#define FFB_CMP_MATCHAB_MASK	0x0000ff00
392#define FFB_CMP_MAGNAB_MASK	0x000000ff
393
394/* Compare Match codes */
395#define FFB_CMP_MATCH_EDIT_BIT	0x80
396#define FFB_CMP_MATCH_ALWAYS	0x80
397#define FFB_CMP_MATCH_NEVER	0x81
398#define FFB_CMP_MATCH_EQ	0x82
399#define FFB_CMP_MATCH_NE	0x83
400#define FFB_CMP_MATCH_A_ALWAYS	0xc0
401#define FFB_CMP_MATCH_B_ALWAYS	0xa0
402
403/* Compare Magnitude codes */
404#define FFB_CMP_MAGN_EDIT_BIT	0x80
405#define FFB_CMP_MAGN_ALWAYS	0x80
406#define FFB_CMP_MAGN_GT		0x81
407#define FFB_CMP_MAGN_EQ		0x82
408#define FFB_CMP_MAGN_GE		0x83
409#define FFB_CMP_MAGN_NEVER	0x84
410#define FFB_CMP_MAGN_LE		0x85
411#define FFB_CMP_MAGN_NE		0x86
412#define FFB_CMP_MAGN_LT		0x87
413#define FFB_CMP_MAGN_A_ALWAYS	0xc0
414#define FFB_CMP_MAGN_B_ALWAYS	0xa0
415
416/* User Control and Status */
417#define FFB_UCSR_FIFO_MASK	0x00000fff
418#define FFB_UCSR_PICK_NO_HIT	0x00020000
419#define FFB_UCSR_PICK_HIT	0x00030000
420#define FFB_UCSR_PICK_DISABLE	0x00080000
421#define FFB_UCSR_PICK_ENABLE	0x000c0000
422#define FFB_UCSR_FB_BUSY	0x01000000
423#define FFB_UCSR_RP_BUSY	0x02000000
424#define FFB_UCSR_ALL_BUSY	(FFB_UCSR_RP_BUSY|FFB_UCSR_FB_BUSY)
425#define FFB_UCSR_READ_ERR	0x40000000
426#define FFB_UCSR_FIFO_OVFL	0x80000000
427#define FFB_UCSR_ALL_ERRORS	(FFB_UCSR_READ_ERR|FFB_UCSR_FIFO_OVFL)
428
429/* Mode Enable Register */
430#define FFB_MER_EIRA		0x00000080 /* Enable read-ahead, increasing */
431#define FFB_MER_EDRA		0x000000c0 /* Enable read-ahead, decreasing */
432#define FFB_MER_DRA		0x00000040 /* No read-ahead */
433
434/* Alpha Blend Control */
435#define FFB_BLENDC_FORCE_ONE	0x00000010 /* Defines 0xff as 1.0 */
436#define FFB_BLENDC_DF_MASK	0x0000000c /* Destination Frac Mask */
437#define FFB_BLENDC_DF_ZERO	0x00000000 /* Destination Frac: 0.00 */
438#define FFB_BLENDC_DF_ONE	0x00000004 /* Destination Frac: 1.00 */
439#define FFB_BLENDC_DF_ONE_M_A	0x00000008 /* Destination Frac: 1.00 - Xsrc */
440#define FFB_BLENDC_DF_A		0x0000000c /* Destination Frac: Xsrc */
441#define FFB_BLENDC_SF_MASK	0x00000003 /* Source Frac Mask */
442#define FFB_BLENDC_SF_ZERO	0x00000000 /* Source Frac: 0.00 */
443#define FFB_BLENDC_SF_ONE	0x00000001 /* Source Frac: 1.00 */
444#define FFB_BLENDC_SF_ONE_M_A	0x00000002 /* Source Frac: 1.00 - Xsrc */
445#define FFB_BLENDC_SF_A		0x00000003 /* Source Frac: Xsrc */
446
447/* FBram Config 0 */
448#define FFB_FBCFG0_RFTIME	0xff800000
449#define FFB_FBCFG0_XMAX		0x007c0000
450#define FFB_FBCFG0_YMAX		0x0003ffc0
451#define FFB_FBCFG0_RES_MASK	0x00000030
452#define FFB_FBCFG0_RES_HIGH	0x00000030 /* 1920x1360 */
453#define FFB_FBCFG0_RES_STD	0x00000020 /* 1280x1024 */
454#define FFB_FBCFG0_RES_STEREO	0x00000010 /* 960x580 */
455#define FFB_FBCFG0_RES_PRTRAIT	0x00000000 /* 1280x2048 */
456#define FFB_FBCFG0_ITRLACE	0x00000000
457#define FFB_FBCFG0_SEQUENTIAL	0x00000008
458#define FFB_FBCFG0_DRENA	0x00000004
459#define FFB_FBCFG0_BPMODE	0x00000002
460#define FFB_FBCFG0_RFRSH_RST	0x00000001
461
462typedef struct _ffb_dac {
463	volatile unsigned int	cfg;
464	volatile unsigned int	cfgdata;
465	volatile unsigned int	cur;
466	volatile unsigned int	curdata;
467} ffb_dac, *ffb_dacPtr;
468
469/* Writing 2 32-bit registers at a time using 64-bit stores. -DaveM */
470#if defined(__GNUC__) && defined(USE_VIS)
471/* 64-bit register writing support.
472 * Note: "lo" means "low address".
473 */
474#define FFB_WRITE64_COMMON(__regp, __lo32, __hi32, REG0, REG1) \
475do {	__extension__ register unsigned int __r0 __asm__(""#REG0); \
476	__extension__ register unsigned int __r1 __asm__(""#REG1); \
477	__r0 = (__lo32); \
478	__r1 = (__hi32); \
479	__asm__ __volatile__ ("sllx\t%0, 32, %%g1\n\t" \
480			      "srl\t%1, 0, %1\n\t" \
481			      "or\t%%g1, %1, %%g1\n\t" \
482			      "stx\t%%g1, %2" \
483	 : : "r" (__r0), "r" (__r1), "m" (*(__regp)) : "g1"); \
484} while(0)
485
486#define FFB_WRITE64P(__regp, __srcp) \
487do {	__asm__ __volatile__ ("ldx\t%0, %%g2;" \
488			      "stx\t%%g2, %1" \
489	 : : "m" (*(__srcp)), "m" (*(__regp)) \
490         : "g2"); \
491} while(0)
492
493#define FFB_WRITE64(__regp, __lo32, __hi32) \
494	FFB_WRITE64_COMMON(__regp, __lo32, __hi32, g2, g3)
495#define FFB_WRITE64_2(__regp, __lo32, __hi32) \
496	FFB_WRITE64_COMMON(__regp, __lo32, __hi32, g4, g5)
497#define FFB_WRITE64_3(__regp, __lo32, __hi32) \
498	FFB_WRITE64_COMMON(__regp, __lo32, __hi32, o4, o5)
499
500#else /* Do not use 64-bit writes. */
501
502#define FFB_WRITE64(__regp, __lo32, __hi32) \
503do {	volatile unsigned int *__p = (__regp); \
504	*__p = (__lo32); \
505	*(__p + 1) = (__hi32); \
506} while(0)
507
508#define FFB_WRITE64P(__regp, __srcp) \
509do {	volatile unsigned int *__p = (__regp); \
510	unsigned int *__q = (__srcp); \
511	*__p = *__q; \
512	*(__p + 1) = *(__q + 1); \
513} while(0)
514
515#define FFB_WRITE64_2(__regp, __lo32, __hi32) \
516	FFB_WRITE64(__regp, __lo32, __hi32)
517#define FFB_WRITE64_3(__regp, __lo32, __hi32) \
518	FFB_WRITE64(__regp, __lo32, __hi32)
519#endif
520
521#define FFB_ATTR_SFB_VAR_XAA(__fpriv, __pmask, __alu) \
522do {   unsigned int __ppc = FFB_PPC_ABE_DISABLE | FFB_PPC_APE_DISABLE | FFB_PPC_CS_VAR | FFB_PPC_XS_WID; \
523       unsigned int __ppc_mask = FFB_PPC_ABE_MASK | FFB_PPC_APE_MASK | FFB_PPC_CS_MASK | FFB_PPC_XS_MASK; \
524       unsigned int __rop = (FFB_ROP_EDIT_BIT | (__alu))|(FFB_ROP_NEW<<8); \
525       unsigned int __fbc = (__fpriv)->fbc; \
526       unsigned int __wid = (__fpriv)->wid; \
527       if (((__fpriv)->ppc_cache & __ppc_mask) != __ppc || \
528           (__fpriv)->fbc_cache != __fbc || \
529           (__fpriv)->wid_cache != __wid || \
530           (__fpriv)->rop_cache != __rop || \
531           (__fpriv)->pmask_cache != (__pmask)) \
532               __FFB_Attr_SFB_VAR(__fpriv, __ppc, __ppc_mask, __fbc, \
533                                  __wid, __rop, (__pmask)); \
534} while(0)
535
536#define FFB_ATTR_VSCROLL_XAA(__fpriv, __pmask) \
537do {    unsigned int __ppc = FFB_PPC_ABE_DISABLE | FFB_PPC_APE_DISABLE | FFB_PPC_CS_VAR | FFB_PPC_XS_WID; \
538        unsigned int __ppc_mask = FFB_PPC_ABE_MASK | FFB_PPC_APE_MASK | FFB_PPC_CS_MASK | FFB_PPC_XS_MASK; \
539        unsigned int __rop = (FFB_ROP_OLD | (FFB_ROP_OLD << 8)); \
540        unsigned int __fbc = (__fpriv)->fbc; \
541        (__fpriv)->ppc_cache &= ~__ppc_mask; \
542        (__fpriv)->ppc_cache |= __ppc; \
543        (__fpriv)->regs->ppc = __ppc; \
544        if ((__fpriv)->fbc_cache != __fbc || \
545            (__fpriv)->rop_cache != __rop || \
546            (__fpriv)->pmask_cache != (__pmask) || \
547            (__fpriv)->drawop_cache != FFB_DRAWOP_VSCROLL) { \
548                ffb_fbcPtr __ffb = (__fpriv)->regs; \
549                (__fpriv)->fbc_cache = __fbc; \
550                (__fpriv)->rop_cache = __rop; \
551                (__fpriv)->pmask_cache = (__pmask); \
552                (__fpriv)->drawop_cache = FFB_DRAWOP_VSCROLL; \
553                (__fpriv)->rp_active = 1; \
554                FFBFifo(__fpriv, 4); \
555                (__ffb)->fbc = __fbc; \
556                (__ffb)->rop = __rop; \
557                (__ffb)->pmask = (__pmask); \
558                (__ffb)->drawop = FFB_DRAWOP_VSCROLL; \
559        } \
560} while(0)
561
562#endif /* FFBREGS_H */
563