1d87a3195Smrg/*
2d87a3195Smrg * Copyright 2007 George Sapountzis
3d87a3195Smrg *
4d87a3195Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5d87a3195Smrg * copy of this software and associated documentation files (the "Software"),
6d87a3195Smrg * to deal in the Software without restriction, including without limitation
7d87a3195Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8d87a3195Smrg * and/or sell copies of the Software, and to permit persons to whom the
9d87a3195Smrg * Software is furnished to do so, subject to the following conditions:
10d87a3195Smrg *
11d87a3195Smrg * The above copyright notice and this permission notice (including the next
12d87a3195Smrg * paragraph) shall be included in all copies or substantial portions of the
13d87a3195Smrg * Software.
14d87a3195Smrg *
15d87a3195Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16d87a3195Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17d87a3195Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18d87a3195Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19d87a3195Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20d87a3195Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21d87a3195Smrg * SOFTWARE.
22d87a3195Smrg */
23d87a3195Smrg
24d87a3195Smrg/**
25d87a3195Smrg * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
26d87a3195Smrg * library. The main purpose being to facilitate source code compatibility.
27d87a3195Smrg */
28d87a3195Smrg
29d87a3195Smrg#ifndef PCI_RENAME_H
30d87a3195Smrg#define PCI_RENAME_H
31d87a3195Smrg
32d87a3195Smrgenum region_type {
33d87a3195Smrg    REGION_MEM,
34d87a3195Smrg    REGION_IO
35d87a3195Smrg};
36d87a3195Smrg
37d87a3195Smrg#ifndef XSERVER_LIBPCIACCESS
38d87a3195Smrg
39d87a3195Smrg/* pciVideoPtr */
40d87a3195Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
41d87a3195Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
42d87a3195Smrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->chipRev)
43d87a3195Smrg
44d87a3195Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
45d87a3195Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
46d87a3195Smrg
47d87a3195Smrg#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus,    \
48d87a3195Smrg                                    (_pcidev)->device, \
49d87a3195Smrg                                    (_pcidev)->func)
50d87a3195Smrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
51d87a3195Smrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->device)
52d87a3195Smrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
53d87a3195Smrg
54d87a3195Smrg/* pciConfigPtr */
55d87a3195Smrg#define PCI_CFG_TAG(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->tag)
56d87a3195Smrg#define PCI_CFG_BUS(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
57d87a3195Smrg#define PCI_CFG_DEV(_pcidev)  (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
58d87a3195Smrg#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
59d87a3195Smrg
60d87a3195Smrg/* region addr: xfree86 uses different fields for memory regions and I/O ports */
61d87a3195Smrg#define PCI_REGION_BASE(_pcidev, _b, _type)             \
62d87a3195Smrg    (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
63d87a3195Smrg                             : (_pcidev)->ioBase[(_b)])
64d87a3195Smrg
65d87a3195Smrg/* region size: xfree86 uses the log2 of the region size,
66d87a3195Smrg * but with zero meaning no region, not size of one XXX */
67d87a3195Smrg#define PCI_REGION_SIZE(_pcidev, _b) \
68d87a3195Smrg    (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
69d87a3195Smrg
70d87a3195Smrg/* read/write PCI configuration space */
71d87a3195Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
72d87a3195Smrg    *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
73d87a3195Smrg
74d87a3195Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
75d87a3195Smrg    *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
76d87a3195Smrg
77d87a3195Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
78d87a3195Smrg    pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
79d87a3195Smrg
80d87a3195Smrg#else /* XSERVER_LIBPCIACCESS */
81d87a3195Smrg
82d87a3195Smrgtypedef struct pci_device *pciVideoPtr;
83d87a3195Smrg
84d87a3195Smrg#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
85d87a3195Smrg#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
86d87a3195Smrg#define PCI_DEV_REVISION(_pcidev)  ((_pcidev)->revision)
87d87a3195Smrg
88d87a3195Smrg#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
89d87a3195Smrg#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
90d87a3195Smrg
91d87a3195Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
92d87a3195Smrg#define PCI_DEV_TAG(_pcidev)        (_pcidev)
93d87a3195Smrg
94d87a3195Smrg/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
95d87a3195Smrg#define PCI_DEV_BUS(_pcidev)       ((_pcidev)->bus)
96d87a3195Smrg#define PCI_DEV_DEV(_pcidev)       ((_pcidev)->dev)
97d87a3195Smrg#define PCI_DEV_FUNC(_pcidev)      ((_pcidev)->func)
98d87a3195Smrg
99d87a3195Smrg/* pci-rework functions take a 'pci_device' parameter instead of a tag */
100d87a3195Smrg#define PCI_CFG_TAG(_pcidev)        (_pcidev)
101d87a3195Smrg
102d87a3195Smrg/* PCI_CFG macros, typically used in DRI init, contain the domain */
103d87a3195Smrg#define PCI_CFG_BUS(_pcidev)      (((_pcidev)->domain << 8) | \
104d87a3195Smrg                                    (_pcidev)->bus)
105d87a3195Smrg#define PCI_CFG_DEV(_pcidev)       ((_pcidev)->dev)
106d87a3195Smrg#define PCI_CFG_FUNC(_pcidev)      ((_pcidev)->func)
107d87a3195Smrg
108d87a3195Smrg#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
109d87a3195Smrg#define PCI_REGION_SIZE(_pcidev, _b)        ((_pcidev)->regions[(_b)].size)
110d87a3195Smrg
111d87a3195Smrg#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
112d87a3195Smrg    pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
113d87a3195Smrg
114d87a3195Smrg#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
115d87a3195Smrg    pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
116d87a3195Smrg
117d87a3195Smrg#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
118d87a3195Smrg    pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
119d87a3195Smrg
120d87a3195Smrg#endif /* XSERVER_LIBPCIACCESS */
121d87a3195Smrg
122d87a3195Smrg#endif /* PCI_RENAME_H */
123