trident.h revision 14330f12
195b296d0Smrg/* 295b296d0Smrg * Copyright 1992-2003 by Alan Hourihane, North Wales, UK. 395b296d0Smrg * 495b296d0Smrg * Permission to use, copy, modify, distribute, and sell this software and its 595b296d0Smrg * documentation for any purpose is hereby granted without fee, provided that 695b296d0Smrg * the above copyright notice appear in all copies and that both that 795b296d0Smrg * copyright notice and this permission notice appear in supporting 895b296d0Smrg * documentation, and that the name of Alan Hourihane not be used in 995b296d0Smrg * advertising or publicity pertaining to distribution of the software without 1095b296d0Smrg * specific, written prior permission. Alan Hourihane makes no representations 1195b296d0Smrg * about the suitability of this software for any purpose. It is provided 1295b296d0Smrg * "as is" without express or implied warranty. 1395b296d0Smrg * 1495b296d0Smrg * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1595b296d0Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 1695b296d0Smrg * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1795b296d0Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1895b296d0Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1995b296d0Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 2095b296d0Smrg * PERFORMANCE OF THIS SOFTWARE. 2195b296d0Smrg * 2295b296d0Smrg * Authors: Alan Hourihane, <alanh@fairlite.demon.co.uk> 2395b296d0Smrg */ 2495b296d0Smrg/*#define VBE_INFO*/ 2595b296d0Smrg 2695b296d0Smrg#ifndef _TRIDENT_H_ 2795b296d0Smrg#define _TRIDENT_H_ 2895b296d0Smrg 2995b296d0Smrg#include <stdio.h> 3095b296d0Smrg#include <string.h> 3195b296d0Smrg#include <math.h> 3295b296d0Smrg 33ff89ac2bSmrg#include "tridentpcirename.h" 34ff89ac2bSmrg 3595b296d0Smrg#include "exa.h" 3695b296d0Smrg#include "xf86Cursor.h" 3795b296d0Smrg#include "xaa.h" 3895b296d0Smrg#include "xf86RamDac.h" 3995b296d0Smrg#include "compiler.h" 4095b296d0Smrg#include "vgaHW.h" 4195b296d0Smrg#include "xf86i2c.h" 4295b296d0Smrg#include "xf86int10.h" 4395b296d0Smrg#include "shadowfb.h" 4495b296d0Smrg#include "shadow.h" 4595b296d0Smrg#include "xf86xv.h" 4695b296d0Smrg#include "xf86Pci.h" 4795b296d0Smrg#include "vbe.h" 4895b296d0Smrg 492378475aSmrg/* Banked framebuffer only supported on ISA */ 502378475aSmrg#ifdef HAVE_ISA 512378475aSmrg#define LINEAR() (pTrident->Linear) 522378475aSmrg#else 532378475aSmrg#define LINEAR() (1) 542378475aSmrg#endif 552378475aSmrg 5695b296d0Smrg#define PCI_CHIP_2200 0x2200 5795b296d0Smrg 5895b296d0Smrgtypedef struct { 5995b296d0Smrg unsigned char tridentRegs3x4[0x100]; 6095b296d0Smrg unsigned char tridentRegs3CE[0x100]; 6195b296d0Smrg unsigned char tridentRegs3C4[0x100]; 6295b296d0Smrg unsigned char tridentRegsDAC[0x01]; 6395b296d0Smrg unsigned char tridentRegsClock[0x05]; 6495b296d0Smrg unsigned char DacRegs[0x300]; 6595b296d0Smrg} TRIDENTRegRec, *TRIDENTRegPtr; 6695b296d0Smrg 6795b296d0Smrg#define VGA_REGNUM_ABOUT_TV 19 6895b296d0Smrg#define TRIDENTPTR(p) ((TRIDENTPtr)((p)->driverPrivate)) 6995b296d0Smrg 7095b296d0Smrgtypedef struct { 7195b296d0Smrg ScrnInfoPtr pScrn; 7295b296d0Smrg pciVideoPtr PciInfo; 7314330f12Smrg uint32_t PciTag; 7495b296d0Smrg EntityInfoPtr pEnt; 7595b296d0Smrg ExaDriverPtr EXADriverPtr; 7695b296d0Smrg int useEXA; 7795b296d0Smrg int Chipset; 7895b296d0Smrg int DACtype; 7995b296d0Smrg int RamDac; 8095b296d0Smrg int ChipRev; 8195b296d0Smrg int HwBpp; 8295b296d0Smrg int BppShift; 8395b296d0Smrg CARD32 IOAddress; 8495b296d0Smrg unsigned long FbAddress; 8595b296d0Smrg unsigned char * IOBase; 8695b296d0Smrg unsigned char * FbBase; 8795b296d0Smrg long FbMapSize; 8814330f12Smrg unsigned long PIOBase; 8995b296d0Smrg Bool NoAccel; 9095b296d0Smrg Bool HWCursor; 9195b296d0Smrg Bool UsePCIRetry; 9295b296d0Smrg Bool UsePCIBurst; 9395b296d0Smrg Bool NewClockCode; 9495b296d0Smrg Bool Clipping; 9595b296d0Smrg Bool DstEnable; 9695b296d0Smrg Bool ROP; 9795b296d0Smrg Bool HasSGRAM; 9895b296d0Smrg Bool MUX; 9995b296d0Smrg Bool IsCyber; 10095b296d0Smrg Bool CyberShadow; 10195b296d0Smrg Bool CyberStretch; 10295b296d0Smrg Bool NoMMIO; 10395b296d0Smrg Bool MMIOonly; 10495b296d0Smrg Bool ShadowFB; 10595b296d0Smrg Bool Linear; 10695b296d0Smrg DGAModePtr DGAModes; 10795b296d0Smrg int numDGAModes; 10895b296d0Smrg Bool DGAactive; 10995b296d0Smrg int DGAViewportStatus; 11095b296d0Smrg unsigned char * ShadowPtr; 11195b296d0Smrg int ShadowPitch; 11295b296d0Smrg RefreshAreaFuncPtr RefreshArea; 11395b296d0Smrg void (*PointerMoved)(int index, int x, int y); 11495b296d0Smrg int Rotate; 11595b296d0Smrg float frequency; 11695b296d0Smrg unsigned char REGPCIReg; 11795b296d0Smrg unsigned char REGNewMode1; 11895b296d0Smrg CARD8 SaveClock1; 11995b296d0Smrg CARD8 SaveClock2; 12095b296d0Smrg CARD8 SaveClock3; 12195b296d0Smrg int MinClock; 12295b296d0Smrg int MaxClock; 12395b296d0Smrg int MUXThreshold; 12495b296d0Smrg int currentClock; 12595b296d0Smrg int MCLK; 12695b296d0Smrg int dwords; 12795b296d0Smrg int h; 12895b296d0Smrg int x; 12995b296d0Smrg int w; 13095b296d0Smrg int y; 13195b296d0Smrg int lcdMode; 13295b296d0Smrg Bool lcdActive; 13395b296d0Smrg Bool doInit; 13495b296d0Smrg#ifdef READOUT 13595b296d0Smrg Bool DontSetClock; 13695b296d0Smrg#endif 13795b296d0Smrg TRIDENTRegRec SavedReg; 13895b296d0Smrg TRIDENTRegRec ModeReg; 13995b296d0Smrg I2CBusPtr DDC; 14095b296d0Smrg CARD16 EngineOperation; 14195b296d0Smrg CARD32 PatternLocation; 14295b296d0Smrg CARD32 BltScanDirection; 14395b296d0Smrg CARD32 DrawFlag; 14495b296d0Smrg CARD16 LinePattern; 14595b296d0Smrg RamDacRecPtr RamDacRec; 14695b296d0Smrg int CursorOffset; 14795b296d0Smrg xf86CursorInfoPtr CursorInfoRec; 14895b296d0Smrg xf86Int10InfoPtr Int10; 14995b296d0Smrg vbeInfoPtr pVbe; 15095b296d0Smrg#ifdef VBE_INFO 15195b296d0Smrg vbeModeInfoPtr vbeModes; 15295b296d0Smrg#endif 15395b296d0Smrg XAAInfoRecPtr AccelInfoRec; 15495b296d0Smrg CloseScreenProcPtr CloseScreen; 15595b296d0Smrg ScreenBlockHandlerProcPtr BlockHandler; 15695b296d0Smrg int panelWidth; 15795b296d0Smrg int panelHeight; 15895b296d0Smrg unsigned int (*ddc1Read)(ScrnInfoPtr); 15995b296d0Smrg CARD8* XAAScanlineColorExpandBuffers[2]; 16095b296d0Smrg CARD8* XAAImageScanlineBuffer[1]; 16195b296d0Smrg void (*InitializeAccelerator)(ScrnInfoPtr); 16295b296d0Smrg void (*VideoTimerCallback)(ScrnInfoPtr, Time); 16395b296d0Smrg XF86VideoAdaptorPtr adaptor; 16495b296d0Smrg int videoKey; 16595b296d0Smrg int hsync; 16695b296d0Smrg int hsync_rskew; 16795b296d0Smrg int vsync; 16895b296d0Smrg int vsync_bskew; 16995b296d0Smrg CARD32 videoFlags; 17095b296d0Smrg int keyOffset; 17195b296d0Smrg int OverrideHsync; 17295b296d0Smrg int OverrideVsync; 17395b296d0Smrg int OverrideBskew; 17495b296d0Smrg int OverrideRskew; 17595b296d0Smrg OptionInfoPtr Options; 17695b296d0Smrg Bool shadowNew; 17795b296d0Smrg int displaySize; 17895b296d0Smrg int dspOverride; 17995b296d0Smrg Bool GammaBrightnessOn; 18095b296d0Smrg int brightness; 18195b296d0Smrg double gamma; 18295b296d0Smrg int FPDelay; /* just for debugging - will go away */ 18395b296d0Smrg int TVChipset; /* 0: None 1: VT1621 2: CH7005C*/ 18495b296d0Smrg int TVSignalMode; /* 0: NTSC 1: PAL */ 18595b296d0Smrg Bool TVRegSet; /* 0: User not customer TV Reg, 1: User customer TV Reg */ 18695b296d0Smrg unsigned char TVRegUserSet[2][128]; /*[0][128] for Reg Index, [1][128] for Reg Value */ 18795b296d0Smrg unsigned char DefaultTVDependVGASetting[VGA_REGNUM_ABOUT_TV+0x62]; /* VGA_REGNUM_ABOUT_TV: VGA Reg, 0x62: TV Reg */ 18895b296d0Smrg} TRIDENTRec, *TRIDENTPtr; 18995b296d0Smrg 19095b296d0Smrgtypedef struct { 19195b296d0Smrg CARD8 mode; 19295b296d0Smrg int display_x; 19395b296d0Smrg int display_y; 19495b296d0Smrg int clock; 19595b296d0Smrg int shadow_0; 19695b296d0Smrg int shadow_3; 19795b296d0Smrg int shadow_4; 19895b296d0Smrg int shadow_5; 19995b296d0Smrg int shadow_6; 20095b296d0Smrg int shadow_7; 20195b296d0Smrg int shadow_10; 20295b296d0Smrg int shadow_11; 20395b296d0Smrg int shadow_16; 20495b296d0Smrg int shadow_HiOrd; 20595b296d0Smrg} tridentLCD; 20695b296d0Smrg 20795b296d0Smrg#define LCD_ACTIVE 0x01 20895b296d0Smrg#define CRT_ACTIVE 0x02 20995b296d0Smrg 21095b296d0Smrgextern tridentLCD LCD[]; 21195b296d0Smrg 21295b296d0Smrgtypedef struct { 21395b296d0Smrg int x_res; 21495b296d0Smrg int y_res; 21595b296d0Smrg int mode; 21695b296d0Smrg} biosMode; 21795b296d0Smrg 21895b296d0Smrgtypedef struct { 21995b296d0Smrg int x_res; 22095b296d0Smrg int y_res; 22195b296d0Smrg CARD8 GR5a; 22295b296d0Smrg CARD8 GR5c; 22395b296d0Smrg} newModes; 22495b296d0Smrg 22595b296d0Smrg/* Prototypes */ 22695b296d0Smrg 22795b296d0SmrgBool TRIDENTClockSelect(ScrnInfoPtr pScrn, int no); 22895b296d0SmrgBool TRIDENTSwitchMode(int scrnIndex, DisplayModePtr mode, int flags); 22995b296d0Smrgvoid TRIDENTAdjustFrame(int scrnIndex, int x, int y, int flags); 23095b296d0SmrgBool TRIDENTDGAInit(ScreenPtr pScreen); 23195b296d0SmrgBool TRIDENTI2CInit(ScreenPtr pScreen); 23295b296d0Smrgvoid TRIDENTInitVideo(ScreenPtr pScreen); 23395b296d0Smrgvoid TRIDENTResetVideo(ScrnInfoPtr pScrn); 23495b296d0Smrgunsigned int Tridentddc1Read(ScrnInfoPtr pScrn); 23595b296d0Smrgvoid TVGARestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg); 23695b296d0Smrgvoid TVGASave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg); 23795b296d0SmrgBool TVGAInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 23895b296d0Smrgvoid TridentRestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg); 23995b296d0Smrgvoid TridentSave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg); 24095b296d0SmrgBool TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 24195b296d0SmrgBool TridentAccelInit(ScreenPtr pScreen); 24295b296d0SmrgBool XPAccelInit(ScreenPtr pScreen); 24395b296d0SmrgBool XP4XaaInit(ScreenPtr pScreen); 24495b296d0SmrgBool XP4ExaInit(ScreenPtr pScreen); 24595b296d0SmrgBool ImageAccelInit(ScreenPtr pScreen); 24695b296d0SmrgBool BladeXaaInit(ScreenPtr pScreen); 24795b296d0SmrgBool BladeExaInit(ScreenPtr pScreen); 24895b296d0SmrgBool TridentHWCursorInit(ScreenPtr pScreen); 24995b296d0Smrgint TridentFindMode(int xres, int yres, int depth); 25095b296d0Smrgvoid TGUISetClock(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b); 25195b296d0Smrgvoid TGUISetMCLK(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b); 25295b296d0Smrgvoid tridentSetModeBIOS(ScrnInfoPtr pScrn, DisplayModePtr mode); 25395b296d0Smrgvoid TridentOutIndReg(ScrnInfoPtr pScrn, 25495b296d0Smrg CARD32 reg, unsigned char mask, unsigned char data); 25595b296d0Smrgunsigned char TridentInIndReg(ScrnInfoPtr pScrn, CARD32 reg); 25695b296d0Smrgvoid TridentLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors, VisualPtr pVisual); 25795b296d0Smrgvoid TridentSetOverscan(ScrnInfoPtr pScrn, int overscan); 25895b296d0Smrgint TGUISetRead(ScreenPtr pScreen, int bank); 25995b296d0Smrgint TGUISetWrite(ScreenPtr pScreen, int bank); 26095b296d0Smrgint TGUISetReadWrite(ScreenPtr pScreen, int bank); 26195b296d0Smrgint TVGA8900SetRead(ScreenPtr pScreen, int bank); 26295b296d0Smrgint TVGA8900SetWrite(ScreenPtr pScreen, int bank); 26395b296d0Smrgint TVGA8900SetReadWrite(ScreenPtr pScreen, int bank); 26495b296d0Smrgvoid TridentFindClock(ScrnInfoPtr pScrn, int clock); 26595b296d0Smrgfloat CalculateMCLK(ScrnInfoPtr pScrn); 26695b296d0Smrgvoid TRIDENTRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 26795b296d0Smrgvoid TRIDENTShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf); 26895b296d0Smrgvoid TRIDENTPointerMoved(int index, int x, int y); 26995b296d0Smrgvoid TRIDENTRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 27095b296d0Smrgvoid TRIDENTRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 27195b296d0Smrgvoid TRIDENTRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 27295b296d0Smrgvoid TRIDENTRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 27395b296d0Smrg 27495b296d0Smrgvoid VIA_TVInit(ScrnInfoPtr pScrn); 27595b296d0Smrgvoid VIA_SaveTVDepentVGAReg(ScrnInfoPtr pScrn); 27695b296d0Smrgvoid VIA_RestoreTVDependVGAReg(ScrnInfoPtr pScrn); 27795b296d0Smrgvoid VIA_DumpReg(ScrnInfoPtr pScrn); 27895b296d0Smrg 27995b296d0Smrg/* 28095b296d0Smrg * Trident Chipset Definitions 28195b296d0Smrg */ 28295b296d0Smrg 28395b296d0Smrg/* Supported chipsets */ 28495b296d0Smrgtypedef enum { 28595b296d0Smrg TVGA8200LX, 28695b296d0Smrg TVGA8800BR, 28795b296d0Smrg TVGA8800CS, 28895b296d0Smrg TVGA8900B, 28995b296d0Smrg TVGA8900C, 29095b296d0Smrg TVGA8900CL, 29195b296d0Smrg TVGA8900D, 29295b296d0Smrg TVGA9000, 29395b296d0Smrg TVGA9000i, 29495b296d0Smrg TVGA9100B, 29595b296d0Smrg TVGA9200CXr, 29695b296d0Smrg TGUI9400CXi, 29795b296d0Smrg TGUI9420DGi, 29895b296d0Smrg TGUI9430DGi, 29995b296d0Smrg TGUI9440AGi, 30095b296d0Smrg CYBER9320, 30195b296d0Smrg TGUI9660, 30295b296d0Smrg TGUI9680, 30395b296d0Smrg PROVIDIA9682, 30495b296d0Smrg CYBER9382, 30595b296d0Smrg CYBER9385, 30695b296d0Smrg PROVIDIA9685, 30795b296d0Smrg CYBER9388, 30895b296d0Smrg CYBER9397, 30995b296d0Smrg CYBER9397DVD, 31095b296d0Smrg CYBER9520, 31195b296d0Smrg CYBER9525DVD, 31295b296d0Smrg IMAGE975, 31395b296d0Smrg IMAGE985, 31495b296d0Smrg BLADE3D, 31595b296d0Smrg CYBERBLADEI7, 31695b296d0Smrg CYBERBLADEI7D, 31795b296d0Smrg CYBERBLADEI1, 31895b296d0Smrg CYBERBLADEI1D, 31995b296d0Smrg CYBERBLADEAI1, 32095b296d0Smrg CYBERBLADEAI1D, 32195b296d0Smrg CYBERBLADEE4, 32295b296d0Smrg BLADEXP, 32395b296d0Smrg CYBERBLADEXPAI1, 32495b296d0Smrg CYBERBLADEXP4, 32595b296d0Smrg XP5 32695b296d0Smrg} TRIDENTType; 32795b296d0Smrg 32895b296d0Smrg#define UseMMIO (pTrident->NoMMIO == FALSE) 32995b296d0Smrg 33095b296d0Smrg#define IsPciCard (pTrident->pEnt->location.type == BUS_PCI) 33195b296d0Smrg 332ff89ac2bSmrg#ifdef HAVE_ISA 333ff89ac2bSmrg# define IsPrimaryCard ((xf86IsPrimaryPci(pTrident->PciInfo)) || \ 33495b296d0Smrg (xf86IsPrimaryIsa())) 335ff89ac2bSmrg#else 336ff89ac2bSmrg# define IsPrimaryCard (xf86IsPrimaryPci(pTrident->PciInfo)) 337ff89ac2bSmrg#endif 33895b296d0Smrg 33995b296d0Smrg#define HAS_DST_TRANS ((pTrident->Chipset == PROVIDIA9682) || \ 34095b296d0Smrg (pTrident->Chipset == PROVIDIA9685) || \ 34195b296d0Smrg (pTrident->Chipset == BLADEXP) || \ 34295b296d0Smrg (pTrident->Chipset == CYBERBLADEXPAI1)) 34395b296d0Smrg 34495b296d0Smrg#define Is3Dchip ((pTrident->Chipset == CYBER9397) || \ 34595b296d0Smrg (pTrident->Chipset == CYBER9397DVD) || \ 34695b296d0Smrg (pTrident->Chipset == CYBER9520) || \ 34795b296d0Smrg (pTrident->Chipset == CYBER9525DVD) || \ 34895b296d0Smrg (pTrident->Chipset == CYBERBLADEE4) || \ 34995b296d0Smrg (pTrident->Chipset == IMAGE975) || \ 35095b296d0Smrg (pTrident->Chipset == IMAGE985) || \ 35195b296d0Smrg (pTrident->Chipset == CYBERBLADEI7) || \ 35295b296d0Smrg (pTrident->Chipset == CYBERBLADEI7D) || \ 35395b296d0Smrg (pTrident->Chipset == CYBERBLADEI1) || \ 35495b296d0Smrg (pTrident->Chipset == CYBERBLADEI1D) || \ 35595b296d0Smrg (pTrident->Chipset == CYBERBLADEAI1) || \ 35695b296d0Smrg (pTrident->Chipset == CYBERBLADEAI1D) || \ 35795b296d0Smrg (pTrident->Chipset == BLADE3D) || \ 35895b296d0Smrg (pTrident->Chipset == CYBERBLADEXPAI1) || \ 35995b296d0Smrg (pTrident->Chipset == CYBERBLADEXP4) || \ 36095b296d0Smrg (pTrident->Chipset == XP5) || \ 36195b296d0Smrg (pTrident->Chipset == BLADEXP)) 36295b296d0Smrg 36395b296d0Smrg/* 36495b296d0Smrg * Trident DAC's 36595b296d0Smrg */ 36695b296d0Smrg 36795b296d0Smrg#define TKD8001 0 36895b296d0Smrg#define TGUIDAC 1 36995b296d0Smrg 37095b296d0Smrg/* 37195b296d0Smrg * Video Flags 37295b296d0Smrg */ 37395b296d0Smrg 37495b296d0Smrg#define VID_ZOOM_INV 0x1 37595b296d0Smrg#define VID_ZOOM_MINI 0x2 37695b296d0Smrg#define VID_OFF_SHIFT_4 0x4 37795b296d0Smrg#define VID_ZOOM_NOMINI 0x8 37895b296d0Smrg#define VID_DOUBLE_LINEBUFFER_FOR_WIDE_SRC 0x10 37995b296d0Smrg#endif /* _TRIDENT_H_ */ 38095b296d0Smrg 381