trident.h revision eca46af7 
1/*
2 * Copyright 1992-2003 by Alan Hourihane, North Wales, UK.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that
7 * copyright notice and this permission notice appear in supporting
8 * documentation, and that the name of Alan Hourihane not be used in
9 * advertising or publicity pertaining to distribution of the software without
10 * specific, written prior permission.  Alan Hourihane makes no representations
11 * about the suitability of this software for any purpose.  It is provided
12 * "as is" without express or implied warranty.
13 *
14 * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20 * PERFORMANCE OF THIS SOFTWARE.
21 *
22 * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
23 */
24/*#define VBE_INFO*/
25
26#ifndef _TRIDENT_H_
27#define _TRIDENT_H_
28
29#include <stdio.h>
30#include <string.h>
31#include <math.h>
32
33#include "tridentpcirename.h"
34
35#include "exa.h"
36#include "xf86Cursor.h"
37#ifdef HAVE_XAA_H
38#include "xaa.h"
39#endif
40#include "xf86fbman.h"
41#include "xf86RamDac.h"
42#include "compiler.h"
43#include "vgaHW.h"
44#include "xf86i2c.h"
45#include "xf86int10.h"
46#include "shadowfb.h"
47#include "shadow.h"
48#include "xf86xv.h"
49#include "xf86Pci.h"
50#include "vbe.h"
51
52#include "compat-api.h"
53/* Banked framebuffer only supported on ISA */
54#ifdef HAVE_ISA
55#define LINEAR() (pTrident->Linear)
56#else
57#define LINEAR() (1)
58#endif
59
60#define PCI_VENDOR_TRIDENT		0x1023
61#define PCI_CHIP_2100			0x2100
62#define PCI_CHIP_2200			0x2200
63#define PCI_CHIP_8400			0x8400
64#define PCI_CHIP_8420			0x8420
65#define PCI_CHIP_8500			0x8500
66#define PCI_CHIP_8520			0x8520
67#define PCI_CHIP_8600			0x8600
68#define PCI_CHIP_8620			0x8620
69#define PCI_CHIP_8820			0x8820
70#define PCI_CHIP_9320			0x9320
71#define PCI_CHIP_9388			0x9388
72#define PCI_CHIP_9397			0x9397
73#define PCI_CHIP_939A			0x939A
74#define PCI_CHIP_9420			0x9420
75#define PCI_CHIP_9440			0x9440
76#define PCI_CHIP_9520			0x9520
77#define PCI_CHIP_9525			0x9525
78#define PCI_CHIP_9540			0x9540
79#define PCI_CHIP_9660			0x9660
80#define PCI_CHIP_9750			0x9750
81#define PCI_CHIP_9850			0x9850
82#define PCI_CHIP_9880			0x9880
83#define PCI_CHIP_9910			0x9910
84
85typedef struct {
86	unsigned char tridentRegs3x4[0x100];
87	unsigned char tridentRegs3CE[0x100];
88	unsigned char tridentRegs3C4[0x100];
89	unsigned char tridentRegsDAC[0x01];
90        unsigned char tridentRegsClock[0x05];
91	unsigned char DacRegs[0x300];
92} TRIDENTRegRec, *TRIDENTRegPtr;
93
94#define VGA_REGNUM_ABOUT_TV 19
95#define TRIDENTPTR(p)	((TRIDENTPtr)((p)->driverPrivate))
96
97typedef struct {
98    ScrnInfoPtr		pScrn;
99    pciVideoPtr		PciInfo;
100    uint32_t		PciTag;
101    EntityInfoPtr	pEnt;
102    ExaDriverPtr	EXADriverPtr;
103    int			useEXA;
104    int			Chipset;
105    int			DACtype;
106    int			RamDac;
107    int                 ChipRev;
108    int			HwBpp;
109    int			BppShift;
110    CARD32		IOAddress;
111    unsigned long	FbAddress;
112    unsigned char *     IOBase;
113    unsigned char *	FbBase;
114    long		FbMapSize;
115    unsigned long		PIOBase;
116    Bool		NoAccel;
117    Bool		HWCursor;
118    Bool		UsePCIRetry;
119    Bool		UsePCIBurst;
120    Bool		NewClockCode;
121    Bool		Clipping;
122    Bool		DstEnable;
123    Bool		ROP;
124    Bool		HasSGRAM;
125    Bool		MUX;
126    Bool		IsCyber;
127    Bool		CyberShadow;
128    Bool		CyberStretch;
129    Bool		NoMMIO;
130    Bool                MMIOonly;
131    Bool		ShadowFB;
132    Bool		Linear;
133    DGAModePtr		DGAModes;
134    int			numDGAModes;
135    Bool		DGAactive;
136    int			DGAViewportStatus;
137    unsigned char *	ShadowPtr;
138    int			ShadowPitch;
139    RefreshAreaFuncPtr  RefreshArea;
140    void	        (*PointerMoved)(SCRN_ARG_TYPE arg, int x, int y);
141    int                 Rotate;
142    float		frequency;
143    unsigned char	REGPCIReg;
144    unsigned char	REGNewMode1;
145    CARD8		SaveClock1;
146    CARD8		SaveClock2;
147    CARD8		SaveClock3;
148    int			MinClock;
149    int			MaxClock;
150    int			MUXThreshold;
151    int                 currentClock;
152    int			MCLK;
153    int			dwords;
154    int			h;
155    int			x;
156    int			w;
157    int			y;
158    int                 lcdMode;
159    Bool                lcdActive;
160    Bool                doInit;
161#ifdef READOUT
162    Bool                DontSetClock;
163#endif
164    TRIDENTRegRec	SavedReg;
165    TRIDENTRegRec	ModeReg;
166    I2CBusPtr		DDC;
167    CARD16		EngineOperation;
168    CARD32		PatternLocation;
169    CARD32		BltScanDirection;
170    CARD32		DrawFlag;
171    CARD16		LinePattern;
172    RamDacRecPtr	RamDacRec;
173    int			CursorOffset;
174    xf86CursorInfoPtr	CursorInfoRec;
175    xf86Int10InfoPtr	Int10;
176    vbeInfoPtr		pVbe;
177#ifdef VBE_INFO
178    vbeModeInfoPtr	vbeModes;
179#endif
180#ifdef HAVE_XAA_H
181    XAAInfoRecPtr	AccelInfoRec;
182#endif
183    CloseScreenProcPtr	CloseScreen;
184    ScreenBlockHandlerProcPtr BlockHandler;
185    CreateScreenResourcesProcPtr CreateScreenResources;
186    int                 panelWidth;
187    int                 panelHeight;
188    unsigned int	(*ddc1Read)(ScrnInfoPtr);
189    CARD8*		XAAScanlineColorExpandBuffers[2];
190    CARD8*		XAAImageScanlineBuffer[1];
191    void                (*InitializeAccelerator)(ScrnInfoPtr);
192    void		(*VideoTimerCallback)(ScrnInfoPtr, Time);
193    XF86VideoAdaptorPtr adaptor;
194    int                 videoKey;
195    int			hsync;
196    int			hsync_rskew;
197    int			vsync;
198    int			vsync_bskew;
199    CARD32              videoFlags;
200    int			keyOffset;
201    int                 OverrideHsync;
202    int                 OverrideVsync;
203    int                 OverrideBskew;
204    int                 OverrideRskew;
205    OptionInfoPtr	Options;
206    Bool		shadowNew;
207    int			displaySize;
208    int			dspOverride;
209    Bool		GammaBrightnessOn;
210    int			brightness;
211    double		gamma;
212    int			FPDelay;	/* just for debugging - will go away */
213    int                 TVChipset;    /* 0: None 1: VT1621 2: CH7005C*/
214    int                 TVSignalMode; /* 0: NTSC 1: PAL */
215    Bool                TVRegSet;     /* 0: User not customer TV Reg, 1: User customer TV Reg */
216    unsigned char       TVRegUserSet[2][128]; /*[0][128] for Reg Index, [1][128] for Reg Value */
217    unsigned char       DefaultTVDependVGASetting[VGA_REGNUM_ABOUT_TV+0x62]; /* VGA_REGNUM_ABOUT_TV: VGA Reg, 0x62: TV Reg */
218} TRIDENTRec, *TRIDENTPtr;
219
220typedef struct {
221    CARD8 mode;
222    int display_x;
223    int display_y;
224    int clock;
225    int shadow_0;
226    int shadow_3;
227    int shadow_4;
228    int shadow_5;
229    int shadow_6;
230    int shadow_7;
231    int shadow_10;
232    int shadow_11;
233    int shadow_16;
234    int shadow_HiOrd;
235} tridentLCD;
236
237#define LCD_ACTIVE 0x01
238#define CRT_ACTIVE 0x02
239
240extern tridentLCD LCD[];
241
242typedef struct {
243    int x_res;
244    int y_res;
245    int mode;
246} biosMode;
247
248typedef struct {
249  int x_res;
250  int y_res;
251  CARD8 GR5a;
252  CARD8 GR5c;
253} newModes;
254
255/* Prototypes */
256
257Bool TRIDENTClockSelect(ScrnInfoPtr pScrn, int no);
258Bool TRIDENTSwitchMode(SWITCH_MODE_ARGS_DECL);
259void TRIDENTAdjustFrame(ADJUST_FRAME_ARGS_DECL);
260Bool TRIDENTDGAInit(ScreenPtr pScreen);
261Bool TRIDENTI2CInit(ScreenPtr pScreen);
262void TRIDENTInitVideo(ScreenPtr pScreen);
263void TRIDENTResetVideo(ScrnInfoPtr pScrn);
264unsigned int Tridentddc1Read(ScrnInfoPtr pScrn);
265void TVGARestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
266void TVGASave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
267Bool TVGAInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
268void TridentRestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
269void TridentSave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
270Bool TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
271Bool TridentAccelInit(ScreenPtr pScreen);
272Bool XPAccelInit(ScreenPtr pScreen);
273Bool XP4XaaInit(ScreenPtr pScreen);
274Bool XP4ExaInit(ScreenPtr pScreen);
275Bool ImageAccelInit(ScreenPtr pScreen);
276Bool BladeXaaInit(ScreenPtr pScreen);
277Bool BladeExaInit(ScreenPtr pScreen);
278Bool TridentHWCursorInit(ScreenPtr pScreen);
279int TridentFindMode(int xres, int yres, int depth);
280void TGUISetClock(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b);
281void TGUISetMCLK(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b);
282void tridentSetModeBIOS(ScrnInfoPtr pScrn, DisplayModePtr mode);
283void TridentOutIndReg(ScrnInfoPtr pScrn,
284		     CARD32 reg, unsigned char mask, unsigned char data);
285unsigned char TridentInIndReg(ScrnInfoPtr pScrn, CARD32 reg);
286void TridentLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors, VisualPtr pVisual);
287void TridentSetOverscan(ScrnInfoPtr pScrn, int overscan);
288int TGUISetRead(ScreenPtr pScreen, int bank);
289int TGUISetWrite(ScreenPtr pScreen, int bank);
290int TGUISetReadWrite(ScreenPtr pScreen, int bank);
291int TVGA8900SetRead(ScreenPtr pScreen, int bank);
292int TVGA8900SetWrite(ScreenPtr pScreen, int bank);
293int TVGA8900SetReadWrite(ScreenPtr pScreen, int bank);
294void TridentFindClock(ScrnInfoPtr pScrn, int clock);
295float CalculateMCLK(ScrnInfoPtr pScrn);
296void TRIDENTRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
297void TRIDENTShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf);
298void TRIDENTPointerMoved(SCRN_ARG_TYPE arg, int x, int y);
299void TRIDENTRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
300void TRIDENTRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
301void TRIDENTRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
302void TRIDENTRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
303
304void VIA_TVInit(ScrnInfoPtr pScrn);
305void VIA_SaveTVDepentVGAReg(ScrnInfoPtr pScrn);
306void VIA_RestoreTVDependVGAReg(ScrnInfoPtr pScrn);
307void VIA_DumpReg(ScrnInfoPtr pScrn);
308
309/*
310 * Trident Chipset Definitions
311 */
312
313/* Supported chipsets */
314typedef enum {
315    TVGA8200LX,
316    TVGA8800BR,
317    TVGA8800CS,
318    TVGA8900B,
319    TVGA8900C,
320    TVGA8900CL,
321    TVGA8900D,
322    TVGA9000,
323    TVGA9000i,
324    TVGA9100B,
325    TVGA9200CXr,
326    TGUI9400CXi,
327    TGUI9420DGi,
328    TGUI9430DGi,
329    TGUI9440AGi,
330    CYBER9320,
331    TGUI9660,
332    TGUI9680,
333    PROVIDIA9682,
334    CYBER9382,
335    CYBER9385,
336    PROVIDIA9685,
337    CYBER9388,
338    CYBER9397,
339    CYBER9397DVD,
340    CYBER9520,
341    CYBER9525DVD,
342    IMAGE975,
343    IMAGE985,
344    BLADE3D,
345    CYBERBLADEI7,
346    CYBERBLADEI7D,
347    CYBERBLADEI1,
348    CYBERBLADEI1D,
349    CYBERBLADEAI1,
350    CYBERBLADEAI1D,
351    CYBERBLADEE4,
352    BLADEXP,
353    CYBERBLADEXPAI1,
354    CYBERBLADEXP4,
355    XP5
356} TRIDENTType;
357
358#define UseMMIO		(pTrident->NoMMIO == FALSE)
359
360#define IsPciCard	(pTrident->pEnt->location.type == BUS_PCI)
361
362#ifdef HAVE_ISA
363# define IsPrimaryCard	((xf86IsPrimaryPci(pTrident->PciInfo)) || \
364			 (xf86IsPrimaryIsa()))
365#else
366# define IsPrimaryCard	(xf86IsPrimaryPci(pTrident->PciInfo))
367#endif
368
369#define HAS_DST_TRANS	((pTrident->Chipset == PROVIDIA9682) || \
370			 (pTrident->Chipset == PROVIDIA9685) || \
371			 (pTrident->Chipset == BLADEXP) || \
372			 (pTrident->Chipset == CYBERBLADEXPAI1))
373
374#define Is3Dchip	((pTrident->Chipset == CYBER9397) || \
375			 (pTrident->Chipset == CYBER9397DVD) || \
376			 (pTrident->Chipset == CYBER9520) || \
377			 (pTrident->Chipset == CYBER9525DVD) || \
378			 (pTrident->Chipset == CYBERBLADEE4)  || \
379			 (pTrident->Chipset == IMAGE975)  || \
380			 (pTrident->Chipset == IMAGE985)  || \
381			 (pTrident->Chipset == CYBERBLADEI7)  || \
382			 (pTrident->Chipset == CYBERBLADEI7D)  || \
383			 (pTrident->Chipset == CYBERBLADEI1)  || \
384			 (pTrident->Chipset == CYBERBLADEI1D)  || \
385			 (pTrident->Chipset == CYBERBLADEAI1)  || \
386			 (pTrident->Chipset == CYBERBLADEAI1D)  || \
387			 (pTrident->Chipset == BLADE3D) || \
388			 (pTrident->Chipset == CYBERBLADEXPAI1) || \
389			 (pTrident->Chipset == CYBERBLADEXP4) || \
390			 (pTrident->Chipset == XP5) || \
391			 (pTrident->Chipset == BLADEXP))
392
393/*
394 * Trident DAC's
395 */
396
397#define TKD8001		0
398#define TGUIDAC		1
399
400/*
401 * Video Flags
402 */
403
404#define VID_ZOOM_INV 0x1
405#define VID_ZOOM_MINI 0x2
406#define VID_OFF_SHIFT_4 0x4
407#define VID_ZOOM_NOMINI 0x8
408#define VID_DOUBLE_LINEBUFFER_FOR_WIDE_SRC 0x10
409#endif /* _TRIDENT_H_ */
410
411