vmwgfx_drm.h revision 34a0776d
1/************************************************************************** 2 * 3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#ifndef __VMWGFX_DRM_H__ 29#define __VMWGFX_DRM_H__ 30#include <drm.h> 31 32#define DRM_VMW_MAX_SURFACE_FACES 6 33#define DRM_VMW_MAX_MIP_LEVELS 24 34 35 36#define DRM_VMW_GET_PARAM 0 37#define DRM_VMW_ALLOC_DMABUF 1 38#define DRM_VMW_UNREF_DMABUF 2 39#define DRM_VMW_CURSOR_BYPASS 3 40/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 41#define DRM_VMW_CONTROL_STREAM 4 42#define DRM_VMW_CLAIM_STREAM 5 43#define DRM_VMW_UNREF_STREAM 6 44/* guarded by DRM_VMW_PARAM_3D == 1 */ 45#define DRM_VMW_CREATE_CONTEXT 7 46#define DRM_VMW_UNREF_CONTEXT 8 47#define DRM_VMW_CREATE_SURFACE 9 48#define DRM_VMW_UNREF_SURFACE 10 49#define DRM_VMW_REF_SURFACE 11 50#define DRM_VMW_EXECBUF 12 51#define DRM_VMW_GET_3D_CAP 13 52#define DRM_VMW_FENCE_WAIT 14 53#define DRM_VMW_FENCE_SIGNALED 15 54#define DRM_VMW_FENCE_UNREF 16 55#define DRM_VMW_FENCE_EVENT 17 56#define DRM_VMW_PRESENT 18 57#define DRM_VMW_PRESENT_READBACK 19 58#define DRM_VMW_UPDATE_LAYOUT 20 59 60/*************************************************************************/ 61/** 62 * DRM_VMW_GET_PARAM - get device information. 63 * 64 * DRM_VMW_PARAM_FIFO_OFFSET: 65 * Offset to use to map the first page of the FIFO read-only. 66 * The fifo is mapped using the mmap() system call on the drm device. 67 * 68 * DRM_VMW_PARAM_OVERLAY_IOCTL: 69 * Does the driver support the overlay ioctl. 70 */ 71 72#define DRM_VMW_PARAM_NUM_STREAMS 0 73#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 74#define DRM_VMW_PARAM_3D 2 75#define DRM_VMW_PARAM_HW_CAPS 3 76#define DRM_VMW_PARAM_FIFO_CAPS 4 77#define DRM_VMW_PARAM_MAX_FB_SIZE 5 78#define DRM_VMW_PARAM_FIFO_HW_VERSION 6 79#define DRM_VMW_PARAM_SCREEN_TARGET 11 80 81/** 82 * struct drm_vmw_getparam_arg 83 * 84 * @value: Returned value. //Out 85 * @param: Parameter to query. //In. 86 * 87 * Argument to the DRM_VMW_GET_PARAM Ioctl. 88 */ 89 90struct drm_vmw_getparam_arg { 91 uint64_t value; 92 uint32_t param; 93 uint32_t pad64; 94}; 95 96/*************************************************************************/ 97/** 98 * DRM_VMW_CREATE_CONTEXT - Create a host context. 99 * 100 * Allocates a device unique context id, and queues a create context command 101 * for the host. Does not wait for host completion. 102 */ 103 104/** 105 * struct drm_vmw_context_arg 106 * 107 * @cid: Device unique context ID. 108 * 109 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 110 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 111 */ 112 113struct drm_vmw_context_arg { 114 int32_t cid; 115 uint32_t pad64; 116}; 117 118/*************************************************************************/ 119/** 120 * DRM_VMW_UNREF_CONTEXT - Create a host context. 121 * 122 * Frees a global context id, and queues a destroy host command for the host. 123 * Does not wait for host completion. The context ID can be used directly 124 * in the command stream and shows up as the same context ID on the host. 125 */ 126 127/*************************************************************************/ 128/** 129 * DRM_VMW_CREATE_SURFACE - Create a host suface. 130 * 131 * Allocates a device unique surface id, and queues a create surface command 132 * for the host. Does not wait for host completion. The surface ID can be 133 * used directly in the command stream and shows up as the same surface 134 * ID on the host. 135 */ 136 137/** 138 * struct drm_wmv_surface_create_req 139 * 140 * @flags: Surface flags as understood by the host. 141 * @format: Surface format as understood by the host. 142 * @mip_levels: Number of mip levels for each face. 143 * An unused face should have 0 encoded. 144 * @size_addr: Address of a user-space array of sruct drm_vmw_size 145 * cast to an uint64_t for 32-64 bit compatibility. 146 * The size of the array should equal the total number of mipmap levels. 147 * @shareable: Boolean whether other clients (as identified by file descriptors) 148 * may reference this surface. 149 * @scanout: Boolean whether the surface is intended to be used as a 150 * scanout. 151 * 152 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 153 * Output data from the DRM_VMW_REF_SURFACE Ioctl. 154 */ 155 156struct drm_vmw_surface_create_req { 157 uint32_t flags; 158 uint32_t format; 159 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 160 uint64_t size_addr; 161 int32_t shareable; 162 int32_t scanout; 163}; 164 165/** 166 * struct drm_wmv_surface_arg 167 * 168 * @sid: Surface id of created surface or surface to destroy or reference. 169 * 170 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 171 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 172 * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 173 */ 174 175struct drm_vmw_surface_arg { 176 int32_t sid; 177 uint32_t pad64; 178}; 179 180/** 181 * struct drm_vmw_size ioctl. 182 * 183 * @width - mip level width 184 * @height - mip level height 185 * @depth - mip level depth 186 * 187 * Description of a mip level. 188 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 189 */ 190 191struct drm_vmw_size { 192 uint32_t width; 193 uint32_t height; 194 uint32_t depth; 195 uint32_t pad64; 196}; 197 198/** 199 * union drm_vmw_surface_create_arg 200 * 201 * @rep: Output data as described above. 202 * @req: Input data as described above. 203 * 204 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 205 */ 206 207union drm_vmw_surface_create_arg { 208 struct drm_vmw_surface_arg rep; 209 struct drm_vmw_surface_create_req req; 210}; 211 212/*************************************************************************/ 213/** 214 * DRM_VMW_REF_SURFACE - Reference a host surface. 215 * 216 * Puts a reference on a host surface with a give sid, as previously 217 * returned by the DRM_VMW_CREATE_SURFACE ioctl. 218 * A reference will make sure the surface isn't destroyed while we hold 219 * it and will allow the calling client to use the surface ID in the command 220 * stream. 221 * 222 * On successful return, the Ioctl returns the surface information given 223 * in the DRM_VMW_CREATE_SURFACE ioctl. 224 */ 225 226/** 227 * union drm_vmw_surface_reference_arg 228 * 229 * @rep: Output data as described above. 230 * @req: Input data as described above. 231 * 232 * Argument to the DRM_VMW_REF_SURFACE Ioctl. 233 */ 234 235union drm_vmw_surface_reference_arg { 236 struct drm_vmw_surface_create_req rep; 237 struct drm_vmw_surface_arg req; 238}; 239 240/*************************************************************************/ 241/** 242 * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 243 * 244 * Clear a reference previously put on a host surface. 245 * When all references are gone, including the one implicitly placed 246 * on creation, 247 * a destroy surface command will be queued for the host. 248 * Does not wait for completion. 249 */ 250 251/*************************************************************************/ 252/** 253 * DRM_VMW_EXECBUF 254 * 255 * Submit a command buffer for execution on the host, and return a 256 * fence seqno that when signaled, indicates that the command buffer has 257 * executed. 258 */ 259 260/** 261 * struct drm_vmw_execbuf_arg 262 * 263 * @commands: User-space address of a command buffer cast to an uint64_t. 264 * @command-size: Size in bytes of the command buffer. 265 * @throttle-us: Sleep until software is less than @throttle_us 266 * microseconds ahead of hardware. The driver may round this value 267 * to the nearest kernel tick. 268 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 269 * uint64_t. 270 * @version: Allows expanding the execbuf ioctl parameters without breaking 271 * backwards compatibility, since user-space will always tell the kernel 272 * which version it uses. 273 * @flags: Execbuf flags. None currently. 274 * 275 * Argument to the DRM_VMW_EXECBUF Ioctl. 276 */ 277 278#define DRM_VMW_EXECBUF_VERSION 1 279 280struct drm_vmw_execbuf_arg { 281 uint64_t commands; 282 uint32_t command_size; 283 uint32_t throttle_us; 284 uint64_t fence_rep; 285 uint32_t version; 286 uint32_t flags; 287}; 288 289/** 290 * struct drm_vmw_fence_rep 291 * 292 * @handle: Fence object handle for fence associated with a command submission. 293 * @mask: Fence flags relevant for this fence object. 294 * @seqno: Fence sequence number in fifo. A fence object with a lower 295 * seqno will signal the EXEC flag before a fence object with a higher 296 * seqno. This can be used by user-space to avoid kernel calls to determine 297 * whether a fence has signaled the EXEC flag. Note that @seqno will 298 * wrap at 32-bit. 299 * @passed_seqno: The highest seqno number processed by the hardware 300 * so far. This can be used to mark user-space fence objects as signaled, and 301 * to determine whether a fence seqno might be stale. 302 * @error: This member should've been set to -EFAULT on submission. 303 * The following actions should be take on completion: 304 * error == -EFAULT: Fence communication failed. The host is synchronized. 305 * Use the last fence id read from the FIFO fence register. 306 * error != 0 && error != -EFAULT: 307 * Fence submission failed. The host is synchronized. Use the fence_seq member. 308 * error == 0: All is OK, The host may not be synchronized. 309 * Use the fence_seq member. 310 * 311 * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 312 */ 313 314struct drm_vmw_fence_rep { 315 uint32_t handle; 316 uint32_t mask; 317 uint32_t seqno; 318 uint32_t passed_seqno; 319 uint32_t pad64; 320 int32_t error; 321}; 322 323/*************************************************************************/ 324/** 325 * DRM_VMW_ALLOC_DMABUF 326 * 327 * Allocate a DMA buffer that is visible also to the host. 328 * NOTE: The buffer is 329 * identified by a handle and an offset, which are private to the guest, but 330 * useable in the command stream. The guest kernel may translate these 331 * and patch up the command stream accordingly. In the future, the offset may 332 * be zero at all times, or it may disappear from the interface before it is 333 * fixed. 334 * 335 * The DMA buffer may stay user-space mapped in the guest at all times, 336 * and is thus suitable for sub-allocation. 337 * 338 * DMA buffers are mapped using the mmap() syscall on the drm device. 339 */ 340 341/** 342 * struct drm_vmw_alloc_dmabuf_req 343 * 344 * @size: Required minimum size of the buffer. 345 * 346 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 347 */ 348 349struct drm_vmw_alloc_dmabuf_req { 350 uint32_t size; 351 uint32_t pad64; 352}; 353 354/** 355 * struct drm_vmw_dmabuf_rep 356 * 357 * @map_handle: Offset to use in the mmap() call used to map the buffer. 358 * @handle: Handle unique to this buffer. Used for unreferencing. 359 * @cur_gmr_id: GMR id to use in the command stream when this buffer is 360 * referenced. See not above. 361 * @cur_gmr_offset: Offset to use in the command stream when this buffer is 362 * referenced. See note above. 363 * 364 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 365 */ 366 367struct drm_vmw_dmabuf_rep { 368 uint64_t map_handle; 369 uint32_t handle; 370 uint32_t cur_gmr_id; 371 uint32_t cur_gmr_offset; 372 uint32_t pad64; 373}; 374 375/** 376 * union drm_vmw_dmabuf_arg 377 * 378 * @req: Input data as described above. 379 * @rep: Output data as described above. 380 * 381 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 382 */ 383 384union drm_vmw_alloc_dmabuf_arg { 385 struct drm_vmw_alloc_dmabuf_req req; 386 struct drm_vmw_dmabuf_rep rep; 387}; 388 389/*************************************************************************/ 390/** 391 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 392 * 393 */ 394 395/** 396 * struct drm_vmw_unref_dmabuf_arg 397 * 398 * @handle: Handle indicating what buffer to free. Obtained from the 399 * DRM_VMW_ALLOC_DMABUF Ioctl. 400 * 401 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 402 */ 403 404struct drm_vmw_unref_dmabuf_arg { 405 uint32_t handle; 406 uint32_t pad64; 407}; 408 409/*************************************************************************/ 410/** 411 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 412 * 413 * This IOCTL controls the overlay units of the svga device. 414 * The SVGA overlay units does not work like regular hardware units in 415 * that they do not automaticaly read back the contents of the given dma 416 * buffer. But instead only read back for each call to this ioctl, and 417 * at any point between this call being made and a following call that 418 * either changes the buffer or disables the stream. 419 */ 420 421/** 422 * struct drm_vmw_rect 423 * 424 * Defines a rectangle. Used in the overlay ioctl to define 425 * source and destination rectangle. 426 */ 427 428struct drm_vmw_rect { 429 int32_t x; 430 int32_t y; 431 uint32_t w; 432 uint32_t h; 433}; 434 435/** 436 * struct drm_vmw_control_stream_arg 437 * 438 * @stream_id: Stearm to control 439 * @enabled: If false all following arguments are ignored. 440 * @handle: Handle to buffer for getting data from. 441 * @format: Format of the overlay as understood by the host. 442 * @width: Width of the overlay. 443 * @height: Height of the overlay. 444 * @size: Size of the overlay in bytes. 445 * @pitch: Array of pitches, the two last are only used for YUV12 formats. 446 * @offset: Offset from start of dma buffer to overlay. 447 * @src: Source rect, must be within the defined area above. 448 * @dst: Destination rect, x and y may be negative. 449 * 450 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 451 */ 452 453struct drm_vmw_control_stream_arg { 454 uint32_t stream_id; 455 uint32_t enabled; 456 457 uint32_t flags; 458 uint32_t color_key; 459 460 uint32_t handle; 461 uint32_t offset; 462 int32_t format; 463 uint32_t size; 464 uint32_t width; 465 uint32_t height; 466 uint32_t pitch[3]; 467 468 uint32_t pad64; 469 struct drm_vmw_rect src; 470 struct drm_vmw_rect dst; 471}; 472 473/*************************************************************************/ 474/** 475 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 476 * 477 */ 478 479#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 480#define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 481 482/** 483 * struct drm_vmw_cursor_bypass_arg 484 * 485 * @flags: Flags. 486 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 487 * @xpos: X position of cursor. 488 * @ypos: Y position of cursor. 489 * @xhot: X hotspot. 490 * @yhot: Y hotspot. 491 * 492 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 493 */ 494 495struct drm_vmw_cursor_bypass_arg { 496 uint32_t flags; 497 uint32_t crtc_id; 498 int32_t xpos; 499 int32_t ypos; 500 int32_t xhot; 501 int32_t yhot; 502}; 503 504/*************************************************************************/ 505/** 506 * DRM_VMW_CLAIM_STREAM - Claim a single stream. 507 */ 508 509/** 510 * struct drm_vmw_context_arg 511 * 512 * @stream_id: Device unique context ID. 513 * 514 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 515 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 516 */ 517 518struct drm_vmw_stream_arg { 519 uint32_t stream_id; 520 uint32_t pad64; 521}; 522 523/*************************************************************************/ 524/** 525 * DRM_VMW_UNREF_STREAM - Unclaim a stream. 526 * 527 * Return a single stream that was claimed by this process. Also makes 528 * sure that the stream has been stopped. 529 */ 530 531/*************************************************************************/ 532/** 533 * DRM_VMW_GET_3D_CAP 534 * 535 * Read 3D capabilities from the FIFO 536 * 537 */ 538 539/** 540 * struct drm_vmw_get_3d_cap_arg 541 * 542 * @buffer: Pointer to a buffer for capability data, cast to an uint64_t 543 * @size: Max size to copy 544 * 545 * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 546 * ioctls. 547 */ 548 549struct drm_vmw_get_3d_cap_arg { 550 uint64_t buffer; 551 uint32_t max_size; 552 uint32_t pad64; 553}; 554 555 556/*************************************************************************/ 557/** 558 * DRM_VMW_FENCE_WAIT 559 * 560 * Waits for a fence object to signal. The wait is interruptible, so that 561 * signals may be delivered during the interrupt. The wait may timeout, 562 * in which case the calls returns -EBUSY. If the wait is restarted, 563 * that is restarting without resetting @cookie_valid to zero, 564 * the timeout is computed from the first call. 565 * 566 * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 567 * on: 568 * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 569 * stream 570 * have executed. 571 * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 572 * commands 573 * in the buffer given to the EXECBUF ioctl returning the fence object handle 574 * are available to user-space. 575 * 576 * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 577 * fenc wait ioctl returns 0, the fence object has been unreferenced after 578 * the wait. 579 */ 580 581#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 582#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 583 584#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 585 586/** 587 * struct drm_vmw_fence_wait_arg 588 * 589 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 590 * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 591 * @kernel_cookie: Set to 0 on first call. Left alone on restart. 592 * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 593 * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 594 * before returning. 595 * @flags: Fence flags to wait on. 596 * @wait_options: Options that control the behaviour of the wait ioctl. 597 * 598 * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 599 */ 600 601struct drm_vmw_fence_wait_arg { 602 uint32_t handle; 603 int32_t cookie_valid; 604 uint64_t kernel_cookie; 605 uint64_t timeout_us; 606 int32_t lazy; 607 int32_t flags; 608 int32_t wait_options; 609 int32_t pad64; 610}; 611 612/*************************************************************************/ 613/** 614 * DRM_VMW_FENCE_SIGNALED 615 * 616 * Checks if a fence object is signaled.. 617 */ 618 619/** 620 * struct drm_vmw_fence_signaled_arg 621 * 622 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 623 * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 624 * @signaled: Out: Flags signaled. 625 * @sequence: Out: Highest sequence passed so far. Can be used to signal the 626 * EXEC flag of user-space fence objects. 627 * 628 * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 629 * ioctls. 630 */ 631 632struct drm_vmw_fence_signaled_arg { 633 uint32_t handle; 634 uint32_t flags; 635 int32_t signaled; 636 uint32_t passed_seqno; 637 uint32_t signaled_flags; 638 uint32_t pad64; 639}; 640 641/*************************************************************************/ 642/** 643 * DRM_VMW_FENCE_UNREF 644 * 645 * Unreferences a fence object, and causes it to be destroyed if there are no 646 * other references to it. 647 * 648 */ 649 650/** 651 * struct drm_vmw_fence_arg 652 * 653 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 654 * 655 * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 656 */ 657 658struct drm_vmw_fence_arg { 659 uint32_t handle; 660 uint32_t pad64; 661}; 662 663 664/*************************************************************************/ 665/** 666 * DRM_VMW_FENCE_EVENT 667 * 668 * Queues an event on a fence to be delivered on the drm character device 669 * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 670 * Optionally the approximate time when the fence signaled is 671 * given by the event. 672 */ 673 674/* 675 * The event type 676 */ 677#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 678 679struct drm_vmw_event_fence { 680 struct drm_event base; 681 uint64_t user_data; 682 uint32_t tv_sec; 683 uint32_t tv_usec; 684}; 685 686/* 687 * Flags that may be given to the command. 688 */ 689/* Request fence signaled time on the event. */ 690#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 691 692/** 693 * struct drm_vmw_fence_event_arg 694 * 695 * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if 696 * the fence is not supposed to be referenced by user-space. 697 * @user_info: Info to be delivered with the event. 698 * @handle: Attach the event to this fence only. 699 * @flags: A set of flags as defined above. 700 */ 701struct drm_vmw_fence_event_arg { 702 uint64_t fence_rep; 703 uint64_t user_data; 704 uint32_t handle; 705 uint32_t flags; 706}; 707 708 709/*************************************************************************/ 710/** 711 * DRM_VMW_PRESENT 712 * 713 * Executes an SVGA present on a given fb for a given surface. The surface 714 * is placed on the framebuffer. Cliprects are given relative to the given 715 * point (the point disignated by dest_{x|y}). 716 * 717 */ 718 719/** 720 * struct drm_vmw_present_arg 721 * @fb_id: framebuffer id to present / read back from. 722 * @sid: Surface id to present from. 723 * @dest_x: X placement coordinate for surface. 724 * @dest_y: Y placement coordinate for surface. 725 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 726 * @num_clips: Number of cliprects given relative to the framebuffer origin, 727 * in the same coordinate space as the frame buffer. 728 * @pad64: Unused 64-bit padding. 729 * 730 * Input argument to the DRM_VMW_PRESENT ioctl. 731 */ 732 733struct drm_vmw_present_arg { 734 uint32_t fb_id; 735 uint32_t sid; 736 int32_t dest_x; 737 int32_t dest_y; 738 uint64_t clips_ptr; 739 uint32_t num_clips; 740 uint32_t pad64; 741}; 742 743 744/*************************************************************************/ 745/** 746 * DRM_VMW_PRESENT_READBACK 747 * 748 * Executes an SVGA present readback from a given fb to the dma buffer 749 * currently bound as the fb. If there is no dma buffer bound to the fb, 750 * an error will be returned. 751 * 752 */ 753 754/** 755 * struct drm_vmw_present_arg 756 * @fb_id: fb_id to present / read back from. 757 * @num_clips: Number of cliprects. 758 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 759 * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. 760 * If this member is NULL, then the ioctl should not return a fence. 761 */ 762 763struct drm_vmw_present_readback_arg { 764 uint32_t fb_id; 765 uint32_t num_clips; 766 uint64_t clips_ptr; 767 uint64_t fence_rep; 768}; 769 770/*************************************************************************/ 771/** 772 * DRM_VMW_UPDATE_LAYOUT - Update layout 773 * 774 * Updates the preferred modes and connection status for connectors. The 775 * command consists of one drm_vmw_update_layout_arg pointing to an array 776 * of num_outputs drm_vmw_rect's. 777 */ 778 779/** 780 * struct drm_vmw_update_layout_arg 781 * 782 * @num_outputs: number of active connectors 783 * @rects: pointer to array of drm_vmw_rect cast to an uint64_t 784 * 785 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 786 */ 787struct drm_vmw_update_layout_arg { 788 uint32_t num_outputs; 789 uint32_t pad64; 790 uint64_t rects; 791}; 792 793#endif 794