1dfe64dd3Smacallan/* Copyright (C) 2003-2006 by XGI Technology, Taiwan. 2dfe64dd3Smacallan * 3dfe64dd3Smacallan * All Rights Reserved. 4dfe64dd3Smacallan * 5dfe64dd3Smacallan * Permission is hereby granted, free of charge, to any person obtaining 6dfe64dd3Smacallan * a copy of this software and associated documentation files (the 7dfe64dd3Smacallan * "Software"), to deal in the Software without restriction, including 8dfe64dd3Smacallan * without limitation on the rights to use, copy, modify, merge, 9dfe64dd3Smacallan * publish, distribute, sublicense, and/or sell copies of the Software, 10dfe64dd3Smacallan * and to permit persons to whom the Software is furnished to do so, 11dfe64dd3Smacallan * subject to the following conditions: 12dfe64dd3Smacallan * 13dfe64dd3Smacallan * The above copyright notice and this permission notice (including the 14dfe64dd3Smacallan * next paragraph) shall be included in all copies or substantial 15dfe64dd3Smacallan * portions of the Software. 16dfe64dd3Smacallan * 17dfe64dd3Smacallan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18dfe64dd3Smacallan * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19dfe64dd3Smacallan * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 20dfe64dd3Smacallan * NON-INFRINGEMENT. IN NO EVENT SHALL XGI AND/OR 21dfe64dd3Smacallan * ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 22dfe64dd3Smacallan * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23dfe64dd3Smacallan * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 24dfe64dd3Smacallan * DEALINGS IN THE SOFTWARE. 25dfe64dd3Smacallan */ 26dfe64dd3Smacallan 27dfe64dd3Smacallan#ifndef _INITDEF_ 28dfe64dd3Smacallan#define _INITDEF_ 29dfe64dd3Smacallan 30dfe64dd3Smacallan#ifndef NewScratch 31dfe64dd3Smacallan#define NewScratch 32dfe64dd3Smacallan#endif 33dfe64dd3Smacallan/* shampoo */ 34dfe64dd3Smacallan#ifdef LINUX_KERNEL 35dfe64dd3Smacallan#define SEQ_ADDRESS_PORT 0x0014 36dfe64dd3Smacallan#define SEQ_DATA_PORT 0x0015 37dfe64dd3Smacallan#define MISC_OUTPUT_REG_READ_PORT 0x001C 38dfe64dd3Smacallan#define MISC_OUTPUT_REG_WRITE_PORT 0x0012 39dfe64dd3Smacallan#define GRAPH_DATA_PORT 0x1F 40dfe64dd3Smacallan#define GRAPH_ADDRESS_PORT 0x1E 41dfe64dd3Smacallan#define XGI_MASK_DUAL_CHIP 0x04 /* SR3A */ 42dfe64dd3Smacallan#define CRTC_ADDRESS_PORT_COLOR 0x0024 43dfe64dd3Smacallan#define VIDEO_SUBSYSTEM_ENABLE_PORT 0x0013 44dfe64dd3Smacallan#define PCI_COMMAND 0x04 45dfe64dd3Smacallan#endif 46dfe64dd3Smacallan/* ~shampoo */ 47dfe64dd3Smacallan 48dfe64dd3Smacallan 49dfe64dd3Smacallan#define VB_XGI301 0x0001 /*301b*/ 50dfe64dd3Smacallan#define VB_XGI301B 0x0002 51dfe64dd3Smacallan#define VB_XGI302B 0x0004 52dfe64dd3Smacallan#define VB_XGI301LV 0x0008 /*301lv*/ 53dfe64dd3Smacallan#define VB_XGI302LV 0x0010 54dfe64dd3Smacallan#define VB_XGI302ELV 0x0020 55dfe64dd3Smacallan#define VB_XGI301C 0x0040 /* for 301C */ 56dfe64dd3Smacallan#define VB_NoLCD 0x8000 57dfe64dd3Smacallan#define VB_XGI301BLV302BLV (VB_XGI301B|VB_XGI301C|VB_XGI302B|VB_XGI301LV|VB_XGI302LV|VB_XGI302ELV) 58dfe64dd3Smacallan#define VB_XGI301LV302LV (VB_XGI301LV|VB_XGI302LV|VB_XGI302ELV) 59dfe64dd3Smacallan#define VB_XGIVB (VB_XGI301 | VB_XGI301BLV302BLV) 60dfe64dd3Smacallan/*end 301b*/ 61dfe64dd3Smacallan 62dfe64dd3Smacallan#define VB_YPbPrInfo 0x07 /*301lv*/ 63dfe64dd3Smacallan#define VB_YPbPr525i 0x00 64dfe64dd3Smacallan#define VB_YPbPr525p 0x01 65dfe64dd3Smacallan#define VB_YPbPr750p 0x02 66dfe64dd3Smacallan#define VB_YPbPr1080i 0x03 67dfe64dd3Smacallan 68dfe64dd3Smacallan/* #define CRT1Len 17 */ 69dfe64dd3Smacallan#define LVDSCRT1Len 15 70dfe64dd3Smacallan#define CHTVRegDataLen 5 71dfe64dd3Smacallan 72dfe64dd3Smacallan/* #define ModeInfoFlag 0x07 */ 73dfe64dd3Smacallan/* #define IsTextMode 0x07 */ 74dfe64dd3Smacallan/* #define ModeText 0x00 */ 75dfe64dd3Smacallan/* #define ModeCGA 0x01 */ 76dfe64dd3Smacallan/* #define ModeEGA 0x02 */ 77dfe64dd3Smacallan/* #define ModeVGA 0x03 */ 78dfe64dd3Smacallan/* #define Mode15Bpp 0x04 */ 79dfe64dd3Smacallan/* #define Mode16Bpp 0x05 */ 80dfe64dd3Smacallan/* #define Mode24Bpp 0x06 */ 81dfe64dd3Smacallan/* #define Mode32Bpp 0x07 */ 82dfe64dd3Smacallan 83dfe64dd3Smacallan/* #define DACInfoFlag 0x18 */ 84dfe64dd3Smacallan/* #define MemoryInfoFlag 0x1E0 */ 85dfe64dd3Smacallan/* #define MemorySizeShift 0x05 */ 86dfe64dd3Smacallan 87dfe64dd3Smacallan#define Charx8Dot 0x0200 88dfe64dd3Smacallan#define LineCompareOff 0x0400 89dfe64dd3Smacallan#define CRT2Mode 0x0800 90dfe64dd3Smacallan#define HalfDCLK 0x1000 91dfe64dd3Smacallan#define NoSupportSimuTV 0x2000 92dfe64dd3Smacallan#define DoubleScanMode 0x8000 93dfe64dd3Smacallan 94dfe64dd3Smacallan#define SupportAllCRT2 0x0078 95dfe64dd3Smacallan#define SupportTV 0x0008 96dfe64dd3Smacallan#define SupportHiVisionTV 0x0010 97dfe64dd3Smacallan#define SupportLCD 0x0020 98dfe64dd3Smacallan#define SupportRAMDAC2 0x0040 /* All (<= 100Mhz) */ 99dfe64dd3Smacallan#define NoSupportTV 0x0070 100dfe64dd3Smacallan#define NoSupportHiVisionTV 0x0060 101dfe64dd3Smacallan#define NoSupportLCD 0x0058 102dfe64dd3Smacallan#define SupportCHTV 0x0800 103dfe64dd3Smacallan#define SupportCRT2in301C 0x0100 /* for 301C */ 104dfe64dd3Smacallan#define SupportTV1024 0x0800 /*301b*/ 105dfe64dd3Smacallan#define SupportYPbPr 0x1000 /*301lv*/ 106dfe64dd3Smacallan#define InterlaceMode 0x0080 107dfe64dd3Smacallan#define SyncPP 0x0000 108dfe64dd3Smacallan#define SyncPN 0x4000 109dfe64dd3Smacallan#define SyncNP 0x8000 110dfe64dd3Smacallan/* #define SyncNN 0xc000 */ 111dfe64dd3Smacallan#define ECLKindex0 0x0000 112dfe64dd3Smacallan#define ECLKindex1 0x0100 113dfe64dd3Smacallan#define ECLKindex2 0x0200 114dfe64dd3Smacallan#define ECLKindex3 0x0300 115dfe64dd3Smacallan#define ECLKindex4 0x0400 116dfe64dd3Smacallan 117dfe64dd3Smacallan/** 118dfe64dd3Smacallan * CR30 119dfe64dd3Smacallan */ 120dfe64dd3Smacallan#define SetSimuScanMode 0x0001 121dfe64dd3Smacallan#define SwitchToCRT2 0x0002 122dfe64dd3Smacallan#define SetCRT2ToAVIDEO 0x0004 123dfe64dd3Smacallan#define SetCRT2ToSVIDEO 0x0008 124dfe64dd3Smacallan#define SetCRT2ToSCART 0x0010 125dfe64dd3Smacallan#define SetCRT2ToLCD 0x0020 126dfe64dd3Smacallan#define SetCRT2ToRAMDAC 0x0040 127dfe64dd3Smacallan#define SetCRT2ToHiVisionTV 0x0080 128dfe64dd3Smacallan#define SetCRT2ToCHYPbPr SetCRT2ToHiVisionTV /* for Chrontel */ 129dfe64dd3Smacallan 130dfe64dd3Smacallan/** 131dfe64dd3Smacallan * CR31 132dfe64dd3Smacallan */ 133dfe64dd3Smacallan#define SetNTSCTV 0x0000 134dfe64dd3Smacallan/* #define SetPALTV 0x0100 */ 135dfe64dd3Smacallan#define SetCRT2ToLCDA 0x0100 136dfe64dd3Smacallan#define SetInSlaveMode 0x0200 137dfe64dd3Smacallan#define SetNotSimuMode 0x0400 138dfe64dd3Smacallan#define SetNotSimuTVMode SetNotSimuMode 139dfe64dd3Smacallan#define SetDispDevSwitch 0x0800 140dfe64dd3Smacallan#define SetCRT2ToYPbPr 0x0800 141dfe64dd3Smacallan#define LoadDACFlag 0x1000 142dfe64dd3Smacallan#define DisableCRT2Display 0x2000 143dfe64dd3Smacallan#define DriverMode 0x4000 144dfe64dd3Smacallan#define HotKeySwitch 0x8000 145dfe64dd3Smacallan#define SetCHTVOverScan 0x8000 146dfe64dd3Smacallan#define SetCRT2ToDualEdge 0x8000 147dfe64dd3Smacallan/* #define SetCRT2ToLCDA 0x8000 301b */ 148dfe64dd3Smacallan#define PanelRGB18Bit 0x0100 149dfe64dd3Smacallan#define PanelRGB24Bit 0x0000 150dfe64dd3Smacallan 151dfe64dd3Smacallan/* v-- Needs change in xgi_vga.c if changed (GPIO) --v */ 152dfe64dd3Smacallan#define SetCRT2ToTV1 (SetCRT2ToHiVisionTV | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO) 153dfe64dd3Smacallan#define SetCRT2ToTV (SetCRT2ToYPbPr | SetCRT2ToTV1) 154dfe64dd3Smacallan 155dfe64dd3Smacallan 156dfe64dd3Smacallan#define TVOverScan 0x10 157dfe64dd3Smacallan#define TVOverScanShift 4 158dfe64dd3Smacallan#define ClearBufferFlag 0x20 159dfe64dd3Smacallan#define EnableDualEdge 0x01 /*301b*/ 160dfe64dd3Smacallan#define SetToLCDA 0x02 161dfe64dd3Smacallan 162dfe64dd3Smacallan#define YPbPrModeInfo 0x38 163dfe64dd3Smacallan/* #define YPbPrMode525i 0x00 */ 164dfe64dd3Smacallan/* #define YPbPrMode525p 0x08 */ 165dfe64dd3Smacallan/* #define YPbPrMode750p 0x10 */ 166dfe64dd3Smacallan/* #define YPbPrMode1080i 0x18 */ 167dfe64dd3Smacallan 168dfe64dd3Smacallan#define SetSCARTOutput 0x01 169dfe64dd3Smacallan#define BoardTVType 0x02 170dfe64dd3Smacallan#define EnablePALMN 0x40 /* Romflag: 1 = Allow PALM/PALN */ 171dfe64dd3Smacallan/* #define LCDVESATiming 0x0008 */ 172dfe64dd3Smacallan/* #define EnableLVDSDDA 0x0010 */ 173dfe64dd3Smacallan 174dfe64dd3Smacallan#define Panel320x480 0x07/*fstn*/ 175dfe64dd3Smacallan/* [ycchen] 02/12/03 Modify for Multi-Sync. LCD Support */ 176dfe64dd3Smacallan#define PanelResInfo 0x1F /* CR36 Panel Type/LCDResInfo */ 177dfe64dd3Smacallan#define PanelRefInfo 0x60 178dfe64dd3Smacallan#define Panel800x600 0x01 179dfe64dd3Smacallan#define Panel1024x768 0x02 180dfe64dd3Smacallan#define Panel1024x768x75 0x22 181dfe64dd3Smacallan#define Panel1280x1024 0x03 182dfe64dd3Smacallan#define Panel1280x1024x75 0x23 183dfe64dd3Smacallan#define Panel640x480 0x04 184dfe64dd3Smacallan#define Panel1024x600 0x05 185dfe64dd3Smacallan#define Panel1152x864 0x06 186dfe64dd3Smacallan#define Panel1280x960 0x07 187dfe64dd3Smacallan#define Panel1152x768 0x08 188dfe64dd3Smacallan#define Panel1400x1050 0x09 189dfe64dd3Smacallan#define Panel1280x768 0x0A 190dfe64dd3Smacallan#define Panel1600x1200 0x0B 191dfe64dd3Smacallan#define Panel1600x1200_1 0x0E 192dfe64dd3Smacallan 193dfe64dd3Smacallan#define PanelRef60Hz 0x00 194dfe64dd3Smacallan#define PanelRef75Hz 0x20 195dfe64dd3Smacallan 196dfe64dd3Smacallan/* #define DDC2DelayTime 300 */ 197dfe64dd3Smacallan 198dfe64dd3Smacallan#define CRT2DisplayFlag 0x2000 199dfe64dd3Smacallan/* #define LCDDataLen 8 */ 200dfe64dd3Smacallan/* #define HiTVDataLen 12 */ 201dfe64dd3Smacallan/* #define TVDataLen 16 */ 202dfe64dd3Smacallan/* #define SetPALTV 0x0100 */ 203dfe64dd3Smacallan#define HalfDCLK 0x1000 204dfe64dd3Smacallan#define NTSCHT 1716 205dfe64dd3Smacallan#define NTSC2HT 1920 206dfe64dd3Smacallan#define NTSCVT 525 207dfe64dd3Smacallan#define PALHT 1728 208dfe64dd3Smacallan#define PALVT 625 209dfe64dd3Smacallan#define StHiTVHT 892 210dfe64dd3Smacallan#define StHiTVVT 1126 211dfe64dd3Smacallan#define StHiTextTVHT 1000 212dfe64dd3Smacallan#define StHiTextTVVT 1126 213dfe64dd3Smacallan#define ExtHiTVHT 2100 214dfe64dd3Smacallan#define ExtHiTVVT 1125 215dfe64dd3Smacallan 216dfe64dd3Smacallan#define St750pTVHT 1716 217dfe64dd3Smacallan#define St750pTVVT 525 218dfe64dd3Smacallan#define Ext750pTVHT 1716 219dfe64dd3Smacallan#define Ext750pTVVT 525 220dfe64dd3Smacallan#define St525pTVHT 1716 221dfe64dd3Smacallan#define St525pTVVT 525 222dfe64dd3Smacallan#define Ext525pTVHT 1716 223dfe64dd3Smacallan#define Ext525pTVVT 525 224dfe64dd3Smacallan#define St525iTVHT 1716 225dfe64dd3Smacallan#define St525iTVVT 525 226dfe64dd3Smacallan#define Ext525iTVHT 1716 227dfe64dd3Smacallan#define Ext525iTVVT 525 228dfe64dd3Smacallan 229dfe64dd3Smacallan#define VCLKStartFreq 25 230dfe64dd3Smacallan#define SoftDramType 0x80 231dfe64dd3Smacallan#define VCLK40 0x04 232dfe64dd3Smacallan 233dfe64dd3Smacallan#define VCLK162 0x21 234dfe64dd3Smacallan 235dfe64dd3Smacallan#define YPbPr525iVCLK 0x03B 236dfe64dd3Smacallan#define YPbPr525iVCLK_2 0x03A 237dfe64dd3Smacallan 238dfe64dd3Smacallan/* #define LCDVESATiming 0x08 */ 239dfe64dd3Smacallan#define SetSCARTOutput 0x01 240dfe64dd3Smacallan#define AVIDEOSense 0x01 241dfe64dd3Smacallan#define SVIDEOSense 0x02 242dfe64dd3Smacallan#define SCARTSense 0x04 243dfe64dd3Smacallan#define LCDSense 0x08 244dfe64dd3Smacallan#define Monitor1Sense 0x20 245dfe64dd3Smacallan#define Monitor2Sense 0x10 246dfe64dd3Smacallan#define HiTVSense 0x40 247dfe64dd3Smacallan#define BoardTVType 0x02 248dfe64dd3Smacallan#define HotPlugFunction 0x08 249dfe64dd3Smacallan#define StStructSize 0x06 250dfe64dd3Smacallan 251dfe64dd3Smacallan 252dfe64dd3Smacallan#define XGI_VIDEO_CAPTURE 0x00 - 0x30 253dfe64dd3Smacallan#define XGI_VIDEO_PLAYBACK 0x02 - 0x30 254dfe64dd3Smacallan#define XGI_CRT2_PORT_00 0x00 - 0x30 255dfe64dd3Smacallan#define XGI_CRT2_PORT_04 0x04 - 0x30 256dfe64dd3Smacallan#define XGI_CRT2_PORT_10 0x10 - 0x30 257dfe64dd3Smacallan#define XGI_CRT2_PORT_12 0x12 - 0x30 258dfe64dd3Smacallan#define XGI_CRT2_PORT_14 0x14 - 0x30 259dfe64dd3Smacallan 260dfe64dd3Smacallan 261dfe64dd3Smacallan#define ADR_CRT2PtrData 0x20E 262dfe64dd3Smacallan#define offset_Zurac 0x210 /* TW: Trumpion Zurac data pointer */ 263dfe64dd3Smacallan#define ADR_LVDSDesPtrData 0x212 264dfe64dd3Smacallan#define ADR_LVDSCRT1DataPtr 0x214 265dfe64dd3Smacallan#define ADR_CHTVVCLKPtr 0x216 266dfe64dd3Smacallan#define ADR_CHTVRegDataPtr 0x218 267dfe64dd3Smacallan 268dfe64dd3Smacallan#define LVDSDataLen 6 269dfe64dd3Smacallan/* #define EnableLVDSDDA 0x10 */ 270dfe64dd3Smacallan/* #define LVDSDesDataLen 3 */ 271dfe64dd3Smacallan#define ActiveNonExpanding 0x40 272dfe64dd3Smacallan#define ActiveNonExpandingShift 6 273dfe64dd3Smacallan/* #define ActivePAL 0x20 */ 274dfe64dd3Smacallan#define ActivePALShift 5 275dfe64dd3Smacallan/* #define ModeSwitchStatus 0x0F */ 276dfe64dd3Smacallan#define SoftTVType 0x40 277dfe64dd3Smacallan#define SoftSettingAddr 0x52 278dfe64dd3Smacallan#define ModeSettingAddr 0x53 279dfe64dd3Smacallan 280dfe64dd3Smacallan/* #define SelectCRT1Rate 0x4 */ 281dfe64dd3Smacallan 282dfe64dd3Smacallan#define _PanelType00 0x00 283dfe64dd3Smacallan#define _PanelType01 0x08 284dfe64dd3Smacallan#define _PanelType02 0x10 285dfe64dd3Smacallan#define _PanelType03 0x18 286dfe64dd3Smacallan#define _PanelType04 0x20 287dfe64dd3Smacallan#define _PanelType05 0x28 288dfe64dd3Smacallan#define _PanelType06 0x30 289dfe64dd3Smacallan#define _PanelType07 0x38 290dfe64dd3Smacallan#define _PanelType08 0x40 291dfe64dd3Smacallan#define _PanelType09 0x48 292dfe64dd3Smacallan#define _PanelType0A 0x50 293dfe64dd3Smacallan#define _PanelType0B 0x58 294dfe64dd3Smacallan#define _PanelType0C 0x60 295dfe64dd3Smacallan#define _PanelType0D 0x68 296dfe64dd3Smacallan#define _PanelType0E 0x70 297dfe64dd3Smacallan#define _PanelType0F 0x78 298dfe64dd3Smacallan 299dfe64dd3Smacallan 300dfe64dd3Smacallan#define PRIMARY_VGA 0 /* 1: XGI is primary vga 0:XGI is secondary vga */ 301dfe64dd3Smacallan#define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */ 302dfe64dd3Smacallan#define OEMUtilIDCodeAddr 0x237 303dfe64dd3Smacallan#define VBModeIDTableAddr 0x239 304dfe64dd3Smacallan#define OEMTVPtrAddr 0x241 305dfe64dd3Smacallan#define PhaseTableAddr 0x243 306dfe64dd3Smacallan#define NTSCFilterTableAddr 0x245 307dfe64dd3Smacallan#define PALFilterTableAddr 0x247 308dfe64dd3Smacallan#define OEMLCDPtr_1Addr 0x249 309dfe64dd3Smacallan#define OEMLCDPtr_2Addr 0x24B 310dfe64dd3Smacallan#define LCDHPosTable_1Addr 0x24D 311dfe64dd3Smacallan#define LCDHPosTable_2Addr 0x24F 312dfe64dd3Smacallan#define LCDVPosTable_1Addr 0x251 313dfe64dd3Smacallan#define LCDVPosTable_2Addr 0x253 314dfe64dd3Smacallan#define OEMLCDPIDTableAddr 0x255 315dfe64dd3Smacallan 316dfe64dd3Smacallan#define VBModeStructSize 5 317dfe64dd3Smacallan#define PhaseTableSize 4 318dfe64dd3Smacallan#define FilterTableSize 4 319dfe64dd3Smacallan#define LCDHPosTableSize 7 320dfe64dd3Smacallan#define LCDVPosTableSize 5 321dfe64dd3Smacallan#define OEMLVDSPIDTableSize 4 322dfe64dd3Smacallan#define LVDSHPosTableSize 4 323dfe64dd3Smacallan#define LVDSVPosTableSize 6 324dfe64dd3Smacallan 325dfe64dd3Smacallan#define VB_ModeID 0 326dfe64dd3Smacallan#define VB_TVTableIndex 1 327dfe64dd3Smacallan#define VB_LCDTableIndex 2 328dfe64dd3Smacallan#define VB_LCDHIndex 3 329dfe64dd3Smacallan#define VB_LCDVIndex 4 330dfe64dd3Smacallan 331dfe64dd3Smacallan#define OEMLCDEnable 0x0001 332dfe64dd3Smacallan#define OEMLCDDelayEnable 0x0002 333dfe64dd3Smacallan#define OEMLCDPOSEnable 0x0004 334dfe64dd3Smacallan#define OEMTVEnable 0x0100 335dfe64dd3Smacallan#define OEMTVDelayEnable 0x0200 336dfe64dd3Smacallan#define OEMTVFlickerEnable 0x0400 337dfe64dd3Smacallan#define OEMTVPhaseEnable 0x0800 338dfe64dd3Smacallan#define OEMTVFilterEnable 0x1000 339dfe64dd3Smacallan 340dfe64dd3Smacallan#define OEMLCDPanelIDSupport 0x0080 341dfe64dd3Smacallan 342dfe64dd3Smacallan/* #define LCDVESATiming 0x0001 //LCD Info CR37 */ 343dfe64dd3Smacallan/* #define EnableLVDSDDA 0x0002 */ 344dfe64dd3Smacallan#define EnableScalingLCD 0x0008 345dfe64dd3Smacallan#define SetPWDEnable 0x0004 346dfe64dd3Smacallan#define SetLCDtoNonExpanding 0x0010 347dfe64dd3Smacallan/* #define SetLCDPolarity 0x00E0 */ 348dfe64dd3Smacallan#define SetLCDDualLink 0x0100 349dfe64dd3Smacallan#define SetLCDLowResolution 0x0200 350dfe64dd3Smacallan#define SetLCDStdMode 0x0400 351dfe64dd3Smacallan#define SetTVStdMode 0x0200 352dfe64dd3Smacallan#define SetTVLowResolution 0x0400 353dfe64dd3Smacallan/* ============================================================= 354dfe64dd3Smacallan for 310 355dfe64dd3Smacallan============================================================== */ 356dfe64dd3Smacallan#define SoftDRAMType 0x80 357dfe64dd3Smacallan#define SoftSetting_OFFSET 0x52 358dfe64dd3Smacallan#define SR07_OFFSET 0x7C 359dfe64dd3Smacallan#define SR15_OFFSET 0x7D 360dfe64dd3Smacallan#define SR16_OFFSET 0x81 361dfe64dd3Smacallan#define SR17_OFFSET 0x85 362dfe64dd3Smacallan#define SR19_OFFSET 0x8D 363dfe64dd3Smacallan#define SR1F_OFFSET 0x99 364dfe64dd3Smacallan#define SR21_OFFSET 0x9A 365dfe64dd3Smacallan#define SR22_OFFSET 0x9B 366dfe64dd3Smacallan#define SR23_OFFSET 0x9C 367dfe64dd3Smacallan#define SR24_OFFSET 0x9D 368dfe64dd3Smacallan#define SR25_OFFSET 0x9E 369dfe64dd3Smacallan#define SR31_OFFSET 0x9F 370dfe64dd3Smacallan#define SR32_OFFSET 0xA0 371dfe64dd3Smacallan#define SR33_OFFSET 0xA1 372dfe64dd3Smacallan 373dfe64dd3Smacallan#define CR40_OFFSET 0xA2 374dfe64dd3Smacallan#define SR25_1_OFFSET 0xF6 375dfe64dd3Smacallan#define CR49_OFFSET 0xF7 376dfe64dd3Smacallan 377dfe64dd3Smacallan#define VB310Data_1_2_Offset 0xB6 378dfe64dd3Smacallan#define VB310Data_4_D_Offset 0xB7 379dfe64dd3Smacallan#define VB310Data_4_E_Offset 0xB8 380dfe64dd3Smacallan#define VB310Data_4_10_Offset 0xBB 381dfe64dd3Smacallan 382dfe64dd3Smacallan#define RGBSenseDataOffset 0xBD 383dfe64dd3Smacallan#define YCSenseDataOffset 0xBF 384dfe64dd3Smacallan#define VideoSenseDataOffset 0xC1 385dfe64dd3Smacallan#define OutputSelectOffset 0xF3 386dfe64dd3Smacallan 387dfe64dd3Smacallan#define ECLK_MCLK_DISTANCE 0x14 388dfe64dd3Smacallan#define VBIOSTablePointerStart 0x200 389dfe64dd3Smacallan#define StandTablePtrOffset VBIOSTablePointerStart+0x02 390dfe64dd3Smacallan#define EModeIDTablePtrOffset VBIOSTablePointerStart+0x04 391dfe64dd3Smacallan#define CRT1TablePtrOffset VBIOSTablePointerStart+0x06 392dfe64dd3Smacallan#define ScreenOffsetPtrOffset VBIOSTablePointerStart+0x08 393dfe64dd3Smacallan#define VCLKDataPtrOffset VBIOSTablePointerStart+0x0A 394dfe64dd3Smacallan#define MCLKDataPtrOffset VBIOSTablePointerStart+0x0E 395dfe64dd3Smacallan#define CRT2PtrDataPtrOffset VBIOSTablePointerStart+0x10 396dfe64dd3Smacallan#define TVAntiFlickPtrOffset VBIOSTablePointerStart+0x12 397dfe64dd3Smacallan#define TVDelayPtr1Offset VBIOSTablePointerStart+0x14 398dfe64dd3Smacallan#define TVPhaseIncrPtr1Offset VBIOSTablePointerStart+0x16 399dfe64dd3Smacallan#define TVYFilterPtr1Offset VBIOSTablePointerStart+0x18 400dfe64dd3Smacallan#define LCDDelayPtr1Offset VBIOSTablePointerStart+0x20 401dfe64dd3Smacallan#define TVEdgePtr1Offset VBIOSTablePointerStart+0x24 402dfe64dd3Smacallan#define CRT2Delay1Offset VBIOSTablePointerStart+0x28 403dfe64dd3Smacallan#define LCDDataDesOffset VBIOSTablePointerStart-0x02 404dfe64dd3Smacallan#define LCDDataPtrOffset VBIOSTablePointerStart+0x2A 405dfe64dd3Smacallan#define LCDDesDataPtrOffset VBIOSTablePointerStart+0x2C 406dfe64dd3Smacallan#define LCDDataList VBIOSTablePointerStart+0x22 /* add for GetLCDPtr */ 407dfe64dd3Smacallan#define TVDataList VBIOSTablePointerStart+0x36 /* add for GetTVPtr */ 408dfe64dd3Smacallan/* */ 409dfe64dd3Smacallan/* Modify from 310.inc */ 410dfe64dd3Smacallan/* */ 411dfe64dd3Smacallan/* */ 412dfe64dd3Smacallan 413dfe64dd3Smacallan 414dfe64dd3Smacallan#define ShowMsgFlag 0x20 /* SoftSetting */ 415dfe64dd3Smacallan#define ShowVESAFlag 0x10 416dfe64dd3Smacallan#define HotPlugFunction 0x08 417dfe64dd3Smacallan#define ModeSoftSetting 0x04 418dfe64dd3Smacallan#define TVSoftSetting 0x02 419dfe64dd3Smacallan#define LCDSoftSetting 0x01 420dfe64dd3Smacallan 421dfe64dd3Smacallan#define GatingCRTinLCDA 0x10 422dfe64dd3Smacallan#define SetHiTVOutput 0x08 423dfe64dd3Smacallan#define SetYPbPrOutput 0x04 424dfe64dd3Smacallan#define BoardTVType 0x02 425dfe64dd3Smacallan#define SetSCARTOutput 0x01 426dfe64dd3Smacallan 427dfe64dd3Smacallan#define ModeSettingYPbPr 0x02 /* TVModeSetting, Others as same as CR30 */ 428dfe64dd3Smacallan 429dfe64dd3Smacallan/* TVModeSetting same as CR35 */ 430dfe64dd3Smacallan 431dfe64dd3Smacallan/* LCDModeSetting same as CR37 */ 432dfe64dd3Smacallan 433dfe64dd3Smacallan#define EnableNewTVFont 0x10 /* MiscCapability */ 434dfe64dd3Smacallan 435dfe64dd3Smacallan#define EnableLCDOutput 0x80 /* LCDCfgSetting */ 436dfe64dd3Smacallan 437dfe64dd3Smacallan#define SoftDRAMType 0x80 /* DRAMSetting */ 438dfe64dd3Smacallan#define SoftDRAMConfig 0x40 439dfe64dd3Smacallan#define MosSelDRAMType 0x20 440dfe64dd3Smacallan#define SDRAM 000h 441dfe64dd3Smacallan#define SGRAM 0x01 442dfe64dd3Smacallan#define ESDRAM 0x02 443dfe64dd3Smacallan 444dfe64dd3Smacallan#define EnableAGPCfgSetting 0x01 /* AGPCfgSetting */ 445dfe64dd3Smacallan 446dfe64dd3Smacallan/* ---------------- SetMode Stack */ 447dfe64dd3Smacallan#define CRT1Len 15 448dfe64dd3Smacallan#define VCLKLen 4 449dfe64dd3Smacallan#define DefThreshold 0x0100 450dfe64dd3Smacallan#define ExtRegsSize (57+8+37+70+63+28+768+1)/64+1 451dfe64dd3Smacallan 452dfe64dd3Smacallan#define VB_XGI301 0x0001 /* VB Type Info */ 453dfe64dd3Smacallan#define VB_XGI301B 0x0002 /* 301 series */ 454dfe64dd3Smacallan#define VB_XGI302B 0x0004 455dfe64dd3Smacallan#define VB_NoLCD 0x8000 456dfe64dd3Smacallan#define VB_XGI301LV 0x0008 457dfe64dd3Smacallan#define VB_XGI302LV 0x0010 458dfe64dd3Smacallan#define VB_LVDS_NS 0x0001 /* 3rd party chip */ 459dfe64dd3Smacallan 460dfe64dd3Smacallan/* Jong 10/04/2007; merge code */ 461dfe64dd3Smacallan#define VB_CH7017 0x0002 462dfe64dd3Smacallan#define VB_CH7007 0x0080 /* [Billy] 07/05/03 */ 463dfe64dd3Smacallan 464dfe64dd3Smacallan/* #define VB_LVDS_SI 0x0004 */ 465dfe64dd3Smacallan 466dfe64dd3Smacallan#define ModeInfoFlag 0x0007 467dfe64dd3Smacallan#define IsTextMode 0x0007 468dfe64dd3Smacallan#define ModeText 0x0000 469dfe64dd3Smacallan#define ModeCGA 0x0001 470dfe64dd3Smacallan#define ModeEGA 0x0002 /* 16 colors mode */ 471dfe64dd3Smacallan#define ModeVGA 0x0003 /* 256 colors mode */ 472dfe64dd3Smacallan#define Mode15Bpp 0x0004 /* 15 Bpp Color Mode */ 473dfe64dd3Smacallan#define Mode16Bpp 0x0005 /* 16 Bpp Color Mode */ 474dfe64dd3Smacallan#define Mode24Bpp 0x0006 /* 24 Bpp Color Mode */ 475dfe64dd3Smacallan#define Mode32Bpp 0x0007 /* 32 Bpp Color Mode */ 476dfe64dd3Smacallan 477dfe64dd3Smacallan#define DACInfoFlag 0x0018 478dfe64dd3Smacallan#define MONODAC 0x0000 479dfe64dd3Smacallan#define CGADAC 0x0008 480dfe64dd3Smacallan#define EGADAC 0x0010 481dfe64dd3Smacallan#define VGADAC 0x0018 482dfe64dd3Smacallan 483dfe64dd3Smacallan#define MemoryInfoFlag 0x01e0 484dfe64dd3Smacallan#define MemorySizeShift 5 485dfe64dd3Smacallan#define Need1MSize 0x0000 486dfe64dd3Smacallan#define Need2MSize 0x0020 487dfe64dd3Smacallan#define Need4MSize 0x0060 488dfe64dd3Smacallan#define Need8MSize 0x00e0 489dfe64dd3Smacallan#define Need16MSize 0x01e0 490dfe64dd3Smacallan 491dfe64dd3Smacallan#define Charx8Dot 0x0200 492dfe64dd3Smacallan#define LineCompareOff 0x0400 493dfe64dd3Smacallan#define CRT2Mode 0x0800 494dfe64dd3Smacallan#define HalfDCLK 0x1000 495dfe64dd3Smacallan#define NoSupportSimuTV 0x2000 496dfe64dd3Smacallan#define DoubleScanMode 0x8000 497dfe64dd3Smacallan 498dfe64dd3Smacallan/* -------------- Ext_InfoFlag */ 499dfe64dd3Smacallan#define SupportModeInfo 0x0007 500dfe64dd3Smacallan#define Support256 0x0003 501dfe64dd3Smacallan#define Support15Bpp 0x0004 502dfe64dd3Smacallan#define Support16Bpp 0x0005 503dfe64dd3Smacallan#define Support24Bpp 0x0006 504dfe64dd3Smacallan#define Support32Bpp 0x0007 505dfe64dd3Smacallan 506dfe64dd3Smacallan#define SupportAllCRT2 0x0078 507dfe64dd3Smacallan#define SupportTV 0x0008 508dfe64dd3Smacallan#define SupportHiVisionTV 0x0010 509dfe64dd3Smacallan#define SupportLCD 0x0020 510dfe64dd3Smacallan#define SupportRAMDAC2 0x0040 511dfe64dd3Smacallan#define NoSupportTV 0x0070 512dfe64dd3Smacallan#define NoSupportHiVisionTV 0x0060 513dfe64dd3Smacallan#define NoSupportLCD 0x0058 514dfe64dd3Smacallan#define SupportTV1024 0x0800 /* 301btest */ 515dfe64dd3Smacallan#define SupportYPbPr 0x1000 /* 301lv */ 516dfe64dd3Smacallan#define InterlaceMode 0x0080 517dfe64dd3Smacallan#define SyncPP 0x0000 518dfe64dd3Smacallan#define SyncPN 0x4000 519dfe64dd3Smacallan#define SyncNP 0x8000 520dfe64dd3Smacallan#define SyncNN 0xc000 521dfe64dd3Smacallan 522dfe64dd3Smacallan/** 523dfe64dd3Smacallan * Bits for SetFlag 524dfe64dd3Smacallan */ 525dfe64dd3Smacallan#define ProgrammingCRT2 0x0001 526dfe64dd3Smacallan#define LowModeTests 0x0002 527dfe64dd3Smacallan#define EnableVCMode 0x0004 528dfe64dd3Smacallan#define SetHKEventMode 0x0008 529dfe64dd3Smacallan#define ReserveTVOption 0x0010 530dfe64dd3Smacallan#define DisableRelocateIO 0x0020 531dfe64dd3Smacallan#define Win9xDOSMode 0x0040 532dfe64dd3Smacallan#define GatingCRT 0x0800 533dfe64dd3Smacallan#define DisableChB 0x1000 534dfe64dd3Smacallan#define EnableChB 0x2000 535dfe64dd3Smacallan#define DisableChA 0x4000 536dfe64dd3Smacallan#define EnableChA 0x8000 537dfe64dd3Smacallan 538dfe64dd3Smacallan#define SetNTSCTV 0x0000 /* TV Info */ 539dfe64dd3Smacallan#define SetPALTV 0x0001 540dfe64dd3Smacallan#define SetNTSCJ 0x0002 541dfe64dd3Smacallan#define SetPALMTV 0x0004 542dfe64dd3Smacallan#define SetPALNTV 0x0008 543dfe64dd3Smacallan#define SetCHTVUnderScan 0x0000 544dfe64dd3Smacallan/* #define SetCHTVOverScan 0x0010 */ 545dfe64dd3Smacallan#define SetYPbPrMode525i 0x0020 546dfe64dd3Smacallan#define SetYPbPrMode525p 0x0040 547dfe64dd3Smacallan#define SetYPbPrMode750p 0x0080 548dfe64dd3Smacallan#define SetYPbPrMode1080i 0x0100 549dfe64dd3Smacallan#define SetTVStdMode 0x0200 550dfe64dd3Smacallan#define SetTVLowResolution 0x0400 551dfe64dd3Smacallan#define SetTVSimuMode 0x0800 552dfe64dd3Smacallan#define TVSimuMode 0x0800 553dfe64dd3Smacallan#define RPLLDIV2XO 0x1000 554dfe64dd3Smacallan#define NTSC1024x768 0x2000 555dfe64dd3Smacallan#define SetTVLockMode 0x4000 556dfe64dd3Smacallan 557dfe64dd3Smacallan#define LCDVESATiming 0x0001 /* LCD Info/CR37 */ 558dfe64dd3Smacallan#define EnableLVDSDDA 0x0002 559dfe64dd3Smacallan#define EnableScalingLCD 0x0008 560dfe64dd3Smacallan#define SetPWDEnable 0x0004 561dfe64dd3Smacallan#define SetLCDtoNonExpanding 0x0010 562dfe64dd3Smacallan#define SetLCDPolarity 0x00e0 563dfe64dd3Smacallan#define SetLCDDualLink 0x0100 564dfe64dd3Smacallan#define SetLCDLowResolution 0x0200 565dfe64dd3Smacallan#define SetLCDStdMode 0x0400 566dfe64dd3Smacallan#define EnableReduceTiming 0x0800 567dfe64dd3Smacallan 568dfe64dd3Smacallan#define DefaultLCDCap 0x80ea /* LCD Capability shampoo */ 569dfe64dd3Smacallan#define RLVDSDHL00 0x0000 570dfe64dd3Smacallan#define RLVDSDHL01 0x0001 571dfe64dd3Smacallan#define RLVDSDHL10 0x0002 /* default */ 572dfe64dd3Smacallan#define RLVDSDHL11 0x0003 573dfe64dd3Smacallan#define EnableLCD24bpp 0x0004 /* default */ 574dfe64dd3Smacallan#define DisableLCD24bpp 0x0000 575dfe64dd3Smacallan#define RLVDSClkSFT0 0x0000 576dfe64dd3Smacallan#define RLVDSClkSFT1 0x0008 /* default */ 577dfe64dd3Smacallan#define EnableLVDSDCBal 0x0010 578dfe64dd3Smacallan#define DisableLVDSDCBal 0x0000 /* default */ 579dfe64dd3Smacallan#define SinglePolarity 0x0020 /* default */ 580dfe64dd3Smacallan#define MultiPolarity 0x0000 581dfe64dd3Smacallan#define LCDPolarity 0x00c0 /* default: SyncNN */ 582dfe64dd3Smacallan#define LCDSingleLink 0x0000 /* default */ 583dfe64dd3Smacallan#define LCDDualLink 0x0100 584dfe64dd3Smacallan#define EnableSpectrum 0x0200 585dfe64dd3Smacallan#define DisableSpectrum 0x0000 /* default */ 586dfe64dd3Smacallan#define PWDEnable 0x0400 587dfe64dd3Smacallan#define PWDDisable 0x0000 /* default */ 588dfe64dd3Smacallan#define PWMEnable 0x0800 589dfe64dd3Smacallan#define PWMDisable 0x0000 /* default */ 590dfe64dd3Smacallan#define EnableVBCLKDRVLOW 0x4000 591dfe64dd3Smacallan#define EnableVBCLKDRVHigh 0x0000 /* default */ 592dfe64dd3Smacallan#define EnablePLLSPLOW 0x8000 593dfe64dd3Smacallan#define EnablePLLSPHigh 0x0000 /* default */ 594dfe64dd3Smacallan 595dfe64dd3Smacallan#define LCDBToA 0x20 /* LCD SetFlag */ 596dfe64dd3Smacallan#define StLCDBToA 0x40 597dfe64dd3Smacallan#define LockLCDBToA 0x80 598dfe64dd3Smacallan#define LCDToFull 0x10 599dfe64dd3Smacallan#define AVIDEOSense 0x01 /* CR32 */ 600dfe64dd3Smacallan#define SVIDEOSense 0x02 601dfe64dd3Smacallan#define SCARTSense 0x04 602dfe64dd3Smacallan#define LCDSense 0x08 603dfe64dd3Smacallan#define Monitor2Sense 0x10 604dfe64dd3Smacallan#define Monitor1Sense 0x20 605dfe64dd3Smacallan#define HiTVSense 0x40 606dfe64dd3Smacallan 607dfe64dd3Smacallan#ifdef NewScratch 608dfe64dd3Smacallan#define YPbPrSense 0x80 /* NEW SCRATCH */ 609dfe64dd3Smacallan#endif 610dfe64dd3Smacallan 611dfe64dd3Smacallan#define TVSense 0xc7 612dfe64dd3Smacallan 613dfe64dd3Smacallan/** 614dfe64dd3Smacallan * CR35 (661 series only) 615dfe64dd3Smacallan * 616dfe64dd3Smacallan * [0] 1 = PAL, 0 = NTSC 617dfe64dd3Smacallan * [1] 1 = NTSC-J (if D0 = 0) 618dfe64dd3Smacallan * [2] 1 = PALM (if D0 = 1) 619dfe64dd3Smacallan * [3] 1 = PALN (if D0 = 1) 620dfe64dd3Smacallan * [4] 1 = Overscan (Chrontel only) 621dfe64dd3Smacallan * [7:5] (only if D2 in CR38 is set) 622dfe64dd3Smacallan * 000 525i 623dfe64dd3Smacallan * 001 525p 624dfe64dd3Smacallan * 010 750p 625dfe64dd3Smacallan * 011 1080i (or HiVision on 301, 301B) 626dfe64dd3Smacallan * 627dfe64dd3Smacallan * These bits are being translated to TVMode flag. 628dfe64dd3Smacallan */ 629dfe64dd3Smacallan#define TVOverScan 0x10 630dfe64dd3Smacallan#define TVOverScanShift 4 631dfe64dd3Smacallan 632dfe64dd3Smacallan#ifdef NewScratch 633dfe64dd3Smacallan#define NTSCMode 0x00 634dfe64dd3Smacallan#define PALMode 0x00 635dfe64dd3Smacallan#define NTSCJMode 0x02 636dfe64dd3Smacallan#define PALMNMode 0x0c 637dfe64dd3Smacallan#define YPbPrMode 0xe0 638dfe64dd3Smacallan#define YPbPrMode525i 0x00 639dfe64dd3Smacallan#define YPbPrMode525p 0x20 640dfe64dd3Smacallan#define YPbPrMode750p 0x40 641dfe64dd3Smacallan#define YPbPrMode1080i 0x60 642dfe64dd3Smacallan#else /* Old Scratch */ 643dfe64dd3Smacallan#define ClearBufferFlag 0x20 644dfe64dd3Smacallan#endif 645dfe64dd3Smacallan 646dfe64dd3Smacallan 647dfe64dd3Smacallan/** 648dfe64dd3Smacallan * CR37 649dfe64dd3Smacallan * 650dfe64dd3Smacallan * [0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS) 651dfe64dd3Smacallan * [3:1] External chip 652dfe64dd3Smacallan * 660 series [2:1] only: 653dfe64dd3Smacallan * reserved (now in CR38) 654dfe64dd3Smacallan * All other combinations reserved 655dfe64dd3Smacallan * [3] 661 only: Pass 1:1 data 656dfe64dd3Smacallan * [4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand 657dfe64dd3Smacallan * 30x: 0: Bridge scales / 1: Bridge does not scale = Panel scales (if possible) 658dfe64dd3Smacallan * [5] LCD polarity select 659dfe64dd3Smacallan * 0: VESA DMT Standard 660dfe64dd3Smacallan * 1: EDID 2.x defined 661dfe64dd3Smacallan * [6] LCD horizontal polarity select 662dfe64dd3Smacallan * 0: High active 663dfe64dd3Smacallan * 1: Low active 664dfe64dd3Smacallan * [7] LCD vertical polarity select 665dfe64dd3Smacallan * 0: High active 666dfe64dd3Smacallan * 1: Low active 667dfe64dd3Smacallan */ 668dfe64dd3Smacallan#define ExtChipTrumpion 0x0006 /**< Is this actually CR38? */ 669dfe64dd3Smacallan#define ExtChipMitacTV 0x000a /**< Is this actually CR38? */ 670dfe64dd3Smacallan#define LCDRGB18Bit 0x0001 671dfe64dd3Smacallan#define ScalingLCD 0x0008 672dfe64dd3Smacallan#define LCDNonExpanding 0x0010 673dfe64dd3Smacallan#define LCDNonExpandingShift 4 674dfe64dd3Smacallan#define LCDSync 0x0020 675dfe64dd3Smacallan#define LCDSyncBit 0x00e0 /* H/V polarity & sync ID */ 676dfe64dd3Smacallan#define LCDSyncShift 6 677dfe64dd3Smacallan#define LCDPass11 0x0100 /* 0: center screen, 1: Pass 1:1 data */ 678dfe64dd3Smacallan 679dfe64dd3Smacallan#define DontExpandLCD LCDNonExpanding 680dfe64dd3Smacallan#define DontExpandLCDShift LCDNonExpandingShift 681dfe64dd3Smacallan 682dfe64dd3Smacallan 683dfe64dd3Smacallan/** 684dfe64dd3Smacallan * CR38 (661 and later) 685dfe64dd3Smacallan * 686dfe64dd3Smacallan * D[7:5] 000 No VB 687dfe64dd3Smacallan * 001 301 series VB 688dfe64dd3Smacallan * 010 LVDS 689dfe64dd3Smacallan * 011 Chrontel 7019 690dfe64dd3Smacallan * 100 Conexant 691dfe64dd3Smacallan * D2 Enable YPbPr output (see CR35) 692dfe64dd3Smacallan * D[1:0] LCDA (like before) 693dfe64dd3Smacallan */ 694dfe64dd3Smacallan#define EnableDualEdge 0x01 /* CR38 */ 695dfe64dd3Smacallan#define SetToLCDA 0x02 696dfe64dd3Smacallan#ifdef NewScratch 697dfe64dd3Smacallan#define SetYPbPr 0x04 698dfe64dd3Smacallan#define DisableChannelA 0x08 699dfe64dd3Smacallan#define DisableChannelB 0x10 700dfe64dd3Smacallan#define ExtChipType 0xe0 701dfe64dd3Smacallan#define ExtChip301 0x20 702dfe64dd3Smacallan#define ExtChipLVDS 0x40 703dfe64dd3Smacallan#define ExtChipCH7019 0x60 704dfe64dd3Smacallan#else /* Old Scratch */ 705dfe64dd3Smacallan#define YPbPrSense 0x04 706dfe64dd3Smacallan#define SetYPbPr 0x08 707dfe64dd3Smacallan#define YPbPrMode 0x30 708dfe64dd3Smacallan#define YPbPrMode525i 0x00 709dfe64dd3Smacallan#define YPbPrMode525p 0x10 710dfe64dd3Smacallan#define YPbPrMode750p 0x20 711dfe64dd3Smacallan#define YPbPrMode1080i 0x30 712dfe64dd3Smacallan#define PALMNMode 0xc0 713dfe64dd3Smacallan#endif 714dfe64dd3Smacallan 715dfe64dd3Smacallan/** 716dfe64dd3Smacallan * CR39 (661 and later) 717dfe64dd3Smacallan * 718dfe64dd3Smacallan * D[1:0] YPbPr Aspect Ratio 719dfe64dd3Smacallan * 00 4:3 letterbox 720dfe64dd3Smacallan * 01 4:3 721dfe64dd3Smacallan * 10 16:9 722dfe64dd3Smacallan * 11 4:3 723dfe64dd3Smacallan */ 724dfe64dd3Smacallan#define ReduceTiming 0x0001 725dfe64dd3Smacallan 726dfe64dd3Smacallan#define BacklightControlBit 0x01 /* CR3A */ 727dfe64dd3Smacallan#define Win9xforJap 0x40 728dfe64dd3Smacallan#define Win9xforKorea 0x80 729dfe64dd3Smacallan 730dfe64dd3Smacallan#define ForceMDBits 0x07 /* CR3B */ 731dfe64dd3Smacallan#define ForceMD_JDOS 0x00 732dfe64dd3Smacallan#define ForceMD_640x400T 0x01 733dfe64dd3Smacallan#define ForceMD_640x350T 0x02 734dfe64dd3Smacallan#define ForceMD_720x400T 0x03 735dfe64dd3Smacallan#define ForceMD_640x480E 0x04 736dfe64dd3Smacallan#define ForceMD_640x400E 0x05 737dfe64dd3Smacallan#define ForceP1Bit 0x10 738dfe64dd3Smacallan#define ForceP2Bit 0x20 739dfe64dd3Smacallan#define EnableForceMDinBIOS 0x40 740dfe64dd3Smacallan#define EnableForceMDinDrv 0x80 741dfe64dd3Smacallan 742dfe64dd3Smacallan#ifdef NewScratch /* New Scratch */ 743dfe64dd3Smacallan/* ---------------------- VUMA Information */ 744dfe64dd3Smacallan#define LCDSettingFromCMOS 0x04 /* CR3C */ 745dfe64dd3Smacallan#define TVSettingFromCMOS 0x08 746dfe64dd3Smacallan#define DisplayDeviceFromCMOS 0x10 747dfe64dd3Smacallan#define HKSupportInSBIOS 0x20 748dfe64dd3Smacallan#define OSDSupportInSBIOS 0x40 749dfe64dd3Smacallan#define DisableLogo 0x80 750dfe64dd3Smacallan 751dfe64dd3Smacallan/* ---------------------- HK Evnet Definition */ 752dfe64dd3Smacallan#define HKEvent 0x0f /* CR3D */ 753dfe64dd3Smacallan#define HK_ModeSwitch 0x01 754dfe64dd3Smacallan#define HK_Expanding 0x02 755dfe64dd3Smacallan#define HK_OverScan 0x03 756dfe64dd3Smacallan#define HK_Brightness 0x04 757dfe64dd3Smacallan#define HK_Contrast 0x05 758dfe64dd3Smacallan#define HK_Mute 0x06 759dfe64dd3Smacallan#define HK_Volume 0x07 760dfe64dd3Smacallan#define ModeSwitchStatus 0xf0 761dfe64dd3Smacallan#define ActiveCRT1 0x10 762dfe64dd3Smacallan#define ActiveLCD 0x20 763dfe64dd3Smacallan#define ActiveTV 0x40 764dfe64dd3Smacallan#define ActiveCRT2 0x80 765dfe64dd3Smacallan 766dfe64dd3Smacallan#define TVSwitchStatus 0x1f /* CR3E */ 767dfe64dd3Smacallan#define ActiveAVideo 0x01 768dfe64dd3Smacallan#define ActiveSVideo 0x02 769dfe64dd3Smacallan#define ActiveSCART 0x04 770dfe64dd3Smacallan#define ActiveHiTV 0x08 771dfe64dd3Smacallan#define ActiveYPbPr 0x10 772dfe64dd3Smacallan 773dfe64dd3Smacallan#define EnableHKEvent 0x01 /* CR3F */ 774dfe64dd3Smacallan#define EnableOSDEvent 0x02 775dfe64dd3Smacallan#define StartOSDEvent 0x04 776dfe64dd3Smacallan#define IgnoreHKEvent 0x08 777dfe64dd3Smacallan#define IgnoreOSDEvent 0x10 778dfe64dd3Smacallan#else /* Old Scratch */ 779dfe64dd3Smacallan#define OSD_SBIOS 0x02 /* SR17 */ 780dfe64dd3Smacallan#define DisableLogo 0x04 781dfe64dd3Smacallan#define SelectKDOS 0x08 782dfe64dd3Smacallan#define KorWinMode 0x10 783dfe64dd3Smacallan#define KorMode3Bit 0x0020 784dfe64dd3Smacallan#define PSCCtrlBit 0x40 785dfe64dd3Smacallan#define NPSCCtrlBitShift 6 786dfe64dd3Smacallan#define BlueScreenBit 0x80 787dfe64dd3Smacallan 788dfe64dd3Smacallan#define HKEvent 0x0f /* CR79 */ 789dfe64dd3Smacallan#define HK_ModeSwitch 0x01 790dfe64dd3Smacallan#define HK_Expanding 0x02 791dfe64dd3Smacallan#define HK_OverScan 0x03 792dfe64dd3Smacallan#define HK_Brightness 0x04 793dfe64dd3Smacallan#define HK_Contrast 0x05 794dfe64dd3Smacallan#define HK_Mute 0x06 795dfe64dd3Smacallan#define HK_Volume 0x07 796dfe64dd3Smacallan#define ActivePAL 0x20 797dfe64dd3Smacallan#define ActivePALShift 5 798dfe64dd3Smacallan#define ActiveNonExpanding 0x40 799dfe64dd3Smacallan#define ActiveNonExpandingShift 6 800dfe64dd3Smacallan#define ActiveOverScan 0x80 801dfe64dd3Smacallan#define ActiveOverScanShift 7 802dfe64dd3Smacallan 803dfe64dd3Smacallan#define ModeSwitchStatus 0x0b /* SR15 */ 804dfe64dd3Smacallan#define ActiveCRT1 0x01 805dfe64dd3Smacallan#define ActiveLCD 0x02 806dfe64dd3Smacallan#define ActiveCRT2 0x08 807dfe64dd3Smacallan 808dfe64dd3Smacallan#define TVSwitchStatus 0xf0 /* SR16 */ 809dfe64dd3Smacallan#define TVConfigShift 3 810dfe64dd3Smacallan#define ActiveTV 0x01 811dfe64dd3Smacallan#define ActiveYPbPr 0x04 812dfe64dd3Smacallan#define ActiveAVideo 0x10 813dfe64dd3Smacallan#define ActiveSVideo 0x0020 814dfe64dd3Smacallan#define ActiveSCART 0x40 815dfe64dd3Smacallan#define ActiveHiTV 0x80 816dfe64dd3Smacallan 817dfe64dd3Smacallan#define EnableHKEvent 0x01 /* CR7A */ 818dfe64dd3Smacallan#define EnableOSDEvent 0x02 819dfe64dd3Smacallan#define StartOSDEvent 0x04 820dfe64dd3Smacallan#define CMOSSupport 0x08 821dfe64dd3Smacallan#define HotKeySupport 0x10 822dfe64dd3Smacallan#define IngoreHKOSDEvent 0x20 823dfe64dd3Smacallan#endif 824dfe64dd3Smacallan 825dfe64dd3Smacallan/* //------------- Misc. Definition */ 826dfe64dd3Smacallan#define SelectCRT1Rate 00h 827dfe64dd3Smacallan/* #define SelectCRT2Rate 04h */ 828dfe64dd3Smacallan 829dfe64dd3Smacallan#define DDC1DelayTime 1000 830dfe64dd3Smacallan#ifdef TRUMPION 831dfe64dd3Smacallan#define DDC2DelayTime 15 832dfe64dd3Smacallan#else 833dfe64dd3Smacallan#define DDC2DelayTime 150 834dfe64dd3Smacallan#endif 835dfe64dd3Smacallan 836dfe64dd3Smacallan#define R_FACTOR 04Dh 837dfe64dd3Smacallan#define G_FACTOR 097h 838dfe64dd3Smacallan#define B_FACTOR 01Ch 839dfe64dd3Smacallan/* --------------------------------------------------------- */ 840dfe64dd3Smacallan/* translated from asm code 301def.h */ 841dfe64dd3Smacallan/* */ 842dfe64dd3Smacallan/* --------------------------------------------------------- */ 843dfe64dd3Smacallan#define LCDDataLen 8 844dfe64dd3Smacallan#define HiTVDataLen 12 845dfe64dd3Smacallan#define TVDataLen 12 846dfe64dd3Smacallan#define LVDSCRT1Len_H 8 847dfe64dd3Smacallan#define LVDSCRT1Len_V 7 848dfe64dd3Smacallan#define LVDSDataLen 6 849dfe64dd3Smacallan#define LVDSDesDataLen 6 850dfe64dd3Smacallan#define LCDDesDataLen 6 851dfe64dd3Smacallan#define LVDSDesDataLen2 8 852dfe64dd3Smacallan#define LCDDesDataLen2 8 853dfe64dd3Smacallan#define CHTVRegLen 16 854dfe64dd3Smacallan#define CHLVRegLen 12 855dfe64dd3Smacallan 856dfe64dd3Smacallan#define StHiTVHT 892 857dfe64dd3Smacallan#define StHiTVVT 1126 858dfe64dd3Smacallan#define StHiTextTVHT 1000 859dfe64dd3Smacallan#define StHiTextTVVT 1126 860dfe64dd3Smacallan#define ExtHiTVHT 2100 861dfe64dd3Smacallan#define ExtHiTVVT 1125 862dfe64dd3Smacallan#define NTSCHT 1716 863dfe64dd3Smacallan#define NTSCVT 525 864dfe64dd3Smacallan#define NTSC1024x768HT 1908 865dfe64dd3Smacallan#define NTSC1024x768VT 525 866dfe64dd3Smacallan#define PALHT 1728 867dfe64dd3Smacallan#define PALVT 625 868dfe64dd3Smacallan 869dfe64dd3Smacallan#define YPbPrTV525iHT 1716 /* YPbPr */ 870dfe64dd3Smacallan#define YPbPrTV525iVT 525 871dfe64dd3Smacallan#define YPbPrTV525pHT 1716 872dfe64dd3Smacallan#define YPbPrTV525pVT 525 873dfe64dd3Smacallan#define YPbPrTV750pHT 1650 874dfe64dd3Smacallan#define YPbPrTV750pVT 750 875dfe64dd3Smacallan 876dfe64dd3Smacallan#define CRT2VCLKSel 0xc0 877dfe64dd3Smacallan 878dfe64dd3Smacallan#define CRT2Delay1 0x04 /* XGI301 */ 879dfe64dd3Smacallan#define CRT2Delay2 0x0A /* 301B,302 */ 880dfe64dd3Smacallan 881dfe64dd3Smacallan 882dfe64dd3Smacallan#define VCLK25_175 0x00 883dfe64dd3Smacallan#define VCLK28_322 0x01 884dfe64dd3Smacallan#define VCLK31_5 0x02 885dfe64dd3Smacallan#define VCLK36 0x03 886dfe64dd3Smacallan#define VCLK40 0x04 887dfe64dd3Smacallan#define VCLK43_163 0x05 888dfe64dd3Smacallan#define VCLK44_9 0x06 889dfe64dd3Smacallan#define VCLK49_5 0x07 890dfe64dd3Smacallan#define VCLK50 0x08 891dfe64dd3Smacallan#define VCLK52_406 0x09 892dfe64dd3Smacallan#define VCLK56_25 0x0A 893dfe64dd3Smacallan#define VCLK65 0x0B 894dfe64dd3Smacallan#define VCLK67_765 0x0C 895dfe64dd3Smacallan#define VCLK68_179 0x0D 896dfe64dd3Smacallan#define VCLK72_852 0x0E 897dfe64dd3Smacallan#define VCLK75 0x0F 898dfe64dd3Smacallan#define VCLK75_8 0x10 899dfe64dd3Smacallan#define VCLK78_75 0x11 900dfe64dd3Smacallan#define VCLK79_411 0x12 901dfe64dd3Smacallan#define VCLK83_95 0x13 902dfe64dd3Smacallan#define VCLK84_8 0x14 903dfe64dd3Smacallan#define VCLK86_6 0x15 904dfe64dd3Smacallan#define VCLK94_5 0x16 905dfe64dd3Smacallan#define VCLK104_998 0x17 906dfe64dd3Smacallan#define VCLK105_882 0x18 907dfe64dd3Smacallan#define VCLK108_2 0x19 908dfe64dd3Smacallan#define VCLK109_175 0x1A 909dfe64dd3Smacallan#define VCLK113_309 0x1B 910dfe64dd3Smacallan#define VCLK116_406 0x1C 911dfe64dd3Smacallan#define VCLK132_258 0x1D 912dfe64dd3Smacallan#define VCLK135_5 0x1E 913dfe64dd3Smacallan#define VCLK139_054 0x1F 914dfe64dd3Smacallan#define VCLK157_5 0x20 915dfe64dd3Smacallan#define VCLK162 0x21 916dfe64dd3Smacallan#define VCLK175 0x22 917dfe64dd3Smacallan#define VCLK189 0x23 918dfe64dd3Smacallan#define VCLK194_4 0x24 919dfe64dd3Smacallan#define VCLK202_5 0x25 920dfe64dd3Smacallan#define VCLK229_5 0x26 921dfe64dd3Smacallan#define VCLK234 0x27 922dfe64dd3Smacallan#define VCLK252_699 0x28 923dfe64dd3Smacallan#define VCLK254_817 0x29 924dfe64dd3Smacallan#define VCLK265_728 0x2A 925dfe64dd3Smacallan#define VCLK266_952 0x2B 926dfe64dd3Smacallan#define VCLK269_655 0x2C 927dfe64dd3Smacallan#define VCLK272_042 0x2D 928dfe64dd3Smacallan#define VCLK277_015 0x2E 929dfe64dd3Smacallan#define VCLK286_359 0x2F 930dfe64dd3Smacallan#define VCLK291_132 0x30 931dfe64dd3Smacallan#define VCLK291_766 0x31 932dfe64dd3Smacallan#define VCLK309_789 0x32 933dfe64dd3Smacallan#define VCLK315_195 0x33 934dfe64dd3Smacallan#define VCLK323_586 0x34 935dfe64dd3Smacallan#define VCLK330_615 0x35 936dfe64dd3Smacallan#define VCLK332_177 0x36 937dfe64dd3Smacallan#define VCLK340_477 0x37 938dfe64dd3Smacallan#define VCLK375_847 0x38 939dfe64dd3Smacallan#define VCLK388_631 0x39 940dfe64dd3Smacallan#define VCLK125_999 0x51 941dfe64dd3Smacallan#define VCLK148_5 0x52 942dfe64dd3Smacallan#define VCLK178_992 0x54 943dfe64dd3Smacallan#define VCLK217_325 0x55 944dfe64dd3Smacallan#define VCLK299_505 0x56 945dfe64dd3Smacallan#define YPbPr750pVCLK 0x57 946dfe64dd3Smacallan 947dfe64dd3Smacallan#define TVVCLKDIV2 0x3A 948dfe64dd3Smacallan#define TVVCLK 0x3B 949dfe64dd3Smacallan#define HiTVVCLKDIV2 0x3C 950dfe64dd3Smacallan#define HiTVVCLK 0x3D 951dfe64dd3Smacallan#define HiTVSimuVCLK 0x3E 952dfe64dd3Smacallan#define HiTVTextVCLK 0x3F 953dfe64dd3Smacallan#define VCLK39_77 0x40 954dfe64dd3Smacallan/* #define YPbPr750pVCLK 0x0F */ 955dfe64dd3Smacallan#define YPbPr525pVCLK 0x3A 956dfe64dd3Smacallan/* #define ;;YPbPr525iVCLK 0x3B */ 957dfe64dd3Smacallan/* #define ;;YPbPr525iVCLK_2 0x3A */ 958dfe64dd3Smacallan#define NTSC1024VCLK 0x41 959dfe64dd3Smacallan#define VCLK25_175_41 0x42 /* ; ScaleLCD */ 960dfe64dd3Smacallan#define VCLK25_175_42 0x43 961dfe64dd3Smacallan#define VCLK28_322_43 0x44 962dfe64dd3Smacallan#define VCLK40_44 0x45 963dfe64dd3Smacallan#define VCLKQVGA_1 0x46 /* ; QVGA */ 964dfe64dd3Smacallan#define VCLKQVGA_2 0x47 965dfe64dd3Smacallan#define VCLKQVGA_3 0x48 966dfe64dd3Smacallan#define VCLK35_2 0x49 /* ; 800x480 */ 967dfe64dd3Smacallan#define VCLK122_61 0x4A 968dfe64dd3Smacallan#define VCLK80_350 0x4B 969dfe64dd3Smacallan#define VCLK107_385 0x4C 970dfe64dd3Smacallan 971dfe64dd3Smacallan#define CHTVVCLK30_2 0x50 /* ;;CHTV */ 972dfe64dd3Smacallan#define CHTVVCLK28_1 0x51 973dfe64dd3Smacallan#define CHTVVCLK43_6 0x52 974dfe64dd3Smacallan#define CHTVVCLK26_4 0x53 975dfe64dd3Smacallan#define CHTVVCLK24_6 0x54 976dfe64dd3Smacallan#define CHTVVCLK47_8 0x55 977dfe64dd3Smacallan#define CHTVVCLK31_5 0x56 978dfe64dd3Smacallan#define CHTVVCLK26_2 0x57 979dfe64dd3Smacallan#define CHTVVCLK39 0x58 980dfe64dd3Smacallan#define CHTVVCLK36 0x59 981dfe64dd3Smacallan 982dfe64dd3Smacallan/* Jong 10/04/2007; merge code */ 983dfe64dd3Smacallan#define CH7007TVVCLK30_2 0x00 /* [Billy] 2007/05/18 For CH7007 */ 984dfe64dd3Smacallan#define CH7007TVVCLK28_1 0x01 985dfe64dd3Smacallan#define CH7007TVVCLK43_6 0x02 986dfe64dd3Smacallan#define CH7007TVVCLK26_4 0x03 987dfe64dd3Smacallan#define CH7007TVVCLK24_6 0x04 988dfe64dd3Smacallan#define CH7007TVVCLK47_8 0x05 989dfe64dd3Smacallan#define CH7007TVVCLK31_5 0x06 990dfe64dd3Smacallan#define CH7007TVVCLK26_2 0x07 991dfe64dd3Smacallan#define CH7007TVVCLK39 0x08 992dfe64dd3Smacallan#define CH7007TVVCLK36 0x09 993dfe64dd3Smacallan 994dfe64dd3Smacallan#define RES320x200 0x00 995dfe64dd3Smacallan#define RES320x240 0x01 996dfe64dd3Smacallan#define RES400x300 0x02 997dfe64dd3Smacallan#define RES512x384 0x03 998dfe64dd3Smacallan#define RES640x400 0x04 999dfe64dd3Smacallan#define RES640x480x60 0x05 1000dfe64dd3Smacallan#define RES640x480x72 0x06 1001dfe64dd3Smacallan#define RES640x480x75 0x07 1002dfe64dd3Smacallan#define RES640x480x85 0x08 1003dfe64dd3Smacallan#define RES640x480x100 0x09 1004dfe64dd3Smacallan#define RES640x480x120 0x0A 1005dfe64dd3Smacallan#define RES640x480x160 0x0B 1006dfe64dd3Smacallan#define RES640x480x200 0x0C 1007dfe64dd3Smacallan#define RES800x600x56 0x0D 1008dfe64dd3Smacallan#define RES800x600x60 0x0E 1009dfe64dd3Smacallan#define RES800x600x72 0x0F 1010dfe64dd3Smacallan#define RES800x600x75 0x10 1011dfe64dd3Smacallan#define RES800x600x85 0x11 1012dfe64dd3Smacallan#define RES800x600x100 0x12 1013dfe64dd3Smacallan#define RES800x600x120 0x13 1014dfe64dd3Smacallan#define RES800x600x160 0x14 1015dfe64dd3Smacallan#define RES1024x768x43 0x15 1016dfe64dd3Smacallan#define RES1024x768x60 0x16 1017dfe64dd3Smacallan#define RES1024x768x70 0x17 1018dfe64dd3Smacallan#define RES1024x768x75 0x18 1019dfe64dd3Smacallan#define RES1024x768x85 0x19 1020dfe64dd3Smacallan#define RES1024x768x100 0x1A 1021dfe64dd3Smacallan#define RES1024x768x120 0x1B 1022dfe64dd3Smacallan#define RES1280x1024x43 0x1C 1023dfe64dd3Smacallan#define RES1280x1024x60 0x1D 1024dfe64dd3Smacallan#define RES1280x1024x75 0x1E 1025dfe64dd3Smacallan#define RES1280x1024x85 0x1F 1026dfe64dd3Smacallan#define RES1600x1200x60 0x20 1027dfe64dd3Smacallan#define RES1600x1200x65 0x21 1028dfe64dd3Smacallan#define RES1600x1200x70 0x22 1029dfe64dd3Smacallan#define RES1600x1200x75 0x23 1030dfe64dd3Smacallan#define RES1600x1200x85 0x24 1031dfe64dd3Smacallan#define RES1600x1200x100 0x25 1032dfe64dd3Smacallan#define RES1600x1200x120 0x26 1033dfe64dd3Smacallan#define RES1920x1440x60 0x27 1034dfe64dd3Smacallan#define RES1920x1440x65 0x28 1035dfe64dd3Smacallan#define RES1920x1440x70 0x29 1036dfe64dd3Smacallan#define RES1920x1440x75 0x2A 1037dfe64dd3Smacallan#define RES1920x1440x85 0x2B 1038dfe64dd3Smacallan#define RES1920x1440x100 0x2C 1039dfe64dd3Smacallan#define RES2048x1536x60 0x2D 1040dfe64dd3Smacallan#define RES2048x1536x65 0x2E 1041dfe64dd3Smacallan#define RES2048x1536x70 0x2F 1042dfe64dd3Smacallan#define RES2048x1536x75 0x30 1043dfe64dd3Smacallan#define RES2048x1536x85 0x31 1044dfe64dd3Smacallan#define RES800x480x60 0x32 1045dfe64dd3Smacallan#define RES800x480x75 0x33 1046dfe64dd3Smacallan#define RES800x480x85 0x34 1047dfe64dd3Smacallan#define RES1024x576x60 0x35 1048dfe64dd3Smacallan#define RES1024x576x75 0x36 1049dfe64dd3Smacallan#define RES1024x576x85 0x37 1050dfe64dd3Smacallan#define RES1280x720x60 0x38 1051dfe64dd3Smacallan#define RES1280x720x75 0x39 1052dfe64dd3Smacallan#define RES1280x720x85 0x3A 1053dfe64dd3Smacallan#define RES1280x960x60 0x3B 1054dfe64dd3Smacallan#define RES720x480x60 0x3C 1055dfe64dd3Smacallan#define RES720x576x56 0x3D 1056dfe64dd3Smacallan#define RES856x480x79I 0x3E 1057dfe64dd3Smacallan#define RES856x480x60 0x3F 1058dfe64dd3Smacallan#define RES1280x768x60 0x40 1059dfe64dd3Smacallan#define RES1400x1050x60 0x41 1060dfe64dd3Smacallan#define RES1152x864x60 0x42 1061dfe64dd3Smacallan#define RES1152x864x75 0x43 1062dfe64dd3Smacallan#define RES1024x768x160 0x44 1063dfe64dd3Smacallan#define RES1280x960x75 0x45 1064dfe64dd3Smacallan#define RES1280x960x85 0x46 1065dfe64dd3Smacallan#define RES1280x960x120 0x47 1066dfe64dd3Smacallan 1067dfe64dd3Smacallan#define LFBDRAMTrap 0x30 1068dfe64dd3Smacallan 1069dfe64dd3Smacallan/** 1070dfe64dd3Smacallan * SR1E - Module enable register 1071dfe64dd3Smacallan */ 1072dfe64dd3Smacallan#define SR1E_ENABLE_3D_TRANSFORM_ENGINE (1<<7) 1073dfe64dd3Smacallan#define SR1E_ENABLE_2D (1<<6) 1074dfe64dd3Smacallan#define SR1E_ENABLE_CRT2 (1<<5) 1075dfe64dd3Smacallan#define SR1E_ENABLE_3D_AGP_VERTEX_FETCH (1<<4) 1076dfe64dd3Smacallan#define SR1E_ENABLE_3D_COMMAND_PARSER (1<<3) 1077dfe64dd3Smacallan#define SR1E_ENABLE_VGA_BIOS_WRITE (1<<2) 1078dfe64dd3Smacallan#define SR1E_ENABLE_3D (1<<1) 1079dfe64dd3Smacallan#define SR1E_ENABLE_MPEG (1<<0) 1080dfe64dd3Smacallan 1081dfe64dd3Smacallan/** 1082dfe64dd3Smacallan * MMIO 85CC - command queue read pointer 1083dfe64dd3Smacallan */ 1084dfe64dd3Smacallan#define IDLE_ALL (1 << 31) /**< 3D & 2D idle, HQ & SQ empty */ 1085dfe64dd3Smacallan#define EMPTY_HQ (1 << 30) /**< HQ empty */ 1086dfe64dd3Smacallan#define IDLE_2D (1 << 29) /**< 2D idle */ 1087dfe64dd3Smacallan#define IDLE_3D (1 << 28) /**< 3D idle */ 1088dfe64dd3Smacallan#define EMPTY_HW_CQ (1 << 27) /**< Hardware command queue empty */ 1089dfe64dd3Smacallan#define EMPTY_2D (1 << 26) /**< 2D queue empty */ 1090dfe64dd3Smacallan#define EMPTY_3D (1 << 25) /**< 3D queue empty */ 1091dfe64dd3Smacallan#define EMPTY_SW_CQ (1 << 24) /**< Software command queue empty */ 1092dfe64dd3Smacallan#define COUNTER_3_MASK (0xff << 16) 1093dfe64dd3Smacallan#define COUNTER_2_MASK (0xff << 8) 1094dfe64dd3Smacallan#define COUNTER_1_MASK (0xff << 0) 1095dfe64dd3Smacallan 1096dfe64dd3Smacallan#endif 1097