1706f2543Smrg#ifndef __MSP3430_H__
2706f2543Smrg#define __MSP3430_H__
3706f2543Smrg
4706f2543Smrg#include "xf86i2c.h"
5706f2543Smrg
6706f2543Smrgtypedef struct {
7706f2543Smrg        I2CDevRec d;
8706f2543Smrg
9706f2543Smrg	int standard;
10706f2543Smrg	int connector;
11706f2543Smrg	int mode;
12706f2543Smrg
13706f2543Smrg        CARD8 hardware_version, major_revision, product_code, rom_version;
14706f2543Smrg#ifdef MSP_DEBUG
15706f2543Smrg	CARD8 registers_present[256];
16706f2543Smrg#endif
17706f2543Smrg
18706f2543Smrg	CARD16 chip_id;
19706f2543Smrg	CARD8  chip_family;
20706f2543Smrg	Bool  recheck;		/*reinitialization needed after channel change */
21706f2543Smrg	CARD8 c_format;		/*current state of audio format */
22706f2543Smrg	CARD16 c_standard;	/*current state of standard register */
23706f2543Smrg	CARD8	c_source;	/*current state of source register */
24706f2543Smrg	CARD8	c_matrix;	/*current state of matrix register */
25706f2543Smrg	CARD8	c_fmmatrix;	/*current state of fmmatrix register */
26706f2543Smrg	int		c_mode;	/* current state of mode for autoswitchimg */
27706f2543Smrg	CARD8	volume;
28706f2543Smrg	} MSP3430Rec, * MSP3430Ptr;
29706f2543Smrg
30706f2543Smrg
31706f2543Smrg#define MSP3430_ADDR_1      0x80
32706f2543Smrg#define MSP3430_ADDR_2		0x84
33706f2543Smrg#define MSP3430_ADDR_3		0x88
34706f2543Smrg
35706f2543Smrg#define MSP3430_PAL		1
36706f2543Smrg#define MSP3430_NTSC		2
37706f2543Smrg#define MSP3430_PAL_DK1         (0x100 | MSP3430_PAL)
38706f2543Smrg#define MSP3430_SECAM           3
39706f2543Smrg
40706f2543Smrg#define MSP3430_CONNECTOR_1     1   /* tuner on AIW cards */
41706f2543Smrg#define MSP3430_CONNECTOR_2     2   /* SVideo on AIW cards */
42706f2543Smrg#define MSP3430_CONNECTOR_3     3   /* composite on AIW cards */
43706f2543Smrg
44706f2543Smrg#define MSP3430_ADDR(a)         ((a)->d.SlaveAddr)
45706f2543Smrg
46706f2543Smrg#define MSP3430_FAST_MUTE	0xFF
47706f2543Smrg/* a handy volume transform function, -1000..1000 -> 0x01..0x7F */
48706f2543Smrg#define MSP3430_VOLUME(value) (0x01+(0x7F-0x01)*log(value+1001)/log(2001))
49706f2543Smrg
50706f2543Smrg/*----------------------------------------------------------*/
51706f2543Smrg
52706f2543Smrg/* MSP chip families */
53706f2543Smrg#define MSPFAMILY_UNKNOWN	0
54706f2543Smrg#define MSPFAMILY_34x0D		1
55706f2543Smrg#define MSPFAMILY_34x5D		2
56706f2543Smrg#define MSPFAMILY_34x0G		3
57706f2543Smrg#define MSPFAMILY_34x5G		4
58706f2543Smrg
59706f2543Smrg/* values for MSP standard */
60706f2543Smrg#define MSPSTANDARD_UNKNOWN	0x00
61706f2543Smrg#define MSPSTANDARD_AUTO	0x01
62706f2543Smrg#define MSPSTANDARD_FM_M	0x02
63706f2543Smrg#define MSPSTANDARD_FM_BG	0x03
64706f2543Smrg#define MSPSTANDARD_FM_DK1	0x04
65706f2543Smrg#define MSPSTANDARD_FM_DK2	0x04
66706f2543Smrg#define MSPSTANDARD_NICAM_BG	0x08
67706f2543Smrg#define MSPSTANDARD_NICAM_L	0x09
68706f2543Smrg#define MSPSTANDARD_NICAM_I	0x0A
69706f2543Smrg#define MSPSTANDARD_NICAM_DK	0x0B
70706f2543Smrg
71706f2543Smrg/* values for MSP format */
72706f2543Smrg#define MSPFORMAT_UNKNOWN	0x00
73706f2543Smrg#define MSPFORMAT_FM		0x10
74706f2543Smrg#define MSPFORMAT_1xFM		0x00|MSPFORMAT_FM
75706f2543Smrg#define MSPFORMAT_2xFM		0x01|MSPFORMAT_FM
76706f2543Smrg#define MSPFORMAT_NICAM		0x20
77706f2543Smrg#define MSPFORMAT_NICAM_FM	0x00|MSPFORMAT_NICAM
78706f2543Smrg#define MSPFORMAT_NICAM_AM	0x01|MSPFORMAT_NICAM
79706f2543Smrg#define MSPFORMAT_SCART		0x30
80706f2543Smrg
81706f2543Smrg/* values for MSP mode */
82706f2543Smrg#define MSPMODE_UNKNOWN		0
83706f2543Smrg/* automatic modes */
84706f2543Smrg#define MSPMODE_STEREO_AB	1
85706f2543Smrg#define MSPMODE_STEREO_A	2
86706f2543Smrg#define MSPMODE_STEREO_B	3
87706f2543Smrg/* forced modes */
88706f2543Smrg#define MSPMODE_MONO		4
89706f2543Smrg#define MSPMODE_STEREO		5
90706f2543Smrg#define MSPMODE_AB			6
91706f2543Smrg#define MSPMODE_A			7
92706f2543Smrg#define MSPMODE_B			8
93706f2543Smrg/*----------------------------------------------------------*/
94706f2543Smrg
95706f2543Smrg#define xf86_InitMSP3430	InitMSP3430
96706f2543Smrgextern _X_EXPORT void InitMSP3430(MSP3430Ptr m);
97706f2543Smrg#define xf86_DetectMSP3430	DetectMSP3430
98706f2543Smrgextern _X_EXPORT MSP3430Ptr DetectMSP3430(I2CBusPtr b, I2CSlaveAddr addr);
99706f2543Smrg#define xf86_ResetMSP3430	ResetMSP3430
100706f2543Smrgextern _X_EXPORT void ResetMSP3430(MSP3430Ptr m);
101706f2543Smrg#define xf86_MSP3430SetVolume	MSP3430SetVolume
102706f2543Smrgextern _X_EXPORT void MSP3430SetVolume (MSP3430Ptr m, CARD8 value);
103706f2543Smrg#define xf86_MSP3430SetSAP	MSP3430SetSAP
104706f2543Smrgextern _X_EXPORT void MSP3430SetSAP (MSP3430Ptr m, int mode);
105706f2543Smrg
106706f2543Smrg#define MSP3430SymbolsList \
107706f2543Smrg		"InitMSP3430", \
108706f2543Smrg		"DetectMSP3430", \
109706f2543Smrg		"ResetMSP3430", \
110706f2543Smrg		"MSP3430SetVolume", \
111706f2543Smrg		"MSP3430SetSAP"
112706f2543Smrg
113706f2543Smrg#endif
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