105b261ecSmrg 205b261ecSmrg/* 305b261ecSmrg * Copyright (c) 1997,1998 The XFree86 Project, Inc. 405b261ecSmrg * 505b261ecSmrg * Loosely based on code bearing the following copyright: 605b261ecSmrg * 705b261ecSmrg * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. 805b261ecSmrg * 905b261ecSmrg * Author: Dirk Hohndel 1005b261ecSmrg */ 1105b261ecSmrg 1205b261ecSmrg#ifndef _VGAHW_H 1305b261ecSmrg#define _VGAHW_H 1405b261ecSmrg 1505b261ecSmrg#include <X11/X.h> 1605b261ecSmrg#include "misc.h" 1705b261ecSmrg#include "input.h" 1805b261ecSmrg#include "scrnintstr.h" 1905b261ecSmrg#include "colormapst.h" 2005b261ecSmrg 2105b261ecSmrg#include "xf86str.h" 2205b261ecSmrg#include "xf86Pci.h" 2305b261ecSmrg 2405b261ecSmrg#include "xf86DDC.h" 2505b261ecSmrg 2605b261ecSmrg#include "globals.h" 276747b715Smrg#include <X11/extensions/dpmsconst.h> 2805b261ecSmrg 296747b715Smrgextern _X_EXPORT int vgaHWGetIndex(void); 3005b261ecSmrg 3105b261ecSmrg/* 3205b261ecSmrg * access macro 3305b261ecSmrg */ 3405b261ecSmrg#define VGAHWPTR(p) ((vgaHWPtr)((p)->privates[vgaHWGetIndex()].ptr)) 3505b261ecSmrg 3605b261ecSmrg/* Standard VGA registers */ 3705b261ecSmrg#define VGA_ATTR_INDEX 0x3C0 3805b261ecSmrg#define VGA_ATTR_DATA_W 0x3C0 3905b261ecSmrg#define VGA_ATTR_DATA_R 0x3C1 40f7df2e56Smrg#define VGA_IN_STAT_0 0x3C2 /* read */ 41f7df2e56Smrg#define VGA_MISC_OUT_W 0x3C2 /* write */ 4205b261ecSmrg#define VGA_ENABLE 0x3C3 4305b261ecSmrg#define VGA_SEQ_INDEX 0x3C4 4405b261ecSmrg#define VGA_SEQ_DATA 0x3C5 4505b261ecSmrg#define VGA_DAC_MASK 0x3C6 4605b261ecSmrg#define VGA_DAC_READ_ADDR 0x3C7 4705b261ecSmrg#define VGA_DAC_WRITE_ADDR 0x3C8 4805b261ecSmrg#define VGA_DAC_DATA 0x3C9 49f7df2e56Smrg#define VGA_FEATURE_R 0x3CA /* read */ 50f7df2e56Smrg#define VGA_MISC_OUT_R 0x3CC /* read */ 5105b261ecSmrg#define VGA_GRAPH_INDEX 0x3CE 5205b261ecSmrg#define VGA_GRAPH_DATA 0x3CF 5305b261ecSmrg 5405b261ecSmrg#define VGA_IOBASE_MONO 0x3B0 5505b261ecSmrg#define VGA_IOBASE_COLOR 0x3D0 5605b261ecSmrg 5705b261ecSmrg#define VGA_CRTC_INDEX_OFFSET 0x04 5805b261ecSmrg#define VGA_CRTC_DATA_OFFSET 0x05 59f7df2e56Smrg#define VGA_IN_STAT_1_OFFSET 0x0A /* read */ 60f7df2e56Smrg#define VGA_FEATURE_W_OFFSET 0x0A /* write */ 6105b261ecSmrg 6205b261ecSmrg/* default number of VGA registers stored internally */ 6305b261ecSmrg#define VGA_NUM_CRTC 25 6405b261ecSmrg#define VGA_NUM_SEQ 5 6505b261ecSmrg#define VGA_NUM_GFX 9 6605b261ecSmrg#define VGA_NUM_ATTR 21 6705b261ecSmrg 6805b261ecSmrg/* Flags for vgaHWSave() and vgaHWRestore() */ 6905b261ecSmrg#define VGA_SR_MODE 0x01 7005b261ecSmrg#define VGA_SR_FONTS 0x02 7105b261ecSmrg#define VGA_SR_CMAP 0x04 7205b261ecSmrg#define VGA_SR_ALL (VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP) 7305b261ecSmrg 7405b261ecSmrg/* Defaults for the VGA memory window */ 7505b261ecSmrg#define VGA_DEFAULT_PHYS_ADDR 0xA0000 7605b261ecSmrg#define VGA_DEFAULT_MEM_SIZE (64 * 1024) 7705b261ecSmrg 7805b261ecSmrg/* 7905b261ecSmrg * vgaRegRec contains settings of standard VGA registers. 8005b261ecSmrg */ 8105b261ecSmrgtypedef struct { 82f7df2e56Smrg unsigned char MiscOutReg; /* */ 83f7df2e56Smrg unsigned char *CRTC; /* Crtc Controller */ 8405b261ecSmrg unsigned char *Sequencer; /* Video Sequencer */ 8505b261ecSmrg unsigned char *Graphics; /* Video Graphics */ 865a112b11Smrg unsigned char *Attribute; /* Video Attribute */ 87f7df2e56Smrg unsigned char DAC[768]; /* Internal Colorlookuptable */ 88f7df2e56Smrg unsigned char numCRTC; /* number of CRTC registers, def=VGA_NUM_CRTC */ 89f7df2e56Smrg unsigned char numSequencer; /* number of seq registers, def=VGA_NUM_SEQ */ 90f7df2e56Smrg unsigned char numGraphics; /* number of gfx registers, def=VGA_NUM_GFX */ 91f7df2e56Smrg unsigned char numAttribute; /* number of attr registers, def=VGA_NUM_ATTR */ 9205b261ecSmrg} vgaRegRec, *vgaRegPtr; 9305b261ecSmrg 9405b261ecSmrgtypedef struct _vgaHWRec *vgaHWPtr; 9505b261ecSmrg 96f7df2e56Smrgtypedef void (*vgaHWWriteIndexProcPtr) (vgaHWPtr hwp, CARD8 indx, CARD8 value); 97f7df2e56Smrgtypedef CARD8 (*vgaHWReadIndexProcPtr) (vgaHWPtr hwp, CARD8 indx); 98f7df2e56Smrgtypedef void (*vgaHWWriteProcPtr) (vgaHWPtr hwp, CARD8 value); 99f7df2e56Smrgtypedef CARD8 (*vgaHWReadProcPtr) (vgaHWPtr hwp); 100f7df2e56Smrgtypedef void (*vgaHWMiscProcPtr) (vgaHWPtr hwp); 10105b261ecSmrg 10205b261ecSmrg/* 10305b261ecSmrg * vgaHWRec contains per-screen information required by the vgahw module. 10405b261ecSmrg * 10505b261ecSmrg * Note, the palette referred to by the paletteEnabled, enablePalette and 10605b261ecSmrg * disablePalette is the 16-entry (+overscan) EGA-compatible palette accessed 10705b261ecSmrg * via the first 17 attribute registers and not the main 8-bit palette. 10805b261ecSmrg */ 10905b261ecSmrgtypedef struct _vgaHWRec { 110f7df2e56Smrg void *Base; /* Address of "VGA" memory */ 111f7df2e56Smrg int MapSize; /* Size of "VGA" memory */ 112f7df2e56Smrg unsigned long MapPhys; /* phys location of VGA mem */ 113f7df2e56Smrg int IOBase; /* I/O Base address */ 114f7df2e56Smrg CARD8 *MMIOBase; /* Pointer to MMIO start */ 115f7df2e56Smrg int MMIOOffset; /* base + offset + vgareg 116f7df2e56Smrg = mmioreg */ 117f7df2e56Smrg void *FontInfo1; /* save area for fonts in 118f7df2e56Smrg plane 2 */ 119f7df2e56Smrg void *FontInfo2; /* save area for fonts in 120f7df2e56Smrg plane 3 */ 121f7df2e56Smrg void *TextInfo; /* save area for text */ 122f7df2e56Smrg vgaRegRec SavedReg; /* saved registers */ 123f7df2e56Smrg vgaRegRec ModeReg; /* register settings for 124f7df2e56Smrg current mode */ 125f7df2e56Smrg Bool ShowOverscan; 126f7df2e56Smrg Bool paletteEnabled; 127f7df2e56Smrg Bool cmapSaved; 128f7df2e56Smrg ScrnInfoPtr pScrn; 129f7df2e56Smrg vgaHWWriteIndexProcPtr writeCrtc; 130f7df2e56Smrg vgaHWReadIndexProcPtr readCrtc; 131f7df2e56Smrg vgaHWWriteIndexProcPtr writeGr; 132f7df2e56Smrg vgaHWReadIndexProcPtr readGr; 133f7df2e56Smrg vgaHWReadProcPtr readST00; 134f7df2e56Smrg vgaHWReadProcPtr readST01; 135f7df2e56Smrg vgaHWReadProcPtr readFCR; 136f7df2e56Smrg vgaHWWriteProcPtr writeFCR; 137f7df2e56Smrg vgaHWWriteIndexProcPtr writeAttr; 138f7df2e56Smrg vgaHWReadIndexProcPtr readAttr; 139f7df2e56Smrg vgaHWWriteIndexProcPtr writeSeq; 140f7df2e56Smrg vgaHWReadIndexProcPtr readSeq; 141f7df2e56Smrg vgaHWWriteProcPtr writeMiscOut; 142f7df2e56Smrg vgaHWReadProcPtr readMiscOut; 143f7df2e56Smrg vgaHWMiscProcPtr enablePalette; 144f7df2e56Smrg vgaHWMiscProcPtr disablePalette; 145f7df2e56Smrg vgaHWWriteProcPtr writeDacMask; 146f7df2e56Smrg vgaHWReadProcPtr readDacMask; 147f7df2e56Smrg vgaHWWriteProcPtr writeDacWriteAddr; 148f7df2e56Smrg vgaHWWriteProcPtr writeDacReadAddr; 149f7df2e56Smrg vgaHWWriteProcPtr writeDacData; 150f7df2e56Smrg vgaHWReadProcPtr readDacData; 151f7df2e56Smrg void *ddc; 152f7df2e56Smrg struct pci_io_handle *io; 153f7df2e56Smrg vgaHWReadProcPtr readEnable; 154f7df2e56Smrg vgaHWWriteProcPtr writeEnable; 155f7df2e56Smrg struct pci_device *dev; 15605b261ecSmrg} vgaHWRec; 15705b261ecSmrg 15805b261ecSmrg/* Some macros that VGA drivers can use in their ChipProbe() function */ 159f7df2e56Smrg#define OVERSCAN 0x11 /* Index of OverScan register */ 16005b261ecSmrg 16105b261ecSmrg/* Flags that define how overscan correction should take place */ 162f7df2e56Smrg#define KGA_FIX_OVERSCAN 1 /* overcan correction required */ 163f7df2e56Smrg#define KGA_ENABLE_ON_ZERO 2 /* if possible enable display at beginning */ 16405b261ecSmrg /* of next scanline/frame */ 165f7df2e56Smrg#define KGA_BE_TOT_DEC 4 /* always fix problem by setting blank end */ 166f7df2e56Smrg /* to total - 1 */ 167f7df2e56Smrg#define BIT_PLANE 3 /* Which plane we write to in mono mode */ 16805b261ecSmrg#define BITS_PER_GUN 6 16905b261ecSmrg#define COLORMAP_SIZE 256 17005b261ecSmrg 171bbcda59bSjmcneill#if defined(__powerpc__) || defined(__arm__) || defined(__mips__) || defined(__s390__) || defined(__nds32__) 17205b261ecSmrg#define DACDelay(hw) /* No legacy VGA support */ 17305b261ecSmrg#else 174f7df2e56Smrg#define DACDelay(hw) \ 175f7df2e56Smrg do { \ 176f7df2e56Smrg (hw)->readST01((hw)); \ 177f7df2e56Smrg (hw)->readST01((hw)); \ 17805b261ecSmrg } while (0) 1798bc9475dSmrg#endif 18005b261ecSmrg 18105b261ecSmrg/* Function Prototypes */ 18205b261ecSmrg 18305b261ecSmrg/* vgaHW.c */ 18405b261ecSmrg 18505b261ecSmrgtypedef void vgaHWProtectProc(ScrnInfoPtr, Bool); 18605b261ecSmrgtypedef void vgaHWBlankScreenProc(ScrnInfoPtr, Bool); 18705b261ecSmrg 1886747b715Smrgextern _X_EXPORT void vgaHWSetStdFuncs(vgaHWPtr hwp); 1896747b715Smrgextern _X_EXPORT void vgaHWSetMmioFuncs(vgaHWPtr hwp, CARD8 *base, int offset); 1906747b715Smrgextern _X_EXPORT void vgaHWProtect(ScrnInfoPtr pScrn, Bool on); 1916747b715Smrgextern _X_EXPORT vgaHWProtectProc *vgaHWProtectWeak(void); 1926747b715Smrgextern _X_EXPORT Bool vgaHWSaveScreen(ScreenPtr pScreen, int mode); 1936747b715Smrgextern _X_EXPORT void vgaHWBlankScreen(ScrnInfoPtr pScrn, Bool on); 1946747b715Smrgextern _X_EXPORT vgaHWBlankScreenProc *vgaHWBlankScreenWeak(void); 1956747b715Smrgextern _X_EXPORT void vgaHWSeqReset(vgaHWPtr hwp, Bool start); 196f7df2e56Smrgextern _X_EXPORT void vgaHWRestoreFonts(ScrnInfoPtr scrninfp, 197f7df2e56Smrg vgaRegPtr restore); 1986747b715Smrgextern _X_EXPORT void vgaHWRestoreMode(ScrnInfoPtr scrninfp, vgaRegPtr restore); 199f7df2e56Smrgextern _X_EXPORT void vgaHWRestoreColormap(ScrnInfoPtr scrninfp, 200f7df2e56Smrg vgaRegPtr restore); 201f7df2e56Smrgextern _X_EXPORT void vgaHWRestore(ScrnInfoPtr scrninfp, vgaRegPtr restore, 202f7df2e56Smrg int flags); 2036747b715Smrgextern _X_EXPORT void vgaHWSaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save); 2046747b715Smrgextern _X_EXPORT void vgaHWSaveMode(ScrnInfoPtr scrninfp, vgaRegPtr save); 2056747b715Smrgextern _X_EXPORT void vgaHWSaveColormap(ScrnInfoPtr scrninfp, vgaRegPtr save); 206f7df2e56Smrgextern _X_EXPORT void vgaHWSave(ScrnInfoPtr scrninfp, vgaRegPtr save, 207f7df2e56Smrg int flags); 2086747b715Smrgextern _X_EXPORT Bool vgaHWInit(ScrnInfoPtr scrnp, DisplayModePtr mode); 209f7df2e56Smrgextern _X_EXPORT Bool vgaHWSetRegCounts(ScrnInfoPtr scrp, int numCRTC, 210f7df2e56Smrg int numSequencer, int numGraphics, 211f7df2e56Smrg int numAttribute); 2126747b715Smrgextern _X_EXPORT Bool vgaHWCopyReg(vgaRegPtr dst, vgaRegPtr src); 2136747b715Smrgextern _X_EXPORT Bool vgaHWGetHWRec(ScrnInfoPtr scrp); 2146747b715Smrgextern _X_EXPORT void vgaHWFreeHWRec(ScrnInfoPtr scrp); 2156747b715Smrgextern _X_EXPORT Bool vgaHWMapMem(ScrnInfoPtr scrp); 2166747b715Smrgextern _X_EXPORT void vgaHWUnmapMem(ScrnInfoPtr scrp); 2176747b715Smrgextern _X_EXPORT void vgaHWGetIOBase(vgaHWPtr hwp); 2186747b715Smrgextern _X_EXPORT void vgaHWLock(vgaHWPtr hwp); 2196747b715Smrgextern _X_EXPORT void vgaHWUnlock(vgaHWPtr hwp); 2206747b715Smrgextern _X_EXPORT void vgaHWEnable(vgaHWPtr hwp); 2216747b715Smrgextern _X_EXPORT void vgaHWDisable(vgaHWPtr hwp); 222f7df2e56Smrgextern _X_EXPORT void vgaHWDPMSSet(ScrnInfoPtr pScrn, int PowerManagementMode, 223f7df2e56Smrg int flags); 2246747b715Smrgextern _X_EXPORT Bool vgaHWHandleColormaps(ScreenPtr pScreen); 2256747b715Smrgextern _X_EXPORT void vgaHWddc1SetSpeed(ScrnInfoPtr pScrn, xf86ddcSpeed speed); 226f7df2e56Smrgextern _X_EXPORT CARD32 vgaHWHBlankKGA(DisplayModePtr mode, vgaRegPtr regp, 227f7df2e56Smrg int nBits, unsigned int Flags); 228f7df2e56Smrgextern _X_EXPORT CARD32 vgaHWVBlankKGA(DisplayModePtr mode, vgaRegPtr regp, 229f7df2e56Smrg int nBits, unsigned int Flags); 2306747b715Smrgextern _X_EXPORT Bool vgaHWAllocDefaultRegs(vgaRegPtr regp); 23105b261ecSmrg 2326747b715Smrgextern _X_EXPORT DDC1SetSpeedProc vgaHWddc1SetSpeedWeak(void); 2336747b715Smrgextern _X_EXPORT SaveScreenProcPtr vgaHWSaveScreenWeak(void); 234f7df2e56Smrgextern _X_EXPORT void xf86GetClocks(ScrnInfoPtr pScrn, int num, 235f7df2e56Smrg Bool (*ClockFunc) (ScrnInfoPtr, int), 236f7df2e56Smrg void (*ProtectRegs) (ScrnInfoPtr, Bool), 237f7df2e56Smrg void (*BlankScreen) (ScrnInfoPtr, Bool), 238f7df2e56Smrg unsigned long vertsyncreg, int maskval, 239f7df2e56Smrg int knownclkindex, int knownclkvalue); 240f7df2e56Smrg 241f7df2e56Smrg#endif /* _VGAHW_H */ 242