Rollback multiboot2 for amd64, as requested by core

branches: 1.30.2;
Restore multiboot 2 header in amd64 kernel

The header must appear below 32k offset in the kernel file, but we
have to make sure it does not load at low addresses, otherwise we
break BIOS boot.

.text section used to load at 0x200000, we just load multiboot section
there, and have .text loaded just after.

Rollback kernel link scrpt change for multiboot

The multiboot section breaks BIOS boot. Rolling back the link script
removes the section, which breaks multiboot but should restore BIOS boot.

Add multiboot 2 support to amd64 kernel

Add support for kASan on amd64. Written by me, with some parts inspired
from Siddharth Muralee's initial work. This feature can detect several
kinds of memory bugs, and it's an excellent feature.

It can be enabled by uncommenting these three lines in GENERIC:

#makeoptions KASAN=1 # Kernel Address Sanitizer
#options KASAN
#no options SVS

The kernel is compiled without SVS, without DMAP and without PCPU area.
A shadow area is created at boot time, and it can cover the upper 128TB
of the address space. This area is populated gradually as we allocate
memory. With this design the memory consumption is kept at its lowest
level.

The compiler calls the __asan_* functions each time a memory access is
done. We verify whether this access is legal by looking at the shadow
area.

We declare our own special memcpy/memset/etc functions, because the
compiler's builtins don't add the __asan_* instrumentation.

Initially all the mappings are marked as valid. During dynamic
allocations, we add a redzone, which we mark as invalid. Any access on
it will trigger a kASan error message. Additionally, the compiler adds
a redzone on global variables, and we mark these redzones as invalid too.
The illegal-access detection works with a 1-byte granularity.

For now, we cover three areas:

- global variables
- kmem_alloc-ated areas
- malloc-ated areas

More will come, but that's a good start.

branches: 1.26.2; 1.26.4;
Unmap the kernel from userland in SVS, and leave only the needed
trampolines. As explained below, SVS should now completely mitigate
Meltdown on GENERIC kernels, even though it needs some more tweaking
for GENERIC_KASLR.

Until now the kernel entry points looked like:

FUNC(intr)
pushq $ERR
pushq $TRAPNO
INTRENTRY
... handle interrupt ...
INTRFASTEXIT
END(intr)

With this change they are split and become:

FUNC(handle)
... handle interrupt ...
INTRFASTEXIT
END(handle)

TEXT_USER_BEGIN
FUNC(intr)
pushq $ERR
pushq $TRAPNO
INTRENTRY
jmp handle
END(intr)
TEXT_USER_END

A new section is introduced, .text.user, that contains minimal kernel
entry/exit points. In order to choose what to put in this section, two
macros are introduced, TEXT_USER_BEGIN and TEXT_USER_END.

The section is mapped in userland with normal 4K pages.

In GENERIC, the section is 4K-page-aligned and embedded in .text, which
is mapped with large pages. That is to say, when an interrupt comes in,
the CPU has the user page tables loaded and executes the 'intr' functions
on 4K pages; after calling SVS_ENTER (in INTRENTRY) these 4K pages become
2MB large pages, and remain so when executing in kernel mode.

In GENERIC_KASLR, the section is 4K-page-aligned and independent from the
other kernel texts. The prekern just picks it up and maps it at a random
address.

In GENERIC, SVS should now completely mitigate Meltdown: what we put in
.text.user is not secret.

In GENERIC_KASLR, SVS would have to be improved a bit more: the
'jmp handle' instruction is actually secret, since it leaks the address
of the section we are jumping into. By exploiting Meltdown on Intel, this
theoretically allows a local user to reconstruct the address of the first
text section. But given that our KASLR produces several texts, and that
each section is not correlated with the others, the level of protection
KASLR provides is still good.

Implement a real hotpatch feature.

Define a HOTPATCH() macro, that puts a label and additional information
in the new .rodata.hotpatch kernel section. In patch.c, scan the section
and patch what needs to be. Now it is possible to hotpatch the content of
a macro.

SMAP is switched to use this new system; this saves a call+ret in each
kernel entry/exit point.

Many other operating systems do the same.

Fill the .text padding with 0xcc (int3), in such a way that any jump into
this area will automatically fault. The alignment within the section is
necessary, in order to fill strictly all of the padding (took me a while
to figure this out); but it does not change the kernel size.

Greatly inspired from FreeBSD, but for some reason they decided not to
apply the alignment.

Fix a pretty dumb mistake I made in r1.22: the alignment needs to be in the
bss, otherwise the bootloader will use memory before __kernel_end and give
a wrong start pa to the kernel.

This issue was investigated by Anthony Mallet. Should fix PR/52000.

branches: 1.22.6;
Put 2MB alignments between the kernel segments. This way the kernel image
is entirely mapped with large pages, which uniformizes performance and
reduces fluctuation. Sent on port-amd64.

branches: 1.21.2; 1.21.4;
Map the data+bss chunk independently on amd64, and remove the X
permission on it.

Map the rodata segment independently on amd64, and remove the W permission
on it.

Split the {text+rodata} chunk in two separate chunks on x86. The
rodata segment now loses the large page optimization, gets mapped inside
the data segment, and therefore becomes RWX. It may break the build on
Xen.

Define __rodata_start. Will be used soon.

Large pages are supported by default for the text+rodata segments. Apply
the proper alignment for the data segment, so that more pages can benefit
from it. Reduces TLB contention.

kern.ldscript.2MB and largepages.inc are useless.

KNF, and fix some comments

Fix previous; do include assym.h.

Replace COHERENCY_UNIT in ldscript.

Don't need to specify OUTPUT_FORMAT/OUTPUT_ARCH in linker scripts.

Do =0 (zero-fill) only once.

Simplify this by splitting absolute relocation directives from other
relative, position-independent directives. Since all sections are
relocated in parallel, specifying the address of .text is sufficient.

Indent.

Kill trailing whitespaces.

branches: 1.8.2;
Revert previous per joerg@'s request.

According to him, exposing .data.{read_mostly,cacheline_aligned} is
intentional so that people can easily see which variables are optimized.

amd64, i386: Don't expose .data.{read_mostly,cacheline_aligned} sections

Set the kernel load (physical) address as is already done for i386 kernels.

branches: 1.5.8; 1.5.18; 1.5.22; 1.5.32;
Add __cacheline_aligned and __read_mostly annotations.

These annotations help to mitigate false sharing on multiprocessor
systems.

Variables annotated with __cacheline_aligned are placed into the
.data.cacheline_aligned section in the kernel. Each item in this
section is aligned on a cachline boundary - this avoids false
sharing. Highly contended global locks are a good candidate for
__cacheline_aligned annotation.

Variables annotated with __read_mostly are packed together tightly
into a .data.read_mostly section in the kernel. The idea here is that
we can pack infrequently modified data items into a cacheline and
avoid having to purge the cache, which would happen if read mostly
data and write mostly data shared a cachline. Initialisation variables
are a prime candiate for __read_mostly annotations.

branches: 1.4.20; 1.4.34; 1.4.40; 1.4.42;
merge yamt-x86pmap branch.

- reduce differences between amd64 and i386. notably, share pmap.c
between them. it makes several i386 pmap improvements available to
amd64, including tlb shootdown reduction and bug fixes from Stephan Uphoff.
- implement deferred pmap switching for amd64.
- remove LARGEPAGES option. always use large pages if available.
also, make it work on amd64.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.2.8; 1.2.10; 1.2.12; 1.2.14;
convert to a very simple kern.ldscript

branches: 1.1.18; 1.1.54; 1.1.56; 1.1.60; 1.1.62; 1.1.68; 1.1.70;
Rename the x86_64 port to amd64, as this is the actual name used for
the processor family now. x86_64 is kept as the MACHINE_ARCH value,
since it's already widely used (by e.g. the toolchain, etc), and
by other operating systems.