Sprinkle some comments about ENABLE_ALIGNMENT_FAULTS leaving curcpu in r4
and curlwp in r5

branches: 1.16.30;
Add a clrex/dmb to irq path as recommended by ARM.

branches: 1.15.6;
Move parts of cpu.h that are not needed by MI code in <arm/locore.h>
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h>
Use <arm/asm.h> instead of <machine/arm.h>

branches: 1.14.2;
Add softint processing for irq_idle_entry

Implement a "fast" path for IRQ handling out of the idle loop. Since we
are in SVC32 already we only need to save a few registers. Processing is
also simplified since we know we can't return to user-mode.

branches: 1.12.2;
Avoid using r7 (which is being reserved for a different purpose).

branches: 1.11.4; 1.11.12;
Remove unused local variable.
Spelling fix in comment.

branches: 1.10.18; 1.10.22; 1.10.28;
Merge kernel changes in matt-armv6 to HEAD.

branches: 1.9.6; 1.9.8; 1.9.10;
Truly kill current_intr_depth once and for all.

branches: 1.8.8; 1.8.16; 1.8.20; 1.8.22; 1.8.28; 1.8.34;
Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing. (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.

branches: 1.7.26;
merge ktrace-lwp.

branches: 1.6.2;
remove vestigal {,e}intr{names,cnt} symbols now that vmstat doesn't need them.

Move the alignment fault enable/disable code into macroes to avoid
needless duplication.

Additionally, merge AST handling into the same code.

exception.S and the generic irq_dispatch.S routines have been updated
to use the macroes.

XXX: I have patches for the non-generic IRQ dispatch routines, but they
need testing by someone with hardware.

Assume that if curpcb is NULL, we're already running with alignment
faults enabled.

Oops, forgot to commit this along with the others...

Enable alignment faults on arm32 for both kernel and userland.

If COMPAT_15 and EXEC_AOUT are defined, support per-process
alignment checking where AFLTs are always enabled when running
kernel code and userland ELF binaries, and dynamically disabled/
enabled when switching to/from a.out binaries. This is necessary
in order to execute older a.out binaries, where gcc made
deliberate use of misaligned loads under certain circumstances.

branches: 1.2.2; 1.2.4;
Fiddle with current_intr_depth in assembly code again. Because we
have just pushed a frame, we can make some assumptions that the
compiler cannot as easily make, and can thus do it slightly more
efficiently.

Clean up evbarm interrupt support a little:
* Define an ARM_INTR_IMPL option, which specifies a header file
describing the interrupt implementation for the platform. Use
this instead of the list of EVBARM_BOARDTYPE checks.
* Make the s3c2xx0 interrupt dispatch code a bit more generic, and move
it to a generic location so that other platforms can use it.

This eliminates all uses of the EVBARM_BOARDTYPE stuff, so delete it.