| History log of /src/sys/arch/arm/cortex/gicv3_its.c |
| Revision | | Date | Author | Comments |
| 1.41 |
| 28-Jan-2025 |
jmcneill | gicv3_its: Fix indirect L2 device table allocation.
|
| 1.40 |
| 15-Dec-2024 |
jmcneill | gicv3: its: Fix regression on LX2K.
Page size probing and device ID width changes broke LX2K, revert these
parts of the last set of changes as they are not required on X1E.
|
| 1.39 |
| 12-Dec-2024 |
skrll | gicv3: log the ITS command table information
|
| 1.38 |
| 10-Dec-2024 |
jmcneill | fixup! Restore a line accidentally removed in my previous change
|
| 1.37 |
| 08-Dec-2024 |
riastradh | gicv3_its.c: Do-nothing macros must expand to `__nothing', not empty.
No functional change intended -- unless this was accidentally broken
before.
|
| 1.36 |
| 07-Dec-2024 |
jmcneill | gicv3: ITS: Add support for indirect device tables.
When devbits is too large to fit into the first level of device table,
some hardware supports the concept of indirect tables. Add support for
this and use it when supported.
This is required for MSIs to work properly on Snapdragon X Elite platforms
(otherwise, MAPD command fails and stalls the ITS command queue).
|
| 1.35 |
| 11-Nov-2023 |
tnn | gicv3_its: assorted minor improvements
- KASSERT that the command queue is not stalled due to async error
before issuing more commands.
- implement gits_command_int under #if 0 (useful for troubleshooting)
- protect command queue with its_lock consistently
- KASSERT for 32-bit MSI that upper bits are 0
- KASSERT return value of gicv3_its_msi_alloc_lpi
- KASSERT that safe conditions for writing to CBASER are met
- move CWRITER initialization to before CBASER
- fix alignment of tables for the 16KB page size case
|
| 1.34 |
| 31-Oct-2021 |
skrll | Fix non-DIAGNOSTIC builds (hopefully). No idea why this didn't fail to
build for me without DIAGNOSTIC.
|
| 1.33 |
| 31-Oct-2021 |
skrll | Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.
The AP initialisation code in cpu_init_secondary_processor will read and
initialise the required system registers and state for the BP to attach
and report.
Rework the interrupt handler code for this new sequence. Thankfully,
this removes a bunch of code for bcm2836mp.
The VFP detection handler on <= armv7 relies on the global undefined
handler being in place until the BP attaches vfp. That is, after the
APs have been spun up.
gicv3_its.c has a serialisation issue which is protected against in
the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin
lock. The serialisation issue needs addressing more completely.
Tested on RPI3, Apple M1, QEMU, and lx2k
Fixes PR port-arm/56264:
diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
|
| 1.32 |
| 16-Jan-2021 |
jmcneill | Remove MAXCPUS dependency.
|
| 1.31 |
| 24-Dec-2020 |
jmcneill | trailing whitespace
|
| 1.30 |
| 11-Dec-2020 |
jmcneill | Simplify gits_command by getting rid of the _BYTE_ORDER test and just
always use the loop + htole64 path.
|
| 1.29 |
| 11-Dec-2020 |
jmcneill | Preserve ST Lower and Upper fields when clearing Mask bit in the MSI-X
vector control register.
|
| 1.28 |
| 24-Sep-2020 |
ryo | branches: 1.28.2;
need to swap on big endian machines.
"The ITS command queue uses a little endian memory order model." (GIC Architecture Specification)
|
| 1.27 |
| 13-Feb-2020 |
jmcneill | Make intr affinity work with MSIs again
|
| 1.26 |
| 13-Feb-2020 |
jmcneill | Since all ITS instances share a common LPI configuration table, used a
shared vmem arena to allocate pic irqs. Idea from FreeBSD.
|
| 1.25 |
| 01-Feb-2020 |
jmcneill | Use kmem_zalloc for its state, fixes possible crash if a driver tries to
set affinity before a CPU is online.
|
| 1.24 |
| 17-Jan-2020 |
jmcneill | Set msi_id to its_id
|
| 1.23 |
| 24-Dec-2019 |
skrll | branches: 1.23.2;
Traiing whitespace
|
| 1.22 |
| 02-Dec-2019 |
msaitoh | Use PCI_MSIX_"TBL"BIR_MASK instead of PCI_MSIX_"PBA"BIR_MASK for MSI-X table.
This is not a real bug because both macros have the same value.
|
| 1.21 |
| 30-Jun-2019 |
jmcneill | branches: 1.21.2;
Cleanup ThunderX quirk and print cache / shareability details for ITT tables
|
| 1.20 |
| 30-Jun-2019 |
jmcneill | Enable caching of ITS tables when possible
|
| 1.19 |
| 29-Jun-2019 |
jmcneill | Restore original size calculation for MAPD and don't disable MSI/MSIX on devices before making changes
|
| 1.18 |
| 29-Jun-2019 |
jmcneill | Rename lpi pic to gicv3-its when an ITS is found
|
| 1.17 |
| 23-Jun-2019 |
jmcneill | Pass correct EventID to MOVI and INV commands
|
| 1.16 |
| 23-Jun-2019 |
jmcneill | Remove unused variable (build fix)
|
| 1.15 |
| 23-Jun-2019 |
jmcneill | Ensure that the "size" parameter of MAPD matches the size of the ITT being
mapped and subtract the LPI base from EventID. Fixes multi-vector MSI/MSI-X
on RK3399.
|
| 1.14 |
| 16-Jun-2019 |
jmcneill | Pass correct event ID with MOVI commands
|
| 1.13 |
| 16-Jun-2019 |
jmcneill | - Disable MSI/MSI-X when making changes
- MSI: Write the vector count to the Multi Message Enable (MME) field
- MSI: Set DATA to the first LPI number, not the last
|
| 1.12 |
| 12-Jun-2019 |
jmcneill | Allow set_affinity calls before PEs are brought online. We store the
desired target PE if set_affinity is called early and restore the routes
when the PE comes alive.
|
| 1.11 |
| 12-Jun-2019 |
jmcneill | Fail gracefully if gicv3_its_set_affinity is called before a cpu is
brought online.
|
| 1.10 |
| 08-Dec-2018 |
jmcneill | branches: 1.10.4;
Add support for decoding PCI ID mappings using IO remapping tables (IORT).
|
| 1.9 |
| 28-Nov-2018 |
jmcneill | Allow non-power of 2 counts, and support alloc/release/alloc patterns for a device as long as the ITT size is sufficient
|
| 1.8 |
| 24-Nov-2018 |
skrll | branches: 1.8.2;
Handle ThunderX errata
|
| 1.7 |
| 23-Nov-2018 |
jmcneill | Only allocate what we need for ITT tables
|
| 1.6 |
| 23-Nov-2018 |
jmcneill | Fix ITT size, only need to MAPD once per device.
|
| 1.5 |
| 22-Nov-2018 |
jakllsch | use correct interrupt index
fixes intrctl list
from jmcneill@
|
| 1.4 |
| 21-Nov-2018 |
jmcneill | kcpuset_ffs returns the cpu number plus one, so make sure to subtract it
|
| 1.3 |
| 16-Nov-2018 |
jmcneill | Add intr_establish_xname support to arm and expose it to intrctl
|
| 1.2 |
| 10-Nov-2018 |
jmcneill | Implement pic_get_affinity/pic_set_affinity for LPIs via ITS
|
| 1.1 |
| 09-Nov-2018 |
jmcneill | Add support for GICv3 Locality-specific Periphal Interrupts (LPIs) and the
Interrupt Translation Service (ITS).
|
| 1.8.2.3 |
| 26-Dec-2018 |
pgoyette | Sync with HEAD, resolve a few conflicts
|
| 1.8.2.2 |
| 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.8.2.1 |
| 24-Nov-2018 |
pgoyette | file gicv3_its.c was added on branch pgoyette-compat on 2018-11-26 01:52:18 +0000
|
| 1.10.4.3 |
| 13-Apr-2020 |
martin | Mostly merge changes from HEAD upto 20200411
|
| 1.10.4.2 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.10.4.1 |
| 08-Dec-2018 |
christos | file gicv3_its.c was added on branch phil-wifi on 2019-06-10 22:05:52 +0000
|
| 1.21.2.1 |
| 10-Feb-2020 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #680):
sys/arch/arm/cortex/gicv3_its.c: revision 1.25
Use kmem_zalloc for its state, fixes possible crash if a driver tries to
set affinity before a CPU is online.
|
| 1.23.2.2 |
| 29-Feb-2020 |
ad | Sync with head.
|
| 1.23.2.1 |
| 17-Jan-2020 |
ad | Sync with head.
|
| 1.28.2.3 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.28.2.2 |
| 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
| 1.28.2.1 |
| 14-Dec-2020 |
thorpej | Sync w/ HEAD.
|
