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History log of /src/sys/arch/arm/sa11x0/sa11x0_irq.S
RevisionDateAuthorComments
 1.21  08-Nov-2021  rin irq_entry(): Do not clobber fp (= r11), in order not to confuse DDB.

Use r10 instead; no need to preserve saipic_base, previous content of
r10, throughout this function, except for the case of INTR_DEBUG.

For INTR_DEBUG, load saipic_base to scratch register every time it
becomes necessary. This is no performance penalty compared with
subsequent printf() calls.

XXX
Rewrite this function by C. There seems no particular reason to
use assembler, and no major performance regression is expected.
 1.20  21-Nov-2020  skrll Adjust egister usage so that r4 and r5 are preserved as cur{cpu,lwp}
respectively as required by the change to make ASTs operate per-LWP
rather than per-CPU. DO_AST_AND_RESTORE_ALIGNMENT_FAULTS expects this.

Remove the call to dosoftints while I'm here as it's dont in DO_AST...

XXX untested
 1.19  21-Nov-2020  skrll Trailing whitespace
 1.18  02-Dec-2013  joerg branches: 1.18.42;
Don't use cpsr_all/spsr_all with mrs, it doesn't take a mask.
 1.17  18-Aug-2013  matt Move parts of cpu.h that are not needed by MI code in <arm/locore.h>
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h>
Use <arm/asm.h> instead of <machine/arm.h>
 1.16  29-Aug-2012  matt branches: 1.16.2; 1.16.4;
Avoid using r7 (which is being reserved for a different purpose).
 1.15  20-Dec-2010  matt branches: 1.15.8;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.
 1.14  13-Jun-2008  rafal branches: 1.14.18;
Let hpcarm kernels boot again after the merge of the armv6 branch. Fixes
PR port-hpcarm/38591

XXX: There is still a hard hang that I've seen on both shark and hpcarm in
the process exit path; I don't know much beyond that yet.
 1.13  27-Apr-2008  matt branches: 1.13.2; 1.13.4;
Merge kernel changes in matt-armv6 to HEAD.
 1.12  08-Jan-2008  matt branches: 1.12.6; 1.12.8; 1.12.10;
As of this commit, all arm32 kernel now build.
 1.11  06-Jan-2008  matt Truly kill current_intr_depth once and for all.
 1.10  09-Mar-2007  thorpej branches: 1.10.8; 1.10.16; 1.10.20; 1.10.22; 1.10.28; 1.10.34;
Rewrite the ARM mutex implementation to be of the simple-mutex variety.
Because pre-v6 ARM lacks support for an atomic compare-and-swap, we
implement _lock_cas() as a restartable atomic squence that is checked
in the IRQ handler right before AST processing. (This is safe because,
for all practical purposes, there are no SMP pre-v6 ARM systems.)

This can serve as a model for other non-MP platforms that lack the
necessary atomic operations for mutexes (SuperH, for example).

Upshots of this change:
- kmutex_t is now down to 8 bytes on ARM; about as good as we can get.
- ARM2 systems don't have to trap and emulate SWP or SWPB for mutexes.

The acorn26 port is not updated by this commit to do the LOCK_CAS_CHECK.
That is left as an exercise for the port maintainer.

Reviewed and tested by Matt Thomas.
 1.9  05-Mar-2006  peter branches: 1.9.2; 1.9.20;
Prefix dbg_str with "L".
 1.8  11-Dec-2005  christos branches: 1.8.4; 1.8.6;
merge ktrace-lwp.
 1.7  23-Oct-2005  peter Fix some typos.
 1.6  05-Nov-2003  scw branches: 1.6.16; 1.6.18;
Enable/Restore alignment fault state on interrupt handler entry/exit.
 1.5  31-Mar-2003  chris branches: 1.5.2;
Fix for PR arm/17971. Used patch as provided

Compiled, but no hardware to test on.
 1.4  14-Oct-2002  bjh21 Continue the " - . - 8" purge. Specifically:

add rd, pc, #foo - . - 8 -> adr rd, foo
ldr rd, [pc, #foo - . - 8] -> ldr rd, foo

Also, when saving the return address for a function pointer call, use
"mov lr, pc" just before the call unless the return address is somewhere
other than just after the call site.

Finally, a few obvious little micro-optimisations like using LDR directly
rather than ADR followed by LDR, and loading directly into PC rather than
bouncing via R0.
 1.3  19-Jul-2002  ichiro change include path
 1.2  12-Apr-2002  thorpej branches: 1.2.2;
Centralize ARM CPU configuration information by adding a new header
file, <arm/cpuconf.h>, which pulls in "opt_cputypes.h" and then defines
the following:
* CPU_NTYPES -- now many CPU types are configured into the kernel. What
you really want to know is "== 1" or "> 1".
* Defines ARM_ARCH_2, ARM_ARCH_3, ARM_ARCH_4, ARM_ARCH_5, depending
on which ARM architecture versions are configured (based on CPU_*
options). Also defines ARM_NARCH to determins how many architecture
versions are configured.
* Defines ARM_MMU_MEMC, ARM_MMU_GENERIC, ARM_MMU_XSCALE depending on
which classes of ARM MMUs are configured into the kernel, and ARM_NMMUS
to determine how many MMU classes are configured.

Remove the needless inclusion of "opt_cputypes.h" in several places.
Convert remaining users to <arm/cpuconf.h>.
 1.1  08-Jul-2001  rjs branches: 1.1.2; 1.1.8;
Initial copy of SA11x0 support from hpcarm.
 1.1.8.4  18-Oct-2002  nathanw Catch up to -current.
 1.1.8.3  01-Aug-2002  nathanw Catch up to -current.
 1.1.8.2  17-Apr-2002  nathanw Catch up to -current.
 1.1.8.1  08-Jul-2001  nathanw file sa11x0_irq.S was added on branch nathanw_sa on 2002-04-17 00:02:35 +0000
 1.1.2.2  06-Sep-2002  jdolecek sync kqueue branch with HEAD
 1.1.2.1  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.2.2.1  21-Jul-2002  gehenna catch up with -current.
 1.5.2.4  10-Nov-2005  skrll Sync with HEAD. Here we go again...
 1.5.2.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.5.2.2  18-Sep-2004  skrll Sync with HEAD.
 1.5.2.1  03-Aug-2004  skrll Sync with HEAD
 1.6.18.1  26-Oct-2005  yamt sync with head
 1.6.16.3  21-Jan-2008  yamt sync with head
 1.6.16.2  03-Sep-2007  yamt sync with head.
 1.6.16.1  21-Jun-2006  yamt sync with head.
 1.8.6.1  22-Apr-2006  simonb Sync with head.
 1.8.4.1  09-Sep-2006  rpaulo sync with head
 1.9.20.1  12-Mar-2007  rmind Sync with HEAD.
 1.9.2.2  05-Mar-2006  peter Prefix dbg_str with "L".
 1.9.2.1  05-Mar-2006  peter file sa11x0_irq.S was added on branch yamt-pdpolicy on 2006-03-05 11:30:59 +0000
 1.10.34.1  08-Jan-2008  bouyer Sync with HEAD
 1.10.28.1  18-Feb-2008  mjf Sync with HEAD.
 1.10.22.3  28-Jan-2008  matt Given the that there are only 4 IPLs (ignoring soft IPLs), a number of
cleanups can be done:
Remove _SPL_* aliases.
Don't store irqmasks in ci_cpl, just make it an ipl level.
Add fast softint switching support.
 1.10.22.2  09-Jan-2008  matt sync with HEAD
 1.10.22.1  09-Nov-2007  matt Make all the evbarm kernels build again. Fix lossage from rebase.
 1.10.20.1  20-Jan-2008  chris Sync to HEAD.
 1.10.16.1  28-Feb-2008  rjs Sync with HEAD.
 1.10.8.1  18-Apr-2007  thorpej Remove _lock_cas() in favor of atomic_cas_32().
 1.12.10.2  04-May-2009  yamt sync with head.
 1.12.10.1  16-May-2008  yamt sync with head.
 1.12.8.2  17-Jun-2008  yamt sync with head.
 1.12.8.1  18-May-2008  yamt sync with head.
 1.12.6.2  29-Jun-2008  mjf Sync with HEAD.
 1.12.6.1  02-Jun-2008  mjf Sync with HEAD.
 1.13.4.1  18-Jun-2008  simonb Sync with head.
 1.13.2.1  23-Jun-2008  wrstuden Sync w/ -current. 34 merge conflicts to follow.
 1.14.18.1  05-Mar-2011  rmind sync with head
 1.15.8.2  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.15.8.1  30-Oct-2012  yamt sync with head
 1.16.4.2  18-May-2014  rmind sync with head
 1.16.4.1  28-Aug-2013  rmind sync with head
 1.16.2.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.18.42.1  14-Dec-2020  thorpej Sync w/ HEAD.

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