Add the increasingly spreading __HIDE_DELAY kludge to evbmips.

move DEV_BSIZE, DEV_BSHIFT out of MD param.h, they are same on all ports

also move BLKDEV_IOSIZE, MAXPHYS, but allow override since some ports
have different value (powerpc uses NBPG for BLKDEV_IOSIZE, sun2/sun3
have lower MAXPHYS)

branches: 1.10.2; 1.10.4;
mostly converted sbmips -> evbmips. the SBMIPS kernel builds fully
sans disksubr.c. intr.h does not need any additional fixes now,
only disklabel.h.

also test-built some other mips kernels.

branches: 1.9.14; 1.9.32; 1.9.48;
- include <mips/mips_param.h> after MACHINE is defined
- remove redundant comment

Remove clause 3 (UCB advertising clause) from the University of Utah
copyright. Confirmed by Mike Hibler, mike at cs.utah.edu - thanks!
Also, merge UCB and Utah copyright texts back into one, as they
originally were.

Extra verification by snj@.

branches: 1.7.4; 1.7.6; 1.7.8;
Merge from matt-nb5-mips64
Merge mips-specific arch files.

Move MID_MACHINE to <mips/mips_param.h> and use local values so we don't
need to include exec_aout.h

branches: 1.5.78; 1.5.96;
merge ktrace-lwp.

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.3.2; 1.3.8;
Remove unused MCLOFSET define.

branches: 1.2.2; 1.2.6;
Make clock/time handling more accurate:
- Use the CPU count register for more accurate microtime (from
sbmips) and delay (based on an evbmips delay function) functions.
- Schedule the next hardclock interrupt more accurately (from
an sgimips patch by Rafal Boni). Clock drift on one board is
now ~7ppm instead of ~330ppm.
- Purge old pmax-based mcclock code.
- Correctly round off some clock-derived variable calculations.
XXX: Some of this code should be migrated to sys/arch/mips.

A port to the MIPS Malta evaluation board. Currently supports the
MIPS32 4Kc CPU board, with support for the MIPS64 5Kc and the QED RM5261
CPU boards to follow.

The cs4281 audio hasn't been tested, there are some interrupt problems
with onboard the pciide, but all other on-board peripherals work.

The evbmips port will support more MIPS evaluation boards in the future.