Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.

Undo previous lwp.h change.

Split __lwp_getprivate_fast and __lwp_*tcb from mcontext.h into a separate
lwp.h file.

branches: 1.13.36;
Remove the kernel PMC code. Sent yesterday on tech-kern@.

This change:

* Removes "options PERFCTRS", the associated includes, and the associated
ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is
good.

* Removes the PMC code of ARM XSCALE.

* Removes all the pmc.h files. They were all empty, except for ARM XSCALE.

* Reorders the x86 PMC code not to rely on the legacy pmc.h file. The
definitions are put in sysarch.h.

* Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control
and sys_pmc_get_info syscalls. They are marked as OBSOL in kern,
netbsd32 and rump.

* Removes the pmc_evid_t and pmc_ctr_t types.

* Removes all the associated man pages. The sets are marked as obsolete.

branches: 1.12.16; 1.12.18;
fenv(3) support for hppa

branches: 1.11.4; 1.11.6;
Rename NetBSD/hp700 to NetBSD/hppa.

Unfortunately our VCS isn't very helpful here.

branches: 1.10.2; 1.10.12; 1.10.16;
Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.

Merge newlock2 to head.

G/C hp{pa,700}/spinlock.h

branches: 1.7.4;
don't install <machine/db_machdep.h>, this is kernel only

branches: 1.6.4; 1.6.8;
merge ktrace-lwp.

branches: 1.5.12;
Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.

Install <hppa/mcontext.h>

branches: 1.3.6;
Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.

Implement pmc(9) -- An interface to hardware performance monitoring
counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.

branches: 1.1.2; 1.1.4;
Added files to support generic HP PA-RISC based machines. hp700-specific
files to follow.